DMA Engine development
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From: sashiko-bot@kernel.org
To: "Jia Wang" <wangjia@ultrarisc.com>
Cc: devicetree@vger.kernel.org, dmaengine@vger.kernel.org,
	conor+dt@kernel.org, Frank.Li@kernel.org, robh@kernel.org,
	vkoul@kernel.org
Subject: Re: [PATCH 10/12] riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000
Date: Tue, 25 Aug 2026 06:16:14 +0000	[thread overview]
Message-ID: <20260825061614.8D3691F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260824-ultrarisc-dts-v1-10-61ab7aebe9e5@ultrarisc.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Missing clock header and device tree binding for the clock controller.
--

--- Patch [10]: [PATCH 10/12] riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000 ---
commit 5358a00c38b708f59bdaeb5f8358a7078053a24a
Author: Jia Wang <wangjia@ultrarisc.com>

riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000
    
Add the base device tree for the UltraRISC DP1000 SoC. It describes
eight CP100 CPU cores, their cache topology, and essential peripherals
including CLINT, PLIC, the clock controller, pinctrl, GPIO, UART, SPI,
I2C, PCIe, GMAC, and the DMA controller.

> diff --git a/arch/riscv/boot/dts/ultrarisc/dp1000.dtsi b/arch/riscv/boot/dts/ultrarisc/dp1000.dtsi
> new file mode 100644
> index 0000000000000..470ab01e33b8a
> --- /dev/null
> +++ b/arch/riscv/boot/dts/ultrarisc/dp1000.dtsi
> @@ -0,0 +1,899 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright(C) 2026 UltraRISC Technology (Shanghai) Co., Ltd.
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/clock/ultrarisc,dp1000-clk.h>

[Severity: Low]
Does this header exist in the tree or this patch series?

Without this header file, compiling the device tree using make dtbs will
result in a preprocessor build failure.

[ ... ]

> +		clkc: clock-controller@11080000 {
> +			compatible = "ultrarisc,dp1000-clk";

[Severity: Low]
Is there a corresponding YAML binding schema for this compatible string?

Validating the device tree using make dtbs_check will fail due to the missing
schema for the clock controller.

> +			reg = <0x0 0x11080000 0x0 0x1000>;
> +			clocks = <&osc_24m>;
> +			#clock-cells = <1>;
> +		};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260824-ultrarisc-dts-v1-0-61ab7aebe9e5@ultrarisc.com?part=10

  reply	other threads:[~2026-08-25  6:16 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-24  5:54 [PATCH 00/12] riscv: Add device tree support for UltraRISC DP1000 Jia Wang via B4 Relay
2026-08-24  5:54 ` [PATCH 01/12] dt-bindings: riscv: cpus: Fix yamllint style issues Jia Wang via B4 Relay
2026-08-24 16:35   ` Conor Dooley
2026-08-24  5:54 ` [PATCH 02/12] dt-bindings: vendor-prefixes: Add shenrongda Jia Wang via B4 Relay
2026-08-24 17:03   ` Conor Dooley
2026-08-24  5:54 ` [PATCH 03/12] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible Jia Wang via B4 Relay
2026-08-24 17:02   ` Conor Dooley
2026-08-24  5:54 ` [PATCH 04/12] dt-bindings: riscv: Add UltraRISC DP1000 board compatibles Jia Wang via B4 Relay
2026-08-24 17:04   ` Conor Dooley
2026-08-24  5:54 ` [PATCH 05/12] dt-bindings: timer: Add UltraRISC DP1000 CLINT Jia Wang via B4 Relay
2026-08-24 17:05   ` Conor Dooley
2026-08-24  5:54 ` [PATCH 06/12] spi: dt-bindings: snps,dw-apb-ssi: Add compatible for UltraRISC DP1000 SoC Jia Wang via B4 Relay
2026-08-24 17:07   ` Conor Dooley
2026-08-24 17:15     ` Conor Dooley
2026-08-25  8:16       ` Jia Wang
2026-08-24  5:54 ` [PATCH 07/12] dt-bindings: i2c: dw: " Jia Wang via B4 Relay
2026-08-24 17:07   ` Conor Dooley
2026-08-24 17:14     ` Conor Dooley
2026-08-25  8:45       ` Jia Wang
2026-08-24  5:54 ` [PATCH 08/12] dt-bindings: net: snps,dwmac: " Jia Wang via B4 Relay
2026-08-24 17:09   ` Conor Dooley
2026-08-24 17:13     ` Conor Dooley
2026-08-25 10:12       ` Jia Wang
2026-08-25  6:16   ` sashiko-bot
2026-08-24  5:54 ` [PATCH 09/12] dt-bindings: dma: snps,dw-axi-dmac: Add UltraRISC DP1000 compatible Jia Wang via B4 Relay
2026-08-24 17:03   ` Conor Dooley
2026-08-24 17:11     ` Conor Dooley
2026-08-26  5:31       ` Jia Wang
2026-08-24  5:54 ` [PATCH 10/12] riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000 Jia Wang via B4 Relay
2026-08-25  6:16   ` sashiko-bot [this message]
2026-08-24  5:54 ` [PATCH 11/12] riscv: dts: ultrarisc: Add Shenzhen Rongda M0 board device tree Jia Wang via B4 Relay
2026-08-24 13:02   ` Andrew Lunn
2026-08-25  6:16   ` sashiko-bot
2026-08-24  5:54 ` [PATCH 12/12] riscv: dts: ultrarisc: Add Milk-V Titan " Jia Wang via B4 Relay
2026-08-24 13:06   ` Andrew Lunn
2026-08-25  6:16   ` sashiko-bot

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