From: Mukesh Savaliya <mukesh.savaliya@oss.qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>,
viken.dadhaniya@oss.qualcomm.com, andi.shyti@kernel.org,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
vkoul@kernel.org, Frank.Li@kernel.org, andersson@kernel.org,
konradybcio@kernel.org, dmitry.baryshkov@oss.qualcomm.com,
linmq006@gmail.com, quic_jseerapu@quicinc.com, agross@kernel.org,
linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
dmaengine@vger.kernel.org
Cc: krzysztof.kozlowski@oss.qualcomm.com,
bartosz.golaszewski@oss.qualcomm.com,
bjorn.andersson@oss.qualcomm.com
Subject: Re: [PATCH v6 4/4] i2c: qcom-geni: Support multi-owner controllers in GPI mode
Date: Thu, 23 Apr 2026 12:08:39 +0530 [thread overview]
Message-ID: <3b99fdf3-3822-4c75-84a9-2371bea24beb@oss.qualcomm.com> (raw)
In-Reply-To: <52685536-6b77-497b-aa48-621a82da2a0e@oss.qualcomm.com>
Thanks Konrad for the review !
On 4/1/2026 3:51 PM, Konrad Dybcio wrote:
> On 3/31/26 1:47 PM, Mukesh Kumar Savaliya wrote:
>> Some platforms use a QUP-based I2C controller in a configuration where the
>> controller is shared with another system processor. In this setup the
>> operating system must not assume exclusive ownership of the controller or
>> its associated pins.
>>
>> Add support for enabling multi-owner operation when DeviceTree specifies
>> qcom,qup-multi-owner. When enabled, mark the underlying serial engine as
>> shared so the common GENI resource handling avoids selecting the "sleep"
>> pinctrl state, which could disrupt transfers initiated by the other
>> processor.
>>
>> For GPI mode transfers, request lock/unlock TRE sequencing from the GPI
>> driver by setting a single lock_action selector per message, emitting lock
>> before the first message and unlock after the last message (handling the
>> single-message case as well). This serializes access to the shared
>> controller without requiring message-position flags to be passed into the
>> DMA engine layer.
>>
>> Signed-off-by: Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>
>> ---
>
> [...]
>
>> + if (of_property_read_bool(pdev->dev.of_node, "qcom,qup-multi-owner")) {
>> + /*
>> + * Multi-owner controller configuration: the controller may be
>> + * used by another system processor. Mark the SE as shared so
>> + * common GENI resource handling can avoid pin state changes
>> + * that would disrupt the other user.
>> + */
>
> I don't find this comment very useful given we have kerneldoc for that
> property and the behavior you described impacts another file
>
Makes sense, will remove this comment in the next patch upload.
> [...]
>
>> + if (gi2c->se.multi_owner)
>> + dev_err_probe(dev, -EINVAL, "I2C sharing not supported in non GSI mode\n");
>
> return dev_err_probe()
>
Done, Thanks !
> Konrad
>
prev parent reply other threads:[~2026-04-23 6:38 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-31 11:47 [PATCH v6 0/4] Enable multi-owner I2C support for QCOM GENI controllers Mukesh Kumar Savaliya
2026-03-31 11:47 ` [PATCH v6 1/4] dt-bindings: i2c: qcom,i2c-geni: Document multi-owner controller support Mukesh Kumar Savaliya
2026-04-08 14:39 ` Rob Herring (Arm)
2026-03-31 11:47 ` [PATCH v6 2/4] dmaengine: qcom: gpi: Add lock/unlock TREs for multi-owner I2C transfers Mukesh Kumar Savaliya
2026-03-31 11:47 ` [PATCH v6 3/4] soc: qcom: geni-se: Keep pinctrl active for multi-owner controllers Mukesh Kumar Savaliya
2026-04-01 10:19 ` Konrad Dybcio
2026-04-23 6:38 ` Mukesh Savaliya
2026-03-31 11:47 ` [PATCH v6 4/4] i2c: qcom-geni: Support multi-owner controllers in GPI mode Mukesh Kumar Savaliya
2026-04-01 10:21 ` Konrad Dybcio
2026-04-23 6:38 ` Mukesh Savaliya [this message]
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