Re: [PATCH v6 4/4] i2c: qcom-geni: Support multi-owner controllers in GPI mode

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 3/31/26 1:47 PM, Mukesh Kumar Savaliya wrote:
> Some platforms use a QUP-based I2C controller in a configuration where the
> controller is shared with another system processor. In this setup the
> operating system must not assume exclusive ownership of the controller or
> its associated pins.
> 
> Add support for enabling multi-owner operation when DeviceTree specifies
> qcom,qup-multi-owner. When enabled, mark the underlying serial engine as
> shared so the common GENI resource handling avoids selecting the "sleep"
> pinctrl state, which could disrupt transfers initiated by the other
> processor.
> 
> For GPI mode transfers, request lock/unlock TRE sequencing from the GPI
> driver by setting a single lock_action selector per message, emitting lock
> before the first message and unlock after the last message (handling the
> single-message case as well). This serializes access to the shared
> controller without requiring message-position flags to be passed into the
> DMA engine layer.
> 
> Signed-off-by: Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>
> ---

[...]

> +	if (of_property_read_bool(pdev->dev.of_node, "qcom,qup-multi-owner")) {
> +		/*
> +		 * Multi-owner controller configuration: the controller may be
> +		 * used by another system processor. Mark the SE as shared so
> +		 * common GENI resource handling can avoid pin state changes
> +		 * that would disrupt the other user.
> +		 */

I don't find this comment very useful given we have kerneldoc for that
property and the behavior you described impacts another file

[...]

> +		if (gi2c->se.multi_owner)
> +			dev_err_probe(dev, -EINVAL, "I2C sharing not supported in non GSI mode\n");

return dev_err_probe()

Konrad