Re: [PATCH 7/7] dma: fsl-edma: Support source stride for interleaved DMA transfers

[Frank Li <Frank.li@nxp.com>]

On Mon, Nov 24, 2025 at 01:50:28PM +0100, Jean-Michel Hautbois wrote:
> Add support for using src_port_window_size to configure the source
> address stride (SOFF) in DMA transfers. This enables interleaved
> memory access patterns needed for applications like stereo audio
> de-interleaving.
>
> When src_port_window_size is set, the source offset is calculated as:
>   SOFF = src_port_window_size * dst_addr_width
>
> This allows DMA to skip samples in memory while writing consecutive
> samples to the device, enabling efficient stereo-to-mono de-interleaving
> without CPU intervention.

According to defination,

 * @src_port_window_size: The length of the register area in words the data need
 * to be accessed on the device side. It is only used for devices which is using
 * an area instead of a single register to receive the data. Typically the DMA
 * loops in this area in order to transfer the data.

src_port_window_size means the size of the region of continue memory.

It is wrong using src_port_window_size for your case, which want to skip
some memory.

But I think your user case is typical one. Maybe go through
struct dma_interleaved_template.

Frank
>
> Signed-off-by: Jean-Michel Hautbois <jeanmichel.hautbois@yoseli.org>
> ---
>  drivers/dma/fsl-edma-common.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
> index 40ac6a7d8480b9ed2c6a2bdec59b4fda5fcb6271..e510cab24382fa557a2623465393c852b616fef3 100644
> --- a/drivers/dma/fsl-edma-common.c
> +++ b/drivers/dma/fsl-edma-common.c
> @@ -647,6 +647,9 @@ struct dma_async_tx_descriptor *fsl_edma_prep_dma_cyclic(
>  			doff = fsl_chan->is_multi_fifo ? 4 : 0;
>  			if (fsl_chan->cfg.dst_port_window_size)
>  				doff = fsl_chan->cfg.dst_addr_width;
> +			if (fsl_chan->cfg.src_port_window_size)
> +				soff = fsl_chan->cfg.src_port_window_size *
> +					fsl_chan->cfg.dst_addr_width;
>  		} else if (direction == DMA_DEV_TO_MEM) {
>  			src_addr = fsl_chan->dma_dev_addr;
>  			dst_addr = dma_buf_next;
> @@ -714,6 +717,9 @@ struct dma_async_tx_descriptor *fsl_edma_prep_slave_sg(
>  			dst_addr = fsl_chan->dma_dev_addr;
>  			soff = fsl_chan->cfg.dst_addr_width;
>  			doff = 0;
> +			if (fsl_chan->cfg.src_port_window_size)
> +				soff = fsl_chan->cfg.src_port_window_size *
> +					fsl_chan->cfg.dst_addr_width;
>  		} else if (direction == DMA_DEV_TO_MEM) {
>  			src_addr = fsl_chan->dma_dev_addr;
>  			dst_addr = sg_dma_address(sg);
>
> --
> 2.39.5
>