From: Frank Li <Frank.li@nxp.com>
To: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Cc: vkoul@kernel.org, Frank.Li@kernel.org, lgirdwood@gmail.com,
broonie@kernel.org, perex@perex.cz, tiwai@suse.com,
biju.das.jz@bp.renesas.com,
prabhakar.mahadev-lad.rj@bp.renesas.com, p.zabel@pengutronix.de,
geert+renesas@glider.be, fabrizio.castro.jz@renesas.com,
kuninori.morimoto.gx@renesas.com, long.luu.ur@renesas.com,
claudiu.beznea@kernel.org, dmaengine@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org,
linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v5 04/17] dmaengine: sh: rz-dmac: Use rz_dmac_disable_hw()
Date: Tue, 12 May 2026 16:42:39 -0400 [thread overview]
Message-ID: <agOQv0SV_B2GuYUX@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20260512121219.216159-5-claudiu.beznea.uj@bp.renesas.com>
On Tue, May 12, 2026 at 03:12:05PM +0300, Claudiu Beznea wrote:
> Use rz_dmac_disable_hw() instead of open codding it. This unifies the
Nit: typo codding
> code and prepares it for the addition of suspend to RAM and cyclic DMA.
>
> The rz_dmac_disable_hw() from rz_dmac_chan_probe() was moved after
> vchan_init() as it initializes the channel->vc.chan.device used in
> rz_dmac_disable_hw().
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
>
> Changes in v5:
> - none
>
> Changes in v4:
> - in rz_dmac_chan_probe(): moved rz_dmac_disable_hw() after the
> vchan_init(&channel->vc, &dmac->engine) call as this is the one which
> initializes data structures used by the debug code from
> rz_dmac_disable_hw(); updated the patch description to reflect this
>
> Changes in v3:
> - none, this patch is new
>
> drivers/dma/sh/rz-dmac.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c
> index 1717b407ab9e..40ddf534c094 100644
> --- a/drivers/dma/sh/rz-dmac.c
> +++ b/drivers/dma/sh/rz-dmac.c
> @@ -873,7 +873,7 @@ static void rz_dmac_irq_handle_channel(struct rz_dmac_chan *channel)
> channel->index, chstat);
>
> scoped_guard(spinlock_irqsave, &channel->vc.lock)
> - rz_dmac_ch_writel(channel, CHCTRL_DEFAULT, CHCTRL, 1);
> + rz_dmac_disable_hw(channel);
> return;
> }
>
> @@ -1000,15 +1000,15 @@ static int rz_dmac_chan_probe(struct rz_dmac *dmac,
> }
> rz_lmdesc_setup(channel, lmdesc);
>
> - /* Initialize register for each channel */
> - rz_dmac_ch_writel(channel, CHCTRL_DEFAULT, CHCTRL, 1);
> -
> channel->vc.desc_free = rz_dmac_virt_desc_free;
> vchan_init(&channel->vc, &dmac->engine);
> INIT_LIST_HEAD(&channel->ld_queue);
> INIT_LIST_HEAD(&channel->ld_free);
> INIT_LIST_HEAD(&channel->ld_active);
>
> + /* Initialize register for each channel */
> + rz_dmac_disable_hw(channel);
> +
> /* Request the channel interrupt. */
> scnprintf(pdev_irqname, sizeof(pdev_irqname), "ch%u", index);
> irq = platform_get_irq_byname(pdev, pdev_irqname);
> --
> 2.43.0
>
next prev parent reply other threads:[~2026-05-12 20:42 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-12 12:12 [PATCH v5 00/17] Renesas: dmaengine and ASoC fixes Claudiu Beznea
2026-05-12 12:12 ` [PATCH v5 01/17] dmaengine: sh: rz-dmac: Move interrupt request after everything is set up Claudiu Beznea
2026-05-12 20:28 ` Frank Li
2026-05-13 21:44 ` sashiko-bot
2026-05-12 12:12 ` [PATCH v5 02/17] dmaengine: sh: rz-dmac: Fix incorrect NULL check on list_first_entry() Claudiu Beznea
2026-05-12 20:35 ` Frank Li
2026-05-13 13:31 ` Claudiu Beznea
2026-05-13 22:00 ` sashiko-bot
2026-05-12 12:12 ` [PATCH v5 03/17] dmaengine: sh: rz-dmac: Use list_first_entry_or_null() Claudiu Beznea
2026-05-12 20:38 ` Frank Li
2026-05-13 22:18 ` sashiko-bot
2026-05-12 12:12 ` [PATCH v5 04/17] dmaengine: sh: rz-dmac: Use rz_dmac_disable_hw() Claudiu Beznea
2026-05-12 20:42 ` Frank Li [this message]
2026-05-12 12:12 ` [PATCH v5 05/17] dmaengine: sh: rz-dmac: Add helper to compute the lmdesc address Claudiu Beznea
2026-05-12 20:44 ` Frank Li
2026-05-12 12:12 ` [PATCH v5 06/17] dmaengine: sh: rz-dmac: Save the start LM descriptor Claudiu Beznea
2026-05-12 20:48 ` Frank Li
2026-05-13 13:33 ` Claudiu Beznea
2026-05-13 23:52 ` sashiko-bot
2026-05-12 12:12 ` [PATCH v5 07/17] dmaengine: sh: rz-dmac: Add helper to check if the channel is enabled Claudiu Beznea
2026-05-12 20:49 ` Frank Li
2026-05-13 23:59 ` sashiko-bot
2026-05-12 12:12 ` [PATCH v5 08/17] dmaengine: sh: rz-dmac: Add helper to check if the channel is paused Claudiu Beznea
2026-05-12 20:57 ` Frank Li
2026-05-12 12:12 ` [PATCH v5 09/17] dmaengine: sh: rz-dmac: Use virt-dma APIs for channel descriptor processing Claudiu Beznea
2026-05-12 21:38 ` Frank Li
2026-05-13 13:34 ` Claudiu Beznea
2026-05-14 0:42 ` sashiko-bot
2026-05-12 12:12 ` [PATCH v5 10/17] dmaengine: sh: rz-dmac: Refactor pause/resume code Claudiu Beznea
2026-05-12 21:43 ` Frank Li
2026-05-13 13:35 ` Claudiu Beznea
2026-05-14 0:57 ` sashiko-bot
2026-05-12 12:12 ` [PATCH v5 11/17] dmaengine: sh: rz-dmac: Drop the update of channel->chctrl with CHCTRL_SETEN Claudiu Beznea
2026-05-12 21:55 ` Frank Li
2026-05-12 12:12 ` [PATCH v5 12/17] dmaengine: sh: rz-dmac: Add cyclic DMA support Claudiu Beznea
2026-05-12 22:00 ` Frank Li
2026-05-13 13:38 ` Claudiu Beznea
2026-05-14 1:43 ` sashiko-bot
2026-05-12 12:12 ` [PATCH v5 13/17] dmaengine: sh: rz-dmac: Add runtime PM support Claudiu Beznea
2026-05-12 22:03 ` Frank Li
2026-05-13 13:39 ` Claudiu Beznea
2026-05-13 19:56 ` Frank Li
2026-05-14 9:20 ` Claudiu Beznea
2026-05-14 2:08 ` sashiko-bot
2026-05-12 12:12 ` [PATCH v5 14/17] dmaengine: sh: rz-dmac: Add suspend to RAM support Claudiu Beznea
2026-05-14 3:04 ` sashiko-bot
2026-05-12 12:12 ` [PATCH v5 15/17] ASoC: renesas: rz-ssi: Add pause support Claudiu Beznea
2026-05-14 3:54 ` sashiko-bot
2026-05-12 12:12 ` [PATCH v5 16/17] ASoC: renesas: rz-ssi: Use generic PCM dmaengine APIs Claudiu Beznea
2026-05-14 4:52 ` sashiko-bot
2026-05-12 12:12 ` [PATCH v5 17/17] dmaengine: sh: rz-dmac: Set the Link End (LE) bit on the last descriptor Claudiu Beznea
2026-05-14 5:22 ` sashiko-bot
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