Re: [PATCH RFC 1/3] dmaengine: Support address bus widths of 32 bytes and above

[Frank Li <Frank.li@oss.nxp.com>]

On Tue, Jun 16, 2026 at 04:40:52PM +0100, Nuno Sá via B4 Relay wrote:
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>
> From: Nuno Sá <nuno.sa@analog.com>
>
> The src_addr_widths and dst_addr_widths capability masks encode each
> supported width as a bit whose position equals the corresponding
> enum dma_slave_buswidth value (e.g. DMA_SLAVE_BUSWIDTH_4_BYTES sets
> bit 4). As these masks are plain u32, widths of 32 bytes and above
> (DMA_SLAVE_BUSWIDTH_32/64/128_BYTES map to bits 32, 64 and 128) cannot
> be represented at all.

This is problem, which should be fixed.

>
> Introduce bitmap-based masks that span the full enum range. To allow
> controllers and consumers to be converted incrementally, the legacy
> u32 fields are kept alongside the new bitmaps: producers populate the
> bitmap (mirroring the low 32 bits back into the legacy field) and
> dma_get_slave_caps() folds a legacy-only producer's u32 into the
> returned bitmap.
>
> Add dma_set_{src,dst}_addr_mask() for producers and
> dma_slave_caps_get_{src,dst}_width_min() for consumers so that, once
> every user is converted, the legacy u32 fields can be dropped and the
> bitmaps renamed without further churn.

Good mirgration plan.

Frank