Re: [PATCH RFC 2/3] dmaengine: dma-axi-dmac: Switch to bitmap-based address width masks

[Frank Li <Frank.li@oss.nxp.com>]

On Tue, Jun 23, 2026 at 01:27:37PM +0300, Andy Shevchenko wrote:
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>
> On Tue, Jun 23, 2026 at 11:14:51AM +0100, Nuno Sá wrote:
> > On Mon, Jun 22, 2026 at 01:34:39PM -0500, Frank Li wrote:
> > > On Mon, Jun 22, 2026 at 05:09:10PM +0100, Nuno Sá wrote:
> > > > On Mon, Jun 22, 2026 at 09:51:46AM -0500, Frank Li wrote:
> > > > > On Mon, Jun 22, 2026 at 10:26:41AM +0100, Nuno Sá wrote:
>
> ...
>
> > > If support 4Byte, it native supportted any N*4Byte.
> > >
> > > So needn't bit mask to indicate all support bytes.
> >
> > > > > each transfer, dma_slave_cfg should set specific bus width requirement.
> > > > >
> > > > > If memory have requirement for 32bytes, typical cache line length for
> > > > > hardwaer coherence transfer, it should use dmaengine_alignment.
> > > > >
> > > > > So I think only need set min value should be enough if fix pcm_dmaegine.c.
> > > >
> > > > What fix for pcm_dmaegine.c? Not sure there's anything to be fixed in
> > > > there... The code seems to use the dma bus width to match against PCM
> > > > formats supported and filter only the ones we can support (per dma cap).
> > >
> > > if cap is one byte, it should support 8, 16, 24, 32, 64
> > > if cap is two byte, it should support 16, 32, 64
> > > if cap is 4 byte,  it only support 32 and 64.
> >
> > Well, Now I see your point but not exactly. Because we do have
> >
> > DMA_SLAVE_BUSWIDTH_3_BYTES
> >
> > and it might be used by the pcm_dmaengine code,
> >
> > There are also some controllers that set it. But it looks like all that
> > set it also set 1byte.
>
> But this might be not true for all HW in the world. In previous reply I made
> a comparison with MMIO accesses where not all HW that needs 1-byte read can
> cope with that. If there is some proof that this is the case when 1-byte
> DMA bus implies 3-bytes (or other odd number), I would like to see it.

Looks like it indicates how many data transfer by one dma burst, not
indicate real hardware bus/address width.

let me think more.

Frank

>
> > So your suggestion might still hold and work but I'm not too convinced
> > that having the array complicates things that bad when compared with the
> > risk of breaking existing code.
>
> > > Needn't mask each bit.
>
> --
> With Best Regards,
> Andy Shevchenko
>
>