From: Frank Li <Frank.li@oss.nxp.com>
To: "Nuno Sá" <noname.nuno@gmail.com>
Cc: nuno.sa@analog.com, dmaengine@vger.kernel.org,
linux-iio@vger.kernel.org, Vinod Koul <vkoul@kernel.org>,
Frank Li <Frank.Li@kernel.org>,
Lars-Peter Clausen <lars@metafoo.de>,
Jonathan Cameron <jic23@kernel.org>,
David Lechner <dlechner@baylibre.com>,
Andy Shevchenko <andy@kernel.org>
Subject: Re: [PATCH RFC 2/3] dmaengine: dma-axi-dmac: Switch to bitmap-based address width masks
Date: Fri, 19 Jun 2026 11:22:54 -0500 [thread overview]
Message-ID: <ajVs3jwoxq7Jhop1@SMW015318> (raw)
In-Reply-To: <ajQkupPzv8-GdEjv@nsa>
On Thu, Jun 18, 2026 at 06:10:52PM +0100, Nuno Sá wrote:
> [You don't often get email from noname.nuno@gmail.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> On Tue, Jun 16, 2026 at 11:23:39AM -0500, Frank Li wrote:
> > On Tue, Jun 16, 2026 at 04:40:53PM +0100, Nuno Sá via B4 Relay wrote:
> > > [You don't often get email from devnull+nuno.sa.analog.com@kernel.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
> > >
> > > From: Nuno Sá <nuno.sa@analog.com>
> > >
> > > Advertise the source and destination bus widths through the new
> > > dma_set_{src,dst}_addr_mask() helpers instead of open-coding the legacy
> > > BIT() mask. This moves the driver onto the representation that can
> > > express widths of 32 bytes and above and allows the legacy u32 field to
> > > be removed once all users are converted.
> > >
> > > While at it, give the channel width members their proper
> > > enum dma_slave_buswidth type.
> > >
> > > Signed-off-by: Nuno Sá <nuno.sa@analog.com>
> > > ---
> > > drivers/dma/dma-axi-dmac.c | 12 ++++++++----
> > > 1 file changed, 8 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/dma/dma-axi-dmac.c b/drivers/dma/dma-axi-dmac.c
> > > index d47ff27e1408..19c258d511ca 100644
> > > --- a/drivers/dma/dma-axi-dmac.c
> > > +++ b/drivers/dma/dma-axi-dmac.c
> > > @@ -152,8 +152,8 @@ struct axi_dmac_chan {
> > > struct list_head active_descs;
> > > enum dma_transfer_direction direction;
> > >
> > > - unsigned int src_width;
> > > - unsigned int dest_width;
> > > + enum dma_slave_buswidth src_width;
> > > + enum dma_slave_buswidth dest_width;
> > > unsigned int src_type;
> > > unsigned int dest_type;
> > >
> > > @@ -1262,8 +1262,12 @@ static int axi_dmac_probe(struct platform_device *pdev)
> > > dma_dev->device_terminate_all = axi_dmac_terminate_all;
> > > dma_dev->device_synchronize = axi_dmac_synchronize;
> > > dma_dev->dev = &pdev->dev;
> > > - dma_dev->src_addr_widths = BIT(dmac->chan.src_width);
> > > - dma_dev->dst_addr_widths = BIT(dmac->chan.dest_width);
> > > + ret = dma_set_src_addr_mask(dma_dev, &dmac->chan.src_width, 1);
> > > + if (ret)
> > > + return ret;
> > > + ret = dma_set_dst_addr_mask(dma_dev, &dmac->chan.dest_width, 1);
> > > + if (ret)
> > > + return ret;
> >
> >
> > This patch is okay. I think most system only set one width once, do we
> > really need pass down arrary.
>
> I think so. See:
>
> https://elixir.bootlin.com/linux/v7.1/source/drivers/dma/st_fdma.c#L723
> https://elixir.bootlin.com/linux/v7.1/source/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c#L1565
> https://elixir.bootlin.com/linux/v7.1/source/drivers/dma/hsu/hsu.c#L475
>
> And likely there are more. To fully support all widths I'm not seeing
> any other obvious way.
I need more time to understand why need src_addr_width, which looks like
address alignmenet requirment.
If it is address alginment requirement, only need lowest one, like suport
byte, must be support other alignments.
if it is total address space, which should be controller by dma-ranges.
Frank
>
> - Nuno Sá
> >
> > Frank
> >
> > > dma_dev->directions = BIT(dmac->chan.direction);
> > > dma_dev->residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR;
> > > dma_dev->max_sg_burst = 31; /* 31 SGs maximum in one burst */
> > >
> > > --
> > > 2.54.0
> > >
> > >
next prev parent reply other threads:[~2026-06-19 16:23 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-16 15:40 [PATCH RFC 0/3] dmaengine: Support address bus widths of 32 bytes and above Nuno Sá via B4 Relay
2026-06-16 15:40 ` [PATCH RFC 1/3] " Nuno Sá via B4 Relay
2026-06-16 15:55 ` sashiko-bot
2026-06-16 16:19 ` Frank Li
2026-06-18 17:13 ` Nuno Sá
2026-06-18 18:08 ` Frank Li
2026-06-16 15:40 ` [PATCH RFC 2/3] dmaengine: dma-axi-dmac: Switch to bitmap-based address width masks Nuno Sá via B4 Relay
2026-06-16 15:52 ` sashiko-bot
2026-06-16 16:23 ` Frank Li
2026-06-18 17:10 ` Nuno Sá
2026-06-19 16:22 ` Frank Li [this message]
2026-06-19 19:02 ` Frank Li
2026-06-16 15:40 ` [PATCH RFC 3/3] iio: buffer-dmaengine: Use dma_slave_caps width accessors Nuno Sá via B4 Relay
2026-06-16 16:25 ` Frank Li
2026-06-17 9:57 ` [PATCH RFC 0/3] dmaengine: Support address bus widths of 32 bytes and above Andy Shevchenko
2026-06-17 14:19 ` Nuno Sá
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