Re: [PATCH v4-S1 0/5] dpaa2: bus, DMA and mempool base fixes

[Stephen Hemminger <stephen@networkplumber.org>]

On Tue, 22 Sep 2026 14:51:53 +0530
Prashant Gupta <prashant.gupta_3@nxp.com> wrote:

> This series is the first of four that upstream the missing NXP dpaa2
> driver changes. It collects the foundational bus/fslmc, dma/dpaa2 and
> mempool/dpaa2 fixes that the later series build on:
> 
> - defer fslmc bus initialization to probe and reduce probe-time logging
>   and MC traffic,
> - fix an array-bounds warning and validate IOVA in the dpaa2 QDMA
>   pre-populate helpers,
> - support fetching the mempool ops index from the primary process in a
>   secondary process.
> 
> Every commit builds cleanly (including the aarch64 DPAA cross build with
> -Werror) and the series is bisectable.
> 
> Gagandeep Singh (1):
>   dma/dpaa2: validate IOVA in pre-populate helpers
> 
> Hemant Agrawal (1):
>   bus/fslmc: reduce probe-time logging and MC traffic
> 
> Jun Yang (2):
>   dma/dpaa2: fix array-bounds warning in dequeue path
>   mempool/dpaa2: support ops index from primary in secondary
> 
> Prashant Gupta (1):
>   bus/fslmc: defer bus initialization to probe
> 
>  drivers/bus/fslmc/fslmc_bus.c            |  92 +++++++++++---------
>  drivers/bus/fslmc/fslmc_vfio.c           |   3 +-
>  drivers/bus/fslmc/portal/dpaa2_hw_dprc.c |   5 ++
>  drivers/dma/dpaa2/dpaa2_qdma.c           |  44 +++++++---
>  drivers/mempool/dpaa2/dpaa2_hw_mempool.c | 103 ++++++++++++++++++++++-
>  5 files changed, 191 insertions(+), 56 deletions(-)
> 

Several issues reported by AI on this series:

[PATCH v4-S1 0/5] fslmc bus, dpaa2 dma and mempool fixes

Applied to main (6bbb7b3). Per-commit build with -Dwerror=true passes
for all 5 patches (x86, gcc 13, bus/fslmc, mempool/dpaa2, net/dpaa2,
dma/dpaa2, crypto/dpaa2_sec, event/dpaa2).

Series-level:
Three of five commit messages (2, 3, 4) do not describe the code in
the patch. They read as carried over from an earlier revision.
Rewrite them against the actual diffs.


Patch 2/5 bus/fslmc: reduce probe-time logging and MC traffic

Warning: the body only covers the NOTICE -> DEBUG change. The
dpaa2_hw_dprc.c hunk, which skips dprc_get_connection() for blocked
devices, is not mentioned. Split it into its own patch or describe it.

Warning: the skip tests only devargs->policy == RTE_DEV_BLOCKED. With
an allowlist (-a, or no_auto_probing), non-listed devices have no
devargs and are still queried over MC. Use
rte_bus_device_is_ignored(&rte_fslmc_bus, dev->device.name), as the
pci, cdx, auxiliary, platform and uacce buses do.


Patch 3/5 dma/dpaa2: fix array-bounds warning in dequeue path

Warning: the commit message describes a per-queue idxs[] scratch
buffer and merging the LONG and SG fle_sdd handling. Neither is in
the diff. The patch actually does two things. It rewrites
qdma_cntx_idx_ring_eq() as a two-part memcpy with wrap. It moves the
SG fle_elem append after the ring enqueue and returns fle_sdd to the
pool directly on -ENOSPC. Describe those changes. Also name the
compiler and version that emits the warning.


Patch 4/5 dma/dpaa2: validate IOVA in pre-populate helpers

Warning: subject and body describe changing fle_sdd_pre_populate()
and fle_sdd_sg_pre_populate() to use DPAA2_VADDR_TO_IOVA_AND_CHECK()
and return errors. Neither helper is touched. The diff adds a single
rte_mempool_mem_iter() check of the fle_pool at vchan setup. Fix the
subject and message.

Warning: the new error path returns -ENOMEM without freeing
vqs[vchan].fle_pool. A second vchan_setup on the same vchan then fails
in rte_mempool_create() with a name collision. Free the pool and
clear the pointer.


Patch 5/5 mempool/dpaa2: support ops index from primary in secondary

Error: rte_dpaa2_mpool_get_ops_idx() is called per op in the
dpaa2_sec enqueue fast path (dpaa2_sec_dpseci.c:1544, :1903). In a
secondary it now issues rte_mp_request_sync() with a 5 s timeout
whenever the cached value is still RTE_MEMPOOL_MAX_OPS_IDX. That is
the steady state when the primary has not created a dpaa2 pool,
because the reply is the sentinel and nothing is cached. The result
is a blocking IPC round trip per crypto op, from multiple lcores
concurrently, and a 5 s stall per op if the primary is gone.

The IPC is not needed. Mempool ops are registered by constructor in
the same order in every process, which the multi-process mempool
model already depends on, so the index is process-invariant. Resolve
it locally in the secondary by looking up the "dpaa2" name in
rte_mempool_ops_table once, and cache it. That removes the IPC
channel, the action registration and the atomic.

Warning: the reply handler path does not check
mp_reply.msgs->len_param before memcpy from msg_data.

Warning: on rte_mp_request_sync() failure the function returns -1,
not an errno.

Info: rte_mp_action_register() returns ENOTSUP for --in-memory and
--no-shconf. That is a runtime condition, not "no secondary process
support enabled at build time" as the message says.