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From: Prashant Gupta <prashant.gupta_3@nxp.com>
To: stephen@networkplumber.org, dev@dpdk.org
Cc: Jun Yang <jun.yang@nxp.com>, Hemant Agrawal <hemant.agrawal@nxp.com>
Subject: [PATCH v4-S1 5/5] mempool/dpaa2: support ops index from primary in secondary
Date: Tue, 22 Sep 2026 14:51:58 +0530	[thread overview]
Message-ID: <20260922092158.2340839-6-prashant.gupta_3@nxp.com> (raw)
In-Reply-To: <20260922092158.2340839-1-prashant.gupta_3@nxp.com>

From: Jun Yang <jun.yang@nxp.com>

Secondary processes call rte_dpaa2_mpool_get_ops_idx() but the ops
index is registered only in the primary process. The secondary had no
way to learn the index, causing it to use the initial sentinel value
RTE_MEMPOOL_MAX_OPS_IDX and return an error.

Register an IPC action handler in the primary during pool creation.
Secondary processes send DPAA2_POOL_OPS_IDX_REQ over the
dpaa2_pool_mp_sync channel and receive the ops index back.

Also handle the case where rte_mp_action_register returns ENOTSUP
(e.g. no secondary process support enabled at build time) by
treating it as non-fatal, and improve the error message in
rte_hw_mbuf_free_pool to include the pool name.

Signed-off-by: Jun Yang <jun.yang@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/mempool/dpaa2/dpaa2_hw_mempool.c | 103 ++++++++++++++++++++++-
 1 file changed, 100 insertions(+), 3 deletions(-)

diff --git a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
index ee001d8ce0..666338fc32 100644
--- a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
+++ b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
@@ -34,16 +34,96 @@
 
 #include <dpaax_iova_table.h>
 
+#define DPAA2_POOL_MP_SYNC "dpaa2_pool_mp_sync"
+#define DPAA2_POOL_OPS_IDX_REQ 0x100
+#define DPAA2_POOL_OPS_IDX_RSP 0x101
+
+static RTE_ATOMIC(int) s_dpaa2_pool_mp_msg_setup;
+
+struct dpaa2_pool_mp_msg {
+	uint16_t msg_type;
+	uint8_t msg_data[];
+};
+
 RTE_EXPORT_INTERNAL_SYMBOL(rte_dpaa2_bpid_info)
 struct dpaa2_bp_info *rte_dpaa2_bpid_info;
 static struct dpaa2_bp_list *h_bp_list;
 
 static int16_t s_dpaa2_pool_ops_idx = RTE_MEMPOOL_MAX_OPS_IDX;
 
+static int
+dpaa2_mbuf_pool_mp_primary(const struct rte_mp_msg *msg,
+	const void *peer)
+{
+	struct rte_mp_msg reply;
+	const struct dpaa2_pool_mp_msg *req_msg = (const void *)msg->param;
+	struct dpaa2_pool_mp_msg *rsp_msg = (void *)reply.param;
+
+	memset(&reply, 0, sizeof(reply));
+
+	switch (req_msg->msg_type) {
+	case DPAA2_POOL_OPS_IDX_REQ:
+		rsp_msg->msg_type = DPAA2_POOL_OPS_IDX_RSP;
+		memcpy(rsp_msg->msg_data, &s_dpaa2_pool_ops_idx,
+			sizeof(s_dpaa2_pool_ops_idx));
+		reply.len_param = sizeof(struct dpaa2_pool_mp_msg) +
+			sizeof(s_dpaa2_pool_ops_idx);
+		break;
+	default:
+		DPAA2_MEMPOOL_ERR("%s received invalid request(%d)",
+			__func__, req_msg->msg_type);
+		return -ENOTSUP;
+	}
+
+	strlcpy(reply.name, DPAA2_POOL_MP_SYNC, sizeof(reply.name));
+	return rte_mp_reply(&reply, peer);
+}
+
 RTE_EXPORT_INTERNAL_SYMBOL(rte_dpaa2_mpool_get_ops_idx)
 int rte_dpaa2_mpool_get_ops_idx(void)
 {
-	return s_dpaa2_pool_ops_idx;
+	struct rte_mp_msg mp_req;
+	struct rte_mp_reply mp_reply;
+	struct timespec ts = {.tv_sec = 5, .tv_nsec = 0};
+	int ret = 0;
+	struct dpaa2_pool_mp_msg *req_msg = (void *)mp_req.param;
+	struct dpaa2_pool_mp_msg *rsp_msg;
+
+	if (rte_eal_process_type() == RTE_PROC_PRIMARY ||
+		s_dpaa2_pool_ops_idx != RTE_MEMPOOL_MAX_OPS_IDX)
+		return s_dpaa2_pool_ops_idx;
+
+	memset(&mp_req, 0, sizeof(mp_req));
+	strlcpy(mp_req.name, DPAA2_POOL_MP_SYNC, sizeof(mp_req.name));
+	mp_req.len_param = sizeof(struct dpaa2_pool_mp_msg) +
+		sizeof(s_dpaa2_pool_ops_idx);
+	req_msg->msg_type = DPAA2_POOL_OPS_IDX_REQ;
+	memset(&mp_reply, 0, sizeof(struct rte_mp_reply));
+	ret = rte_mp_request_sync(&mp_req, &mp_reply, &ts);
+	if (ret) {
+		DPAA2_MEMPOOL_ERR("%s Failed to get response(%d)",
+			__func__, ret);
+		free(mp_reply.msgs);
+		return ret;
+	}
+	if (!mp_reply.msgs) {
+		DPAA2_MEMPOOL_ERR("%s Failed to get response message",
+			__func__);
+		return -EINVAL;
+	}
+	rsp_msg = (void *)mp_reply.msgs;
+	if (rsp_msg->msg_type == DPAA2_POOL_OPS_IDX_RSP) {
+		memcpy(&s_dpaa2_pool_ops_idx, rsp_msg->msg_data,
+			sizeof(s_dpaa2_pool_ops_idx));
+		ret = 0;
+	} else {
+		DPAA2_MEMPOOL_ERR("%s received invalid response(%d)",
+			__func__, rsp_msg->msg_type);
+		ret = -EINVAL;
+	}
+	free(mp_reply.msgs);
+
+	return ret ? ret : s_dpaa2_pool_ops_idx;
 }
 
 static int
@@ -128,10 +208,27 @@ rte_hw_mbuf_create_pool(struct rte_mempool *mp)
 	if (s_dpaa2_pool_ops_idx == RTE_MEMPOOL_MAX_OPS_IDX) {
 		s_dpaa2_pool_ops_idx = mp->ops_index;
 	} else if (s_dpaa2_pool_ops_idx != mp->ops_index) {
-		DPAA2_MEMPOOL_ERR("Only single ops index only");
+		DPAA2_MEMPOOL_ERR("Single ops index only");
 		ret = -EINVAL;
 		goto err4;
 	}
+	if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+		int expected = 0;
+
+		if (rte_atomic_compare_exchange_strong_explicit(
+				&s_dpaa2_pool_mp_msg_setup, &expected, 1,
+				rte_memory_order_relaxed,
+				rte_memory_order_relaxed)) {
+			ret = rte_mp_action_register(DPAA2_POOL_MP_SYNC,
+				dpaa2_mbuf_pool_mp_primary);
+			if (ret && rte_errno != ENOTSUP) {
+				rte_atomic_store_explicit(&s_dpaa2_pool_mp_msg_setup, 0,
+					rte_memory_order_relaxed);
+				ret = -rte_errno;
+				goto err4;
+			}
+		}
+	}
 
 	bp_list->next = h_bp_list;
 	bp_list->mp = mp;
@@ -172,7 +269,7 @@ rte_hw_mbuf_free_pool(struct rte_mempool *mp)
 	struct dpaa2_dpbp_dev *dpbp_node;
 
 	if (!mp->pool_data) {
-		DPAA2_MEMPOOL_ERR("Not a valid dpaa2 buffer pool");
+		DPAA2_MEMPOOL_ERR("Not a valid dpaa2 buffer pool %s", mp->name);
 		return;
 	}
 
-- 
2.43.0


  parent reply	other threads:[~2026-09-22  9:22 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-15 11:34 [PATCH v3-S1 0/5] dpaa2: bus, DMA and mempool base fixes Prashant Gupta
2026-09-15 11:34 ` [PATCH v3-S1 1/5] bus/fslmc: defer bus initialization to probe Prashant Gupta
2026-09-15 11:34 ` [PATCH v3-S1 2/5] bus/fslmc: reduce probe-time logging and MC traffic Prashant Gupta
2026-09-15 11:34 ` [PATCH v3-S1 3/5] dma/dpaa2: fix array-bounds warning in dequeue path Prashant Gupta
2026-09-15 11:34 ` [PATCH v3-S1 4/5] dma/dpaa2: validate IOVA in pre-populate helpers Prashant Gupta
2026-09-15 11:34 ` [PATCH v3-S1 5/5] mempool/dpaa2: support ops index from primary in secondary Prashant Gupta
2026-09-15 15:24 ` [PATCH v3-S1 0/5] dpaa2: bus, DMA and mempool base fixes Stephen Hemminger
2026-09-22  9:21 ` [PATCH v4-S1 " Prashant Gupta
2026-09-22  9:21   ` [PATCH v4-S1 1/5] bus/fslmc: defer bus initialization to probe Prashant Gupta
2026-09-22  9:21   ` [PATCH v4-S1 2/5] bus/fslmc: reduce probe-time logging and MC traffic Prashant Gupta
2026-09-22  9:21   ` [PATCH v4-S1 3/5] dma/dpaa2: fix array-bounds warning in dequeue path Prashant Gupta
2026-09-22  9:21   ` [PATCH v4-S1 4/5] dma/dpaa2: validate IOVA in pre-populate helpers Prashant Gupta
2026-09-22  9:21   ` Prashant Gupta [this message]
2026-09-22 13:59   ` [PATCH v4-S1 0/5] dpaa2: bus, DMA and mempool base fixes Stephen Hemminger
2026-09-29 14:21   ` [PATCH v5-S1 " Prashant Gupta
2026-09-29 14:21     ` [PATCH v5-S1 1/5] bus/fslmc: defer bus initialization to probe Prashant Gupta
2026-09-29 14:21     ` [PATCH v5-S1 2/5] bus/fslmc: reduce probe-time logging and skip ignored devices Prashant Gupta
2026-09-29 14:21     ` [PATCH v5-S1 3/5] dma/dpaa2: fix array-bounds warning and SG FD double-put Prashant Gupta
2026-09-29 14:21     ` [PATCH v5-S1 4/5] dma/dpaa2: validate FLE pool IOVA mapping at vchan setup Prashant Gupta
2026-09-29 14:21     ` [PATCH v5-S1 5/5] mempool/dpaa2: look up ops index locally in secondary Prashant Gupta
2026-09-29 15:45     ` [PATCH v5-S1 0/5] dpaa2: bus, DMA and mempool base fixes Stephen Hemminger
2026-10-06 14:57       ` [EXT] " Prashant Gupta
2026-10-06 15:07     ` [PATCH v6-S1 0/6] " Prashant Gupta
2026-10-06 15:07       ` [PATCH v6-S1 1/6] bus/fslmc: defer bus initialization to probe Prashant Gupta
2026-10-06 15:07       ` [PATCH v6-S1 2/6] bus/fslmc: reduce probe logging and skip ignored devices Prashant Gupta
2026-10-06 15:07       ` [PATCH v6-S1 3/6] dma/dpaa2: use memcpy to fill completion index ring Prashant Gupta
2026-10-06 15:07       ` [PATCH v6-S1 4/6] dma/dpaa2: release SG FLE on completion ring overflow Prashant Gupta
2026-10-06 15:07       ` [PATCH v6-S1 5/6] dma/dpaa2: validate FLE pool IOVA mapping at vchan setup Prashant Gupta
2026-10-06 15:07       ` [PATCH v6-S1 6/6] mempool/dpaa2: look up ops index locally in secondary Prashant Gupta
2026-10-07 15:51       ` [PATCH v6-S1 0/6] dpaa2: bus, DMA and mempool base fixes Stephen Hemminger

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