[PATCH] common/mlx5: fix overlapping memory ranges

[PATCH] common/mlx5: fix overlapping memory ranges

[Viacheslav Ovsiienko]

The mlx5 driver requires special objects named Memory Regions
(MR) to perform DMA operations with network data. The memory
pool(s) is used to provide memory and to cover pool addresses
the mlx5 PMD -pre-creates the appropriate MRs on Rx queue creation.

The pool memory can be non-contigous and split into segments.
The PMD created MRs on the page alignment segment boundaries
and it could cause the overlapping MRs (in case if the end
address of one segmend is aligned to ceiling and the next
segment start address is aligned to the floor).

The MRs overlapping could cause the wrong MR fetching from the
cache for the mbufs in the overlapping area if the starting
mbuf address falls into overlapped area and raise the
hardware memory protection exception.

Fixes: 690b2a88c2f7 ("common/mlx5: add mempool registration facilities")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
 drivers/common/mlx5/mlx5_common_mr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/common/mlx5/mlx5_common_mr.c b/drivers/common/mlx5/mlx5_common_mr.c
index aa2d5e88a4..e968e928a1 100644
--- a/drivers/common/mlx5/mlx5_common_mr.c
+++ b/drivers/common/mlx5/mlx5_common_mr.c
@@ -1504,7 +1504,7 @@ mlx5_get_mempool_ranges(struct rte_mempool *mp, bool is_extmem,
 	qsort(chunks, chunks_n, sizeof(chunks[0]), mlx5_range_compare_start);
 	contig_n = 1;
 	for (i = 1; i < chunks_n; i++)
-		if (chunks[i - 1].end != chunks[i].start) {
+		if (chunks[i - 1].end < chunks[i].start) {
 			chunks[contig_n - 1].end = chunks[i - 1].end;
 			chunks[contig_n] = chunks[i];
 			contig_n++;
-- 
2.34.1

Re: [PATCH] common/mlx5: fix overlapping memory ranges

[Raslan Darawsheh]

Hi,


On 21/07/2026 3:13 PM, Viacheslav Ovsiienko wrote:
> The mlx5 driver requires special objects named Memory Regions
> (MR) to perform DMA operations with network data. The memory
> pool(s) is used to provide memory and to cover pool addresses
> the mlx5 PMD -pre-creates the appropriate MRs on Rx queue creation.
> 
> The pool memory can be non-contigous and split into segments.
> The PMD created MRs on the page alignment segment boundaries
> and it could cause the overlapping MRs (in case if the end
> address of one segmend is aligned to ceiling and the next
> segment start address is aligned to the floor).
> 
> The MRs overlapping could cause the wrong MR fetching from the
> cache for the mbufs in the overlapping area if the starting
> mbuf address falls into overlapped area and raise the
> hardware memory protection exception.
> 
> Fixes: 690b2a88c2f7 ("common/mlx5: add mempool registration facilities")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards
Raslan Darawsheh