* [PATCH v2 20/26] net/qede: add PCI ids for new chip variant
From: Rasesh Mody @ 2017-01-05 7:04 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Add PCI IDs for new asic type (defined as CHIP_NUM_AH_xxx).
It supports 50G, 40G, 25G and 10G speeds.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore_dev.c | 7 +++++-
drivers/net/qede/qede_ethdev.c | 29 +++++++++++++++++------
drivers/net/qede/qede_ethdev.h | 47 +++++++++++++++++++++++--------------
3 files changed, 57 insertions(+), 26 deletions(-)
diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
index 5a29c45..03620d9 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -2365,7 +2365,12 @@ static enum _ecore_status_t ecore_hw_get_resc(struct ecore_hwfn *p_hwfn,
#endif
for (res_id = 0; res_id < ECORE_MAX_RESC; res_id++) {
- rc = ecore_hw_set_resc_info(p_hwfn, res_id, drv_resc_alloc);
+ /* @@@TMP for AH:
+ * Force the driver's default resource allocation in case there
+ * is a diff with the MFW allocation value.
+ */
+ rc = ecore_hw_set_resc_info(p_hwfn, res_id,
+ b_ah || drv_resc_alloc);
if (rc != ECORE_SUCCESS)
return rc;
}
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index d748d54..9ec240b 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -2264,10 +2264,13 @@ static int qedevf_eth_dev_uninit(struct rte_eth_dev *eth_dev)
static struct rte_pci_id pci_id_qedevf_map[] = {
#define QEDEVF_RTE_PCI_DEVICE(dev) RTE_PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, dev)
{
- QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_VF)
+ QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_NX2_VF)
},
{
- QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_IOV)
+ QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_57980S_IOV)
+ },
+ {
+ QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_AH_IOV)
},
{.vendor_id = 0,}
};
@@ -2275,19 +2278,31 @@ static struct rte_pci_id pci_id_qedevf_map[] = {
static struct rte_pci_id pci_id_qede_map[] = {
#define QEDE_RTE_PCI_DEVICE(dev) RTE_PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, dev)
{
- QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_57980E)
+ QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_NX2_57980E)
+ },
+ {
+ QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_NX2_57980S)
+ },
+ {
+ QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_57980S_40)
+ },
+ {
+ QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_57980S_25)
+ },
+ {
+ QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_57980S_100)
},
{
- QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_57980S)
+ QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_AH_50G)
},
{
- QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_40)
+ QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_AH_10G)
},
{
- QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_25)
+ QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_AH_40G)
},
{
- QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_100)
+ QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_AH_25G)
},
{.vendor_id = 0,}
};
diff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h
index 95e06ef..19a4ece 100644
--- a/drivers/net/qede/qede_ethdev.h
+++ b/drivers/net/qede/qede_ethdev.h
@@ -92,24 +92,35 @@
struct ecore_dev *edev = &qdev->edev; \
}
-/************* QLogic 25G/40G/100G vendor/devices ids *************/
-#define PCI_VENDOR_ID_QLOGIC 0x1077
-
-#define CHIP_NUM_57980E 0x1634
-#define CHIP_NUM_57980S 0x1629
-#define CHIP_NUM_VF 0x1630
-#define CHIP_NUM_57980S_40 0x1634
-#define CHIP_NUM_57980S_25 0x1656
-#define CHIP_NUM_57980S_IOV 0x1664
-#define CHIP_NUM_57980S_100 0x1644
-
-#define PCI_DEVICE_ID_NX2_57980E CHIP_NUM_57980E
-#define PCI_DEVICE_ID_NX2_57980S CHIP_NUM_57980S
-#define PCI_DEVICE_ID_NX2_VF CHIP_NUM_VF
-#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
-#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
-#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
-#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
+/************* QLogic 10G/25G/40G/50G/100G vendor/devices ids *************/
+#define PCI_VENDOR_ID_QLOGIC 0x1077
+
+#define CHIP_NUM_57980E 0x1634
+#define CHIP_NUM_57980S 0x1629
+#define CHIP_NUM_VF 0x1630
+#define CHIP_NUM_57980S_40 0x1634
+#define CHIP_NUM_57980S_25 0x1656
+#define CHIP_NUM_57980S_IOV 0x1664
+#define CHIP_NUM_57980S_100 0x1644
+#define CHIP_NUM_AH_50G 0x8070
+#define CHIP_NUM_AH_10G 0x8071
+#define CHIP_NUM_AH_40G 0x8072
+#define CHIP_NUM_AH_25G 0x8073
+#define CHIP_NUM_AH_IOV 0x8090
+
+#define PCI_DEVICE_ID_QLOGIC_NX2_57980E CHIP_NUM_57980E
+#define PCI_DEVICE_ID_QLOGIC_NX2_57980S CHIP_NUM_57980S
+#define PCI_DEVICE_ID_QLOGIC_NX2_VF CHIP_NUM_VF
+#define PCI_DEVICE_ID_QLOGIC_57980S_40 CHIP_NUM_57980S_40
+#define PCI_DEVICE_ID_QLOGIC_57980S_25 CHIP_NUM_57980S_25
+#define PCI_DEVICE_ID_QLOGIC_57980S_IOV CHIP_NUM_57980S_IOV
+#define PCI_DEVICE_ID_QLOGIC_57980S_100 CHIP_NUM_57980S_100
+#define PCI_DEVICE_ID_QLOGIC_AH_50G CHIP_NUM_AH_50G
+#define PCI_DEVICE_ID_QLOGIC_AH_10G CHIP_NUM_AH_10G
+#define PCI_DEVICE_ID_QLOGIC_AH_40G CHIP_NUM_AH_40G
+#define PCI_DEVICE_ID_QLOGIC_AH_25G CHIP_NUM_AH_25G
+#define PCI_DEVICE_ID_QLOGIC_AH_IOV CHIP_NUM_AH_IOV
+
#define QEDE_VXLAN_DEF_PORT 8472
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 21/26] net/qede: add 50G device PCI id
From: Rasesh Mody @ 2017-01-05 7:04 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Add 50G device support for 57980 series
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
config/common_base | 2 +-
doc/guides/nics/qede.rst | 4 ++--
drivers/net/qede/qede_ethdev.c | 3 +++
drivers/net/qede/qede_ethdev.h | 2 ++
4 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/config/common_base b/config/common_base
index faee944..77c82a0 100644
--- a/config/common_base
+++ b/config/common_base
@@ -316,7 +316,7 @@ CONFIG_RTE_LIBRTE_PMD_BOND=y
CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB=n
CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB_L1=n
-# QLogic 10G/25G/40G/100G PMD
+# QLogic 10G/25G/40G/50G/100G PMD
#
CONFIG_RTE_LIBRTE_QEDE_PMD=y
CONFIG_RTE_LIBRTE_QEDE_DEBUG_INIT=n
diff --git a/doc/guides/nics/qede.rst b/doc/guides/nics/qede.rst
index b7b5633..9341eaa 100644
--- a/doc/guides/nics/qede.rst
+++ b/doc/guides/nics/qede.rst
@@ -32,7 +32,7 @@ QEDE Poll Mode Driver
======================
The QEDE poll mode driver library (**librte_pmd_qede**) implements support
-for **QLogic FastLinQ QL4xxxx 10G/25G/40G/100G CNA** family of adapters as well
+for **QLogic FastLinQ QL4xxxx 10G/25G/40G/50G/100G CNA** family of adapters as well
as their virtual functions (VF) in SR-IOV context. It is supported on
several standard Linux distros like RHEL7.x, SLES12.x and Ubuntu.
It is compile-tested under FreeBSD OS.
@@ -72,7 +72,7 @@ Non-supported Features
Supported QLogic Adapters
-------------------------
-- QLogic FastLinQ QL4xxxx 10G/25G/40G/100G CNAs.
+- QLogic FastLinQ QL4xxxx 10G/25G/40G/50G/100G CNAs.
Prerequisites
-------------
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index 9ec240b..c8581d8 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -2293,6 +2293,9 @@ static struct rte_pci_id pci_id_qede_map[] = {
QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_57980S_100)
},
{
+ QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_57980S_50)
+ },
+ {
QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_AH_50G)
},
{
diff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h
index 19a4ece..9701d73 100644
--- a/drivers/net/qede/qede_ethdev.h
+++ b/drivers/net/qede/qede_ethdev.h
@@ -102,6 +102,7 @@
#define CHIP_NUM_57980S_25 0x1656
#define CHIP_NUM_57980S_IOV 0x1664
#define CHIP_NUM_57980S_100 0x1644
+#define CHIP_NUM_57980S_50 0x1654
#define CHIP_NUM_AH_50G 0x8070
#define CHIP_NUM_AH_10G 0x8071
#define CHIP_NUM_AH_40G 0x8072
@@ -115,6 +116,7 @@
#define PCI_DEVICE_ID_QLOGIC_57980S_25 CHIP_NUM_57980S_25
#define PCI_DEVICE_ID_QLOGIC_57980S_IOV CHIP_NUM_57980S_IOV
#define PCI_DEVICE_ID_QLOGIC_57980S_100 CHIP_NUM_57980S_100
+#define PCI_DEVICE_ID_QLOGIC_57980S_50 CHIP_NUM_57980S_50
#define PCI_DEVICE_ID_QLOGIC_AH_50G CHIP_NUM_AH_50G
#define PCI_DEVICE_ID_QLOGIC_AH_10G CHIP_NUM_AH_10G
#define PCI_DEVICE_ID_QLOGIC_AH_40G CHIP_NUM_AH_40G
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 18/26] net/qede/base: add support for external PHY
From: Rasesh Mody @ 2017-01-05 7:04 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Add support for external PHY BCM8485x.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore_mcp.c | 6 +--
drivers/net/qede/base/mcp_public.h | 88 ++++++++++++++++++++++++++++++++++--
2 files changed, 87 insertions(+), 7 deletions(-)
diff --git a/drivers/net/qede/base/ecore_mcp.c b/drivers/net/qede/base/ecore_mcp.c
index 5d40c1e..adcb0f0 100644
--- a/drivers/net/qede/base/ecore_mcp.c
+++ b/drivers/net/qede/base/ecore_mcp.c
@@ -838,11 +838,9 @@ enum _ecore_status_t ecore_mcp_set_link(struct ecore_hwfn *p_hwfn,
if (b_up)
DP_VERBOSE(p_hwfn, ECORE_MSG_LINK,
"Configuring Link: Speed 0x%08x, Pause 0x%08x,"
- " adv_speed 0x%08x, loopback 0x%08x,"
- " features 0x%08x\n",
+ " adv_speed 0x%08x, loopback 0x%08x\n",
p_phy_cfg->speed, p_phy_cfg->pause,
- p_phy_cfg->adv_speed, p_phy_cfg->loopback_mode,
- p_phy_cfg->feature_config_flags);
+ p_phy_cfg->adv_speed, p_phy_cfg->loopback_mode);
else
DP_VERBOSE(p_hwfn, ECORE_MSG_LINK, "Resetting link\n");
diff --git a/drivers/net/qede/base/mcp_public.h b/drivers/net/qede/base/mcp_public.h
index 96efc3c..b8a9ae3 100644
--- a/drivers/net/qede/base/mcp_public.h
+++ b/drivers/net/qede/base/mcp_public.h
@@ -84,9 +84,32 @@ struct eth_phy_cfg {
/* Remote Serdes Loopback (RX to TX) */
#define ETH_LOOPBACK_INT_PHY_FEA_AH_ONLY (9)
- /* features */
- u32 feature_config_flags;
-#define ETH_EEE_MODE_ADV_LPI (1 << 0)
+ /* Used to configure the EEE Tx LPI timer, has several modes of
+ * operation, according to bits 29:28
+ * 2'b00: Timer will be configured by nvram, output will be the value
+ * from nvram.
+ * 2'b01: Timer will be configured by nvram, output will be in
+ * 16xmicroseconds.
+ * 2'b10: bits 1:0 contain an nvram value which will be used instead
+ * of the one located in the nvram. Output will be that value.
+ * 2'b11: bits 19:0 contain the idle timer in microseconds; output
+ * will be in 16xmicroseconds.
+ * Bits 31:30 should be 2'b11 in order for EEE to be enabled.
+ */
+ u32 eee_mode;
+#define EEE_MODE_TIMER_USEC_MASK (0x000fffff)
+#define EEE_MODE_TIMER_USEC_OFFSET (0)
+#define EEE_MODE_TIMER_USEC_BALANCED_TIME (0xa00)
+#define EEE_MODE_TIMER_USEC_AGGRESSIVE_TIME (0x100)
+#define EEE_MODE_TIMER_USEC_LATENCY_TIME (0x6000)
+/* Set by the driver to request status timer will be in microseconds and and not
+ * in EEE policy definition
+ */
+#define EEE_MODE_OUTPUT_TIME (1 << 28)
+/* Set by the driver to override default nvm timer */
+#define EEE_MODE_OVERRIDE_NVRAM (1 << 29)
+#define EEE_MODE_ENABLE_LPI (1 << 30) /* Set when */
+#define EEE_MODE_ADV_LPI (1 << 31) /* Set when EEE is enabled */
};
struct port_mf_cfg {
@@ -447,6 +470,14 @@ struct public_global {
#define MDUMP_REASON_INTERNAL_ERROR (1 << 0)
#define MDUMP_REASON_EXTERNAL_TRIGGER (1 << 1)
#define MDUMP_REASON_DUMP_AGED (1 << 2)
+ u32 ext_phy_upgrade_fw;
+#define EXT_PHY_FW_UPGRADE_STATUS_MASK (0x0000ffff)
+#define EXT_PHY_FW_UPGRADE_STATUS_SHIFT (0)
+#define EXT_PHY_FW_UPGRADE_STATUS_IN_PROGRESS (1)
+#define EXT_PHY_FW_UPGRADE_STATUS_FAILED (2)
+#define EXT_PHY_FW_UPGRADE_STATUS_SUCCESS (3)
+#define EXT_PHY_FW_UPGRADE_TYPE_MASK (0xffff0000)
+#define EXT_PHY_FW_UPGRADE_TYPE_SHIFT (16)
};
/**************************************/
@@ -597,6 +628,7 @@ struct public_port {
#define LINK_STATUS_FEC_MODE_NONE (0 << 27)
#define LINK_STATUS_FEC_MODE_FIRECODE_CL74 (1 << 27)
#define LINK_STATUS_FEC_MODE_RS_CL91 (2 << 27)
+#define LINK_STATUS_EXT_PHY_LINK_UP 0x40000000
u32 link_status1;
u32 ext_phy_fw_version;
@@ -718,6 +750,39 @@ struct public_port {
u32 wol_pkt_len;
u32 wol_pkt_details;
struct dcb_dscp_map dcb_dscp_map;
+
+ /* the status of EEE auto-negotiation
+ * bits 19:0 the configured tx-lpi entry timer value. Depends on bit 31.
+ * bits 23:20 the speeds advertised for EEE.
+ * bits 27:24 the speeds the Link partner advertised for EEE.
+ * The supported/adv. modes in bits 27:19 originate from the
+ * SHMEM_EEE_XXX_ADV definitions (where XXX is replaced by speed).
+ * bit 28 when 1'b1 EEE was requested.
+ * bit 29 when 1'b1 tx lpi was requested.
+ * bit 30 when 1'b1 EEE was negotiated. Tx lpi will be asserted if 30:29
+ * are 2'b11.
+ * bit 31 - When 1'b0 bits 15:0 contain
+ * NVM_CFG1_PORT_EEE_POWER_SAVING_MODE_XXX define as value.
+ * When 1'b1 those bits contains a value times 16 microseconds.
+ */
+ u32 eee_status;
+ #define EEE_TIMER_MASK 0x000fffff
+ #define EEE_ADV_STATUS_MASK 0x00f00000
+ #define EEE_1G_ADV (1 << 1)
+ #define EEE_10G_ADV (1 << 2)
+ #define EEE_ADV_STATUS_SHIFT 20
+ #define EEE_LP_ADV_STATUS_MASK 0x0f000000
+ #define EEE_LP_ADV_STATUS_SHIFT 24
+ #define EEE_REQUESTED_BIT 0x10000000
+ #define EEE_LPI_REQUESTED_BIT 0x20000000
+ #define EEE_ACTIVE_BIT 0x40000000
+ #define EEE_TIME_OUTPUT_BIT 0x80000000
+
+ u32 eee_remote; /* Used for EEE in LLDP */
+ #define EEE_REMOTE_TW_TX_MASK 0x0000ffff
+ #define EEE_REMOTE_TW_TX_SHIFT 0
+ #define EEE_REMOTE_TW_RX_MASK 0xffff0000
+ #define EEE_REMOTE_TW_RX_SHIFT 16
};
/**************************************/
@@ -1002,6 +1067,7 @@ union drv_union_data {
struct resource_info resource;
struct bist_nvm_image_att nvm_image_att;
struct mdump_config_stc mdump_config;
+ u32 dword;
/* ... */
};
@@ -1210,6 +1276,17 @@ struct public_drv_mb {
#define DRV_MSG_CODE_MEM_ECC_EVENTS 0x00260000 /* Param: None */
+/* Value will be placed in union */
+#define DRV_MSG_CODE_EXT_PHY_READ 0x00280000
+/* Value should be placed in union */
+#define DRV_MSG_CODE_EXT_PHY_WRITE 0x00290000
+ #define DRV_MB_PARAM_ADDR_SHIFT 0
+ #define DRV_MB_PARAM_ADDR_MASK 0x0000FFFF
+ #define DRV_MB_PARAM_DEVAD_SHIFT 16
+ #define DRV_MB_PARAM_DEVAD_MASK 0x001F0000
+ #define DRV_MB_PARAM_PORT_SHIFT 21
+ #define DRV_MB_PARAM_PORT_MASK 0x00600000
+#define DRV_MSG_CODE_EXT_PHY_FW_UPGRADE 0x002a0000
#define DRV_MSG_SEQ_NUMBER_MASK 0x0000ffff
@@ -1442,6 +1519,10 @@ struct public_drv_mb {
#define FW_MSG_CODE_GPIO_INVALID 0x000f0000
#define FW_MSG_CODE_GPIO_INVALID_VALUE 0x00050000
#define FW_MSG_CODE_BIST_TEST_INVALID 0x000f0000
+#define FW_MSG_CODE_EXTPHY_INVALID_IMAGE_HEADER 0x00700000
+#define FW_MSG_CODE_EXTPHY_INVALID_PHY_TYPE 0x00710000
+#define FW_MSG_CODE_EXTPHY_OPERATION_FAILED 0x00720000
+#define FW_MSG_CODE_EXTPHY_NO_PHY_DETECTED 0x00730000
/* mdump related response codes */
#define FW_MSG_CODE_MDUMP_NO_IMAGE_FOUND 0x00010000
@@ -1523,6 +1604,7 @@ enum MFW_DRV_MSG_TYPE {
MFW_DRV_MSG_FAILURE_DETECTED,
MFW_DRV_MSG_TRANSCEIVER_STATE_CHANGE,
MFW_DRV_MSG_CRITICAL_ERROR_OCCURRED,
+ MFW_DRV_MSG_EEE_NEGOTIATION_COMPLETE,
MFW_DRV_MSG_MAX
};
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 19/26] net/qede/base: add support for 2x10G mode
From: Rasesh Mody @ 2017-01-05 7:04 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Add support for 2x10G mode
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
doc/guides/nics/qede.rst | 2 +-
drivers/net/qede/base/ecore.h | 1 +
drivers/net/qede/base/ecore_dev.c | 3 +++
drivers/net/qede/base/nvm_cfg.h | 2 ++
4 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/doc/guides/nics/qede.rst b/doc/guides/nics/qede.rst
index 999df95..b7b5633 100644
--- a/doc/guides/nics/qede.rst
+++ b/doc/guides/nics/qede.rst
@@ -32,7 +32,7 @@ QEDE Poll Mode Driver
======================
The QEDE poll mode driver library (**librte_pmd_qede**) implements support
-for **QLogic FastLinQ QL4xxxx 25G/40G/100G CNA** family of adapters as well
+for **QLogic FastLinQ QL4xxxx 10G/25G/40G/100G CNA** family of adapters as well
as their virtual functions (VF) in SR-IOV context. It is supported on
several standard Linux distros like RHEL7.x, SLES12.x and Ubuntu.
It is compile-tested under FreeBSD OS.
diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index 71ce24b..034e885 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -302,6 +302,7 @@ enum ecore_port_mode {
ECORE_PORT_MODE_DE_2X25G,
ECORE_PORT_MODE_DE_1X25G,
ECORE_PORT_MODE_DE_4X25G,
+ ECORE_PORT_MODE_DE_2X10G,
};
enum ecore_dev_cap {
diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
index 86b4bff..5a29c45 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -2474,6 +2474,9 @@ static enum _ecore_status_t ecore_hw_get_nvm_info(struct ecore_hwfn *p_hwfn,
case NVM_CFG1_GLOB_NETWORK_PORT_MODE_2X25G:
p_hwfn->hw_info.port_mode = ECORE_PORT_MODE_DE_2X25G;
break;
+ case NVM_CFG1_GLOB_NETWORK_PORT_MODE_2X10G:
+ p_hwfn->hw_info.port_mode = ECORE_PORT_MODE_DE_2X10G;
+ break;
case NVM_CFG1_GLOB_NETWORK_PORT_MODE_1X25G:
p_hwfn->hw_info.port_mode = ECORE_PORT_MODE_DE_1X25G;
break;
diff --git a/drivers/net/qede/base/nvm_cfg.h b/drivers/net/qede/base/nvm_cfg.h
index 8e9c08a..4edffac 100644
--- a/drivers/net/qede/base/nvm_cfg.h
+++ b/drivers/net/qede/base/nvm_cfg.h
@@ -144,6 +144,7 @@ struct nvm_cfg1_glob {
#define NVM_CFG1_GLOB_NETWORK_PORT_MODE_2X25G 0xC
#define NVM_CFG1_GLOB_NETWORK_PORT_MODE_1X25G 0xD
#define NVM_CFG1_GLOB_NETWORK_PORT_MODE_4X25G 0xE
+ #define NVM_CFG1_GLOB_NETWORK_PORT_MODE_2X10G 0xF
#define NVM_CFG1_GLOB_MPS10_ENFORCE_TX_FIR_CFG_MASK 0x00000100
#define NVM_CFG1_GLOB_MPS10_ENFORCE_TX_FIR_CFG_OFFSET 8
#define NVM_CFG1_GLOB_MPS10_ENFORCE_TX_FIR_CFG_DISABLED 0x0
@@ -578,6 +579,7 @@ struct nvm_cfg1_glob {
#define NVM_CFG1_GLOB_MULTI_NETWORK_MODES_CAPABILITY_2X50G 0x40
#define NVM_CFG1_GLOB_MULTI_NETWORK_MODES_CAPABILITY_BB_1X100G \
0x80
+ #define NVM_CFG1_GLOB_MULTI_NETWORK_MODES_CAPABILITY_2X10G 0x100
u32 reserved[41]; /* 0x9C */
};
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 17/26] net/qede/base: retrieve FW crash dump info
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
As part of device probe, check if management FW crash dump logs are
available. If available, then log an warning message and update the
epoch value too. A new struct ecore_mdump_info is added to populate
dump info including the new "reason" field by reading shared memory
region.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore_dev.c | 18 +++++++--
drivers/net/qede/base/ecore_dev_api.h | 4 +-
drivers/net/qede/base/ecore_mcp.c | 66 +++++++++++++++++++++------------
drivers/net/qede/base/ecore_mcp.h | 22 -----------
drivers/net/qede/base/ecore_mcp_api.h | 33 ++++++++++++++---
drivers/net/qede/qede_main.c | 2 +-
6 files changed, 87 insertions(+), 58 deletions(-)
diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
index 0da95c6..86b4bff 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -1761,10 +1761,6 @@ enum _ecore_status_t ecore_hw_init(struct ecore_dev *p_dev,
return mfw_rc;
}
- ecore_mcp_mdump_get_info(p_hwfn, p_hwfn->p_main_ptt);
- ecore_mcp_mdump_set_values(p_hwfn, p_hwfn->p_main_ptt,
- p_params->epoch);
-
/* send DCBX attention request command */
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
"sending phony dcbx set command to trigger DCBx attention handling\n");
@@ -2962,6 +2958,7 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn, void OSAL_IOMEM *p_regview,
struct ecore_hw_prepare_params *p_params)
{
struct ecore_dev *p_dev = p_hwfn->p_dev;
+ struct ecore_mdump_info mdump_info;
enum _ecore_status_t rc = ECORE_SUCCESS;
/* Split PCI bars evenly between hwfns */
@@ -3024,6 +3021,19 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn, void OSAL_IOMEM *p_regview,
DP_NOTICE(p_hwfn, false, "Failed to initiate PF FLR\n");
}
+ /* Check if mdump logs are present and update the epoch value */
+ if (p_hwfn == ECORE_LEADING_HWFN(p_hwfn->p_dev)) {
+ rc = ecore_mcp_mdump_get_info(p_hwfn, p_hwfn->p_main_ptt,
+ &mdump_info);
+ if (rc == ECORE_SUCCESS && mdump_info.num_of_logs > 0) {
+ DP_NOTICE(p_hwfn, false,
+ "* * * IMPORTANT - HW ERROR register dump captured by device * * *\n");
+ }
+
+ ecore_mcp_mdump_set_values(p_hwfn, p_hwfn->p_main_ptt,
+ p_params->epoch);
+ }
+
/* Allocate the init RT array and initialize the init-ops engine */
rc = ecore_init_alloc(p_hwfn);
if (rc) {
diff --git a/drivers/net/qede/base/ecore_dev_api.h b/drivers/net/qede/base/ecore_dev_api.h
index 0ec02b5..0dee68a 100644
--- a/drivers/net/qede/base/ecore_dev_api.h
+++ b/drivers/net/qede/base/ecore_dev_api.h
@@ -68,8 +68,6 @@ struct ecore_hw_init_params {
bool allow_npar_tx_switch;
/* binary fw data pointer in binary fw file */
const u8 *bin_fw_data;
- /* the OS Epoch time in seconds */
- u32 epoch;
};
/**
@@ -149,6 +147,8 @@ struct ecore_hw_prepare_params {
bool chk_reg_fifo;
/* request the MFW to initiate PF FLR */
bool initiate_pf_flr;
+ /* the OS Epoch time in seconds */
+ u32 epoch;
};
/**
diff --git a/drivers/net/qede/base/ecore_mcp.c b/drivers/net/qede/base/ecore_mcp.c
index a5d707b..5d40c1e 100644
--- a/drivers/net/qede/base/ecore_mcp.c
+++ b/drivers/net/qede/base/ecore_mcp.c
@@ -1098,16 +1098,9 @@ enum _ecore_status_t ecore_mcp_mdump_trigger(struct ecore_hwfn *p_hwfn,
{
u32 mcp_resp;
- return ecore_mcp_mdump_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_MDUMP_TRIGGER,
- OSAL_NULL, OSAL_NULL, &mcp_resp);
-}
-
-enum _ecore_status_t ecore_mcp_mdump_clear_logs(struct ecore_hwfn *p_hwfn,
- struct ecore_ptt *p_ptt)
-{
- u32 mcp_resp;
+ p_hwfn->p_dev->mdump_en = true;
- return ecore_mcp_mdump_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_MDUMP_CLEAR_LOGS,
+ return ecore_mcp_mdump_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_MDUMP_TRIGGER,
OSAL_NULL, OSAL_NULL, &mcp_resp);
}
@@ -1141,32 +1134,56 @@ ecore_mcp_mdump_get_config(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
return rc;
}
-enum _ecore_status_t ecore_mcp_mdump_get_info(struct ecore_hwfn *p_hwfn,
- struct ecore_ptt *p_ptt)
+enum _ecore_status_t
+ecore_mcp_mdump_get_info(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
+ struct ecore_mdump_info *p_mdump_info)
{
+ u32 addr, global_offsize, global_addr;
struct mdump_config_stc mdump_config;
enum _ecore_status_t rc;
- rc = ecore_mcp_mdump_get_config(p_hwfn, p_ptt, &mdump_config);
- if (rc != ECORE_SUCCESS)
- return rc;
+ OSAL_MEMSET(p_mdump_info, 0, sizeof(*p_mdump_info));
- DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
- "MFW mdump_config: version 0x%x, config 0x%x, epoch 0x%x, num_of_logs 0x%x, valid_logs 0x%x\n",
- mdump_config.version, mdump_config.config, mdump_config.epoc,
- mdump_config.num_of_logs, mdump_config.valid_logs);
+ addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,
+ PUBLIC_GLOBAL);
+ global_offsize = ecore_rd(p_hwfn, p_ptt, addr);
+ global_addr = SECTION_ADDR(global_offsize, 0);
+ p_mdump_info->reason = ecore_rd(p_hwfn, p_ptt,
+ global_addr +
+ OFFSETOF(struct public_global,
+ mdump_reason));
- if (mdump_config.valid_logs > 0) {
- DP_NOTICE(p_hwfn, false,
- "* * * IMPORTANT - HW ERROR register dump captured by device * * *\n");
+ if (p_mdump_info->reason) {
+ rc = ecore_mcp_mdump_get_config(p_hwfn, p_ptt, &mdump_config);
+ if (rc != ECORE_SUCCESS)
+ return rc;
+
+ p_mdump_info->version = mdump_config.version;
+ p_mdump_info->config = mdump_config.config;
+ p_mdump_info->epoch = mdump_config.epoc;
+ p_mdump_info->num_of_logs = mdump_config.num_of_logs;
+ p_mdump_info->valid_logs = mdump_config.valid_logs;
+
+ DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
+ "MFW mdump info: reason %d, version 0x%x, config 0x%x, epoch 0x%x, num_of_logs 0x%x, valid_logs 0x%x\n",
+ p_mdump_info->reason, p_mdump_info->version,
+ p_mdump_info->config, p_mdump_info->epoch,
+ p_mdump_info->num_of_logs, p_mdump_info->valid_logs);
+ } else {
+ DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
+ "MFW mdump info: reason %d\n", p_mdump_info->reason);
}
- return rc;
+ return ECORE_SUCCESS;
}
-void ecore_mcp_mdump_enable(struct ecore_dev *p_dev, bool mdump_enable)
+enum _ecore_status_t ecore_mcp_mdump_clear_logs(struct ecore_hwfn *p_hwfn,
+ struct ecore_ptt *p_ptt)
{
- p_dev->mdump_en = mdump_enable;
+ u32 mcp_resp;
+
+ return ecore_mcp_mdump_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_MDUMP_CLEAR_LOGS,
+ OSAL_NULL, OSAL_NULL, &mcp_resp);
}
static void ecore_mcp_handle_critical_error(struct ecore_hwfn *p_hwfn,
@@ -1184,6 +1201,7 @@ static void ecore_mcp_handle_critical_error(struct ecore_hwfn *p_hwfn,
if (p_hwfn->p_dev->mdump_en) {
DP_NOTICE(p_hwfn, false,
"Not acknowledging the notification to allow the MFW crash dump\n");
+ p_hwfn->p_dev->mdump_en = false;
return;
}
diff --git a/drivers/net/qede/base/ecore_mcp.h b/drivers/net/qede/base/ecore_mcp.h
index ae33e84..d77b5df 100644
--- a/drivers/net/qede/base/ecore_mcp.h
+++ b/drivers/net/qede/base/ecore_mcp.h
@@ -327,28 +327,6 @@ enum _ecore_status_t ecore_mcp_mdump_trigger(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt);
/**
- * @brief - Clears the MFW crash dump logs.
- *
- * @param p_hwfn
- * @param p_ptt
- *
- * @param return ECORE_SUCCESS upon success.
- */
-enum _ecore_status_t ecore_mcp_mdump_clear_logs(struct ecore_hwfn *p_hwfn,
- struct ecore_ptt *p_ptt);
-
-/**
- * @brief - Gets the MFW crash dump configuration and logs info.
- *
- * @param p_hwfn
- * @param p_ptt
- *
- * @param return ECORE_SUCCESS upon success.
- */
-enum _ecore_status_t ecore_mcp_mdump_get_info(struct ecore_hwfn *p_hwfn,
- struct ecore_ptt *p_ptt);
-
-/**
* @brief - Gets the MFW allocation info for the given resource
*
* @param p_hwfn
diff --git a/drivers/net/qede/base/ecore_mcp_api.h b/drivers/net/qede/base/ecore_mcp_api.h
index c26b494..4e954bd 100644
--- a/drivers/net/qede/base/ecore_mcp_api.h
+++ b/drivers/net/qede/base/ecore_mcp_api.h
@@ -792,14 +792,37 @@ enum _ecore_status_t ecore_mcp_mem_ecc_events(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt,
u64 *num_events);
+struct ecore_mdump_info {
+ u32 reason;
+ u32 version;
+ u32 config;
+ u32 epoch;
+ u32 num_of_logs;
+ u32 valid_logs;
+};
+
+/**
+ * @brief - Gets the MFW crash dump configuration and logs info.
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ * @param p_mdump_info
+ *
+ * @param return ECORE_SUCCESS upon success.
+ */
+enum _ecore_status_t
+ecore_mcp_mdump_get_info(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
+ struct ecore_mdump_info *p_mdump_info);
+
/**
- * @brief Sets whether a critical error notification from the MFW is acked, or
- * is it being ignored and thus allowing the MFW crash dump.
+ * @brief - Clears the MFW crash dump logs.
*
- * @param p_dev
- * @param mdump_enable
+ * @param p_hwfn
+ * @param p_ptt
*
+ * @param return ECORE_SUCCESS upon success.
*/
-void ecore_mcp_mdump_enable(struct ecore_dev *p_dev, bool mdump_enable);
+enum _ecore_status_t ecore_mcp_mdump_clear_logs(struct ecore_hwfn *p_hwfn,
+ struct ecore_ptt *p_ptt);
#endif
diff --git a/drivers/net/qede/qede_main.c b/drivers/net/qede/qede_main.c
index e827200..92ed404 100644
--- a/drivers/net/qede/qede_main.c
+++ b/drivers/net/qede/qede_main.c
@@ -62,6 +62,7 @@ qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
hw_prepare_params.drv_resc_alloc = false;
hw_prepare_params.chk_reg_fifo = false;
hw_prepare_params.initiate_pf_flr = true;
+ hw_prepare_params.epoch = (u32)time(NULL);
rc = ecore_hw_prepare(edev, &hw_prepare_params);
if (rc) {
DP_ERR(edev, "hw prepare failed\n");
@@ -274,7 +275,6 @@ static int qed_slowpath_start(struct ecore_dev *edev,
hw_init_params.int_mode = ECORE_INT_MODE_MSIX;
hw_init_params.allow_npar_tx_switch = allow_npar_tx_switching;
hw_init_params.bin_fw_data = data;
- hw_init_params.epoch = (u32)time(NULL);
rc = ecore_hw_init(edev, &hw_init_params);
if (rc) {
DP_ERR(edev, "ecore_hw_init failed\n");
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 15/26] net/qede: add new host ring type option
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Add new option called external PBL (page base list) to ecore_chain_alloc
for future use. Mark chain as external if external PBL is provided.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore_chain.h | 9 ++++++++-
drivers/net/qede/base/ecore_dev.c | 27 ++++++++++++++++++++-------
drivers/net/qede/base/ecore_dev_api.h | 3 ++-
drivers/net/qede/base/ecore_spq.c | 17 +++++++++++------
drivers/net/qede/qede_if.h | 18 ++++++++++--------
drivers/net/qede/qede_rxtx.c | 9 ++++++---
6 files changed, 57 insertions(+), 26 deletions(-)
diff --git a/drivers/net/qede/base/ecore_chain.h b/drivers/net/qede/base/ecore_chain.h
index 9ad1874..61e39b5 100644
--- a/drivers/net/qede/base/ecore_chain.h
+++ b/drivers/net/qede/base/ecore_chain.h
@@ -54,6 +54,11 @@ struct ecore_chain_pbl_u32 {
u32 cons_page_idx;
};
+struct ecore_chain_ext_pbl {
+ dma_addr_t p_pbl_phys;
+ void *p_pbl_virt;
+};
+
struct ecore_chain_pbl {
/* Base address of a pre-allocated buffer for pbl */
dma_addr_t p_phys_table;
@@ -69,6 +74,8 @@ struct ecore_chain_pbl {
struct ecore_chain_pbl_u16 pbl16;
struct ecore_chain_pbl_u32 pbl32;
} u;
+
+ bool external;
};
struct ecore_chain_u16 {
@@ -570,7 +577,7 @@ ecore_chain_init_params(struct ecore_chain *p_chain, u32 page_cnt, u8 elem_size,
p_chain->page_cnt = page_cnt;
p_chain->capacity = p_chain->usable_per_page * page_cnt;
p_chain->size = p_chain->elem_per_page * page_cnt;
-
+ p_chain->pbl.external = false;
p_chain->pbl.p_phys_table = 0;
p_chain->pbl.p_virt_table = OSAL_NULL;
p_chain->pbl.pp_virt_addr_tbl = OSAL_NULL;
diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
index f043808..f29b3cd 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -3193,8 +3193,10 @@ static void ecore_chain_free_pbl(struct ecore_dev *p_dev,
}
pbl_size = page_cnt * ECORE_CHAIN_PBL_ENTRY_SIZE;
- OSAL_DMA_FREE_COHERENT(p_dev, p_chain->pbl.p_virt_table,
- p_chain->pbl.p_phys_table, pbl_size);
+
+ if (!p_chain->pbl.external)
+ OSAL_DMA_FREE_COHERENT(p_dev, p_chain->pbl.p_virt_table,
+ p_chain->pbl.p_phys_table, pbl_size);
out:
OSAL_VFREE(p_dev, p_chain->pbl.pp_virt_addr_tbl);
}
@@ -3294,8 +3296,10 @@ ecore_chain_alloc_single(struct ecore_dev *p_dev, struct ecore_chain *p_chain)
return ECORE_SUCCESS;
}
-static enum _ecore_status_t ecore_chain_alloc_pbl(struct ecore_dev *p_dev,
- struct ecore_chain *p_chain)
+static enum _ecore_status_t
+ecore_chain_alloc_pbl(struct ecore_dev *p_dev,
+ struct ecore_chain *p_chain,
+ struct ecore_chain_ext_pbl *ext_pbl)
{
void *p_virt = OSAL_NULL;
u8 *p_pbl_virt = OSAL_NULL;
@@ -3319,7 +3323,15 @@ static enum _ecore_status_t ecore_chain_alloc_pbl(struct ecore_dev *p_dev,
* should be saved to allow its freeing during the error flow.
*/
size = page_cnt * ECORE_CHAIN_PBL_ENTRY_SIZE;
- p_pbl_virt = OSAL_DMA_ALLOC_COHERENT(p_dev, &p_pbl_phys, size);
+
+ if (ext_pbl == OSAL_NULL) {
+ p_pbl_virt = OSAL_DMA_ALLOC_COHERENT(p_dev, &p_pbl_phys, size);
+ } else {
+ p_pbl_virt = ext_pbl->p_pbl_virt;
+ p_pbl_phys = ext_pbl->p_pbl_phys;
+ p_chain->pbl.external = true;
+ }
+
ecore_chain_init_pbl_mem(p_chain, p_pbl_virt, p_pbl_phys,
pp_virt_addr_tbl);
if (!p_pbl_virt) {
@@ -3357,7 +3369,8 @@ enum _ecore_status_t ecore_chain_alloc(struct ecore_dev *p_dev,
enum ecore_chain_mode mode,
enum ecore_chain_cnt_type cnt_type,
u32 num_elems, osal_size_t elem_size,
- struct ecore_chain *p_chain)
+ struct ecore_chain *p_chain,
+ struct ecore_chain_ext_pbl *ext_pbl)
{
u32 page_cnt;
enum _ecore_status_t rc = ECORE_SUCCESS;
@@ -3388,7 +3401,7 @@ enum _ecore_status_t ecore_chain_alloc(struct ecore_dev *p_dev,
rc = ecore_chain_alloc_single(p_dev, p_chain);
break;
case ECORE_CHAIN_MODE_PBL:
- rc = ecore_chain_alloc_pbl(p_dev, p_chain);
+ rc = ecore_chain_alloc_pbl(p_dev, p_chain, ext_pbl);
break;
}
if (rc)
diff --git a/drivers/net/qede/base/ecore_dev_api.h b/drivers/net/qede/base/ecore_dev_api.h
index cbddd24..0ec02b5 100644
--- a/drivers/net/qede/base/ecore_dev_api.h
+++ b/drivers/net/qede/base/ecore_dev_api.h
@@ -370,7 +370,8 @@ ecore_chain_alloc(struct ecore_dev *p_dev,
enum ecore_chain_cnt_type cnt_type,
u32 num_elems,
osal_size_t elem_size,
- struct ecore_chain *p_chain);
+ struct ecore_chain *p_chain,
+ struct ecore_chain_ext_pbl *ext_pbl);
/**
* @brief ecore_chain_free - Free chain DMA memory
diff --git a/drivers/net/qede/base/ecore_spq.c b/drivers/net/qede/base/ecore_spq.c
index 0d744dd..c524cab 100644
--- a/drivers/net/qede/base/ecore_spq.c
+++ b/drivers/net/qede/base/ecore_spq.c
@@ -373,7 +373,8 @@ struct ecore_eq *ecore_eq_alloc(struct ecore_hwfn *p_hwfn, u16 num_elem)
ECORE_CHAIN_MODE_PBL,
ECORE_CHAIN_CNT_TYPE_U16,
num_elem,
- sizeof(union event_ring_element), &p_eq->chain)) {
+ sizeof(union event_ring_element),
+ &p_eq->chain, OSAL_NULL)) {
DP_NOTICE(p_hwfn, true, "Failed to allocate eq chain\n");
goto eq_allocate_fail;
}
@@ -501,10 +502,13 @@ enum _ecore_status_t ecore_spq_alloc(struct ecore_hwfn *p_hwfn)
}
/* SPQ ring */
- if (ecore_chain_alloc(p_hwfn->p_dev, ECORE_CHAIN_USE_TO_PRODUCE,
- ECORE_CHAIN_MODE_SINGLE, ECORE_CHAIN_CNT_TYPE_U16, 0,
- /* N/A when the mode is SINGLE */
- sizeof(struct slow_path_element), &p_spq->chain)) {
+ if (ecore_chain_alloc(p_hwfn->p_dev,
+ ECORE_CHAIN_USE_TO_PRODUCE,
+ ECORE_CHAIN_MODE_SINGLE,
+ ECORE_CHAIN_CNT_TYPE_U16,
+ 0, /* N/A when the mode is SINGLE */
+ sizeof(struct slow_path_element),
+ &p_spq->chain, OSAL_NULL)) {
DP_NOTICE(p_hwfn, true, "Failed to allocate spq chain\n");
goto spq_allocate_fail;
}
@@ -956,7 +960,8 @@ struct ecore_consq *ecore_consq_alloc(struct ecore_hwfn *p_hwfn)
ECORE_CHAIN_MODE_PBL,
ECORE_CHAIN_CNT_TYPE_U16,
ECORE_CHAIN_PAGE_SIZE / 0x80,
- 0x80, &p_consq->chain)) {
+ 0x80,
+ &p_consq->chain, OSAL_NULL)) {
DP_NOTICE(p_hwfn, true, "Failed to allocate consq chain");
goto consq_allocate_fail;
}
diff --git a/drivers/net/qede/qede_if.h b/drivers/net/qede/qede_if.h
index 2131fe2..4289d0b 100644
--- a/drivers/net/qede/qede_if.h
+++ b/drivers/net/qede/qede_if.h
@@ -110,14 +110,16 @@ struct qed_common_ops {
uint32_t dp_module, uint8_t dp_level, bool is_vf);
void (*set_id)(struct ecore_dev *edev,
char name[], const char ver_str[]);
- enum _ecore_status_t (*chain_alloc)(struct ecore_dev *edev,
- enum ecore_chain_use_mode
- intended_use,
- enum ecore_chain_mode mode,
- enum ecore_chain_cnt_type cnt_type,
- uint32_t num_elems,
- osal_size_t elem_size,
- struct ecore_chain *p_chain);
+ enum _ecore_status_t
+ (*chain_alloc)(struct ecore_dev *edev,
+ enum ecore_chain_use_mode
+ intended_use,
+ enum ecore_chain_mode mode,
+ enum ecore_chain_cnt_type cnt_type,
+ uint32_t num_elems,
+ osal_size_t elem_size,
+ struct ecore_chain *p_chain,
+ struct ecore_chain_ext_pbl *ext_pbl);
void (*chain_free)(struct ecore_dev *edev,
struct ecore_chain *p_chain);
diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c
index 2a8939a..814d384 100644
--- a/drivers/net/qede/qede_rxtx.c
+++ b/drivers/net/qede/qede_rxtx.c
@@ -176,7 +176,8 @@ qede_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ECORE_CHAIN_CNT_TYPE_U16,
rxq->nb_rx_desc,
sizeof(struct eth_rx_bd),
- &rxq->rx_bd_ring);
+ &rxq->rx_bd_ring,
+ NULL);
if (rc != ECORE_SUCCESS) {
DP_NOTICE(edev, false,
@@ -196,7 +197,8 @@ qede_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ECORE_CHAIN_CNT_TYPE_U16,
rxq->nb_rx_desc,
sizeof(union eth_rx_cqe),
- &rxq->rx_comp_ring);
+ &rxq->rx_comp_ring,
+ NULL);
if (rc != ECORE_SUCCESS) {
DP_NOTICE(edev, false,
@@ -291,7 +293,8 @@ qede_tx_queue_setup(struct rte_eth_dev *dev,
ECORE_CHAIN_CNT_TYPE_U16,
txq->nb_tx_desc,
sizeof(union eth_tx_bd_types),
- &txq->tx_pbl);
+ &txq->tx_pbl,
+ NULL);
if (rc != ECORE_SUCCESS) {
DP_ERR(edev,
"Unable to allocate memory for txbd ring on socket %u",
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 16/26] net/qede/base: add check for get nvm info return code
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Fail ecore_get_hw_info() in case ecore_hw_get_nvm_info() fails.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore_dev.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
index f29b3cd..0da95c6 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -2755,7 +2755,7 @@ ecore_get_hw_info(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
/* Since all information is common, only first hwfns should do this */
if (IS_LEAD_HWFN(p_hwfn)) {
rc = ecore_iov_hw_info(p_hwfn);
- if (rc)
+ if (rc != ECORE_SUCCESS)
return rc;
}
@@ -2769,12 +2769,17 @@ ecore_get_hw_info(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
ecore_hw_info_port_num(p_hwfn, p_ptt);
#ifndef ASIC_ONLY
- if (CHIP_REV_IS_ASIC(p_hwfn->p_dev))
+ if (CHIP_REV_IS_ASIC(p_hwfn->p_dev)) {
+#endif
+ rc = ecore_hw_get_nvm_info(p_hwfn, p_ptt);
+ if (rc != ECORE_SUCCESS)
+ return rc;
+#ifndef ASIC_ONLY
+ }
#endif
- ecore_hw_get_nvm_info(p_hwfn, p_ptt);
rc = ecore_int_igu_read_cam(p_hwfn, p_ptt);
- if (rc)
+ if (rc != ECORE_SUCCESS)
return rc;
#ifndef ASIC_ONLY
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 14/26] net/qede/base: add macros for converting pointer
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Add macros PTR_LO and PTR_HI (for converting pointer to HI and LOW bits for
passing to FW hsi handles).
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore_utils.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/qede/base/ecore_utils.h b/drivers/net/qede/base/ecore_utils.h
index 616b44c..034cf1e 100644
--- a/drivers/net/qede/base/ecore_utils.h
+++ b/drivers/net/qede/base/ecore_utils.h
@@ -10,6 +10,12 @@
#define __ECORE_UTILS_H__
/* dma_addr_t manip */
+/* Suppress "right shift count >= width of type" warning when that quantity is
+ * 32-bits rquires the >> 16) >> 16)
+ */
+#define PTR_LO(x) ((u32)(((osal_uintptr_t)(x)) & 0xffffffff))
+#define PTR_HI(x) ((u32)((((osal_uintptr_t)(x)) >> 16) >> 16))
+
#define DMA_LO(x) ((u32)(((dma_addr_t)(x)) & 0xffffffff))
#define DMA_HI(x) ((u32)(((dma_addr_t)(x)) >> 32))
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 13/26] net/qede/base: add new enum member to status codes
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Add ECORE_CONN_RESET to enum ecore_status.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore_status.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/qede/base/ecore_status.h b/drivers/net/qede/base/ecore_status.h
index 6277bc8..c77ec26 100644
--- a/drivers/net/qede/base/ecore_status.h
+++ b/drivers/net/qede/base/ecore_status.h
@@ -10,6 +10,7 @@
#define __ECORE_STATUS_H__
enum _ecore_status_t {
+ ECORE_CONN_RESET = -13,
ECORE_UNKNOWN_ERROR = -12,
ECORE_NORESOURCES = -11,
ECORE_NODEV = -10,
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 10/26] net/qede/base: semantic change
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Semantic change: No reason to have p_ prefix to non-pointers
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore_sriov.c | 36 +++++++++++++++++------------------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/net/qede/base/ecore_sriov.c b/drivers/net/qede/base/ecore_sriov.c
index 0e2b324..eaad843 100644
--- a/drivers/net/qede/base/ecore_sriov.c
+++ b/drivers/net/qede/base/ecore_sriov.c
@@ -1987,7 +1987,7 @@ static void ecore_iov_vf_mbx_start_rxq(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt,
struct ecore_vf_info *vf)
{
- struct ecore_queue_start_common_params p_params;
+ struct ecore_queue_start_common_params params;
struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
u8 status = PFVF_STATUS_NO_RESOURCE;
struct vfpf_start_rxq_tlv *req;
@@ -2000,13 +2000,13 @@ static void ecore_iov_vf_mbx_start_rxq(struct ecore_hwfn *p_hwfn,
!ecore_iov_validate_sb(p_hwfn, vf, req->hw_sb))
goto out;
- OSAL_MEMSET(&p_params, 0, sizeof(p_params));
- p_params.queue_id = (u8)vf->vf_queues[req->rx_qid].fw_rx_qid;
- p_params.vf_qid = req->rx_qid;
- p_params.vport_id = vf->vport_id;
- p_params.stats_id = vf->abs_vf_id + 0x10,
- p_params.sb = req->hw_sb;
- p_params.sb_idx = req->sb_index;
+ OSAL_MEMSET(¶ms, 0, sizeof(params));
+ params.queue_id = (u8)vf->vf_queues[req->rx_qid].fw_rx_qid;
+ params.vf_qid = req->rx_qid;
+ params.vport_id = vf->vport_id;
+ params.stats_id = vf->abs_vf_id + 0x10,
+ params.sb = req->hw_sb;
+ params.sb_idx = req->sb_index;
/* Legacy VFs have their Producers in a different location, which they
* calculate on their own and clean the producer prior to this.
@@ -2022,7 +2022,7 @@ static void ecore_iov_vf_mbx_start_rxq(struct ecore_hwfn *p_hwfn,
rc = ecore_sp_eth_rxq_start_ramrod(p_hwfn, vf->opaque_fid,
vf->vf_queues[req->rx_qid].fw_cid,
- &p_params,
+ ¶ms,
req->bd_max_bytes,
req->rxq_addr,
req->cqe_pbl_addr,
@@ -2087,7 +2087,7 @@ static void ecore_iov_vf_mbx_start_txq(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt,
struct ecore_vf_info *vf)
{
- struct ecore_queue_start_common_params p_params;
+ struct ecore_queue_start_common_params params;
struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
u8 status = PFVF_STATUS_NO_RESOURCE;
union ecore_qm_pq_params pq_params;
@@ -2099,24 +2099,24 @@ static void ecore_iov_vf_mbx_start_txq(struct ecore_hwfn *p_hwfn,
pq_params.eth.is_vf = 1;
pq_params.eth.vf_id = vf->relative_vf_id;
- OSAL_MEMSET(&p_params, 0, sizeof(p_params));
+ OSAL_MEMSET(¶ms, 0, sizeof(params));
req = &mbx->req_virt->start_txq;
if (!ecore_iov_validate_txq(p_hwfn, vf, req->tx_qid) ||
!ecore_iov_validate_sb(p_hwfn, vf, req->hw_sb))
goto out;
- p_params.queue_id = (u8)vf->vf_queues[req->tx_qid].fw_tx_qid;
- p_params.qzone_id = (u8)vf->vf_queues[req->tx_qid].fw_tx_qid;
- p_params.vport_id = vf->vport_id;
- p_params.stats_id = vf->abs_vf_id + 0x10,
- p_params.sb = req->hw_sb;
- p_params.sb_idx = req->sb_index;
+ params.queue_id = (u8)vf->vf_queues[req->tx_qid].fw_tx_qid;
+ params.qzone_id = (u8)vf->vf_queues[req->tx_qid].fw_tx_qid;
+ params.vport_id = vf->vport_id;
+ params.stats_id = vf->abs_vf_id + 0x10,
+ params.sb = req->hw_sb;
+ params.sb_idx = req->sb_index;
rc = ecore_sp_eth_txq_start_ramrod(p_hwfn,
vf->opaque_fid,
vf->vf_queues[req->tx_qid].fw_cid,
- &p_params,
+ ¶ms,
req->pbl_addr,
req->pbl_size,
&pq_params);
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 12/26] net/qede/base: enhance resource info set printouts
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Add the resources names in the ecore_hw_set_resc_info() printouts.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore_dev.c | 100 ++++++++++++++++++-------------------
1 file changed, 50 insertions(+), 50 deletions(-)
diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
index 8b7d1da..f043808 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -2222,6 +2222,40 @@ static u32 ecore_hw_get_dflt_resc_num(struct ecore_hwfn *p_hwfn,
return dflt_resc_num;
}
+static const char *ecore_hw_get_resc_name(enum ecore_resources res_id)
+{
+ switch (res_id) {
+ case ECORE_SB:
+ return "SB";
+ case ECORE_L2_QUEUE:
+ return "L2_QUEUE";
+ case ECORE_VPORT:
+ return "VPORT";
+ case ECORE_RSS_ENG:
+ return "RSS_ENG";
+ case ECORE_PQ:
+ return "PQ";
+ case ECORE_RL:
+ return "RL";
+ case ECORE_MAC:
+ return "MAC";
+ case ECORE_VLAN:
+ return "VLAN";
+ case ECORE_RDMA_CNQ_RAM:
+ return "RDMA_CNQ_RAM";
+ case ECORE_ILT:
+ return "ILT";
+ case ECORE_LL2_QUEUE:
+ return "LL2_QUEUE";
+ case ECORE_CMDQS_CQS:
+ return "CMDQS_CQS";
+ case ECORE_RDMA_STATS_QUEUE:
+ return "RDMA_STATS_QUEUE";
+ default:
+ return "UNKNOWN_RESOURCE";
+ }
+}
+
static enum _ecore_status_t ecore_hw_set_resc_info(struct ecore_hwfn *p_hwfn,
enum ecore_resources res_id,
bool drv_resc_alloc)
@@ -2236,8 +2270,9 @@ static enum _ecore_status_t ecore_hw_set_resc_info(struct ecore_hwfn *p_hwfn,
dflt_resc_num = ecore_hw_get_dflt_resc_num(p_hwfn, res_id);
if (!dflt_resc_num) {
- DP_ERR(p_hwfn, "Failed to get default amount for resource %d\n",
- res_id);
+ DP_ERR(p_hwfn,
+ "Failed to get default amount for resource %d [%s]\n",
+ res_id, ecore_hw_get_resc_name(res_id));
return ECORE_INVAL;
}
dflt_resc_start = dflt_resc_num * p_hwfn->enabled_func_idx;
@@ -2263,8 +2298,9 @@ static enum _ecore_status_t ecore_hw_set_resc_info(struct ecore_hwfn *p_hwfn,
&mcp_resp, &mcp_param);
if (rc != ECORE_SUCCESS) {
DP_NOTICE(p_hwfn, true,
- "MFW resp failure for a resc alloc req [res_id %d]\n",
- res_id);
+ "MFW response failure for an allocation request for"
+ " resource %d [%s]\n",
+ res_id, ecore_hw_get_resc_name(res_id));
return rc;
}
@@ -2277,11 +2313,11 @@ static enum _ecore_status_t ecore_hw_set_resc_info(struct ecore_hwfn *p_hwfn,
mcp_resp != FW_MSG_CODE_RESOURCE_ALLOC_DEPRECATED) {
/* @DPDK */
DP_INFO(p_hwfn,
- "No allocation info for resc %d [mcp_resp 0x%x].",
- res_id, mcp_resp);
- DP_INFO(p_hwfn,
- "Applying default values [num %d, start %d].\n",
- dflt_resc_num, dflt_resc_start);
+ "Resource %d [%s]: No allocation info was received"
+ " [mcp_resp 0x%x]. Applying default values"
+ " [num %d, start %d].\n",
+ res_id, ecore_hw_get_resc_name(res_id), mcp_resp,
+ dflt_resc_num, dflt_resc_start);
*p_resc_num = dflt_resc_num;
*p_resc_start = dflt_resc_start;
@@ -2300,13 +2336,11 @@ static enum _ecore_status_t ecore_hw_set_resc_info(struct ecore_hwfn *p_hwfn,
if (*p_resc_num != dflt_resc_num || *p_resc_start != dflt_resc_start) {
DP_NOTICE(p_hwfn, false,
- "Resource %d: MFW allocation [num %d, start %d]",
- res_id, *p_resc_num, *p_resc_start);
- DP_NOTICE(p_hwfn, false,
- "differs from default values [num %d, start %d]%s\n",
- dflt_resc_num,
- dflt_resc_start,
- drv_resc_alloc ? " - applying default values" : "");
+ "Resource %d [%s]: MFW allocation [num %d, start %d]"
+ " differs from default values [num %d, start %d]%s\n",
+ res_id, ecore_hw_get_resc_name(res_id), *p_resc_num,
+ *p_resc_start, dflt_resc_num, dflt_resc_start,
+ drv_resc_alloc ? " - Applying default values" : "");
if (drv_resc_alloc) {
*p_resc_num = dflt_resc_num;
*p_resc_start = dflt_resc_start;
@@ -2316,40 +2350,6 @@ static enum _ecore_status_t ecore_hw_set_resc_info(struct ecore_hwfn *p_hwfn,
return ECORE_SUCCESS;
}
-static const char *ecore_hw_get_resc_name(enum ecore_resources res_id)
-{
- switch (res_id) {
- case ECORE_SB:
- return "SB";
- case ECORE_L2_QUEUE:
- return "L2_QUEUE";
- case ECORE_VPORT:
- return "VPORT";
- case ECORE_RSS_ENG:
- return "RSS_ENG";
- case ECORE_PQ:
- return "PQ";
- case ECORE_RL:
- return "RL";
- case ECORE_MAC:
- return "MAC";
- case ECORE_VLAN:
- return "VLAN";
- case ECORE_RDMA_CNQ_RAM:
- return "RDMA_CNQ_RAM";
- case ECORE_ILT:
- return "ILT";
- case ECORE_LL2_QUEUE:
- return "LL2_QUEUE";
- case ECORE_CMDQS_CQS:
- return "CMDQS_CQS";
- case ECORE_RDMA_STATS_QUEUE:
- return "RDMA_STATS_QUEUE";
- default:
- return "UNKNOWN_RESOURCE";
- }
-}
-
static enum _ecore_status_t ecore_hw_get_resc(struct ecore_hwfn *p_hwfn,
bool drv_resc_alloc)
{
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 11/26] net/qede: remove unused struct member
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Remove b_hw_channel from struct ecore_dev.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore.h | 2 --
drivers/net/qede/base/ecore_vf.c | 10 ----------
drivers/net/qede/qede_main.c | 5 ++---
3 files changed, 2 insertions(+), 15 deletions(-)
diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index f830778..71ce24b 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -711,8 +711,6 @@ struct ecore_dev {
/* SRIOV */
struct ecore_hw_sriov_info *p_iov_info;
#define IS_ECORE_SRIOV(p_dev) (!!(p_dev)->p_iov_info)
- bool b_hw_channel;
-
unsigned long tunn_mode;
bool b_is_vf;
diff --git a/drivers/net/qede/base/ecore_vf.c b/drivers/net/qede/base/ecore_vf.c
index 4c44ee7..17ba4d1 100644
--- a/drivers/net/qede/base/ecore_vf.c
+++ b/drivers/net/qede/base/ecore_vf.c
@@ -83,16 +83,6 @@ ecore_send_msg2pf(struct ecore_hwfn *p_hwfn,
/* need to add the END TLV to the message size */
resp_size += sizeof(struct channel_list_end_tlv);
- if (!p_hwfn->p_dev->b_hw_channel) {
- rc = OSAL_VF_SEND_MSG2PF(p_hwfn->p_dev,
- done,
- p_req,
- p_hwfn->vf_iov_info->pf2vf_reply,
- sizeof(union vfpf_tlvs), resp_size);
- /* TODO - no prints about message ? */
- return rc;
- }
-
/* Send TLVs over HW channel */
OSAL_MEMSET(&trigger, 0, sizeof(struct ustorm_trigger_vf_zone));
trigger.vf_pf_msg_valid = 1;
diff --git a/drivers/net/qede/qede_main.c b/drivers/net/qede/qede_main.c
index 45773d8..e827200 100644
--- a/drivers/net/qede/qede_main.c
+++ b/drivers/net/qede/qede_main.c
@@ -51,10 +51,9 @@ qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
ecore_init_struct(edev);
qdev->protocol = protocol;
- if (is_vf) {
+ if (is_vf)
edev->b_is_vf = true;
- edev->b_hw_channel = true; /* @DPDK */
- }
+
ecore_init_dp(edev, dp_module, dp_level, NULL);
qed_init_pci(edev, pci_dev);
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 07/26] net/qede/base: add check to validate txq
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Make sure VF tx_qid and the status block index is in the allocated range,
else fail the request.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore_sriov.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/net/qede/base/ecore_sriov.c b/drivers/net/qede/base/ecore_sriov.c
index afc1db3..bdf9164 100644
--- a/drivers/net/qede/base/ecore_sriov.c
+++ b/drivers/net/qede/base/ecore_sriov.c
@@ -2099,26 +2099,26 @@ static void ecore_iov_vf_mbx_start_txq(struct ecore_hwfn *p_hwfn,
pq_params.eth.is_vf = 1;
pq_params.eth.vf_id = vf->relative_vf_id;
- req = &mbx->req_virt->start_txq;
OSAL_MEMSET(&p_params, 0, sizeof(p_params));
+ req = &mbx->req_virt->start_txq;
+
+ if (!ecore_iov_validate_txq(p_hwfn, vf, req->tx_qid) ||
+ !ecore_iov_validate_sb(p_hwfn, vf, req->hw_sb))
+ goto out;
+
p_params.queue_id = (u8)vf->vf_queues[req->tx_qid].fw_tx_qid;
p_params.vport_id = vf->vport_id;
p_params.stats_id = vf->abs_vf_id + 0x10,
p_params.sb = req->hw_sb;
p_params.sb_idx = req->sb_index;
- if (!ecore_iov_validate_txq(p_hwfn, vf, req->tx_qid) ||
- !ecore_iov_validate_sb(p_hwfn, vf, req->hw_sb))
- goto out;
-
- rc = ecore_sp_eth_txq_start_ramrod(
- p_hwfn,
- vf->opaque_fid,
- vf->vf_queues[req->tx_qid].fw_cid,
- &p_params,
- req->pbl_addr,
- req->pbl_size,
- &pq_params);
+ rc = ecore_sp_eth_txq_start_ramrod(p_hwfn,
+ vf->opaque_fid,
+ vf->vf_queues[req->tx_qid].fw_cid,
+ &p_params,
+ req->pbl_addr,
+ req->pbl_size,
+ &pq_params);
if (rc)
status = PFVF_STATUS_FAILURE;
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 08/26] net/qede/base: fix updating VF queue zone id
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Pass the absolute qzone_id when creating queues.
Fixes: 5cdd769a26ec ("qede: add L2 support")
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore_dev.c | 9 ++++++---
drivers/net/qede/base/ecore_l2.c | 10 +++++-----
drivers/net/qede/base/ecore_l2_api.h | 11 +++++++++--
drivers/net/qede/base/ecore_sriov.c | 1 +
drivers/net/qede/qede_eth_if.c | 1 +
5 files changed, 22 insertions(+), 10 deletions(-)
diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
index 1d906b7..8b7d1da 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -542,11 +542,14 @@ enum _ecore_status_t ecore_resc_alloc(struct ecore_dev *p_dev)
/* Allocate Memory for the Queue->CID mapping */
for_each_hwfn(p_dev, i) {
struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
+ u32 num_tx_conns = RESC_NUM(p_hwfn, ECORE_L2_QUEUE);
+ int tx_size, rx_size;
/* @@@TMP - resc management, change to actual required size */
- int tx_size = sizeof(struct ecore_hw_cid_data) *
- RESC_NUM(p_hwfn, ECORE_L2_QUEUE);
- int rx_size = sizeof(struct ecore_hw_cid_data) *
+ if (p_hwfn->pf_params.eth_pf_params.num_cons > num_tx_conns)
+ num_tx_conns = p_hwfn->pf_params.eth_pf_params.num_cons;
+ tx_size = sizeof(struct ecore_hw_cid_data) * num_tx_conns;
+ rx_size = sizeof(struct ecore_hw_cid_data) *
RESC_NUM(p_hwfn, ECORE_L2_QUEUE);
p_hwfn->p_tx_cids = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
diff --git a/drivers/net/qede/base/ecore_l2.c b/drivers/net/qede/base/ecore_l2.c
index b139c39..9cb554c 100644
--- a/drivers/net/qede/base/ecore_l2.c
+++ b/drivers/net/qede/base/ecore_l2.c
@@ -663,7 +663,7 @@ ecore_sp_eth_rx_queue_start(struct ecore_hwfn *p_hwfn,
if (IS_VF(p_hwfn->p_dev)) {
return ecore_vf_pf_rxq_start(p_hwfn,
- p_params->queue_id,
+ (u8)p_params->queue_id,
p_params->sb,
(u8)p_params->sb_idx,
bd_max_bytes,
@@ -840,9 +840,9 @@ ecore_sp_eth_txq_start_ramrod(struct ecore_hwfn *p_hwfn,
struct ecore_spq_entry *p_ent = OSAL_NULL;
struct ecore_sp_init_data init_data;
struct ecore_hw_cid_data *p_tx_cid;
- u16 pq_id, abs_tx_q_id = 0;
- u8 abs_vport_id;
+ u16 pq_id, abs_tx_qzone_id = 0;
enum _ecore_status_t rc = ECORE_NOTIMPL;
+ u8 abs_vport_id;
/* Store information for the stop */
p_tx_cid = &p_hwfn->p_tx_cids[p_params->queue_id];
@@ -853,7 +853,7 @@ ecore_sp_eth_txq_start_ramrod(struct ecore_hwfn *p_hwfn,
if (rc != ECORE_SUCCESS)
return rc;
- rc = ecore_fw_l2_queue(p_hwfn, p_params->queue_id, &abs_tx_q_id);
+ rc = ecore_fw_l2_queue(p_hwfn, p_params->qzone_id, &abs_tx_qzone_id);
if (rc != ECORE_SUCCESS)
return rc;
@@ -876,7 +876,7 @@ ecore_sp_eth_txq_start_ramrod(struct ecore_hwfn *p_hwfn,
p_ramrod->sb_index = (u8)p_params->sb_idx;
p_ramrod->stats_counter_id = p_params->stats_id;
- p_ramrod->queue_zone_id = OSAL_CPU_TO_LE16(abs_tx_q_id);
+ p_ramrod->queue_zone_id = OSAL_CPU_TO_LE16(abs_tx_qzone_id);
p_ramrod->pbl_size = OSAL_CPU_TO_LE16(pbl_size);
DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, pbl_addr);
diff --git a/drivers/net/qede/base/ecore_l2_api.h b/drivers/net/qede/base/ecore_l2_api.h
index c12d97c..247316b 100644
--- a/drivers/net/qede/base/ecore_l2_api.h
+++ b/drivers/net/qede/base/ecore_l2_api.h
@@ -28,10 +28,17 @@ enum ecore_rss_caps {
#endif
struct ecore_queue_start_common_params {
- /* Rx/Tx queue id */
- u8 queue_id;
+ /* Rx/Tx queue relative id to keep obtained cid in corresponding array
+ * RX - upper-bounded by number of FW-queues
+ */
+ u16 queue_id;
u8 vport_id;
+ /* q_zone_id is relative, may be different from queue id
+ * currently used by Tx-only, upper-bounded by number of FW-queues
+ */
+ u8 qzone_id;
+
/* stats_id is relative or absolute depends on function */
u8 stats_id;
u16 sb;
diff --git a/drivers/net/qede/base/ecore_sriov.c b/drivers/net/qede/base/ecore_sriov.c
index bdf9164..0e2b324 100644
--- a/drivers/net/qede/base/ecore_sriov.c
+++ b/drivers/net/qede/base/ecore_sriov.c
@@ -2107,6 +2107,7 @@ static void ecore_iov_vf_mbx_start_txq(struct ecore_hwfn *p_hwfn,
goto out;
p_params.queue_id = (u8)vf->vf_queues[req->tx_qid].fw_tx_qid;
+ p_params.qzone_id = (u8)vf->vf_queues[req->tx_qid].fw_tx_qid;
p_params.vport_id = vf->vport_id;
p_params.stats_id = vf->abs_vf_id + 0x10,
p_params.sb = req->hw_sb;
diff --git a/drivers/net/qede/qede_eth_if.c b/drivers/net/qede/qede_eth_if.c
index 7d21200..d0f6e87 100644
--- a/drivers/net/qede/qede_eth_if.c
+++ b/drivers/net/qede/qede_eth_if.c
@@ -213,6 +213,7 @@ qed_start_txq(struct ecore_dev *edev,
p_hwfn = &edev->hwfns[hwfn_index];
p_params->queue_id = p_params->queue_id / edev->num_hwfns;
+ p_params->qzone_id = p_params->queue_id;
p_params->stats_id = p_params->vport_id;
rc = ecore_sp_eth_tx_queue_start(p_hwfn,
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 09/26] net/qede/base: improve Tx-switching performance
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
In order to improve Tx switching performance an additional HSI parameter
called same-as-last-id is introduced. This resource allows FW caching the
txqs packet properties. Driver needs to set same-as-last-id to be equal to
the qzone.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore_l2.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/qede/base/ecore_l2.c b/drivers/net/qede/base/ecore_l2.c
index 9cb554c..22bb43d 100644
--- a/drivers/net/qede/base/ecore_l2.c
+++ b/drivers/net/qede/base/ecore_l2.c
@@ -877,6 +877,7 @@ ecore_sp_eth_txq_start_ramrod(struct ecore_hwfn *p_hwfn,
p_ramrod->stats_counter_id = p_params->stats_id;
p_ramrod->queue_zone_id = OSAL_CPU_TO_LE16(abs_tx_qzone_id);
+ p_ramrod->same_as_last_id = OSAL_CPU_TO_LE16(abs_tx_qzone_id);
p_ramrod->pbl_size = OSAL_CPU_TO_LE16(pbl_size);
DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, pbl_addr);
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 05/26] net/qede/base: make API non-static
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Move ecore_set_fw_mac_addr from ecore_l2.c to ecore_dev.c to
facilitate future code reuse.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore.h | 2 ++
drivers/net/qede/base/ecore_dev.c | 13 +++++++++++++
drivers/net/qede/base/ecore_l2.c | 11 -----------
3 files changed, 15 insertions(+), 11 deletions(-)
diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index c9f3b00..19e9e02 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -811,6 +811,8 @@ int ecore_configure_pf_min_bandwidth(struct ecore_dev *p_dev, u8 min_bw);
void ecore_clean_wfq_db(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt);
int ecore_device_num_engines(struct ecore_dev *p_dev);
int ecore_device_num_ports(struct ecore_dev *p_dev);
+void ecore_set_fw_mac_addr(__le16 *fw_msb, __le16 *fw_mid, __le16 *fw_lsb,
+ u8 *mac);
#define ECORE_LEADING_HWFN(dev) (&dev->hwfns[0])
diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
index d7a95fe..1d906b7 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -4297,3 +4297,16 @@ int ecore_device_num_ports(struct ecore_dev *p_dev)
return p_dev->num_ports_in_engines * ecore_device_num_engines(p_dev);
}
+
+void ecore_set_fw_mac_addr(__le16 *fw_msb,
+ __le16 *fw_mid,
+ __le16 *fw_lsb,
+ u8 *mac)
+{
+ ((u8 *)fw_msb)[0] = mac[1];
+ ((u8 *)fw_msb)[1] = mac[0];
+ ((u8 *)fw_mid)[0] = mac[3];
+ ((u8 *)fw_mid)[1] = mac[2];
+ ((u8 *)fw_lsb)[0] = mac[5];
+ ((u8 *)fw_lsb)[1] = mac[4];
+}
diff --git a/drivers/net/qede/base/ecore_l2.c b/drivers/net/qede/base/ecore_l2.c
index 9989ee4..b139c39 100644
--- a/drivers/net/qede/base/ecore_l2.c
+++ b/drivers/net/qede/base/ecore_l2.c
@@ -1012,17 +1012,6 @@ ecore_filter_action(enum ecore_filter_opcode opcode)
return action;
}
-static void ecore_set_fw_mac_addr(__le16 *fw_msb,
- __le16 *fw_mid, __le16 *fw_lsb, u8 *mac)
-{
- ((u8 *)fw_msb)[0] = mac[1];
- ((u8 *)fw_msb)[1] = mac[0];
- ((u8 *)fw_mid)[0] = mac[3];
- ((u8 *)fw_mid)[1] = mac[2];
- ((u8 *)fw_lsb)[0] = mac[5];
- ((u8 *)fw_lsb)[1] = mac[4];
-}
-
static enum _ecore_status_t
ecore_filter_ucast_common(struct ecore_hwfn *p_hwfn,
u16 opaque_fid,
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 06/26] net/qede/base: rename macro
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Rename OOO_LB_TC to PKT_LB_TC to give better meaning.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore.h | 2 +-
drivers/net/qede/base/ecore_hw.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index 19e9e02..f830778 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -800,7 +800,7 @@ static OSAL_INLINE u8 ecore_concrete_to_sw_fid(struct ecore_dev *p_dev,
}
#define PURE_LB_TC 8
-#define OOO_LB_TC 9
+#define PKT_LB_TC 9
int ecore_configure_vport_wfq(struct ecore_dev *p_dev, u16 vp_id, u32 rate);
void ecore_configure_vp_wfq_on_link_change(struct ecore_dev *p_dev,
diff --git a/drivers/net/qede/base/ecore_hw.c b/drivers/net/qede/base/ecore_hw.c
index 7f4db0a..8abe60a 100644
--- a/drivers/net/qede/base/ecore_hw.c
+++ b/drivers/net/qede/base/ecore_hw.c
@@ -923,7 +923,7 @@ u16 ecore_get_qm_pq(struct ecore_hwfn *p_hwfn,
case PROTOCOLID_CORE:
if (p_params->core.tc == LB_TC)
pq_id = p_hwfn->qm_info.pure_lb_pq;
- else if (p_params->core.tc == OOO_LB_TC)
+ else if (p_params->core.tc == PKT_LB_TC)
pq_id = p_hwfn->qm_info.ooo_pq;
else
pq_id = p_hwfn->qm_info.offload_pq;
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 04/26] net/qede/base: change return codes in SR-IOV
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Change return codes in VF/SR-IOV base driver from int to
enum _ecore_status_t.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore_sriov.c | 19 +++++++++++--------
drivers/net/qede/base/ecore_sriov.h | 4 ++--
drivers/net/qede/base/ecore_vf.c | 33 ++++++++++++++++++---------------
3 files changed, 31 insertions(+), 25 deletions(-)
diff --git a/drivers/net/qede/base/ecore_sriov.c b/drivers/net/qede/base/ecore_sriov.c
index 38c2db3..afc1db3 100644
--- a/drivers/net/qede/base/ecore_sriov.c
+++ b/drivers/net/qede/base/ecore_sriov.c
@@ -1707,9 +1707,10 @@ ecore_iov_reconfigure_unicast_shadow(struct ecore_hwfn *p_hwfn,
return rc;
}
-static int ecore_iov_configure_vport_forced(struct ecore_hwfn *p_hwfn,
- struct ecore_vf_info *p_vf,
- u64 events)
+static enum _ecore_status_t
+ecore_iov_configure_vport_forced(struct ecore_hwfn *p_hwfn,
+ struct ecore_vf_info *p_vf,
+ u64 events)
{
enum _ecore_status_t rc = ECORE_SUCCESS;
struct ecore_filter_ucast filter;
@@ -3141,9 +3142,10 @@ ecore_iov_single_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
return rc;
}
-int ecore_iov_mark_vf_flr(struct ecore_hwfn *p_hwfn, u32 *p_disabled_vfs)
+bool ecore_iov_mark_vf_flr(struct ecore_hwfn *p_hwfn, u32 *p_disabled_vfs)
{
- u16 i, found = 0;
+ bool found;
+ u16 i;
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, "Marking FLR-ed VFs\n");
for (i = 0; i < (VF_MAX_STATIC / 32); i++)
@@ -3153,7 +3155,7 @@ int ecore_iov_mark_vf_flr(struct ecore_hwfn *p_hwfn, u32 *p_disabled_vfs)
if (!p_hwfn->p_dev->p_iov_info) {
DP_NOTICE(p_hwfn, true, "VF flr but no IOV\n");
- return 0;
+ return false;
}
/* Mark VFs */
@@ -3182,7 +3184,7 @@ int ecore_iov_mark_vf_flr(struct ecore_hwfn *p_hwfn, u32 *p_disabled_vfs)
* VF flr until ACKs, we're safe.
*/
p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
- found = 1;
+ found = true;
}
}
@@ -3961,7 +3963,8 @@ bool ecore_iov_is_vf_initialized(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
return (p_vf->state == VF_ENABLED);
}
-int ecore_iov_get_vf_min_rate(struct ecore_hwfn *p_hwfn, int vfid)
+enum _ecore_status_t
+ecore_iov_get_vf_min_rate(struct ecore_hwfn *p_hwfn, int vfid)
{
struct ecore_wfq_data *vf_vp_wfq;
struct ecore_vf_info *vf_info;
diff --git a/drivers/net/qede/base/ecore_sriov.h b/drivers/net/qede/base/ecore_sriov.h
index 3c5c68f..884a90c 100644
--- a/drivers/net/qede/base/ecore_sriov.h
+++ b/drivers/net/qede/base/ecore_sriov.h
@@ -277,8 +277,8 @@ u32 ecore_crc32(u32 crc,
*
* @return 1 iff one of the PF's vfs got FLRed. 0 otherwise.
*/
-int ecore_iov_mark_vf_flr(struct ecore_hwfn *p_hwfn,
- u32 *disabled_vfs);
+bool ecore_iov_mark_vf_flr(struct ecore_hwfn *p_hwfn,
+ u32 *disabled_vfs);
/**
* @brief Search extended TLVs in request/reply buffer.
diff --git a/drivers/net/qede/base/ecore_vf.c b/drivers/net/qede/base/ecore_vf.c
index c26b602..4c44ee7 100644
--- a/drivers/net/qede/base/ecore_vf.c
+++ b/drivers/net/qede/base/ecore_vf.c
@@ -65,13 +65,15 @@ static void ecore_vf_pf_req_end(struct ecore_hwfn *p_hwfn,
OSAL_MUTEX_RELEASE(&p_hwfn->vf_iov_info->mutex);
}
-static int ecore_send_msg2pf(struct ecore_hwfn *p_hwfn,
- u8 *done, u32 resp_size)
+static enum _ecore_status_t
+ecore_send_msg2pf(struct ecore_hwfn *p_hwfn,
+ u8 *done, u32 resp_size)
{
union vfpf_tlvs *p_req = p_hwfn->vf_iov_info->vf2pf_request;
struct ustorm_trigger_vf_zone trigger;
struct ustorm_vf_zone *zone_data;
- int rc = ECORE_SUCCESS, time = 100;
+ enum _ecore_status_t rc = ECORE_SUCCESS;
+ int time = 100;
zone_data = (struct ustorm_vf_zone *)PXP_VF_BAR0_START_USDM_ZONE_B;
@@ -475,7 +477,7 @@ enum _ecore_status_t ecore_vf_pf_rxq_start(struct ecore_hwfn *p_hwfn,
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
struct pfvf_start_queue_resp_tlv *resp;
struct vfpf_start_rxq_tlv *req;
- int rc;
+ enum _ecore_status_t rc;
/* clear mailbox and prep first tlv */
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_RXQ, sizeof(*req));
@@ -550,7 +552,7 @@ enum _ecore_status_t ecore_vf_pf_rxq_stop(struct ecore_hwfn *p_hwfn,
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
struct vfpf_stop_rxqs_tlv *req;
struct pfvf_def_resp_tlv *resp;
- int rc;
+ enum _ecore_status_t rc;
/* clear mailbox and prep first tlv */
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_RXQS, sizeof(*req));
@@ -591,7 +593,7 @@ enum _ecore_status_t ecore_vf_pf_txq_start(struct ecore_hwfn *p_hwfn,
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
struct pfvf_start_queue_resp_tlv *resp;
struct vfpf_start_txq_tlv *req;
- int rc;
+ enum _ecore_status_t rc;
/* clear mailbox and prep first tlv */
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_TXQ, sizeof(*req));
@@ -649,7 +651,7 @@ enum _ecore_status_t ecore_vf_pf_txq_stop(struct ecore_hwfn *p_hwfn, u16 tx_qid)
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
struct vfpf_stop_txqs_tlv *req;
struct pfvf_def_resp_tlv *resp;
- int rc;
+ enum _ecore_status_t rc;
/* clear mailbox and prep first tlv */
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_TXQS, sizeof(*req));
@@ -686,7 +688,7 @@ enum _ecore_status_t ecore_vf_pf_rxqs_update(struct ecore_hwfn *p_hwfn,
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
struct vfpf_update_rxq_tlv *req;
- int rc;
+ enum _ecore_status_t rc;
/* clear mailbox and prep first tlv */
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_RXQ, sizeof(*req));
@@ -728,7 +730,8 @@ ecore_vf_pf_vport_start(struct ecore_hwfn *p_hwfn, u8 vport_id,
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
struct vfpf_vport_start_tlv *req;
struct pfvf_def_resp_tlv *resp;
- int rc, i;
+ enum _ecore_status_t rc;
+ int i;
/* clear mailbox and prep first tlv */
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_START, sizeof(*req));
@@ -770,7 +773,7 @@ enum _ecore_status_t ecore_vf_pf_vport_stop(struct ecore_hwfn *p_hwfn)
{
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
- int rc;
+ enum _ecore_status_t rc;
/* clear mailbox and prep first tlv */
ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_TEARDOWN,
@@ -868,7 +871,7 @@ ecore_vf_pf_vport_update(struct ecore_hwfn *p_hwfn,
u8 update_rx, update_tx;
u32 resp_size = 0;
u16 size, tlv;
- int rc;
+ enum _ecore_status_t rc;
resp = &p_iov->pf2vf_reply->default_resp;
resp_size = sizeof(*resp);
@@ -1076,7 +1079,7 @@ enum _ecore_status_t ecore_vf_pf_reset(struct ecore_hwfn *p_hwfn)
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
struct pfvf_def_resp_tlv *resp;
struct vfpf_first_tlv *req;
- int rc;
+ enum _ecore_status_t rc;
/* clear mailbox and prep first tlv */
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_CLOSE, sizeof(*req));
@@ -1109,8 +1112,8 @@ enum _ecore_status_t ecore_vf_pf_release(struct ecore_hwfn *p_hwfn)
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
struct pfvf_def_resp_tlv *resp;
struct vfpf_first_tlv *req;
+ enum _ecore_status_t rc;
u32 size;
- int rc;
/* clear mailbox and prep first tlv */
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_RELEASE, sizeof(*req));
@@ -1182,7 +1185,7 @@ enum _ecore_status_t ecore_vf_pf_filter_ucast(struct ecore_hwfn *p_hwfn,
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
struct vfpf_ucast_filter_tlv *req;
struct pfvf_def_resp_tlv *resp;
- int rc;
+ enum _ecore_status_t rc;
/* Sanitize */
if (p_ucast->opcode == ECORE_FILTER_MOVE) {
@@ -1223,7 +1226,7 @@ enum _ecore_status_t ecore_vf_pf_int_cleanup(struct ecore_hwfn *p_hwfn)
{
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
- int rc;
+ enum _ecore_status_t rc;
/* clear mailbox and prep first tlv */
ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_INT_CLEANUP,
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 03/26] net/qede/base: add handling of malicious VF
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Receive indication that VFs are malicious and pass it to the
caller/clients and stop serving those VF's additional resource requests.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/bcm_osal.h | 1 +
drivers/net/qede/base/ecore_iov_api.h | 4 +-
drivers/net/qede/base/ecore_l2.c | 26 ++++++-
drivers/net/qede/base/ecore_l2_api.h | 9 +++
drivers/net/qede/base/ecore_sriov.c | 123 +++++++++++++++++++++++++++++----
drivers/net/qede/base/ecore_sriov.h | 1 +
6 files changed, 147 insertions(+), 17 deletions(-)
diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h
index 0b446f2..7682ea8 100644
--- a/drivers/net/qede/base/bcm_osal.h
+++ b/drivers/net/qede/base/bcm_osal.h
@@ -323,6 +323,7 @@ u32 qede_find_first_zero_bit(unsigned long *, u32);
#define OSAL_VF_SEND_MSG2PF(dev, done, msg, reply_addr, msg_size, reply_size) 0
#define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol) (0)
#define OSAL_PF_VF_MSG(hwfn, vfid) 0
+#define OSAL_PF_VF_MALICIOUS(hwfn, vfid) nothing
#define OSAL_IOV_CHK_UCAST(hwfn, vfid, params) 0
#define OSAL_IOV_POST_START_VPORT(hwfn, vf, vport_id, opaque_fid) nothing
#define OSAL_IOV_VF_ACQUIRE(hwfn, vfid) 0
diff --git a/drivers/net/qede/base/ecore_iov_api.h b/drivers/net/qede/base/ecore_iov_api.h
index bb8df82..0b857bb 100644
--- a/drivers/net/qede/base/ecore_iov_api.h
+++ b/drivers/net/qede/base/ecore_iov_api.h
@@ -52,6 +52,7 @@ enum ecore_iov_pf_to_vf_status {
PFVF_STATUS_NOT_SUPPORTED,
PFVF_STATUS_NO_RESOURCE,
PFVF_STATUS_FORCED,
+ PFVF_STATUS_MALICIOUS,
};
struct ecore_mcp_link_params;
@@ -301,12 +302,13 @@ bool ecore_iov_is_vf_pending_flr(struct ecore_hwfn *p_hwfn,
* @param p_hwfn
* @param rel_vf_id - Relative VF ID
* @param b_enabled_only - consider only enabled VF
+ * @param b_non_malicious - true iff we want to validate vf isn't malicious.
*
* @return bool - true for valid VF ID
*/
bool ecore_iov_is_valid_vfid(struct ecore_hwfn *p_hwfn,
int rel_vf_id,
- bool b_enabled_only);
+ bool b_enabled_only, bool b_non_malicious);
/**
* @brief Get VF's public info structure
diff --git a/drivers/net/qede/base/ecore_l2.c b/drivers/net/qede/base/ecore_l2.c
index a893cb9..9989ee4 100644
--- a/drivers/net/qede/base/ecore_l2.c
+++ b/drivers/net/qede/base/ecore_l2.c
@@ -36,9 +36,9 @@ ecore_sp_eth_vport_start(struct ecore_hwfn *p_hwfn,
struct vport_start_ramrod_data *p_ramrod = OSAL_NULL;
struct ecore_spq_entry *p_ent = OSAL_NULL;
struct ecore_sp_init_data init_data;
+ u16 rx_mode = 0, tx_err = 0;
u8 abs_vport_id = 0;
enum _ecore_status_t rc = ECORE_NOTIMPL;
- u16 rx_mode = 0;
rc = ecore_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id);
if (rc != ECORE_SUCCESS)
@@ -71,6 +71,30 @@ ecore_sp_eth_vport_start(struct ecore_hwfn *p_hwfn,
p_ramrod->rx_mode.state = OSAL_CPU_TO_LE16(rx_mode);
+ /* Handle requests for strict behavior on transmission errors */
+ SET_FIELD(tx_err, ETH_TX_ERR_VALS_ILLEGAL_VLAN_MODE,
+ p_params->b_err_illegal_vlan_mode ?
+ ETH_TX_ERR_ASSERT_MALICIOUS : 0);
+ SET_FIELD(tx_err, ETH_TX_ERR_VALS_PACKET_TOO_SMALL,
+ p_params->b_err_small_pkt ?
+ ETH_TX_ERR_ASSERT_MALICIOUS : 0);
+ SET_FIELD(tx_err, ETH_TX_ERR_VALS_ANTI_SPOOFING_ERR,
+ p_params->b_err_anti_spoof ?
+ ETH_TX_ERR_ASSERT_MALICIOUS : 0);
+ SET_FIELD(tx_err, ETH_TX_ERR_VALS_ILLEGAL_INBAND_TAGS,
+ p_params->b_err_illegal_inband_mode ?
+ ETH_TX_ERR_ASSERT_MALICIOUS : 0);
+ SET_FIELD(tx_err, ETH_TX_ERR_VALS_VLAN_INSERTION_W_INBAND_TAG,
+ p_params->b_err_vlan_insert_with_inband ?
+ ETH_TX_ERR_ASSERT_MALICIOUS : 0);
+ SET_FIELD(tx_err, ETH_TX_ERR_VALS_MTU_VIOLATION,
+ p_params->b_err_big_pkt ?
+ ETH_TX_ERR_ASSERT_MALICIOUS : 0);
+ SET_FIELD(tx_err, ETH_TX_ERR_VALS_ILLEGAL_CONTROL_FRAME,
+ p_params->b_err_ctrl_frame ?
+ ETH_TX_ERR_ASSERT_MALICIOUS : 0);
+ p_ramrod->tx_err_behav.values = OSAL_CPU_TO_LE16(tx_err);
+
/* TPA related fields */
OSAL_MEMSET(&p_ramrod->tpa_param, 0,
sizeof(struct eth_vport_tpa_param));
diff --git a/drivers/net/qede/base/ecore_l2_api.h b/drivers/net/qede/base/ecore_l2_api.h
index c338f5d..c12d97c 100644
--- a/drivers/net/qede/base/ecore_l2_api.h
+++ b/drivers/net/qede/base/ecore_l2_api.h
@@ -274,6 +274,15 @@ struct ecore_sp_vport_start_params {
bool zero_placement_offset;
bool check_mac;
bool check_ethtype;
+
+ /* Strict behavior on transmission errors */
+ bool b_err_illegal_vlan_mode;
+ bool b_err_illegal_inband_mode;
+ bool b_err_vlan_insert_with_inband;
+ bool b_err_small_pkt;
+ bool b_err_big_pkt;
+ bool b_err_anti_spoof;
+ bool b_err_ctrl_frame;
};
/**
diff --git a/drivers/net/qede/base/ecore_sriov.c b/drivers/net/qede/base/ecore_sriov.c
index c2fbee8..38c2db3 100644
--- a/drivers/net/qede/base/ecore_sriov.c
+++ b/drivers/net/qede/base/ecore_sriov.c
@@ -146,7 +146,7 @@ static enum _ecore_status_t ecore_sp_vf_stop(struct ecore_hwfn *p_hwfn,
}
bool ecore_iov_is_valid_vfid(struct ecore_hwfn *p_hwfn, int rel_vf_id,
- bool b_enabled_only)
+ bool b_enabled_only, bool b_non_malicious)
{
if (!p_hwfn->pf_iov_info) {
DP_NOTICE(p_hwfn->p_dev, true, "No iov info\n");
@@ -161,6 +161,10 @@ bool ecore_iov_is_valid_vfid(struct ecore_hwfn *p_hwfn, int rel_vf_id,
b_enabled_only)
return false;
+ if ((p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_malicious) &&
+ b_non_malicious)
+ return false;
+
return true;
}
@@ -175,7 +179,8 @@ struct ecore_vf_info *ecore_iov_get_vf_info(struct ecore_hwfn *p_hwfn,
return OSAL_NULL;
}
- if (ecore_iov_is_valid_vfid(p_hwfn, relative_vf_id, b_enabled_only))
+ if (ecore_iov_is_valid_vfid(p_hwfn, relative_vf_id,
+ b_enabled_only, false))
vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
else
DP_ERR(p_hwfn, "ecore_iov_get_vf_info: VF[%d] is not enabled\n",
@@ -612,7 +617,8 @@ enum _ecore_status_t ecore_iov_hw_info(struct ecore_hwfn *p_hwfn)
return ECORE_SUCCESS;
}
-bool ecore_iov_pf_sanity_check(struct ecore_hwfn *p_hwfn, int vfid)
+bool _ecore_iov_pf_sanity_check(struct ecore_hwfn *p_hwfn, int vfid,
+ bool b_fail_malicious)
{
/* Check PF supports sriov */
if (IS_VF(p_hwfn->p_dev) || !IS_ECORE_SRIOV(p_hwfn->p_dev) ||
@@ -620,12 +626,17 @@ bool ecore_iov_pf_sanity_check(struct ecore_hwfn *p_hwfn, int vfid)
return false;
/* Check VF validity */
- if (!ecore_iov_is_valid_vfid(p_hwfn, vfid, true))
+ if (!ecore_iov_is_valid_vfid(p_hwfn, vfid, true, b_fail_malicious))
return false;
return true;
}
+bool ecore_iov_pf_sanity_check(struct ecore_hwfn *p_hwfn, int vfid)
+{
+ return _ecore_iov_pf_sanity_check(p_hwfn, vfid, true);
+}
+
void ecore_iov_set_vf_to_disable(struct ecore_dev *p_dev,
u16 rel_vf_id, u8 to_disable)
{
@@ -746,6 +757,9 @@ ecore_iov_enable_vf_access(struct ecore_hwfn *p_hwfn,
ecore_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
+ /* It's possible VF was previously considered malicious */
+ vf->b_malicious = false;
+
rc = ecore_mcp_config_vf_msix(p_hwfn, p_ptt,
vf->abs_vf_id, vf->num_sbs);
if (rc != ECORE_SUCCESS)
@@ -3227,7 +3241,8 @@ void ecore_iov_process_mbx_req(struct ecore_hwfn *p_hwfn,
p_vf, mbx->first_tlv.tl.type);
/* check if tlv type is known */
- if (ecore_iov_tlv_supported(mbx->first_tlv.tl.type)) {
+ if (ecore_iov_tlv_supported(mbx->first_tlv.tl.type) &&
+ !p_vf->b_malicious) {
/* switch on the opcode */
switch (mbx->first_tlv.tl.type) {
case CHANNEL_TLV_ACQUIRE:
@@ -3270,6 +3285,27 @@ void ecore_iov_process_mbx_req(struct ecore_hwfn *p_hwfn,
ecore_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
break;
}
+ } else if (ecore_iov_tlv_supported(mbx->first_tlv.tl.type)) {
+ /* If we've received a message from a VF we consider malicious
+ * we ignore the messasge unless it's one for RELEASE, in which
+ * case we'll let it have the benefit of doubt, allowing the
+ * next loaded driver to start again.
+ */
+ if (mbx->first_tlv.tl.type == CHANNEL_TLV_RELEASE) {
+ /* TODO - initiate FLR, remove malicious indication */
+ DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+ "VF [%02x] - considered malicious, but wanted to RELEASE. TODO\n",
+ p_vf->abs_vf_id);
+ } else {
+ DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+ "VF [%02x] - considered malicious; Ignoring TLV [%04x]\n",
+ p_vf->abs_vf_id, mbx->first_tlv.tl.type);
+ }
+
+ ecore_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
+ mbx->first_tlv.tl.type,
+ sizeof(struct pfvf_def_resp_tlv),
+ PFVF_STATUS_MALICIOUS);
} else {
/* unknown TLV - this may belong to a VF driver from the future
* - a version written after this PF driver was written, which
@@ -3334,21 +3370,31 @@ void ecore_iov_pf_get_and_clear_pending_events(struct ecore_hwfn *p_hwfn,
sizeof(u64) * ECORE_VF_ARRAY_LENGTH);
}
-static enum _ecore_status_t ecore_sriov_vfpf_msg(struct ecore_hwfn *p_hwfn,
- u16 abs_vfid,
- struct regpair *vf_msg)
+static struct ecore_vf_info *
+ecore_sriov_get_vf_from_absid(struct ecore_hwfn *p_hwfn, u16 abs_vfid)
{
u8 min = (u8)p_hwfn->p_dev->p_iov_info->first_vf_in_pf;
- struct ecore_vf_info *p_vf;
- if (!ecore_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min)) {
+ if (!_ecore_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min, false)) {
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
- "Got a message from VF [abs 0x%08x] that cannot be"
+ "Got indication for VF [abs 0x%08x] that cannot be"
" handled by PF\n",
abs_vfid);
- return ECORE_SUCCESS;
+ return OSAL_NULL;
}
- p_vf = &p_hwfn->pf_iov_info->vfs_array[(u8)abs_vfid - min];
+
+ return &p_hwfn->pf_iov_info->vfs_array[(u8)abs_vfid - min];
+}
+
+static enum _ecore_status_t ecore_sriov_vfpf_msg(struct ecore_hwfn *p_hwfn,
+ u16 abs_vfid,
+ struct regpair *vf_msg)
+{
+ struct ecore_vf_info *p_vf = ecore_sriov_get_vf_from_absid(p_hwfn,
+ abs_vfid);
+
+ if (!p_vf)
+ return ECORE_SUCCESS;
/* List the physical address of the request so that handler
* could later on copy the message from it.
@@ -3358,6 +3404,25 @@ static enum _ecore_status_t ecore_sriov_vfpf_msg(struct ecore_hwfn *p_hwfn,
return OSAL_PF_VF_MSG(p_hwfn, p_vf->relative_vf_id);
}
+static void ecore_sriov_vfpf_malicious(struct ecore_hwfn *p_hwfn,
+ struct malicious_vf_eqe_data *p_data)
+{
+ struct ecore_vf_info *p_vf;
+
+ p_vf = ecore_sriov_get_vf_from_absid(p_hwfn, p_data->vfId);
+
+ if (!p_vf)
+ return;
+
+ DP_INFO(p_hwfn,
+ "VF [%d] - Malicious behavior [%02x]\n",
+ p_vf->abs_vf_id, p_data->errId);
+
+ p_vf->b_malicious = true;
+
+ OSAL_PF_VF_MALICIOUS(p_hwfn, p_vf->relative_vf_id);
+}
+
enum _ecore_status_t ecore_sriov_eqe_event(struct ecore_hwfn *p_hwfn,
u8 opcode,
__le16 echo,
@@ -3371,6 +3436,9 @@ enum _ecore_status_t ecore_sriov_eqe_event(struct ecore_hwfn *p_hwfn,
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
"VF-FLR is still not supported\n");
return ECORE_SUCCESS;
+ case COMMON_EVENT_MALICIOUS_VF:
+ ecore_sriov_vfpf_malicious(p_hwfn, &data->malicious_vf);
+ return ECORE_SUCCESS;
default:
DP_INFO(p_hwfn->p_dev, "Unknown sriov eqe event 0x%02x\n",
opcode);
@@ -3393,7 +3461,7 @@ u16 ecore_iov_get_next_active_vf(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
goto out;
for (i = rel_vf_id; i < p_iov->total_vfs; i++)
- if (ecore_iov_is_valid_vfid(p_hwfn, rel_vf_id, true))
+ if (ecore_iov_is_valid_vfid(p_hwfn, rel_vf_id, true, false))
return i;
out:
@@ -3439,6 +3507,12 @@ void ecore_iov_bulletin_set_forced_mac(struct ecore_hwfn *p_hwfn,
"Can not set forced MAC, invalid vfid [%d]\n", vfid);
return;
}
+ if (vf_info->b_malicious) {
+ DP_NOTICE(p_hwfn->p_dev, false,
+ "Can't set forced MAC to malicious VF [%d]\n",
+ vfid);
+ return;
+ }
feature = 1 << MAC_ADDR_FORCED;
OSAL_MEMCPY(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
@@ -3463,6 +3537,12 @@ enum _ecore_status_t ecore_iov_bulletin_set_mac(struct ecore_hwfn *p_hwfn,
"Can not set MAC, invalid vfid [%d]\n", vfid);
return ECORE_INVAL;
}
+ if (vf_info->b_malicious) {
+ DP_NOTICE(p_hwfn->p_dev, false,
+ "Can't set MAC to malicious VF [%d]\n",
+ vfid);
+ return ECORE_INVAL;
+ }
if (vf_info->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED)) {
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
@@ -3488,7 +3568,14 @@ ecore_iov_bulletin_set_forced_untagged_default(struct ecore_hwfn *p_hwfn,
vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
if (!vf_info) {
DP_NOTICE(p_hwfn->p_dev, true,
- "Can not set forced MAC, invalid vfid [%d]\n", vfid);
+ "Can not set untagged default, invalid vfid [%d]\n",
+ vfid);
+ return ECORE_INVAL;
+ }
+ if (vf_info->b_malicious) {
+ DP_NOTICE(p_hwfn->p_dev, false,
+ "Can't set untagged default to malicious VF [%d]\n",
+ vfid);
return ECORE_INVAL;
}
@@ -3553,6 +3640,12 @@ void ecore_iov_bulletin_set_forced_vlan(struct ecore_hwfn *p_hwfn,
vfid);
return;
}
+ if (vf_info->b_malicious) {
+ DP_NOTICE(p_hwfn->p_dev, false,
+ "Can't set forced vlan to malicious VF [%d]\n",
+ vfid);
+ return;
+ }
feature = 1 << VLAN_ADDR_FORCED;
vf_info->bulletin.p_virt->pvid = pvid;
diff --git a/drivers/net/qede/base/ecore_sriov.h b/drivers/net/qede/base/ecore_sriov.h
index ed6ddc4..3c5c68f 100644
--- a/drivers/net/qede/base/ecore_sriov.h
+++ b/drivers/net/qede/base/ecore_sriov.h
@@ -97,6 +97,7 @@ struct ecore_vf_info {
struct ecore_iov_vf_mbx vf_mbx;
enum vf_state state;
bool b_init;
+ bool b_malicious;
u8 to_disable;
struct ecore_bulletin bulletin;
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 02/26] net/qede/base: improve set field macro
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Improve robustness of the SET_FIELD macro by using a mask.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index 907b35b..c9f3b00 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -80,7 +80,7 @@ enum ecore_nvm_cmd {
#define SET_FIELD(value, name, flag) \
do { \
(value) &= ~(name##_MASK << name##_SHIFT); \
- (value) |= (((u64)flag) << (name##_SHIFT)); \
+ (value) |= ((((u64)flag) & (u64)name##_MASK) << (name##_SHIFT));\
} while (0)
#define GET_FIELD(value, name) \
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 01/26] net/qede/base: add request for PF FLR before load request
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Add a request for PF Function Level Reset(FLR) before a load request
Fix the location of the PF FLR initiation to be after ecore_get_hw_info()
(which invokes ecore_hw_info_port_num())
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
drivers/net/qede/base/ecore_dev.c | 16 ++++++++++------
drivers/net/qede/base/ecore_dev_api.h | 2 ++
drivers/net/qede/base/ecore_mcp.c | 4 ++--
drivers/net/qede/base/ecore_mcp.h | 11 +++++++++++
drivers/net/qede/qede_main.c | 1 +
5 files changed, 26 insertions(+), 8 deletions(-)
diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
index 58b9387..d7a95fe 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -2998,12 +2998,6 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn, void OSAL_IOMEM *p_regview,
goto err1;
}
- if (p_hwfn == ECORE_LEADING_HWFN(p_dev) && !p_dev->recov_in_prog) {
- rc = ecore_mcp_initiate_pf_flr(p_hwfn, p_hwfn->p_main_ptt);
- if (rc != ECORE_SUCCESS)
- DP_NOTICE(p_hwfn, false, "Failed to initiate PF FLR\n");
- }
-
/* Read the device configuration information from the HW and SHMEM */
rc = ecore_get_hw_info(p_hwfn, p_hwfn->p_main_ptt,
p_params->personality, p_params->drv_resc_alloc);
@@ -3012,6 +3006,16 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn, void OSAL_IOMEM *p_regview,
goto err2;
}
+ /* Sending a mailbox to the MFW should be after ecore_get_hw_info() is
+ * called, since among others it sets the ports number in an engine.
+ */
+ if (p_params->initiate_pf_flr && p_hwfn == ECORE_LEADING_HWFN(p_dev) &&
+ !p_dev->recov_in_prog) {
+ rc = ecore_mcp_initiate_pf_flr(p_hwfn, p_hwfn->p_main_ptt);
+ if (rc != ECORE_SUCCESS)
+ DP_NOTICE(p_hwfn, false, "Failed to initiate PF FLR\n");
+ }
+
/* Allocate the init RT array and initialize the init-ops engine */
rc = ecore_init_alloc(p_hwfn);
if (rc) {
diff --git a/drivers/net/qede/base/ecore_dev_api.h b/drivers/net/qede/base/ecore_dev_api.h
index 042c0af..cbddd24 100644
--- a/drivers/net/qede/base/ecore_dev_api.h
+++ b/drivers/net/qede/base/ecore_dev_api.h
@@ -147,6 +147,8 @@ struct ecore_hw_prepare_params {
bool drv_resc_alloc;
/* check the reg_fifo after any register access */
bool chk_reg_fifo;
+ /* request the MFW to initiate PF FLR */
+ bool initiate_pf_flr;
};
/**
diff --git a/drivers/net/qede/base/ecore_mcp.c b/drivers/net/qede/base/ecore_mcp.c
index 2ff9715..a5d707b 100644
--- a/drivers/net/qede/base/ecore_mcp.c
+++ b/drivers/net/qede/base/ecore_mcp.c
@@ -2448,6 +2448,6 @@ enum _ecore_status_t ecore_mcp_initiate_pf_flr(struct ecore_hwfn *p_hwfn,
{
u32 mcp_resp, mcp_param;
- return ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_INITIATE_PF_FLR,
- 0, &mcp_resp, &mcp_param);
+ return ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_INITIATE_PF_FLR, 0,
+ &mcp_resp, &mcp_param);
}
diff --git a/drivers/net/qede/base/ecore_mcp.h b/drivers/net/qede/base/ecore_mcp.h
index 831890c..ae33e84 100644
--- a/drivers/net/qede/base/ecore_mcp.h
+++ b/drivers/net/qede/base/ecore_mcp.h
@@ -348,6 +348,17 @@ enum _ecore_status_t ecore_mcp_mdump_clear_logs(struct ecore_hwfn *p_hwfn,
enum _ecore_status_t ecore_mcp_mdump_get_info(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt);
+/**
+ * @brief - Gets the MFW allocation info for the given resource
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ * @param p_resc_info
+ * @param p_mcp_resp
+ * @param p_mcp_param
+ *
+ * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
+ */
enum _ecore_status_t ecore_mcp_get_resc_info(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt,
struct resource_info *p_resc_info,
diff --git a/drivers/net/qede/qede_main.c b/drivers/net/qede/qede_main.c
index 491c921..45773d8 100644
--- a/drivers/net/qede/qede_main.c
+++ b/drivers/net/qede/qede_main.c
@@ -62,6 +62,7 @@ qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
hw_prepare_params.personality = ECORE_PCI_ETH;
hw_prepare_params.drv_resc_alloc = false;
hw_prepare_params.chk_reg_fifo = false;
+ hw_prepare_params.initiate_pf_flr = true;
rc = ecore_hw_prepare(edev, &hw_prepare_params);
if (rc) {
DP_ERR(edev, "hw prepare failed\n");
--
1.7.10.3
^ permalink raw reply related
* [PATCH v2 00/26] net/qede: update qede pmd to 2.0.0.1
From: Rasesh Mody @ 2017-01-05 7:03 UTC (permalink / raw)
To: ferruh.yigit; +Cc: Rasesh Mody, dev, Dept-EngDPDKDev
In-Reply-To: <1480756289-11835-1-git-send-email-Rasesh.Mody@cavium.com>
Hi,
This patch set consists of enhancements, new 8.14.x.x firmware support
and semantic changes. It update the QEDE PMD version to 2.0.0.1.
v1..v2 - addresses all the review comments
Please include in DPDK 17.02 release.
Thanks!
Rasesh
Rasesh Mody (26):
net/qede/base: add request for PF FLR before load request
net/qede/base: improve set field macro
net/qede/base: add handling of malicious VF
net/qede/base: change return codes in SR-IOV
net/qede/base: make API non-static
net/qede/base: rename macro
net/qede/base: add check to validate txq
net/qede/base: fix updating VF queue zone id
net/qede/base: improve Tx-switching performance
net/qede/base: semantic change
net/qede: remove unused struct member
net/qede/base: enhance resource info set printouts
net/qede/base: add new enum member to status codes
net/qede/base: add macros for converting pointer
net/qede: add new host ring type option
net/qede/base: add check for get nvm info return code
net/qede/base: retrieve FW crash dump info
net/qede/base: add support for external PHY
net/qede/base: add support for 2x10G mode
net/qede: add PCI ids for new chip variant
net/qede: add 50G device PCI id
net/qede/base: add support for new firmware
net/qede/base: semantic/formatting changes
net/qede/base: refactor some code bits
net/qede/base: dcbx changes for base driver
net/qede: update PMD version to 2.0.0.1
config/common_base | 2 +-
doc/guides/nics/qede.rst | 12 +-
drivers/net/qede/base/bcm_osal.h | 1 +
drivers/net/qede/base/common_hsi.h | 11 +-
drivers/net/qede/base/ecore.h | 21 +-
drivers/net/qede/base/ecore_chain.h | 9 +-
drivers/net/qede/base/ecore_dcbx.c | 390 ++++++++++---------------
drivers/net/qede/base/ecore_dcbx.h | 6 -
drivers/net/qede/base/ecore_dcbx_api.h | 1 +
drivers/net/qede/base/ecore_dev.c | 349 +++++++++++++---------
drivers/net/qede/base/ecore_dev_api.h | 9 +-
drivers/net/qede/base/ecore_gtt_reg_addr.h | 20 +-
drivers/net/qede/base/ecore_hsi_common.h | 95 +++---
drivers/net/qede/base/ecore_hsi_debug_tools.h | 26 +-
drivers/net/qede/base/ecore_hsi_eth.h | 10 +-
drivers/net/qede/base/ecore_hsi_init_tool.h | 82 +++---
drivers/net/qede/base/ecore_hw.c | 6 +-
drivers/net/qede/base/ecore_init_fw_funcs.c | 45 +--
drivers/net/qede/base/ecore_init_ops.c | 26 +-
drivers/net/qede/base/ecore_int.c | 6 +-
drivers/net/qede/base/ecore_iov_api.h | 15 +-
drivers/net/qede/base/ecore_iro_values.h | 4 +-
drivers/net/qede/base/ecore_l2.c | 48 +--
drivers/net/qede/base/ecore_l2_api.h | 20 +-
drivers/net/qede/base/ecore_mcp.c | 86 +++---
drivers/net/qede/base/ecore_mcp.h | 25 +-
drivers/net/qede/base/ecore_mcp_api.h | 33 ++-
drivers/net/qede/base/ecore_sp_commands.c | 4 +-
drivers/net/qede/base/ecore_spq.c | 23 +-
drivers/net/qede/base/ecore_sriov.c | 211 +++++++++----
drivers/net/qede/base/ecore_sriov.h | 5 +-
drivers/net/qede/base/ecore_status.h | 1 +
drivers/net/qede/base/ecore_utils.h | 6 +
drivers/net/qede/base/ecore_vf.c | 43 ++-
drivers/net/qede/base/eth_common.h | 34 ++-
drivers/net/qede/base/mcp_public.h | 350 +++++++++++++---------
drivers/net/qede/base/nvm_cfg.h | 68 ++++-
drivers/net/qede/qede_eth_if.c | 1 +
drivers/net/qede/qede_ethdev.c | 32 +-
drivers/net/qede/qede_ethdev.h | 53 ++--
drivers/net/qede/qede_if.h | 18 +-
drivers/net/qede/qede_main.c | 13 +-
drivers/net/qede/qede_rxtx.c | 9 +-
43 files changed, 1286 insertions(+), 943 deletions(-)
--
1.7.10.3
^ permalink raw reply
* Re: [PATCH v2 09/29] eal/arm64: define I/O device memory barriers for arm64
From: Jianbo Liu @ 2017-01-05 6:47 UTC (permalink / raw)
To: Jerin Jacob
Cc: dev, Ananyev, Konstantin, Thomas Monjalon, Bruce Richardson,
Jan Viktorin, Santosh Shukla, David Marchand
In-Reply-To: <20170105062430.GA14618@localhost.localdomain>
On 5 January 2017 at 14:24, Jerin Jacob <jerin.jacob@caviumnetworks.com> wrote:
> On Thu, Jan 05, 2017 at 01:31:44PM +0800, Jianbo Liu wrote:
>> On 4 January 2017 at 18:01, Jerin Jacob <jerin.jacob@caviumnetworks.com> wrote:
>> > On Tue, Jan 03, 2017 at 03:48:32PM +0800, Jianbo Liu wrote:
>> >> On 27 December 2016 at 17:49, Jerin Jacob
>> >> <jerin.jacob@caviumnetworks.com> wrote:
>> >> > CC: Jianbo Liu <jianbo.liu@linaro.org>
>> >> > Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>> >> > ---
>> >> > lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 6 ++++++
>> >> > 1 file changed, 6 insertions(+)
>> >> >
>> >> > diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
>> >> > index 78ebea2..ef0efc7 100644
>> >> > --- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
>> >> > +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
>> >> > @@ -88,6 +88,12 @@ static inline void rte_rmb(void)
>> >> >
>> >> > #define rte_smp_rmb() dmb(ishld)
>> >> >
>> >> > +#define rte_io_mb() rte_mb()
>> >> > +
>> >> > +#define rte_io_wmb() rte_wmb()
>> >> > +
>> >> > +#define rte_io_rmb() rte_rmb()
>> >> > +
>> >>
>> >> I think it's better to use outer shareable dmb for io barrier, instead of dsb.
>> >
>> > Its is difficult to generalize. AFAIK, from the IO barrier perspective
>> > dsb would be the right candidate. But just for the DMA barrier between IO may
>> > be outer sharable dmb is enough. In-terms of performance implication, the
>> > fastpath code(door bell write) has been changed to relaxed write in all
>> > the drivers in this patchset and rte_io_* will be only
>> > used by rte_[read/write]8/16/32/64 which will be in slow-path.
>> > So, IMO, it better stick with dsb and its safe from the complete IO barrier
>> > perspective.
>>
>> If so, why not use *mb() directly?
>
> Adding David Marchand, EAL Maintainer.
>
> Instead of rte_io_?. I thought, IO specific constraints can be abstracted
> here in rte_io_*. Apart from arm, there other arch like "arc" has similar
> constraints. IMHO, no harm in keeping that abstraction.
>
> Thoughts ?
>
> http://lxr.free-electrons.com/ident?i=__iormb
>
>>
>> >
>> > At least on ThunderX, I couldn't see any performance difference between
>> > using dsb(st) and dmb(oshst) for dma write barrier before the doorbell register
>> > write in fastpath. In case there are platforms which has such performance difference,
>> > may be could add rte_dma_wmb() and rte_dma_rmb() in future like Linux kernel
>> > dma_wmb() and dma_rmb().(But i couldn't see all the driver are using it,
>> > though)
>> >
>>
>> But there is no io_*mb() in the kernel, so you want to be different?
>
> It is their for arm,arm64,arc architectures in Linux kernel. Please check writel
> implementation for arm64
>
> http://lxr.free-electrons.com/source/arch/arm64/include/asm/io.h#L143
>
Yes, I knew. But I'm afraid it will be mixed with dma_*mb by someone else.
^ permalink raw reply
* Re: [PATCH v7 03/27] net/i40e: set VF MAC anti-spoofing from PF
From: Lu, Wenzhuo @ 2017-01-05 6:46 UTC (permalink / raw)
To: Wu, Jingjing, dev@dpdk.org
In-Reply-To: <9BB6961774997848B5B42BEC655768F810CC3562@SHSMSX103.ccr.corp.intel.com>
Hi Jingjing,
> -----Original Message-----
> From: Wu, Jingjing
> Sent: Thursday, January 5, 2017 2:42 PM
> To: Lu, Wenzhuo; dev@dpdk.org
> Cc: Lu, Wenzhuo
> Subject: RE: [dpdk-dev] [PATCH v7 03/27] net/i40e: set VF MAC anti-spoofing
> from PF
>
>
>
> > -----Original Message-----
> > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Wenzhuo Lu
> > Sent: Tuesday, January 3, 2017 2:54 PM
> > To: dev@dpdk.org
> > Cc: Lu, Wenzhuo <wenzhuo.lu@intel.com>
> > Subject: [dpdk-dev] [PATCH v7 03/27] net/i40e: set VF MAC
> > anti-spoofing from PF
> >
> > Support enabling/disabling VF MAC anti-spoofing from PF.
> > User can call the API on PF to enable/disable a specific VF's MAC anti-
> spoofing.
> >
> > Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
> > ---
> > drivers/net/i40e/i40e_ethdev.c | 63
> > +++++++++++++++++++++++++++++++
> > drivers/net/i40e/rte_pmd_i40e.h | 19 ++++++++++
> > drivers/net/i40e/rte_pmd_i40e_version.map | 1 +
> > 3 files changed, 83 insertions(+)
> >
> > diff --git a/drivers/net/i40e/i40e_ethdev.c
> > b/drivers/net/i40e/i40e_ethdev.c index fc7e987..68c07de 100644
> > --- a/drivers/net/i40e/i40e_ethdev.c
> > +++ b/drivers/net/i40e/i40e_ethdev.c
> > @@ -9723,3 +9723,66 @@ static void i40e_set_default_mac_addr(struct
> > rte_eth_dev *dev,
> >
> > return 0;
> > }
> > +
> > +int
> > +rte_pmd_i40e_set_vf_mac_anti_spoof(uint8_t port, uint16_t vf_id,
> > +uint8_t on) {
> > + struct rte_eth_dev *dev;
> > + struct rte_eth_dev_info dev_info;
> > + struct i40e_pf *pf;
> > + struct i40e_vsi *vsi;
> > + struct i40e_hw *hw;
> > + struct i40e_vsi_context ctxt;
> > + int ret;
> > +
> > + RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
> > +
> > + dev = &rte_eth_devices[port];
> > + rte_eth_dev_info_get(port, &dev_info);
> > +
> Why need to call rte_eth_dev_info_get in driver?
>
> > + if (vf_id >= dev_info.max_vfs)
> > + return -EINVAL;
> > +
>
> Vf_id is already be checked by below, even I prefer :
> if (vf_id > pf->vf_num - 1 || !pf->vfs)
> to be
> if (!pf->vfs || vf_id > pf->vf_num - 1) or if (!pf->vfs || vf_id >= pf->vf_num)
Agree, I'll remove the max_vfs check.
>
> > + pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
> > +
^ permalink raw reply
* Re: [PATCH v7 03/27] net/i40e: set VF MAC anti-spoofing from PF
From: Wu, Jingjing @ 2017-01-05 6:42 UTC (permalink / raw)
To: Lu, Wenzhuo, dev@dpdk.org; +Cc: Lu, Wenzhuo
In-Reply-To: <1483426488-117332-4-git-send-email-wenzhuo.lu@intel.com>
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Wenzhuo Lu
> Sent: Tuesday, January 3, 2017 2:54 PM
> To: dev@dpdk.org
> Cc: Lu, Wenzhuo <wenzhuo.lu@intel.com>
> Subject: [dpdk-dev] [PATCH v7 03/27] net/i40e: set VF MAC anti-spoofing from
> PF
>
> Support enabling/disabling VF MAC anti-spoofing from PF.
> User can call the API on PF to enable/disable a specific VF's MAC anti-spoofing.
>
> Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
> ---
> drivers/net/i40e/i40e_ethdev.c | 63
> +++++++++++++++++++++++++++++++
> drivers/net/i40e/rte_pmd_i40e.h | 19 ++++++++++
> drivers/net/i40e/rte_pmd_i40e_version.map | 1 +
> 3 files changed, 83 insertions(+)
>
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index fc7e987..68c07de 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -9723,3 +9723,66 @@ static void i40e_set_default_mac_addr(struct
> rte_eth_dev *dev,
>
> return 0;
> }
> +
> +int
> +rte_pmd_i40e_set_vf_mac_anti_spoof(uint8_t port, uint16_t vf_id,
> +uint8_t on) {
> + struct rte_eth_dev *dev;
> + struct rte_eth_dev_info dev_info;
> + struct i40e_pf *pf;
> + struct i40e_vsi *vsi;
> + struct i40e_hw *hw;
> + struct i40e_vsi_context ctxt;
> + int ret;
> +
> + RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
> +
> + dev = &rte_eth_devices[port];
> + rte_eth_dev_info_get(port, &dev_info);
> +
Why need to call rte_eth_dev_info_get in driver?
> + if (vf_id >= dev_info.max_vfs)
> + return -EINVAL;
> +
Vf_id is already be checked by below, even I prefer :
if (vf_id > pf->vf_num - 1 || !pf->vfs)
to be
if (!pf->vfs || vf_id > pf->vf_num - 1)
or if (!pf->vfs || vf_id >= pf->vf_num)
> + pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
> +
^ permalink raw reply
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