* Re: [PATCH] net/ark: fix unsafe env variable in extension loading
From: Stephen Hemminger @ 2026-06-03 15:30 UTC (permalink / raw)
To: Denis Sergeev
Cc: dev, shepard.siegel, ed.czeck, john.miller, stable, sdl.dpdk
In-Reply-To: <20260603052604.118850-1-denserg.edu@gmail.com>
On Wed, 3 Jun 2026 08:26:00 +0300
Denis Sergeev <denserg.edu@gmail.com> wrote:
> diff --git a/drivers/net/ark/ark_ethdev.c b/drivers/net/ark/ark_ethdev.c
> index 8b25ed948f..e25478103b 100644
> --- a/drivers/net/ark/ark_ethdev.c
> +++ b/drivers/net/ark/ark_ethdev.c
> @@ -211,9 +211,19 @@ static int
> check_for_ext(struct ark_adapter *ark)
> {
> int found = 0;
> + const char *dllpath;
> +
> + /*
> + * A basic security check is necessary before trusting
> + * ARK_EXT_PATH environment variable.
> + */
> + if (geteuid() != getuid() || getegid() != getgid()) {
> + ARK_PMD_LOG(DEBUG, "EXT ignoring ARK_EXT_PATH under setuid/setgid\n");
> + return 0;
> + }
>
DPDK may be run in containers. This would break that.
The whole dlopen extension stuff in this driver is rubbish and should not have been allowed in.
It creates testing and security nightmares.
^ permalink raw reply
* Re: [PATCH] net/ark: fix null dereference on allocation failure
From: Stephen Hemminger @ 2026-06-03 15:31 UTC (permalink / raw)
To: Denis Sergeev
Cc: dev, shepard.siegel, ed.czeck, john.miller, stable, sdl.dpdk
In-Reply-To: <20260603052207.118688-1-denserg.edu@gmail.com>
On Wed, 3 Jun 2026 08:21:54 +0300
Denis Sergeev <denserg.edu@gmail.com> wrote:
> + if (eth_dev->data->dev_private == NULL) {
> + ARK_PMD_LOG(ERR,
> + "Memory allocation for dev_private failed!"
> + " Exiting.\n");
Do not split error messages across lines. And no need for ! and the Exiting part.
^ permalink raw reply
* Re: [PATCH] net/af_packet: fix qpairs argument upper bound check
From: Stephen Hemminger @ 2026-06-03 15:27 UTC (permalink / raw)
To: Denis Sergeev; +Cc: dev, sdl.dpdk
In-Reply-To: <20260603044228.117357-1-denserg.edu@gmail.com>
On Wed, 3 Jun 2026 07:42:18 +0300
Denis Sergeev <denserg.edu@gmail.com> wrote:
> diff --git a/drivers/net/af_packet/rte_eth_af_packet.c b/drivers/net/af_packet/rte_eth_af_packet.c
> index 0ee94e71ea..ebf015dd9a 100644
> --- a/drivers/net/af_packet/rte_eth_af_packet.c
> +++ b/drivers/net/af_packet/rte_eth_af_packet.c
> @@ -1169,7 +1169,7 @@ rte_eth_from_packet(struct rte_vdev_device *dev,
> pair = &kvlist->pairs[k_idx];
> if (strstr(pair->key, ETH_AF_PACKET_NUM_Q_ARG) != NULL) {
> qpairs = atoi(pair->value);
> - if (qpairs < 1) {
> + if (qpairs < 1 || qpairs > RTE_MAX_QUEUES_PER_PORT) {
> PMD_LOG(ERR,
> "%s: invalid qpairs value",
> name);
> --
I would rather see atoi() not used in DPDK, it accepts too much and does not do
enough validation. Replace with strtoul() instead.
^ permalink raw reply
* Re: [PATCH v7] mempool: improve cache behaviour and performance
From: Thomas Monjalon @ 2026-06-03 15:44 UTC (permalink / raw)
To: Andrew Rybchenko, Bruce Richardson, Hemant Agrawal,
Morten Brørup, Konstantin Ananyev, David Marchand,
Robin Jarry, Jerin Jacob
Cc: dev, Jingjing Wu, Praveen Shetty, Sachin Saxena
In-Reply-To: <20260601164007.252063-1-mb@smartsharesystems.com>
01/06/2026 18:40, Morten Brørup:
> This patch refactors the mempool cache to eliminate some unexpected
> behaviour and reduce the mempool cache miss rate.
I feel we need more opinions about this behaviour change.
Bruce was suggesting some user-tuning. What do you think?
Also the decision may be easier if we have some performance benchmarks.
Who could help to show some numbers before/after in various cases please?
^ permalink raw reply
* Re: [PATCH] test/latency: fix intermittent failure on slow platforms
From: Thomas Monjalon @ 2026-06-03 15:37 UTC (permalink / raw)
To: Stephen Hemminger
Cc: dev, stable, Reshma Pattan, Bruce Richardson, Luca Boccassi
In-Reply-To: <CAMw=ZnRB+wv7ZN6c5YkF=LfTB328uYcBmf=xCqjTU8hSjzuVZQ@mail.gmail.com>
01/06/2026 12:23, Luca Boccassi:
> On Sun, 31 May 2026 at 19:01, Stephen Hemminger
> <stephen@networkplumber.org> wrote:
> >
> > The forwarding loop was bounded by a fixed interval of 0.5ms
> > but on slow or emulated platforms with a low-frequency timebase
> > (e.g. RISC-V rdtime) this fails because the loop only ran once.
> > The test needs two iterations to get any samples.
> >
> > Rearrange the forwarding loop so that a minimum number of iterations
> > are required. The loop still has an upper bound on packets and time
> > interval which is expanded to 10 ms.
> >
> > If no samples are collected, mark the test as skipped.
> > Refactor the forwarding loop test so that cleanup happens on
> > failure.
> >
> > Reported-by: Luca Boccassi <bluca@debian.org>
> > Fixes: b34508b9cbcd ("test/latency: update with more checks")
> > Cc: stable@dpdk.org
> >
> > Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
> > ---
> > app/test/test_latencystats.c | 75 ++++++++++++++++++++++--------------
> > 1 file changed, 46 insertions(+), 29 deletions(-)
>
> Thanks, this has been failing consistently in riscv64 since at least
> 25.11, hopefully this makes it stable.
>
> Acked-by: Luca Boccassi <luca.boccassi@gmail.com>
Applied, thanks.
^ permalink raw reply
* RE: [EXTERNAL] Re: [PATCH v5 1/1] net/mana: add device reset support
From: Wei Hu @ 2026-06-03 15:27 UTC (permalink / raw)
To: Stephen Hemminger, Wei Hu; +Cc: dev@dpdk.org, Long Li
In-Reply-To: <20260601095802.36cec727@phoenix.local>
Thanks for the review on v5, Stephen.
> -----Original Message-----
> From: Stephen Hemminger <stephen@networkplumber.org>
> Sent: Tuesday, June 2, 2026 12:58 AM
> To: Wei Hu <weh@linux.microsoft.com>
> Cc: dev@dpdk.org; Long Li <longli@microsoft.com>; Wei Hu
> <weh@microsoft.com>
> Subject: [EXTERNAL] Re: [PATCH v5 1/1] net/mana: add device reset support
>
> The RCU use is not really RCU. thread_online/offline are called on every rx/tx
> burst, and the "thread" token is the queue index, not a thread. So it is a per-
> queue in-use flag paid for on the hottest path, plus a new library dependency,
> to express "wait until no queue is mid-burst" -- which the driver already half
> does by swapping the burst function to mana_*_burst_removed and checking
> dev_state. Please drop the rcu use. If you must drain readers, a per-queue
> atomic flag is lighter and local; the fast path already has the dev_state acquire-
> load it needs.
>
I have tested just swapping to mana_*_burst_removed doesn't stop
the application from entering the burst functions. I will add per-queue atomic
flags and spin poll all queue flags in the slower reset path. I think the actual
fast path cost is nearly identical. However, it does remove the rcu library
dependency.
> The data path only needs the atomic, and that part is fine. The lock is
> legitimate for serializing the teardown/rebuild against control ops, but the way
> it is used is the problem: it is acquired in mana_intr_handler, released in
> mana_reset_enter, re-acquired in mana_reset_thread, and released in
> mana_reset_exit_delay. That cross-function, cross-thread handoff is exactly
> why every function needs __rte_no_thread_safety_analysis.
> Acquire and release the lock in the same function and the annotations all go
> away. Turning off thread-safety analysis needs strong justification and this
> does not have it.
I will remove the __rte_no_thread_safety_analysis from the code. It was added
when I used spin lock and it caused clang build warnings. Now I have
changed it to pthread mutex and clang build is clean without this.
> - thread_online is taken at the top of the burst functions but
> thread_offline is only on some return paths. Any early return that
> misses it leaves a token non-quiescent and rte_rcu_qsbr_check() in
> mana_reset_enter spins forever. This is the kind of breakage the per-burst
> bracketing invites -- another reason to drop it.
>
I have checked mana_rx_burst and mana_tx_burst. There's no actual bug
now -- every return path has thread-offline. Changing rcu to per-queue flags
would still need to reset the flag in every return path. I agree it is kind of
fragile. However, the reset path needs it to make sure there is no thread still
in the fast path before it can start to tear down the resources.
I will send out a new revision.
Thanks,
Wei
^ permalink raw reply
* Re: [PATCH] eal: fix function versioning with LTO
From: Stephen Hemminger @ 2026-06-03 15:24 UTC (permalink / raw)
To: David Marchand; +Cc: dev, stable, Thomas Monjalon
In-Reply-To: <CAJFAV8w+bUJGTBSOgqp8xOHXm5av2xdFMo8TNwr=kP87R30AYg@mail.gmail.com>
On Wed, 3 Jun 2026 12:01:48 +0200
David Marchand <david.marchand@redhat.com> wrote:
> Hello,
>
> On Wed, 3 Jun 2026 at 00:57, Stephen Hemminger
> <stephen@networkplumber.org> wrote:
> >
> > When using function versioning and building with Link Time Optimization,
> > the compiler does not see the __asm__ annotation of symbols and
> > therefore thinks there are two versions of the same symbol.
> >
> > The fix is to use compiler symver attribute on the function which
> > was added in GCC 10. Keep the older method for backward compatibility
> > with older compilers.
> >
> > Bugzilla ID: 1949
> > Fixes: e30e194c4d06 ("eal: rework function versioning macros")
>
> We never used the symver stuff, so it seems unlikely the issue was
> introduced with this rework.
>
> The fact that clang does not support this attribute is a concern.
>
>
> > Cc: stable@dpdk.org
>
> Why do we need to backport?
>
> LTO is kind of experimental, so it seems good enough to reply "not
> expected to work in older LTS" if someone reported an issue.
>
> And in practice, no LTS release call the versioning macros, since a
> LTS drops all compatibility.
>
> > Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
>
> I would like to reproduce, but I can't build main with LTO.
> What patches did you apply locally to avoid warnings on the hash library?
I get no warnings from current main with GCC 15
I was doing test build of net-next with this patch:
https://patchwork.dpdk.org/project/dpdk/patch/20260529000748.275863-1-stephen@networkplumber.org/
The LTO build is done by:
$ meson setup build-lto -Db_lto=true
The result was:
cc -o lib/librte_ethdev.so.26.2 lib/librte_ethdev.so.26.2.p/ethdev_ethdev_driver.c.o lib/librte_ethdev.so.26.2.p/ethdev_ethdev_private.c.o lib/librte_ethdev.so.26.2.p/ethdev_ethdev_profile.c.o lib/librte_ethdev.so.26.2.p/ethdev_ethdev_trace_points.c.o lib/librte_ethdev.so.26.2.p/ethdev_rte_class_eth.c.o lib/librte_ethdev.so.26.2.p/ethdev_rte_ethdev.c.o lib/librte_ethdev.so.26.2.p/ethdev_rte_ethdev_cman.c.o lib/librte_ethdev.so.26.2.p/ethdev_rte_ethdev_telemetry.c.o lib/librte_ethdev.so.26.2.p/ethdev_rte_flow.c.o lib/librte_ethdev.so.26.2.p/ethdev_rte_mtr.c.o lib/librte_ethdev.so.26.2.p/ethdev_rte_tm.c.o lib/librte_ethdev.so.26.2.p/ethdev_sff_telemetry.c.o lib/librte_ethdev.so.26.2.p/ethdev_sff_common.c.o lib/librte_ethdev.so.26.2.p/ethdev_sff_8079.c.o lib/librte_ethdev.so.26.2.p/ethdev_sff_8472.c.o lib/librte_ethdev.so.26.2.p/ethdev_sff_8636.c.o lib/librte_ethdev.so.26.2.p/ethdev_ethdev_linux_ethtool.c.o -flto=auto -Wl,--as-needed -Wl,--no-undefined -Wl,-O1 -shared -fPIC -Wl,-soname,librte_ethdev.so.26 -Wl,--no-as-needed -Wl,--undefined-version -pthread -Wl,--start-group -lm -ldl -lnuma -lfdt '-Wl,-rpath,$ORIGIN/' lib/librte_eal.so.26.2 lib/librte_kvargs.so.26.2 lib/librte_log.so.26.2 lib/librte_telemetry.so.26.2 lib/librte_argparse.so.26.2 lib/librte_net.so.26.2 lib/librte_mbuf.so.26.2 lib/librte_mempool.so.26.2 lib/librte_ring.so.26.2 lib/librte_meter.so.26.2 -Wl,--version-script=/home/shemminger/DPDK/lto/build-lto/lib/ethdev_exports.map /usr/lib/x86_64-linux-gnu/libbsd.so /usr/lib/x86_64-linux-gnu/libarchive.so -Wl,--end-group
/tmp/cc3RQyqL.s: Assembler messages:
/tmp
Fed the result into Claude, and it said "yeah, I see the same problem on
other projects, the answer is ...". With a little searching found an example
in Gentoo https://github.com/InBetweenNames/gentooLTO/pull/458
With this change symbol versioning with LTO works on both GCC >= 10 and Clang.
Clang LTO doesn't have the attribute, but it also doesn't have the same LTO issue.
^ permalink raw reply
* Re: [PATCH v2] mempool: introduce statistics reset function
From: Thomas Monjalon @ 2026-06-03 15:14 UTC (permalink / raw)
To: Morten Brørup; +Cc: Stephen Hemminger, dev, Andrew Rybchenko
In-Reply-To: <b2fa41c0-aed1-420f-ad89-775fe0024dce@oktetlabs.ru>
24/02/2026 10:57, Andrew Rybchenko:
> On 2/24/26 12:28 PM, Morten Brørup wrote:
> > Populating a mempool with objects is accounted for in the statistics.
> > When analyzing mempool cache statistics, this may distort the data.
> > In order to simplify mempool cache statistics analysis, a mempool
> > statistics reset function was added.
> >
> > Furthermore, details about average burst sizes and mempool cache miss
> > rates were added to the statistics shown when dumping a mempool.
> >
> > Signed-off-by: Morten Brørup <mb@smartsharesystems.com>
>
> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Applied with version changed to 26.07, thanks.
^ permalink raw reply
* [PATCH 2/2] net/i40e: fix blocking link wait on device start
From: Ciara Loftus @ 2026-06-03 14:34 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus, stable
In-Reply-To: <20260603143407.1108527-1-ciara.loftus@intel.com>
Currently, device start performs a synchronous link status update,
blocking for up to one second if the link is not yet up. This causes
unnecessary startup delay in scenarios where the link partner is slow to
come up or unavailable.
The wait was introduced alongside the maximum frame size MAC config
command. Some devices require the link to be up before issuing that
command, so the solution was to block at device start until link was
established.
To address the issue, remove the unconditional blocking wait. Take note
if the link was down at the time of the MAC config command during device
start and if it was, re-issue the command upon notification of the first
link-up event.
In the case where all interrupt vectors are consumed by Rx queues, no
interrupt or alarm handler is available to process link-up events. The
blocking wait is retained for this narrow case to preserve correctness.
Fixes: 82fcf20d039c ("net/i40e: fix maximum frame size configuration")
Cc: stable@dpdk.org
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/i40e/i40e_ethdev.c | 25 +++++++++++++++++++++----
drivers/net/intel/i40e/i40e_ethdev.h | 2 ++
2 files changed, 23 insertions(+), 4 deletions(-)
diff --git a/drivers/net/intel/i40e/i40e_ethdev.c b/drivers/net/intel/i40e/i40e_ethdev.c
index e818b6fc7c..a7c00033e5 100644
--- a/drivers/net/intel/i40e/i40e_ethdev.c
+++ b/drivers/net/intel/i40e/i40e_ethdev.c
@@ -2565,15 +2565,19 @@ i40e_dev_start(struct rte_eth_dev *dev)
I40E_AQ_EVENT_MEDIA_NA), NULL);
if (ret != I40E_SUCCESS)
PMD_DRV_LOG(WARNING, "Fail to set phy mask");
-
- /* Call get_link_info aq command to enable/disable LSE */
- i40e_dev_link_update(dev, 1);
}
if (dev->data->dev_conf.intr_conf.rxq == 0) {
+ i40e_dev_link_update(dev, 0);
+ pf->mac_config_on_link_up = !dev->data->dev_link.link_status;
rte_eal_alarm_set(I40E_ALARM_INTERVAL,
i40e_dev_alarm_handler, dev);
} else {
+ /* Block if no interrupt handler can process link-up events, to help
+ * ensure that MAC config is applied when the link is up.
+ */
+ i40e_dev_link_update(dev, !rte_intr_allow_others(intr_handle));
+ pf->mac_config_on_link_up = !dev->data->dev_link.link_status;
/* enable uio intr after callback register */
rte_intr_enable(intr_handle);
}
@@ -6867,6 +6871,7 @@ static void
i40e_dev_handle_aq_msg(struct rte_eth_dev *dev)
{
struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
struct i40e_arq_event_info info;
uint16_t pending, opcode;
uint8_t msg_buf[I40E_AQ_BUF_SZ] = {0};
@@ -6899,9 +6904,21 @@ i40e_dev_handle_aq_msg(struct rte_eth_dev *dev)
break;
case i40e_aqc_opc_get_link_status:
ret = i40e_dev_link_update(dev, 0);
- if (!ret)
+ /* Some devices require MAC config to be applied when the link comes up. */
+ if (!ret) {
+ if (pf->mac_config_on_link_up && dev->data->dev_link.link_status) {
+ uint16_t max_frame_size;
+
+ max_frame_size = dev->data->mtu ?
+ dev->data->mtu + I40E_ETH_OVERHEAD :
+ I40E_FRAME_SIZE_MAX;
+ i40e_aq_set_mac_config(hw, max_frame_size, TRUE,
+ false, 0, NULL);
+ pf->mac_config_on_link_up = false;
+ }
rte_eth_dev_callback_process(dev,
RTE_ETH_EVENT_INTR_LSC, NULL);
+ }
break;
default:
PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
diff --git a/drivers/net/intel/i40e/i40e_ethdev.h b/drivers/net/intel/i40e/i40e_ethdev.h
index d57c53f661..7524defdb7 100644
--- a/drivers/net/intel/i40e/i40e_ethdev.h
+++ b/drivers/net/intel/i40e/i40e_ethdev.h
@@ -1191,6 +1191,8 @@ struct i40e_pf {
/* When firmware > 8.3, the enable flag for outer VLAN processing */
bool fw8_3gt;
+ /* MAC config needs re-applying when link first comes up */
+ bool mac_config_on_link_up;
struct i40e_vf_msg_cfg vf_msg_cfg;
uint64_t prev_rx_bytes;
--
2.43.0
^ permalink raw reply related
* [PATCH 1/2] net/ice: revert fix link up when starting device
From: Ciara Loftus @ 2026-06-03 14:34 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
In-Reply-To: <20260603143407.1108527-1-ciara.loftus@intel.com>
This reverts commit 6c76b76dc64183eb2f24a52b90d4ff9feb4872f4.
The reverted commit worked around a potential timing issue where the
link could be reported down immediately after the link was enabled
during device start. The commit introduced a blocking wait which gave
the driver a better chance to read the correct link state before
returning from device start. However, since the auto link update flag is
set when setting the link up in device start, an adminq notification
should arrive once the link is up, which will be handled and correctly
set the link status. This means we can remove the delay from device
start as it does not need to guarantee link up before returning.
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/ice/ice_ethdev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/intel/ice/ice_ethdev.c b/drivers/net/intel/ice/ice_ethdev.c
index d2734b6688..da570d03cb 100644
--- a/drivers/net/intel/ice/ice_ethdev.c
+++ b/drivers/net/intel/ice/ice_ethdev.c
@@ -4464,7 +4464,7 @@ ice_dev_start(struct rte_eth_dev *dev)
ice_dev_set_link_up(dev);
/* Call get_link_info aq command to enable/disable LSE */
- ice_link_update(dev, 1);
+ ice_link_update(dev, 0);
pf->adapter_stopped = false;
--
2.43.0
^ permalink raw reply related
* [PATCH 0/2] net/intel: fix blocking link wait on device start
From: Ciara Loftus @ 2026-06-03 14:34 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
Device start in both ice and i40e has historically blocked for up to
two seconds waiting for link to come up before returning. This causes
noticeable startup delay when a link partner is slow to come up or
absent entirely. This series reverts the wait in ice, and removes the
wait in i40e while ensuring that the MAC config is applied when the
link is up which is a requirement for some devices.
Ciara Loftus (2):
net/ice: revert fix link up when starting device
net/i40e: fix blocking link wait on device start
drivers/net/intel/i40e/i40e_ethdev.c | 25 +++++++++++++++++++++----
drivers/net/intel/i40e/i40e_ethdev.h | 2 ++
drivers/net/intel/ice/ice_ethdev.c | 2 +-
3 files changed, 24 insertions(+), 5 deletions(-)
--
2.43.0
^ permalink raw reply
* RE: [PATCH v4 1/2] net/intel: write mbuf for last Tx desc of segment
From: Loftus, Ciara @ 2026-06-03 14:21 UTC (permalink / raw)
To: Richardson, Bruce, dev@dpdk.org; +Cc: mb@smartsharesystems.com
In-Reply-To: <20260602154513.1079865-2-bruce.richardson@intel.com>
> Subject: [PATCH v4 1/2] net/intel: write mbuf for last Tx desc of segment
>
> When a single mbuf segment has more data than can be handled by a single
> Tx data descriptor in the TSO case, adjust how the storing of mbufs is
> being done. Rather than putting the mbuf pointer in the first slot for
> that segment, store it in the last slot instead. This guarantees for us
> that the descriptor for which we have desc-done (DD) writeback always
> has a valid mbuf associated with it.
>
> Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
The fix looks good to me.
Acked-by: Ciara Loftus <ciara.loftus@intel.com>
> ---
> drivers/net/intel/common/tx_scalar.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/intel/common/tx_scalar.h
> b/drivers/net/intel/common/tx_scalar.h
> index 9fcd2e4733..7809bd53e8 100644
> --- a/drivers/net/intel/common/tx_scalar.h
> +++ b/drivers/net/intel/common/tx_scalar.h
> @@ -509,7 +509,6 @@ ci_xmit_pkts(struct ci_tx_queue *txq,
>
> if (txe->mbuf)
> rte_pktmbuf_free_seg(txe->mbuf);
> - txe->mbuf = m_seg;
>
> /* Setup TX Descriptor */
> /* Calculate segment length, using IPsec callback if
> provided */
> @@ -528,6 +527,7 @@ ci_xmit_pkts(struct ci_tx_queue *txq,
> ((uint64_t)CI_MAX_DATA_PER_TXD
> << CI_TXD_QW1_TX_BUF_SZ_S) |
> ((uint64_t)td_tag <<
> CI_TXD_QW1_L2TAG1_S);
> write_txd(txd, buf_dma_addr,
> cmd_type_offset_bsz);
> + txe->mbuf = NULL;
>
> buf_dma_addr += CI_MAX_DATA_PER_TXD;
> slen -= CI_MAX_DATA_PER_TXD;
> @@ -548,6 +548,7 @@ ci_xmit_pkts(struct ci_tx_queue *txq,
> ((uint64_t)slen <<
> CI_TXD_QW1_TX_BUF_SZ_S) |
> ((uint64_t)td_tag <<
> CI_TXD_QW1_L2TAG1_S);
> write_txd(txd, buf_dma_addr, cmd_type_offset_bsz);
> + txe->mbuf = m_seg;
>
> tx_id = txe->next_id;
> txe = txn;
> --
> 2.53.0
^ permalink raw reply
* [PATCH] doc: using container to build and run applications
From: Andrea Panattoni @ 2026-06-03 14:04 UTC (permalink / raw)
To: Thomas Monjalon; +Cc: dev, Andrea Panattoni
Add explanation about how container runtimes like podman
or docker can be used to build and run DPDK application.
Signed-off-by: Andrea Panattoni <apanatto@redhat.com>
---
.mailmap | 1 +
doc/guides/linux_gsg/build_dpdk.rst | 48 ++++++++++++++++++++++
doc/guides/linux_gsg/build_sample_apps.rst | 32 +++++++++++++++
3 files changed, 81 insertions(+)
diff --git a/.mailmap b/.mailmap
index 89ba6ffccc..48133a4b45 100644
--- a/.mailmap
+++ b/.mailmap
@@ -109,6 +109,7 @@ Andre Muezerie <andremue@linux.microsoft.com> <andremue@microsoft.com>
Andre Richter <andre.o.richter@gmail.com>
Andrea Arcangeli <aarcange@redhat.com>
Andrea Grandi <andrea.grandi@intel.com>
+Andrea Panattoni <apanatto@redhat.com>
Andrew Bailey <abailey@iol.unh.edu>
Andrew Boyer <andrew.boyer@amd.com> <aboyer@pensando.io>
Andrew Harvey <agh@cisco.com>
diff --git a/doc/guides/linux_gsg/build_dpdk.rst b/doc/guides/linux_gsg/build_dpdk.rst
index ed30e4a5f1..cfd10c0310 100644
--- a/doc/guides/linux_gsg/build_dpdk.rst
+++ b/doc/guides/linux_gsg/build_dpdk.rst
@@ -337,3 +337,51 @@ build system is shown below:
dpdk = dependency('libdpdk')
sources = files('main.c')
executable('dpdk-app', sources, dependencies: dpdk)
+
+
+.. _building_dpdk_in_container:
+
+Building Applications in a Container
+------------------------------------
+
+DPDK can be built inside a container to provide a reproducible build environment.
+The following example uses Podman with a Fedora-based Containerfile.
+
+.. note::
+
+ These instructions also work with Docker by replacing ``podman`` with ``docker``.
+
+Create a ``Containerfile`` in the top-level DPDK source directory:
+
+.. code-block:: none
+
+ FROM fedora:latest
+
+ RUN dnf -y upgrade && dnf -y install \
+ libbsd-devel \
+ numactl-devel \
+ meson \
+ ninja-build \
+ python3-pyelftools \
+ && dnf group install -y development-tools \
+ && dnf clean all
+
+ COPY ./ /dpdk
+ WORKDIR /dpdk
+
+ RUN meson setup build -Dexamples=helloworld && ninja -C build install
+
+Build the container image from the DPDK source directory:
+
+.. code-block:: console
+
+ podman build -t dpdk-builder -f Containerfile .
+
+Once the build completes, verify that the helloworld example runs:
+
+.. code-block:: console
+
+ podman run --rm dpdk-builder /dpdk/build/examples/dpdk-helloworld
+
+See :ref:`running_sample_app_in_container` for how to run DPDK applications
+from this container image.
diff --git a/doc/guides/linux_gsg/build_sample_apps.rst b/doc/guides/linux_gsg/build_sample_apps.rst
index 5195af67ad..7154f64723 100644
--- a/doc/guides/linux_gsg/build_sample_apps.rst
+++ b/doc/guides/linux_gsg/build_sample_apps.rst
@@ -125,3 +125,35 @@ Additional sample applications are included in the DPDK examples directory.
These sample applications may be built and run in a manner similar to that described in earlier sections in this manual.
In addition, see the *DPDK Sample Applications User Guide* for a description of the application,
specific instructions on compilation and execution and some explanation of the code.
+
+
+.. _running_sample_app_in_container:
+
+Running Sample Application in a Container
+-----------------------------------------
+
+A DPDK application can be run inside a container using the image built
+in :ref:`building_dpdk_in_container`.
+
+.. warning::
+
+ Hugepages must be configured on the host before running a DPDK application
+ in a container.
+ Refer to :ref:`linux_gsg_hugepages` for setup instructions.
+
+The following example runs testpmd in interactive mode with no physical NICs:
+
+.. code-block:: console
+
+ podman run -it --privileged \
+ -v /dev/hugepages:/dev/hugepages \
+ dpdk-builder \
+ ./build/app/dpdk-testpmd --no-pci -- -i
+
+.. note::
+
+ The ``--privileged`` flag grants access to hugepages and hardware resources.
+ For production deployments, consider using more fine-grained capabilities
+ and device access instead.
+
+ These instructions also work with Docker by replacing ``podman`` with ``docker``.
--
2.54.0
^ permalink raw reply related
* Re: [PATCH v6 03/27] net/intel/common: add common flow action parsing
From: Bruce Richardson @ 2026-06-03 13:03 UTC (permalink / raw)
To: Anatoly Burakov; +Cc: dev
In-Reply-To: <6834ddc6a6bc96b18f0078c2b99a58114bda54e7.1780068633.git.anatoly.burakov@intel.com>
On Fri, May 29, 2026 at 04:36:05PM +0100, Anatoly Burakov wrote:
> Currently, each driver has their own code for action parsing, which results
> in a lot of duplication and subtle mismatches in behavior between drivers.
>
> Add common infrastructure, based on the following assumptions:
>
> - All drivers support at most 32 actions at once, but usually far less
> - Not every action is supported by all drivers
> - We can check a few common things to filter out obviously wrong actions
> - Driver performs semantic checks on all valid actions
>
> So, the intention is to reject everything we can reasonably reject at the
> outset without knowing anything about the drivers, parametrize what is
> trivial to parametrize, and leave the rest for the driver to implement.
>
> While we're at it, also add logging infrastructure for Intel common code,
> using the new component name defines that are automatically passed to each
> DPDK driver as it is being built.
>
> Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
> ---
> drivers/net/intel/common/flow_check.h | 279 ++++++++++++++++++++++++++
> drivers/net/intel/common/log.h | 40 ++++
> 2 files changed, 319 insertions(+)
> create mode 100644 drivers/net/intel/common/flow_check.h
> create mode 100644 drivers/net/intel/common/log.h
>
<snip>
> +/**
> + * Validate and parse a list of rte_flow_action into a parsed action list.
> + *
> + * @param actions pointer to array of rte_flow_action, terminated by RTE_FLOW_ACTION_TYPE_END
> + * @param param pointer to ci_flow_actions_check_param structure (can be NULL)
> + * @param parsed_actions pointer to ci_flow_actions structure to store parsed actions
> + * @param error pointer to rte_flow_error structure for error reporting
> + *
> + * @return 0 on success, negative errno on failure.
> + */
> +static inline int
> +ci_flow_check_actions(const struct rte_flow_action *actions,
> + const struct ci_flow_actions_check_param *param,
> + struct ci_flow_actions *parsed_actions,
> + struct rte_flow_error *error)
> +{
> + size_t i = 0;
> + int ret;
> +
> + if (actions == NULL) {
> + return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
> + NULL, "Missing actions");
> + }
> +
> + /* reset the list */
> + *parsed_actions = (struct ci_flow_actions){0};
> +
> + while (actions[i].type != RTE_FLOW_ACTION_TYPE_END) {
> + const struct rte_flow_action *action = &actions[i++];
> +
> + /* skip VOID actions */
> + if (action->type == RTE_FLOW_ACTION_TYPE_VOID)
> + continue;
> +
> + /* generic validation for actions - this will check against param as well */
> + ret = __flow_action_check_generic(action, param, error);
> + if (ret < 0)
> + return ret;
> +
> + /* check against global maximum number of actions */
> + if (parsed_actions->count >= RTE_DIM(parsed_actions->actions)) {
> + return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
> + action, "Too many actions");
> + }
> + /* user may have specified a maximum number of actions */
> + if (param != NULL && param->max_actions != 0 &&
> + parsed_actions->count >= param->max_actions) {
> + return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
> + action, "Too many actions");
> + }
> + /* add action to the list */
> + CI_DRV_LOG(DEBUG, "Parsed action %u: type=%s", parsed_actions->count,
> + ci_flow_action_type_to_str(action->type));
> + parsed_actions->actions[parsed_actions->count++] = action;
> + }
> +
> + /* now, call into user validation if specified */
> + if (param != NULL && param->check != NULL) {
> + ret = param->check(parsed_actions, param, error);
> + if (ret < 0)
> + return ret;
> + }
Running an AI review on this code myself, it highlights the fact that we
are missing a check for an empty parsed_actions array here, and not all
check handlers verify the length as being >0 before dereferencing. For
example, in patch 10, the callbacks don't explicitly check for empty lists
I think it would be reasonable to have the return -EINVAL before this
callback check, right?
> + /* if we didn't parse anything, valid action list is empty */
> + return parsed_actions->count == 0 ? -EINVAL : 0;
> +}
> +
> +#ifdef __cplusplus
> +}
> +#endif
<snip>
^ permalink raw reply
* ARM v8 rte_power_pause
From: Morten Brørup @ 2026-06-03 11:56 UTC (permalink / raw)
To: Wathsala Vithanage, Hemant Agrawal, Sachin Saxena; +Cc: dev, Maxime Leroy
Hi Wathsala, Hemant and Sachin,
Over at the Grout project, we are discussing power management in the context of 100 Gbit/s latency deadlines [1].
rte_power_pause() is not implemented for ARM v8 / Cortex-A72.
Syscalls such as nanosleep() have too much overhead, and cannot be used.
Any suggestions for a power-reducing method to make a CPU core "sleep" (i.e. do nothing) for durations in the order of 1 microsecond?
[1]: https://github.com/DPDK/grout/pull/624#issuecomment-4602036364
-Morten
^ permalink raw reply
* Re: [PATCH] eal: fix function versioning with LTO
From: David Marchand @ 2026-06-03 10:01 UTC (permalink / raw)
To: Stephen Hemminger; +Cc: dev, stable, Thomas Monjalon
In-Reply-To: <20260602225722.950617-1-stephen@networkplumber.org>
Hello,
On Wed, 3 Jun 2026 at 00:57, Stephen Hemminger
<stephen@networkplumber.org> wrote:
>
> When using function versioning and building with Link Time Optimization,
> the compiler does not see the __asm__ annotation of symbols and
> therefore thinks there are two versions of the same symbol.
>
> The fix is to use compiler symver attribute on the function which
> was added in GCC 10. Keep the older method for backward compatibility
> with older compilers.
>
> Bugzilla ID: 1949
> Fixes: e30e194c4d06 ("eal: rework function versioning macros")
We never used the symver stuff, so it seems unlikely the issue was
introduced with this rework.
The fact that clang does not support this attribute is a concern.
> Cc: stable@dpdk.org
Why do we need to backport?
LTO is kind of experimental, so it seems good enough to reply "not
expected to work in older LTS" if someone reported an issue.
And in practice, no LTS release call the versioning macros, since a
LTS drops all compatibility.
> Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
I would like to reproduce, but I can't build main with LTO.
What patches did you apply locally to avoid warnings on the hash library?
--
David Marchand
^ permalink raw reply
* [PATCH v4] ethdev: support inline calculating masked item value
From: Bing Zhao @ 2026-06-03 9:28 UTC (permalink / raw)
To: viacheslavo, dev, rasland, stephen
Cc: orika, dsosnowski, suanmingm, matan, thomas
In-Reply-To: <20260603081941.9049-1-bingz@nvidia.com>
In the asynchronous API definition and some drivers, the
rte_flow_item spec value may not be calculated by the driver due to the
reason of speed of light rule insertion rate and sometimes the input
parameters will be copied and changed internally.
After copying, the spec and last will be protected by the keyword
const and cannot be changed in the code itself. And also the driver
needs some extra memory to do the calculation and extra conditions
to understand the length of each item spec. This is not efficient.
To solve the issue and support usage of the following fix, a new OP
was introduced to calculate the spec and last values after applying
the mask inline.
Signed-off-by: Bing Zhao <bingz@nvidia.com>
---
v3:
- add test code
- fix the issue found by AI
v4: reabse on top of the main
---
app/test/test_ethdev_api.c | 76 ++++++++++++++++++++++++++
doc/guides/rel_notes/release_26_07.rst | 6 ++
lib/ethdev/rte_flow.c | 46 ++++++++++++++--
lib/ethdev/rte_flow.h | 13 +++++
4 files changed, 135 insertions(+), 6 deletions(-)
diff --git a/app/test/test_ethdev_api.c b/app/test/test_ethdev_api.c
index 76afd0345c..5cae1cdc1d 100644
--- a/app/test/test_ethdev_api.c
+++ b/app/test/test_ethdev_api.c
@@ -4,6 +4,7 @@
#include <rte_log.h>
#include <rte_ethdev.h>
+#include <rte_flow.h>
#include <rte_test.h>
#include "test.h"
@@ -15,6 +16,80 @@
#define NUM_MBUF 1024
#define MBUF_CACHE_SIZE 256
+static int32_t
+ethdev_api_flow_conv_pattern_masked(void)
+{
+ const struct rte_flow_item_eth spec = {
+ .hdr.dst_addr.addr_bytes = { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06 },
+ .hdr.src_addr.addr_bytes = { 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f },
+ .hdr.ether_type = RTE_BE16(0x1234),
+ };
+ const struct rte_flow_item_eth last = {
+ .hdr.dst_addr.addr_bytes = { 0x11, 0x12, 0x13, 0x14, 0x15, 0x16 },
+ .hdr.src_addr.addr_bytes = { 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f },
+ .hdr.ether_type = RTE_BE16(0x5678),
+ };
+ const struct rte_flow_item_eth mask = {
+ .hdr.dst_addr.addr_bytes = { 0xff, 0xff, 0x00, 0x00, 0xff, 0xff },
+ .hdr.src_addr.addr_bytes = { 0xff, 0x00, 0xff, 0x00, 0xff, 0x00 },
+ .hdr.ether_type = RTE_BE16(0xffff),
+ };
+ const struct rte_flow_item pattern[] = {
+ {
+ .type = RTE_FLOW_ITEM_TYPE_ETH,
+ .spec = &spec,
+ .last = &last,
+ .mask = &mask,
+ },
+ { .type = RTE_FLOW_ITEM_TYPE_END },
+ };
+ union {
+ struct rte_flow_item item;
+ struct rte_flow_item_eth eth;
+ double align;
+ uint8_t raw[256];
+ } dst;
+ const struct rte_flow_item *item;
+ const struct rte_flow_item_eth *conv_spec;
+ const struct rte_flow_item_eth *conv_last;
+ int ret;
+
+ ret = rte_flow_conv(RTE_FLOW_CONV_OP_PATTERN_MASKED, NULL, 0, pattern, NULL);
+ TEST_ASSERT(ret > 0, "Masked pattern conversion size query failed");
+ TEST_ASSERT((size_t)ret <= sizeof(dst.raw),
+ "Masked pattern conversion needs too much storage");
+
+ memset(&dst, 0, sizeof(dst));
+ ret = rte_flow_conv(RTE_FLOW_CONV_OP_PATTERN_MASKED, dst.raw,
+ sizeof(dst.raw), pattern, NULL);
+ TEST_ASSERT(ret > 0, "Masked pattern conversion failed");
+
+ item = (const struct rte_flow_item *)dst.raw;
+ conv_spec = item[0].spec;
+ conv_last = item[0].last;
+ TEST_ASSERT_NOT_NULL(conv_spec, "Converted spec must be set");
+ TEST_ASSERT_NOT_NULL(conv_last, "Converted last must be set");
+
+ TEST_ASSERT_EQUAL(conv_spec->hdr.dst_addr.addr_bytes[0], 0x01,
+ "Masked spec dst byte 0 mismatch");
+ TEST_ASSERT_EQUAL(conv_spec->hdr.dst_addr.addr_bytes[2], 0x00,
+ "Masked spec dst byte 2 mismatch");
+ TEST_ASSERT_EQUAL(conv_spec->hdr.src_addr.addr_bytes[1], 0x00,
+ "Masked spec src byte 1 mismatch");
+ TEST_ASSERT_EQUAL(conv_spec->hdr.ether_type, RTE_BE16(0x1234),
+ "Masked spec ether type mismatch");
+ TEST_ASSERT_EQUAL(conv_last->hdr.dst_addr.addr_bytes[0], 0x11,
+ "Masked last dst byte 0 mismatch");
+ TEST_ASSERT_EQUAL(conv_last->hdr.dst_addr.addr_bytes[2], 0x00,
+ "Masked last dst byte 2 mismatch");
+ TEST_ASSERT_EQUAL(conv_last->hdr.src_addr.addr_bytes[1], 0x00,
+ "Masked last src byte 1 mismatch");
+ TEST_ASSERT_EQUAL(conv_last->hdr.ether_type, RTE_BE16(0x5678),
+ "Masked last ether type mismatch");
+
+ return TEST_SUCCESS;
+}
+
static int32_t
ethdev_api_queue_status(void)
{
@@ -167,6 +242,7 @@ static struct unit_test_suite ethdev_api_testsuite = {
.setup = NULL,
.teardown = NULL,
.unit_test_cases = {
+ TEST_CASE(ethdev_api_flow_conv_pattern_masked),
TEST_CASE(ethdev_api_queue_status),
/* TODO: Add deferred_start queue status test */
TEST_CASES_END() /**< NULL terminate unit test array */
diff --git a/doc/guides/rel_notes/release_26_07.rst b/doc/guides/rel_notes/release_26_07.rst
index b8a3e2ced9..5f01420d2b 100644
--- a/doc/guides/rel_notes/release_26_07.rst
+++ b/doc/guides/rel_notes/release_26_07.rst
@@ -134,6 +134,12 @@ API Changes
Also, make sure to start the actual text at the margin.
=======================================================
+* ethdev: Added masked pattern conversion.
+
+ Added ``RTE_FLOW_CONV_OP_PATTERN_MASKED`` to ``rte_flow_conv()``
+ to copy an entire pattern while applying each item's mask to its
+ ``spec`` and ``last`` fields.
+
ABI Changes
-----------
diff --git a/lib/ethdev/rte_flow.c b/lib/ethdev/rte_flow.c
index 7a51b667cf..7cf9f6f6f3 100644
--- a/lib/ethdev/rte_flow.c
+++ b/lib/ethdev/rte_flow.c
@@ -178,6 +178,14 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = {
MK_FLOW_ITEM(COMPARE, sizeof(struct rte_flow_item_compare)),
};
+static inline size_t
+rte_flow_conv_item_mask_size(const struct rte_flow_item *item)
+{
+ if ((int)item->type >= 0)
+ return rte_flow_desc_item[item->type].size;
+ return sizeof(void *);
+}
+
/** Generate flow_action[] entry. */
#define MK_FLOW_ACTION(t, s) \
[RTE_FLOW_ACTION_TYPE_ ## t] = { \
@@ -835,6 +843,8 @@ rte_flow_conv_action_conf(void *buf, const size_t size,
* RTE_FLOW_ITEM_TYPE_END is encountered.
* @param[out] error
* Perform verbose error reporting if not NULL.
+ * @param[in] with_mask
+ * If true, @p src mask will be applied to spec and last.
*
* @return
* A positive value representing the number of bytes needed to store
@@ -847,12 +857,13 @@ rte_flow_conv_pattern(struct rte_flow_item *dst,
const size_t size,
const struct rte_flow_item *src,
unsigned int num,
+ bool with_mask,
struct rte_flow_error *error)
{
uintptr_t data = (uintptr_t)dst;
size_t off;
size_t ret;
- unsigned int i;
+ unsigned int i, j;
for (i = 0, off = 0; !num || i != num; ++i, ++src, ++dst) {
/**
@@ -876,15 +887,27 @@ rte_flow_conv_pattern(struct rte_flow_item *dst,
src -= num;
dst -= num;
do {
+ uint8_t *c_spec = NULL, *c_last = NULL;
+ const uint8_t *mask = src->mask;
+ size_t item_mask_size = mask ? rte_flow_conv_item_mask_size(src) : 0;
+
if (src->spec) {
off = RTE_ALIGN_CEIL(off, sizeof(double));
ret = rte_flow_conv_item_spec
((void *)(data + off),
size > off ? size - off : 0, src,
RTE_FLOW_CONV_ITEM_SPEC);
- if (size && size >= off + ret)
+ if (size && size >= off + ret) {
dst->spec = (void *)(data + off);
+ c_spec = (uint8_t *)(data + off);
+ }
off += ret;
+ if (with_mask && c_spec && mask) {
+ size_t mask_size = RTE_MIN(ret, item_mask_size);
+
+ for (j = 0; j < mask_size; j++)
+ c_spec[j] &= mask[j];
+ }
}
if (src->last) {
@@ -893,9 +916,17 @@ rte_flow_conv_pattern(struct rte_flow_item *dst,
((void *)(data + off),
size > off ? size - off : 0, src,
RTE_FLOW_CONV_ITEM_LAST);
- if (size && size >= off + ret)
+ if (size && size >= off + ret) {
dst->last = (void *)(data + off);
+ c_last = (uint8_t *)(data + off);
+ }
off += ret;
+ if (with_mask && c_last && mask) {
+ size_t mask_size = RTE_MIN(ret, item_mask_size);
+
+ for (j = 0; j < mask_size; j++)
+ c_last[j] &= mask[j];
+ }
}
if (src->mask) {
off = RTE_ALIGN_CEIL(off, sizeof(double));
@@ -1042,7 +1073,7 @@ rte_flow_conv_rule(struct rte_flow_conv_rule *dst,
off = RTE_ALIGN_CEIL(off, sizeof(double));
ret = rte_flow_conv_pattern((void *)((uintptr_t)dst + off),
size > off ? size - off : 0,
- src->pattern_ro, 0, error);
+ src->pattern_ro, 0, false, error);
if (ret < 0)
return ret;
if (size && size >= off + (size_t)ret)
@@ -1143,7 +1174,7 @@ rte_flow_conv(enum rte_flow_conv_op op,
ret = sizeof(*attr);
break;
case RTE_FLOW_CONV_OP_ITEM:
- ret = rte_flow_conv_pattern(dst, size, src, 1, error);
+ ret = rte_flow_conv_pattern(dst, size, src, 1, false, error);
break;
case RTE_FLOW_CONV_OP_ITEM_MASK:
item = src;
@@ -1158,7 +1189,7 @@ rte_flow_conv(enum rte_flow_conv_op op,
ret = rte_flow_conv_actions(dst, size, src, 1, error);
break;
case RTE_FLOW_CONV_OP_PATTERN:
- ret = rte_flow_conv_pattern(dst, size, src, 0, error);
+ ret = rte_flow_conv_pattern(dst, size, src, 0, false, error);
break;
case RTE_FLOW_CONV_OP_ACTIONS:
ret = rte_flow_conv_actions(dst, size, src, 0, error);
@@ -1178,6 +1209,9 @@ rte_flow_conv(enum rte_flow_conv_op op,
case RTE_FLOW_CONV_OP_ACTION_NAME_PTR:
ret = rte_flow_conv_name(1, 1, dst, size, src, error);
break;
+ case RTE_FLOW_CONV_OP_PATTERN_MASKED:
+ ret = rte_flow_conv_pattern(dst, size, src, 0, true, error);
+ break;
default:
ret = rte_flow_error_set
(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
diff --git a/lib/ethdev/rte_flow.h b/lib/ethdev/rte_flow.h
index eacfd7c5f7..5f8d4b00f0 100644
--- a/lib/ethdev/rte_flow.h
+++ b/lib/ethdev/rte_flow.h
@@ -4558,6 +4558,19 @@ enum rte_flow_conv_op {
* @code const char ** @endcode
*/
RTE_FLOW_CONV_OP_ACTION_NAME_PTR,
+
+ /**
+ * Convert an entire pattern.
+ *
+ * Duplicates all pattern items at once, applying @p mask to @p spec
+ * and @p last.
+ *
+ * - @p src type:
+ * @code const struct rte_flow_item * @endcode
+ * - @p dst type:
+ * @code struct rte_flow_item * @endcode
+ */
+ RTE_FLOW_CONV_OP_PATTERN_MASKED,
};
/**
--
2.34.1
^ permalink raw reply related
* [PATCH 2/2] crypto/ipsec_mb: remove ZUC and SNOW 3G drivers from x86 build
From: Radu Nicolau @ 2026-06-03 9:27 UTC (permalink / raw)
To: dev
Cc: paul.elliott, Shebu.VargheseKuriakose, tomasz.kantecki,
Islam.Ragimov, Gowtham.SureshKumar, emma.finn, marcel.d.cornu,
gakhil, john.mcnamara, Jonathan.Wright, Dhruv.Tripathi,
wathsala.vithanage, Radu Nicolau, Kai Ji, Pablo de Lara
In-Reply-To: <20260603092736.664428-1-radu.nicolau@intel.com>
The ZUC and SNOW 3G crypto drivers are using APIs that are now
deprecated in the Intel IPsec Multi-Buffer library.
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
---
doc/guides/cryptodevs/aesni_mb.rst | 2 +-
doc/guides/cryptodevs/snow3g.rst | 15 ++++-----------
doc/guides/cryptodevs/zuc.rst | 13 +++----------
doc/guides/rel_notes/release_26_07.rst | 5 +++++
drivers/crypto/ipsec_mb/ipsec_mb_private.h | 6 ++++++
drivers/crypto/ipsec_mb/meson.build | 9 +++++++--
6 files changed, 26 insertions(+), 24 deletions(-)
diff --git a/doc/guides/cryptodevs/aesni_mb.rst b/doc/guides/cryptodevs/aesni_mb.rst
index 9d886657f2..5efbadb8d1 100644
--- a/doc/guides/cryptodevs/aesni_mb.rst
+++ b/doc/guides/cryptodevs/aesni_mb.rst
@@ -82,7 +82,7 @@ Limitations
DOCSIS security protocol.
AESNI MB PMD selection over SNOW3G/ZUC PMDs
---------------------------------------------------
+-------------------------------------------
This PMD supports wireless cipher suite (SNOW3G and ZUC).
On Intel processors, it is recommended to use this PMD
diff --git a/doc/guides/cryptodevs/snow3g.rst b/doc/guides/cryptodevs/snow3g.rst
index 0fe914ffd3..d7f494a963 100644
--- a/doc/guides/cryptodevs/snow3g.rst
+++ b/doc/guides/cryptodevs/snow3g.rst
@@ -5,8 +5,8 @@ SNOW 3G Crypto Poll Mode Driver
===============================
The SNOW3G PMD (**librte_crypto_snow3g**) provides poll mode crypto driver support for
-utilizing `Intel IPSec Multi-buffer library <https://github.com/01org/intel-ipsec-mb>`_
-which implements F8 and F8 functions for SNOW 3G UEA2 cipher and UIA2 hash algorithms.
+utilizing the ARM64 port of `Intel IPSec Multi-buffer library <https://gitlab.arm.com/arm-reference-solutions/ipsec-mb>`_
+which implements F8 and F9 functions for SNOW 3G UEA2 cipher and UIA2 hash algorithms.
Features
--------
@@ -36,9 +36,7 @@ Limitations
SNOW3G PMD vs AESNI MB PMD
--------------------------
-AESNI MB PMD also supports SNOW3G cipher and authentication algorithms.
-It is recommended to use the AESNI MB PMD,
-which offers better performance on Intel processors.
+On Intel processors this PMD is no longer supported, please use the AESNI MB PMD.
Take a look at the PMD documentation (:doc:`aesni_mb`) for more information.
Installation
@@ -47,12 +45,7 @@ Installation
To build DPDK with the SNOW3G_PMD the user is required to download the multi-buffer
library and compile it on their user system before building DPDK.
-For x86 system, the multi-buffer library is available
-`here <https://github.com/01org/intel-ipsec-mb>`_.
-The latest version of the library supported by this PMD is v1.5, which
-can be downloaded from `<https://github.com/01org/intel-ipsec-mb/archive/v1.5.zip>`_.
-
-For Arm system, ARM64 port of the multi-buffer library can be downloaded from
+The ARM64 port of the multi-buffer library can be downloaded from
`<https://gitlab.arm.com/arm-reference-solutions/ipsec-mb/-/tree/main/>`_. The
latest version of the library supported by this PMD is tagged as SECLIB-IPSEC-2024.07.08.
diff --git a/doc/guides/cryptodevs/zuc.rst b/doc/guides/cryptodevs/zuc.rst
index 7c6b83e7eb..e4c86814f1 100644
--- a/doc/guides/cryptodevs/zuc.rst
+++ b/doc/guides/cryptodevs/zuc.rst
@@ -5,7 +5,7 @@ ZUC Crypto Poll Mode Driver
===========================
The ZUC PMD (**librte_crypto_zuc**) provides poll mode crypto driver support for
-utilizing `Intel IPSec Multi-buffer library <https://github.com/01org/intel-ipsec-mb>`_
+utilizing the ARM64 port of `Intel IPSec Multi-buffer library <https://gitlab.arm.com/arm-reference-solutions/ipsec-mb>`_
which implements F8 and F9 functions for ZUC EEA3 cipher and EIA3 hash algorithms.
Features
@@ -35,9 +35,7 @@ Limitations
ZUC PMD vs AESNI MB PMD
-----------------------
-AESNI MB PMD also supports ZUC cipher and authentication algorithms.
-It is recommended to use the AESNI MB PMD,
-which offers better performance on Intel processors.
+On Intel processors this PMD is no longer supported, please use the AESNI MB PMD.
Take a look at the PMD documentation (:doc:`aesni_mb`) for more information.
Installation
@@ -46,12 +44,7 @@ Installation
To build DPDK with the ZUC_PMD the user is required to download the multi-buffer
library and compile it on their user system before building DPDK.
-For x86 system, the multi-buffer library is available
-`here <https://github.com/01org/intel-ipsec-mb>`_.
-The latest version of the library supported by this PMD is v1.5, which
-can be downloaded from `<https://github.com/01org/intel-ipsec-mb/archive/v1.5.zip>`_.
-
-For Arm system, ARM64 port of the multi-buffer library can be downloaded from
+The ARM64 port of the multi-buffer library can be downloaded from
`<https://gitlab.arm.com/arm-reference-solutions/ipsec-mb/-/tree/main/>`_. The
latest version of the library supported by this PMD is tagged as SECLIB-IPSEC-2024.07.08.
diff --git a/doc/guides/rel_notes/release_26_07.rst b/doc/guides/rel_notes/release_26_07.rst
index 64c8b038d1..388642851a 100644
--- a/doc/guides/rel_notes/release_26_07.rst
+++ b/doc/guides/rel_notes/release_26_07.rst
@@ -123,6 +123,11 @@ Removed Items
* The Chacha20-poly1305 and KASUMI drivers were just wrappers around
the main AESNI_MB driver.
+* **Removed ZUC and SNOW 3G crypto drivers from the x86 release.**
+
+ * The ZUC and SNOW 3G crypto drivers are using APIs that are now
+ deprecated in the Intel IPsec Multi-Buffer library.
+
API Changes
-----------
diff --git a/drivers/crypto/ipsec_mb/ipsec_mb_private.h b/drivers/crypto/ipsec_mb/ipsec_mb_private.h
index 9712bf5b4c..fc7d6f5f06 100644
--- a/drivers/crypto/ipsec_mb/ipsec_mb_private.h
+++ b/drivers/crypto/ipsec_mb/ipsec_mb_private.h
@@ -45,11 +45,13 @@ extern RTE_DEFINE_PER_LCORE(IMB_MGR *, mb_mgr);
#define CRYPTODEV_NAME_AESNI_GCM_PMD crypto_aesni_gcm
/**< IPSEC Multi buffer PMD aesni_gcm device name */
+#if defined(RTE_ARCH_ARM)
#define CRYPTODEV_NAME_SNOW3G_PMD crypto_snow3g
/**< IPSEC Multi buffer PMD snow3g device name */
#define CRYPTODEV_NAME_ZUC_PMD crypto_zuc
/**< IPSEC Multi buffer PMD zuc device name */
+#endif
/** PMD LOGTYPE DRIVER, common to all PMDs */
extern int ipsec_mb_logtype_driver;
@@ -62,8 +64,10 @@ extern int ipsec_mb_logtype_driver;
enum ipsec_mb_pmd_types {
IPSEC_MB_PMD_TYPE_AESNI_MB = 0,
IPSEC_MB_PMD_TYPE_AESNI_GCM,
+#if defined(RTE_ARCH_ARM)
IPSEC_MB_PMD_TYPE_SNOW3G,
IPSEC_MB_PMD_TYPE_ZUC,
+#endif
IPSEC_MB_N_PMD_TYPES
};
@@ -96,10 +100,12 @@ ipsec_mb_get_driver_id(enum ipsec_mb_pmd_types pmd_type)
return pmd_driver_id_aesni_mb;
case IPSEC_MB_PMD_TYPE_AESNI_GCM:
return pmd_driver_id_aesni_gcm;
+#if defined(RTE_ARCH_ARM)
case IPSEC_MB_PMD_TYPE_SNOW3G:
return pmd_driver_id_snow3g;
case IPSEC_MB_PMD_TYPE_ZUC:
return pmd_driver_id_zuc;
+#endif
default:
break;
}
diff --git a/drivers/crypto/ipsec_mb/meson.build b/drivers/crypto/ipsec_mb/meson.build
index 6c5e4e2259..eb2085725b 100644
--- a/drivers/crypto/ipsec_mb/meson.build
+++ b/drivers/crypto/ipsec_mb/meson.build
@@ -42,8 +42,13 @@ sources = files(
'ipsec_mb_ops.c',
'pmd_aesni_mb.c',
'pmd_aesni_gcm.c',
- 'pmd_snow3g.c',
- 'pmd_zuc.c',
)
+# PMDs supported only on ARM build
+if arch_subdir == 'arm'
+ sources += files(
+ 'pmd_snow3g.c',
+ 'pmd_zuc.c',
+ )
+endif
deps += ['bus_vdev', 'net', 'security']
require_iova_in_mbuf = false
--
2.52.0
^ permalink raw reply related
* [PATCH 1/2] crypto/ipsec_mb: remove chacha-poly and kasumi drivers
From: Radu Nicolau @ 2026-06-03 9:27 UTC (permalink / raw)
To: dev
Cc: paul.elliott, Shebu.VargheseKuriakose, tomasz.kantecki,
Islam.Ragimov, Gowtham.SureshKumar, emma.finn, marcel.d.cornu,
gakhil, john.mcnamara, Jonathan.Wright, Dhruv.Tripathi,
wathsala.vithanage, Radu Nicolau, Thomas Monjalon, Fan Zhang,
Kai Ji, Pablo de Lara
The Chacha20-poly1305 and KASUMI drivers were just wrappers around
the main AESNI_MB driver, hence redundant and removed.
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
---
MAINTAINERS | 4 -
app/test/test_cryptodev.c | 20 ---
app/test/test_cryptodev.h | 2 -
doc/guides/cryptodevs/aesni_mb.rst | 14 +-
doc/guides/cryptodevs/chacha20_poly1305.rst | 100 -------------
.../cryptodevs/features/chacha20_poly1305.ini | 42 ------
doc/guides/cryptodevs/features/kasumi.ini | 39 ------
doc/guides/cryptodevs/index.rst | 2 -
doc/guides/cryptodevs/kasumi.rst | 131 ------------------
doc/guides/rel_notes/release_26_07.rst | 5 +
doc/guides/tools/cryptoperf.rst | 1 -
drivers/crypto/ipsec_mb/ipsec_mb_private.h | 14 --
drivers/crypto/ipsec_mb/meson.build | 2 -
drivers/crypto/ipsec_mb/pmd_chacha_poly.c | 74 ----------
.../crypto/ipsec_mb/pmd_chacha_poly_priv.h | 46 ------
drivers/crypto/ipsec_mb/pmd_kasumi.c | 76 ----------
drivers/crypto/ipsec_mb/pmd_kasumi_priv.h | 61 --------
17 files changed, 8 insertions(+), 625 deletions(-)
delete mode 100644 doc/guides/cryptodevs/chacha20_poly1305.rst
delete mode 100644 doc/guides/cryptodevs/features/chacha20_poly1305.ini
delete mode 100644 doc/guides/cryptodevs/features/kasumi.ini
delete mode 100644 doc/guides/cryptodevs/kasumi.rst
delete mode 100644 drivers/crypto/ipsec_mb/pmd_chacha_poly.c
delete mode 100644 drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h
delete mode 100644 drivers/crypto/ipsec_mb/pmd_kasumi.c
delete mode 100644 drivers/crypto/ipsec_mb/pmd_kasumi_priv.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 72fc12b1f2..567d1c872e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1234,14 +1234,10 @@ M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
F: drivers/crypto/ipsec_mb/
F: doc/guides/cryptodevs/aesni_gcm.rst
F: doc/guides/cryptodevs/aesni_mb.rst
-F: doc/guides/cryptodevs/chacha20_poly1305.rst
-F: doc/guides/cryptodevs/kasumi.rst
F: doc/guides/cryptodevs/snow3g.rst
F: doc/guides/cryptodevs/zuc.rst
F: doc/guides/cryptodevs/features/aesni_gcm.ini
F: doc/guides/cryptodevs/features/aesni_mb.ini
-F: doc/guides/cryptodevs/features/chacha20_poly1305.ini
-F: doc/guides/cryptodevs/features/kasumi.ini
F: doc/guides/cryptodevs/features/snow3g.ini
F: doc/guides/cryptodevs/features/zuc.ini
diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index a60983c6b7..b908f10317 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -20602,17 +20602,6 @@ test_cryptodev_cpu_aesni_mb(void)
return rc;
}
-static int
-test_cryptodev_chacha_poly_mb(void)
-{
- int32_t rc;
- enum rte_security_session_action_type at = gbl_action_type;
- rc = run_cryptodev_testsuite(
- RTE_STR(CRYPTODEV_NAME_CHACHA20_POLY1305_PMD));
- gbl_action_type = at;
- return rc;
-}
-
static int
test_cryptodev_openssl(void)
{
@@ -20654,12 +20643,6 @@ test_cryptodev_sw_snow3g(void)
return run_cryptodev_testsuite(RTE_STR(CRYPTODEV_NAME_SNOW3G_PMD));
}
-static int
-test_cryptodev_sw_kasumi(void)
-{
- return run_cryptodev_testsuite(RTE_STR(CRYPTODEV_NAME_KASUMI_PMD));
-}
-
static int
test_cryptodev_sw_zuc(void)
{
@@ -20910,8 +20893,6 @@ REGISTER_DRIVER_TEST(cryptodev_qat_autotest, test_cryptodev_qat);
REGISTER_DRIVER_TEST(cryptodev_aesni_mb_autotest, test_cryptodev_aesni_mb);
REGISTER_DRIVER_TEST(cryptodev_cpu_aesni_mb_autotest,
test_cryptodev_cpu_aesni_mb);
-REGISTER_DRIVER_TEST(cryptodev_chacha_poly_mb_autotest,
- test_cryptodev_chacha_poly_mb);
REGISTER_DRIVER_TEST(cryptodev_openssl_autotest, test_cryptodev_openssl);
REGISTER_DRIVER_TEST(cryptodev_aesni_gcm_autotest, test_cryptodev_aesni_gcm);
REGISTER_DRIVER_TEST(cryptodev_cpu_aesni_gcm_autotest,
@@ -20919,7 +20900,6 @@ REGISTER_DRIVER_TEST(cryptodev_cpu_aesni_gcm_autotest,
REGISTER_DRIVER_TEST(cryptodev_mlx5_autotest, test_cryptodev_mlx5);
REGISTER_DRIVER_TEST(cryptodev_null_autotest, test_cryptodev_null);
REGISTER_DRIVER_TEST(cryptodev_sw_snow3g_autotest, test_cryptodev_sw_snow3g);
-REGISTER_DRIVER_TEST(cryptodev_sw_kasumi_autotest, test_cryptodev_sw_kasumi);
REGISTER_DRIVER_TEST(cryptodev_sw_zuc_autotest, test_cryptodev_sw_zuc);
REGISTER_DRIVER_TEST(cryptodev_sw_armv8_autotest, test_cryptodev_armv8);
REGISTER_DRIVER_TEST(cryptodev_sw_mvsam_autotest, test_cryptodev_mrvl);
diff --git a/app/test/test_cryptodev.h b/app/test/test_cryptodev.h
index 23d12ec961..49aa45ec17 100644
--- a/app/test/test_cryptodev.h
+++ b/app/test/test_cryptodev.h
@@ -59,9 +59,7 @@
#define CRYPTODEV_NAME_QAT_SYM_PMD crypto_qat
#define CRYPTODEV_NAME_QAT_ASYM_PMD crypto_qat_asym
#define CRYPTODEV_NAME_SNOW3G_PMD crypto_snow3g
-#define CRYPTODEV_NAME_KASUMI_PMD crypto_kasumi
#define CRYPTODEV_NAME_ZUC_PMD crypto_zuc
-#define CRYPTODEV_NAME_CHACHA20_POLY1305_PMD crypto_chacha20_poly1305
#define CRYPTODEV_NAME_ARMV8_PMD crypto_armv8
#define CRYPTODEV_NAME_DPAA_SEC_PMD crypto_dpaa_sec
#define CRYPTODEV_NAME_DPAA2_SEC_PMD crypto_dpaa2_sec
diff --git a/doc/guides/cryptodevs/aesni_mb.rst b/doc/guides/cryptodevs/aesni_mb.rst
index 7ce92305d1..9d886657f2 100644
--- a/doc/guides/cryptodevs/aesni_mb.rst
+++ b/doc/guides/cryptodevs/aesni_mb.rst
@@ -81,23 +81,15 @@ Limitations
* RTE_CRYPTO_CIPHER_DES_DOCSISBPI is not supported for combined Crypto-CRC
DOCSIS security protocol.
-AESNI MB PMD selection over SNOW3G/ZUC/KASUMI PMDs
+AESNI MB PMD selection over SNOW3G/ZUC PMDs
--------------------------------------------------
-This PMD supports wireless cipher suite (SNOW3G, ZUC and KASUMI).
+This PMD supports wireless cipher suite (SNOW3G and ZUC).
On Intel processors, it is recommended to use this PMD
-instead of SNOW3G, ZUC and KASUMI PMDs, as it enables algorithm mixing
+instead of SNOW3G and ZUC PMDs, as it enables algorithm mixing
(e.g. cipher algorithm SNOW3G-UEA2 with authentication algorithm AES-CMAC-128)
and performance over IMIX (packet size mix) traffic is significantly higher.
-AESNI MB PMD selection over CHACHA20-POLY1305 PMD
--------------------------------------------------
-
-This PMD supports Chacha20-Poly1305 algorithm.
-On Intel processors, it is recommended to use this PMD instead of CHACHA20-POLY1305 PMD,
-as it delivers better performance on single segment buffers.
-For multi-segment buffers, it is still recommended to use CHACHA20-POLY1305 PMD,
-until the new SGL API is introduced in the AESNI MB PMD.
Installation
------------
diff --git a/doc/guides/cryptodevs/chacha20_poly1305.rst b/doc/guides/cryptodevs/chacha20_poly1305.rst
deleted file mode 100644
index 37d9d2e8af..0000000000
--- a/doc/guides/cryptodevs/chacha20_poly1305.rst
+++ /dev/null
@@ -1,100 +0,0 @@
-.. SPDX-License-Identifier: BSD-3-Clause
- Copyright(c) 2021 Intel Corporation.
-
-Chacha20-poly1305 Crypto Poll Mode Driver
-=========================================
-
-The Chacha20-poly1305 PMD provides poll mode crypto driver support for
-utilizing `Intel IPSec Multi-buffer library <https://github.com/01org/intel-ipsec-mb>`_.
-
-Features
---------
-
-Chacha20-poly1305 PMD has support for:
-
-AEAD algorithms:
-
-* RTE_CRYPTO_AEAD_CHACHA20_POLY1305
-
-Chaha20_Poly1305 PMD vs AESNI MB PMD
-------------------------------------
-
-AESNI MB PMD also supports CHACHA20-POLY1305 algorithms.
-It is recommended to use the AESNI MB PMD,
-which offers better performance on Intel processors,
-when single-segment buffers are used.
-Take a look at the PMD documentation (:doc:`aesni_mb`) for more information.
-
-Installation
-------------
-
-To build DPDK with the Chacha20-poly1305 PMD the user is required to download
-the multi-buffer library from `here <https://github.com/01org/intel-ipsec-mb>`_
-and compile it on their user system before building DPDK.
-The latest version of the library supported by this PMD is v1.5, which
-can be downloaded from `<https://github.com/01org/intel-ipsec-mb/archive/v1.5.zip>`_.
-
-After downloading the library, the user needs to unpack and compile it
-on their system before building DPDK:
-
-.. code-block:: console
-
- make
- make install
-
-The library requires NASM to be built. Depending on the library version, it might
-require a minimum NASM version (e.g. v0.54 requires at least NASM 2.14).
-
-NASM is packaged for different OS. However, on some OS the version is too old,
-so a manual installation is required. In that case, NASM can be downloaded from
-`NASM website <https://www.nasm.us/pub/nasm/releasebuilds/?C=M;O=D>`_.
-Once it is downloaded, extract it and follow these steps:
-
-.. code-block:: console
-
- ./configure
- make
- make install
-
-As a reference, the following table shows a mapping between the past DPDK versions
-and the external crypto libraries supported by them:
-
-.. _table_chacha20_poly1305_versions:
-
-.. table:: DPDK and external crypto library version compatibility
-
- ============= ================================
- DPDK version Crypto library version
- ============= ================================
- 21.11 - 24.07 Multi-buffer library 1.0 - 1.5
- 24.11+ Multi-buffer library 1.4+
- ============= ================================
-
-Initialization
---------------
-
-In order to enable this virtual crypto PMD, user must:
-
-* Build the multi buffer library (explained in Installation section).
-
-To use the PMD in an application, user must:
-
-* Call rte_vdev_init("crypto_chacha20_poly1305") within the application.
-
-* Use --vdev="crypto_chacha20_poly1305" in the EAL options, which will call
- rte_vdev_init() internally.
-
-The following parameters (all optional) can be provided in the previous two calls:
-
-* socket_id: Specify the socket where the memory for the device is going to be allocated
- (by default, socket_id will be the socket where the core that is creating the PMD is running on).
-
-* max_nb_queue_pairs: Specify the maximum number of queue pairs in the device (8 by default).
-
-* max_nb_sessions: Specify the maximum number of sessions that can be created (2048 by default).
-
-Example:
-
-.. code-block:: console
-
- --vdev="crypto_chacha20_poly1305,socket_id=0,max_nb_sessions=128"
diff --git a/doc/guides/cryptodevs/features/chacha20_poly1305.ini b/doc/guides/cryptodevs/features/chacha20_poly1305.ini
deleted file mode 100644
index b5a7b39bd0..0000000000
--- a/doc/guides/cryptodevs/features/chacha20_poly1305.ini
+++ /dev/null
@@ -1,42 +0,0 @@
-;
-; Supported features of the 'chacha20_poly1305' crypto driver.
-;
-; Refer to default.ini for the full list of available PMD features.
-;
-[Features]
-Symmetric crypto = Y
-Sym operation chaining = Y
-Symmetric sessionless = Y
-Non-Byte aligned data = Y
-In Place SGL = Y
-OOP SGL In LB Out = Y
-OOP LB In LB Out = Y
-CPU crypto = Y
-
-;
-; Supported crypto algorithms of the 'chacha20_poly1305' crypto driver.
-;
-[Cipher]
-
-;
-; Supported authentication algorithms of the 'chacha20_poly1305' crypto driver.
-;
-[Auth]
-
-;
-; Supported AEAD algorithms of the 'chacha20_poly1305' crypto driver.
-;
-[AEAD]
-CHACHA20-POLY1305 = Y
-
-;
-; Supported Asymmetric algorithms of the 'chacha20_poly1305' crypto driver.
-;
-[Asymmetric]
-
-;
-; Supported Operating systems of the 'chacha20_poly1305' crypto driver.
-;
-[OS]
-Linux = Y
-FreeBSD = Y
diff --git a/doc/guides/cryptodevs/features/kasumi.ini b/doc/guides/cryptodevs/features/kasumi.ini
deleted file mode 100644
index d400a4269d..0000000000
--- a/doc/guides/cryptodevs/features/kasumi.ini
+++ /dev/null
@@ -1,39 +0,0 @@
-;
-; Supported features of the 'kasumi' crypto driver.
-;
-; Refer to default.ini for the full list of available PMD features.
-;
-[Features]
-Symmetric crypto = Y
-Sym operation chaining = Y
-Symmetric sessionless = Y
-Non-Byte aligned data = Y
-OOP LB In LB Out = Y
-
-;
-; Supported crypto algorithms of the 'kasumi' crypto driver.
-;
-[Cipher]
-KASUMI F8 = Y
-;
-; Supported authentication algorithms of the 'kasumi' crypto driver.
-;
-[Auth]
-KASUMI F9 = Y
-
-;
-; Supported AEAD algorithms of the 'kasumi' crypto driver.
-;
-[AEAD]
-
-;
-; Supported Asymmetric algorithms of the 'kasumi' crypto driver.
-;
-[Asymmetric]
-
-;
-; Supported Operating systems of the 'kasumi' crypto driver.
-;
-[OS]
-Linux = Y
-FreeBSD = Y
diff --git a/doc/guides/cryptodevs/index.rst b/doc/guides/cryptodevs/index.rst
index 7c19629e17..cfb6a494bf 100644
--- a/doc/guides/cryptodevs/index.rst
+++ b/doc/guides/cryptodevs/index.rst
@@ -16,12 +16,10 @@ Crypto Device Drivers
bcmfs
caam_jr
ccp
- chacha20_poly1305
cnxk
dpaa2_sec
dpaa_sec
ionic
- kasumi
octeontx
openssl
mlx5
diff --git a/doc/guides/cryptodevs/kasumi.rst b/doc/guides/cryptodevs/kasumi.rst
deleted file mode 100644
index ce1db4e905..0000000000
--- a/doc/guides/cryptodevs/kasumi.rst
+++ /dev/null
@@ -1,131 +0,0 @@
-.. SPDX-License-Identifier: BSD-3-Clause
- Copyright(c) 2016-2019 Intel Corporation.
-
-KASUMI Crypto Poll Mode Driver
-===============================
-
-The KASUMI PMD (**librte_crypto_kasumi**) provides poll mode crypto driver support for
-utilizing `Intel IPSec Multi-buffer library <https://github.com/01org/intel-ipsec-mb>`_
-which implements F8 and F9 functions for KASUMI UEA1 cipher and UIA1 hash algorithms.
-
-Features
---------
-
-KASUMI PMD has support for:
-
-Cipher algorithm:
-
-* RTE_CRYPTO_CIPHER_KASUMI_F8
-
-Authentication algorithm:
-
-* RTE_CRYPTO_AUTH_KASUMI_F9
-
-Limitations
------------
-
-* Chained mbufs are not supported.
-* KASUMI(F9) supported only if hash offset and length field is byte-aligned.
-* In-place bit-level operations for KASUMI(F8) are not supported
- (if length and/or offset of data to be ciphered is not byte-aligned).
-
-
-KASUMI PMD vs AESNI MB PMD
---------------------------
-
-AESNI MB PMD also supports KASUMI cipher and authentication algorithms.
-It is recommended to use the AESNI MB PMD,
-which offers better performance on Intel processors.
-Take a look at the PMD documentation (:doc:`aesni_mb`) for more information.
-
-Installation
-------------
-
-To build DPDK with the KASUMI_PMD the user is required to download the multi-buffer
-library from `here <https://github.com/01org/intel-ipsec-mb>`_
-and compile it on their user system before building DPDK.
-The latest version of the library supported by this PMD is v1.5, which
-can be downloaded from `<https://github.com/01org/intel-ipsec-mb/archive/v1.5.zip>`_.
-
-After downloading the library, the user needs to unpack and compile it
-on their system before building DPDK:
-
-.. code-block:: console
-
- make
- make install
-
-The library requires NASM to be built. Depending on the library version, it might
-require a minimum NASM version (e.g. v0.54 requires at least NASM 2.14).
-
-NASM is packaged for different OS. However, on some OS the version is too old,
-so a manual installation is required. In that case, NASM can be downloaded from
-`NASM website <https://www.nasm.us/pub/nasm/releasebuilds/?C=M;O=D>`_.
-Once it is downloaded, extract it and follow these steps:
-
-.. code-block:: console
-
- ./configure
- make
- make install
-
-As a reference, the following table shows a mapping between the past DPDK versions
-and the external crypto libraries supported by them:
-
-.. _table_kasumi_versions:
-
-.. table:: DPDK and external crypto library version compatibility
-
- ============= ================================
- DPDK version Crypto library version
- ============= ================================
- 20.02 - 21.08 Multi-buffer library 0.53 - 1.3
- 21.11 - 24.07 Multi-buffer library 1.0 - 1.5
- 24.11+ Multi-buffer library 1.4 - 1.5
- ============= ================================
-
-Initialization
---------------
-
-In order to enable this virtual crypto PMD, user must:
-
-* Build the multi buffer library (explained in Installation section).
-
-To use the PMD in an application, user must:
-
-* Call rte_vdev_init("crypto_kasumi") within the application.
-
-* Use --vdev="crypto_kasumi" in the EAL options, which will call rte_vdev_init() internally.
-
-The following parameters (all optional) can be provided in the previous two calls:
-
-* socket_id: Specify the socket where the memory for the device is going to be allocated
- (by default, socket_id will be the socket where the core that is creating the PMD is running on).
-
-* max_nb_queue_pairs: Specify the maximum number of queue pairs in the device (8 by default).
-
-* max_nb_sessions: Specify the maximum number of sessions that can be created (2048 by default).
-
-Example:
-
-.. code-block:: console
-
- ./dpdk-l2fwd-crypto -l 1 --vdev="crypto_kasumi,socket_id=0,max_nb_sessions=128" \
- -- -p 1 --cdev SW --chain CIPHER_ONLY --cipher_algo "kasumi-f8"
-
-Extra notes on KASUMI F9
-------------------------
-
-When using KASUMI F9 authentication algorithm, the input buffer must be
-constructed according to the 3GPP KASUMI specifications (section 4.4, page 13):
-`<http://cryptome.org/3gpp/35201-900.pdf>`_.
-Input buffer has to have COUNT (4 bytes), FRESH (4 bytes), MESSAGE and DIRECTION (1 bit)
-concatenated. After the DIRECTION bit, a single '1' bit is appended, followed by
-between 0 and 7 '0' bits, so that the total length of the buffer is multiple of 8 bits.
-Note that the actual message can be any length, specified in bits.
-
-Once this buffer is passed this way, when creating the crypto operation,
-length of data to authenticate (op.sym.auth.data.length) must be the length
-of all the items described above, including the padding at the end.
-Also, offset of data to authenticate (op.sym.auth.data.offset)
-must be such that points at the start of the COUNT bytes.
diff --git a/doc/guides/rel_notes/release_26_07.rst b/doc/guides/rel_notes/release_26_07.rst
index b8a3e2ced9..64c8b038d1 100644
--- a/doc/guides/rel_notes/release_26_07.rst
+++ b/doc/guides/rel_notes/release_26_07.rst
@@ -118,6 +118,11 @@ Removed Items
Also, make sure to start the actual text at the margin.
=======================================================
+* **Removed Chacha20-poly1305 and KASUMI crypto drivers.**
+
+ * The Chacha20-poly1305 and KASUMI drivers were just wrappers around
+ the main AESNI_MB driver.
+
API Changes
-----------
diff --git a/doc/guides/tools/cryptoperf.rst b/doc/guides/tools/cryptoperf.rst
index 846487c5e6..2ce9bc9a96 100644
--- a/doc/guides/tools/cryptoperf.rst
+++ b/doc/guides/tools/cryptoperf.rst
@@ -153,7 +153,6 @@ The following are the application command-line options:
crypto_cn10k
crypto_dpaa_sec
crypto_dpaa2_sec
- crypto_kasumi
crypto_mvsam
crypto_null
crypto_octeontx
diff --git a/drivers/crypto/ipsec_mb/ipsec_mb_private.h b/drivers/crypto/ipsec_mb/ipsec_mb_private.h
index 025767cfce..9712bf5b4c 100644
--- a/drivers/crypto/ipsec_mb/ipsec_mb_private.h
+++ b/drivers/crypto/ipsec_mb/ipsec_mb_private.h
@@ -45,18 +45,12 @@ extern RTE_DEFINE_PER_LCORE(IMB_MGR *, mb_mgr);
#define CRYPTODEV_NAME_AESNI_GCM_PMD crypto_aesni_gcm
/**< IPSEC Multi buffer PMD aesni_gcm device name */
-#define CRYPTODEV_NAME_KASUMI_PMD crypto_kasumi
-/**< IPSEC Multi buffer PMD kasumi device name */
-
#define CRYPTODEV_NAME_SNOW3G_PMD crypto_snow3g
/**< IPSEC Multi buffer PMD snow3g device name */
#define CRYPTODEV_NAME_ZUC_PMD crypto_zuc
/**< IPSEC Multi buffer PMD zuc device name */
-#define CRYPTODEV_NAME_CHACHA20_POLY1305_PMD crypto_chacha20_poly1305
-/**< IPSEC Multi buffer PMD chacha20_poly1305 device name */
-
/** PMD LOGTYPE DRIVER, common to all PMDs */
extern int ipsec_mb_logtype_driver;
#define RTE_LOGTYPE_IPSEC_MB ipsec_mb_logtype_driver
@@ -68,10 +62,8 @@ extern int ipsec_mb_logtype_driver;
enum ipsec_mb_pmd_types {
IPSEC_MB_PMD_TYPE_AESNI_MB = 0,
IPSEC_MB_PMD_TYPE_AESNI_GCM,
- IPSEC_MB_PMD_TYPE_KASUMI,
IPSEC_MB_PMD_TYPE_SNOW3G,
IPSEC_MB_PMD_TYPE_ZUC,
- IPSEC_MB_PMD_TYPE_CHACHA20_POLY1305,
IPSEC_MB_N_PMD_TYPES
};
@@ -92,10 +84,8 @@ enum ipsec_mb_operation {
extern uint8_t pmd_driver_id_aesni_mb;
extern uint8_t pmd_driver_id_aesni_gcm;
-extern uint8_t pmd_driver_id_kasumi;
extern uint8_t pmd_driver_id_snow3g;
extern uint8_t pmd_driver_id_zuc;
-extern uint8_t pmd_driver_id_chacha20_poly1305;
/** Helper function. Gets driver ID based on PMD type */
static __rte_always_inline uint8_t
@@ -106,14 +96,10 @@ ipsec_mb_get_driver_id(enum ipsec_mb_pmd_types pmd_type)
return pmd_driver_id_aesni_mb;
case IPSEC_MB_PMD_TYPE_AESNI_GCM:
return pmd_driver_id_aesni_gcm;
- case IPSEC_MB_PMD_TYPE_KASUMI:
- return pmd_driver_id_kasumi;
case IPSEC_MB_PMD_TYPE_SNOW3G:
return pmd_driver_id_snow3g;
case IPSEC_MB_PMD_TYPE_ZUC:
return pmd_driver_id_zuc;
- case IPSEC_MB_PMD_TYPE_CHACHA20_POLY1305:
- return pmd_driver_id_chacha20_poly1305;
default:
break;
}
diff --git a/drivers/crypto/ipsec_mb/meson.build b/drivers/crypto/ipsec_mb/meson.build
index 5fcff5b04b..6c5e4e2259 100644
--- a/drivers/crypto/ipsec_mb/meson.build
+++ b/drivers/crypto/ipsec_mb/meson.build
@@ -42,8 +42,6 @@ sources = files(
'ipsec_mb_ops.c',
'pmd_aesni_mb.c',
'pmd_aesni_gcm.c',
- 'pmd_chacha_poly.c',
- 'pmd_kasumi.c',
'pmd_snow3g.c',
'pmd_zuc.c',
)
diff --git a/drivers/crypto/ipsec_mb/pmd_chacha_poly.c b/drivers/crypto/ipsec_mb/pmd_chacha_poly.c
deleted file mode 100644
index 24488d4921..0000000000
--- a/drivers/crypto/ipsec_mb/pmd_chacha_poly.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2021 Intel Corporation
- */
-
-#include "pmd_chacha_poly_priv.h"
-#include "pmd_aesni_mb_priv.h"
-
-struct rte_cryptodev_ops chacha20_poly1305_pmd_ops = {
- .dev_configure = ipsec_mb_config,
- .dev_start = ipsec_mb_start,
- .dev_stop = ipsec_mb_stop,
- .dev_close = ipsec_mb_close,
-
- .stats_get = ipsec_mb_stats_get,
- .stats_reset = ipsec_mb_stats_reset,
-
- .dev_infos_get = ipsec_mb_info_get,
-
- .queue_pair_setup = ipsec_mb_qp_setup,
- .queue_pair_release = ipsec_mb_qp_release,
-
- .sym_session_get_size = ipsec_mb_sym_session_get_size,
- .sym_session_configure = ipsec_mb_sym_session_configure,
- .sym_session_clear = ipsec_mb_sym_session_clear
-};
-
-struct rte_cryptodev_ops *rte_chacha20_poly1305_pmd_ops =
- &chacha20_poly1305_pmd_ops;
-
-static int
-chacha20_poly1305_probe(struct rte_vdev_device *vdev)
-{
- return ipsec_mb_create(vdev, IPSEC_MB_PMD_TYPE_CHACHA20_POLY1305);
-}
-
-static struct rte_vdev_driver cryptodev_chacha20_poly1305_pmd_drv = {
- .probe = chacha20_poly1305_probe,
- .remove = ipsec_mb_remove
-};
-
-static struct cryptodev_driver chacha20_poly1305_crypto_drv;
-
-RTE_PMD_REGISTER_VDEV(CRYPTODEV_NAME_CHACHA20_POLY1305_PMD,
- cryptodev_chacha20_poly1305_pmd_drv);
-RTE_PMD_REGISTER_ALIAS(CRYPTODEV_NAME_CHACHA20_POLY1305_PMD,
- cryptodev_chacha20_poly1305_pmd);
-RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_CHACHA20_POLY1305_PMD,
- "max_nb_queue_pairs=<int> socket_id=<int>");
-RTE_PMD_REGISTER_CRYPTO_DRIVER(chacha20_poly1305_crypto_drv,
- cryptodev_chacha20_poly1305_pmd_drv.driver,
- pmd_driver_id_chacha20_poly1305);
-
-/* Constructor function to register chacha20_poly1305 PMD */
-RTE_INIT(ipsec_mb_register_chacha20_poly1305)
-{
- struct ipsec_mb_internals *chacha_poly_data
- = &ipsec_mb_pmds[IPSEC_MB_PMD_TYPE_CHACHA20_POLY1305];
-
- chacha_poly_data->caps = chacha20_poly1305_capabilities;
- chacha_poly_data->dequeue_burst = aesni_mb_dequeue_burst;
- chacha_poly_data->feature_flags =
- RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
- RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
- RTE_CRYPTODEV_FF_IN_PLACE_SGL |
- RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
- RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
- RTE_CRYPTODEV_FF_SYM_CPU_CRYPTO |
- RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
- chacha_poly_data->internals_priv_size = 0;
- chacha_poly_data->ops = &chacha20_poly1305_pmd_ops;
- chacha_poly_data->qp_priv_size = sizeof(struct aesni_mb_qp_data);
- chacha_poly_data->session_configure = aesni_mb_session_configure;
- chacha_poly_data->session_priv_size = sizeof(struct aesni_mb_session);
-}
diff --git a/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h b/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h
deleted file mode 100644
index e668bfe07f..0000000000
--- a/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2021 Intel Corporation
- */
-
-#ifndef _PMD_CHACHA_POLY_PRIV_H_
-#define _PMD_CHACHA_POLY_PRIV_H_
-
-#include "ipsec_mb_private.h"
-
-#define CHACHA20_POLY1305_DIGEST_LENGTH 16
-
-static const
-struct rte_cryptodev_capabilities chacha20_poly1305_capabilities[] = {
- {/* CHACHA20-POLY1305 */
- .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
- {.sym = {
- .xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,
- {.aead = {
- .algo = RTE_CRYPTO_AEAD_CHACHA20_POLY1305,
- .block_size = 64,
- .key_size = {
- .min = 32,
- .max = 32,
- .increment = 0},
- .digest_size = {
- .min = 16,
- .max = 16,
- .increment = 0},
- .aad_size = {
- .min = 0,
- .max = 240,
- .increment = 1},
- .iv_size = {
- .min = 12,
- .max = 12,
- .increment = 0},
- },
- }
- },}
- },
- RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
-};
-
-uint8_t pmd_driver_id_chacha20_poly1305;
-
-#endif /* _PMD_CHACHA_POLY_PRIV_H_ */
diff --git a/drivers/crypto/ipsec_mb/pmd_kasumi.c b/drivers/crypto/ipsec_mb/pmd_kasumi.c
deleted file mode 100644
index f83539232d..0000000000
--- a/drivers/crypto/ipsec_mb/pmd_kasumi.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2016-2021 Intel Corporation
- */
-
-#include <bus_vdev_driver.h>
-#include <rte_common.h>
-#include <rte_cpuflags.h>
-#include <rte_cryptodev.h>
-#include <rte_hexdump.h>
-#include <rte_malloc.h>
-
-#include "pmd_kasumi_priv.h"
-#include "pmd_aesni_mb_priv.h"
-
-struct rte_cryptodev_ops kasumi_pmd_ops = {
- .dev_configure = ipsec_mb_config,
- .dev_start = ipsec_mb_start,
- .dev_stop = ipsec_mb_stop,
- .dev_close = ipsec_mb_close,
-
- .stats_get = ipsec_mb_stats_get,
- .stats_reset = ipsec_mb_stats_reset,
-
- .dev_infos_get = ipsec_mb_info_get,
-
- .queue_pair_setup = ipsec_mb_qp_setup,
- .queue_pair_release = ipsec_mb_qp_release,
-
- .sym_session_get_size = ipsec_mb_sym_session_get_size,
- .sym_session_configure = ipsec_mb_sym_session_configure,
- .sym_session_clear = ipsec_mb_sym_session_clear
-};
-
-struct rte_cryptodev_ops *rte_kasumi_pmd_ops = &kasumi_pmd_ops;
-
-static int
-kasumi_probe(struct rte_vdev_device *vdev)
-{
- return ipsec_mb_create(vdev, IPSEC_MB_PMD_TYPE_KASUMI);
-}
-
-static struct rte_vdev_driver cryptodev_kasumi_pmd_drv = {
- .probe = kasumi_probe,
- .remove = ipsec_mb_remove
-};
-
-static struct cryptodev_driver kasumi_crypto_drv;
-
-RTE_PMD_REGISTER_VDEV(CRYPTODEV_NAME_KASUMI_PMD, cryptodev_kasumi_pmd_drv);
-RTE_PMD_REGISTER_ALIAS(CRYPTODEV_NAME_KASUMI_PMD, cryptodev_kasumi_pmd);
-RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_KASUMI_PMD,
- "max_nb_queue_pairs=<int> socket_id=<int>");
-RTE_PMD_REGISTER_CRYPTO_DRIVER(kasumi_crypto_drv,
- cryptodev_kasumi_pmd_drv.driver,
- pmd_driver_id_kasumi);
-
-/* Constructor function to register kasumi PMD */
-RTE_INIT(ipsec_mb_register_kasumi)
-{
- struct ipsec_mb_internals *kasumi_data
- = &ipsec_mb_pmds[IPSEC_MB_PMD_TYPE_KASUMI];
-
- kasumi_data->caps = kasumi_capabilities;
- kasumi_data->dequeue_burst = aesni_mb_dequeue_burst;
- kasumi_data->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO
- | RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING
- | RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA
- | RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT
- | RTE_CRYPTODEV_FF_SYM_SESSIONLESS
- | RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT;
- kasumi_data->internals_priv_size = 0;
- kasumi_data->ops = &kasumi_pmd_ops;
- kasumi_data->qp_priv_size = sizeof(struct aesni_mb_qp_data);
- kasumi_data->session_configure = aesni_mb_session_configure;
- kasumi_data->session_priv_size = sizeof(struct aesni_mb_session);
-}
diff --git a/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h b/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h
deleted file mode 100644
index 3223cf1a14..0000000000
--- a/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2016-2021 Intel Corporation
- */
-
-#ifndef _PMD_KASUMI_PRIV_H_
-#define _PMD_KASUMI_PRIV_H_
-
-#include "ipsec_mb_private.h"
-
-#define KASUMI_KEY_LENGTH 16
-#define KASUMI_IV_LENGTH 8
-#define KASUMI_DIGEST_LENGTH 4
-
-uint8_t pmd_driver_id_kasumi;
-
-static const struct rte_cryptodev_capabilities kasumi_capabilities[] = {
- { /* KASUMI (F9) */
- .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
- {.sym = {
- .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
- {.auth = {
- .algo = RTE_CRYPTO_AUTH_KASUMI_F9,
- .block_size = 8,
- .key_size = {
- .min = KASUMI_KEY_LENGTH,
- .max = KASUMI_KEY_LENGTH,
- .increment = 0
- },
- .digest_size = {
- .min = KASUMI_DIGEST_LENGTH,
- .max = KASUMI_DIGEST_LENGTH,
- .increment = 0
- },
- .iv_size = { 0 }
- }, }
- }, }
- },
- { /* KASUMI (F8) */
- .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
- {.sym = {
- .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
- {.cipher = {
- .algo = RTE_CRYPTO_CIPHER_KASUMI_F8,
- .block_size = 8,
- .key_size = {
- .min = KASUMI_KEY_LENGTH,
- .max = KASUMI_KEY_LENGTH,
- .increment = 0
- },
- .iv_size = {
- .min = KASUMI_IV_LENGTH,
- .max = KASUMI_IV_LENGTH,
- .increment = 0
- }
- }, }
- }, }
- },
- RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
-};
-
-#endif /* _PMD_KASUMI_PRIV_H_ */
--
2.52.0
^ permalink raw reply related
* Re: [PATCH v2 4/5] eal: fix async IPC resource leaks on partial failure
From: Burakov, Anatoly @ 2026-06-03 8:28 UTC (permalink / raw)
To: Thomas Monjalon; +Cc: dev, Jianfeng Tan
In-Reply-To: <68rC0bdETzqwIkoItqSb_Q@monjalon.net>
On 6/1/2026 2:16 PM, Thomas Monjalon wrote:
> 29/05/2026 17:26, Anatoly Burakov:
>> Use a numeric request ID for alarm callback lookup so stale callbacks
>> from rolled-back requests become harmless no-ops.
> [...]
>> +static struct pending_request *
>> +find_pending_request_by_id(unsigned long id)
>> +{
>> + struct pending_request *r;
>> +
>> + TAILQ_FOREACH(r, &pending_requests.requests, next) {
>> + if (r->id == id)
>> + return r;
>> + }
>> +
>> + return NULL;
>> +}
>
> This function is supposed to find only async requests?
> What will happen if id wraparound and becomes 0,
> matching sync requests?
>
> I feel we should filter with r->type == REQUEST_TYPE_ASYNC
>
>
I mean it could happen if you submit `unsigned long` worth of IPC
requests, but I didn't think it was a problem that needed solving. But
sure, we can add an additional check.
--
Thanks,
Anatoly
^ permalink raw reply
* [PATCH v3] ethdev: support inline calculating masked item value
From: Bing Zhao @ 2026-06-03 8:19 UTC (permalink / raw)
To: viacheslavo, dev, rasland, stephen
Cc: orika, dsosnowski, suanmingm, matan, thomas
In-Reply-To: <20260213133143.22120-1-bingz@nvidia.com>
In the asynchronous API definition and some drivers, the
rte_flow_item spec value may not be calculated by the driver due to the
reason of speed of light rule insertion rate and sometimes the input
parameters will be copied and changed internally.
After copying, the spec and last will be protected by the keyword
const and cannot be changed in the code itself. And also the driver
needs some extra memory to do the calculation and extra conditions
to understand the length of each item spec. This is not efficient.
To solve the issue and support usage of the following fix, a new OP
was introduced to calculate the spec and last values after applying
the mask inline.
Signed-off-by: Bing Zhao <bingz@nvidia.com>
---
v3:
- add test code
- fix the issue found by AI
---
app/test/test_ethdev_api.c | 76 ++++++++++++++++++++++++++
doc/guides/rel_notes/release_26_07.rst | 6 ++
lib/ethdev/rte_flow.c | 46 ++++++++++++++--
lib/ethdev/rte_flow.h | 13 +++++
4 files changed, 135 insertions(+), 6 deletions(-)
diff --git a/app/test/test_ethdev_api.c b/app/test/test_ethdev_api.c
index 76afd0345c..5cae1cdc1d 100644
--- a/app/test/test_ethdev_api.c
+++ b/app/test/test_ethdev_api.c
@@ -4,6 +4,7 @@
#include <rte_log.h>
#include <rte_ethdev.h>
+#include <rte_flow.h>
#include <rte_test.h>
#include "test.h"
@@ -15,6 +16,80 @@
#define NUM_MBUF 1024
#define MBUF_CACHE_SIZE 256
+static int32_t
+ethdev_api_flow_conv_pattern_masked(void)
+{
+ const struct rte_flow_item_eth spec = {
+ .hdr.dst_addr.addr_bytes = { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06 },
+ .hdr.src_addr.addr_bytes = { 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f },
+ .hdr.ether_type = RTE_BE16(0x1234),
+ };
+ const struct rte_flow_item_eth last = {
+ .hdr.dst_addr.addr_bytes = { 0x11, 0x12, 0x13, 0x14, 0x15, 0x16 },
+ .hdr.src_addr.addr_bytes = { 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f },
+ .hdr.ether_type = RTE_BE16(0x5678),
+ };
+ const struct rte_flow_item_eth mask = {
+ .hdr.dst_addr.addr_bytes = { 0xff, 0xff, 0x00, 0x00, 0xff, 0xff },
+ .hdr.src_addr.addr_bytes = { 0xff, 0x00, 0xff, 0x00, 0xff, 0x00 },
+ .hdr.ether_type = RTE_BE16(0xffff),
+ };
+ const struct rte_flow_item pattern[] = {
+ {
+ .type = RTE_FLOW_ITEM_TYPE_ETH,
+ .spec = &spec,
+ .last = &last,
+ .mask = &mask,
+ },
+ { .type = RTE_FLOW_ITEM_TYPE_END },
+ };
+ union {
+ struct rte_flow_item item;
+ struct rte_flow_item_eth eth;
+ double align;
+ uint8_t raw[256];
+ } dst;
+ const struct rte_flow_item *item;
+ const struct rte_flow_item_eth *conv_spec;
+ const struct rte_flow_item_eth *conv_last;
+ int ret;
+
+ ret = rte_flow_conv(RTE_FLOW_CONV_OP_PATTERN_MASKED, NULL, 0, pattern, NULL);
+ TEST_ASSERT(ret > 0, "Masked pattern conversion size query failed");
+ TEST_ASSERT((size_t)ret <= sizeof(dst.raw),
+ "Masked pattern conversion needs too much storage");
+
+ memset(&dst, 0, sizeof(dst));
+ ret = rte_flow_conv(RTE_FLOW_CONV_OP_PATTERN_MASKED, dst.raw,
+ sizeof(dst.raw), pattern, NULL);
+ TEST_ASSERT(ret > 0, "Masked pattern conversion failed");
+
+ item = (const struct rte_flow_item *)dst.raw;
+ conv_spec = item[0].spec;
+ conv_last = item[0].last;
+ TEST_ASSERT_NOT_NULL(conv_spec, "Converted spec must be set");
+ TEST_ASSERT_NOT_NULL(conv_last, "Converted last must be set");
+
+ TEST_ASSERT_EQUAL(conv_spec->hdr.dst_addr.addr_bytes[0], 0x01,
+ "Masked spec dst byte 0 mismatch");
+ TEST_ASSERT_EQUAL(conv_spec->hdr.dst_addr.addr_bytes[2], 0x00,
+ "Masked spec dst byte 2 mismatch");
+ TEST_ASSERT_EQUAL(conv_spec->hdr.src_addr.addr_bytes[1], 0x00,
+ "Masked spec src byte 1 mismatch");
+ TEST_ASSERT_EQUAL(conv_spec->hdr.ether_type, RTE_BE16(0x1234),
+ "Masked spec ether type mismatch");
+ TEST_ASSERT_EQUAL(conv_last->hdr.dst_addr.addr_bytes[0], 0x11,
+ "Masked last dst byte 0 mismatch");
+ TEST_ASSERT_EQUAL(conv_last->hdr.dst_addr.addr_bytes[2], 0x00,
+ "Masked last dst byte 2 mismatch");
+ TEST_ASSERT_EQUAL(conv_last->hdr.src_addr.addr_bytes[1], 0x00,
+ "Masked last src byte 1 mismatch");
+ TEST_ASSERT_EQUAL(conv_last->hdr.ether_type, RTE_BE16(0x5678),
+ "Masked last ether type mismatch");
+
+ return TEST_SUCCESS;
+}
+
static int32_t
ethdev_api_queue_status(void)
{
@@ -167,6 +242,7 @@ static struct unit_test_suite ethdev_api_testsuite = {
.setup = NULL,
.teardown = NULL,
.unit_test_cases = {
+ TEST_CASE(ethdev_api_flow_conv_pattern_masked),
TEST_CASE(ethdev_api_queue_status),
/* TODO: Add deferred_start queue status test */
TEST_CASES_END() /**< NULL terminate unit test array */
diff --git a/doc/guides/rel_notes/release_26_07.rst b/doc/guides/rel_notes/release_26_07.rst
index 8b4f8401e2..46a83cfea5 100644
--- a/doc/guides/rel_notes/release_26_07.rst
+++ b/doc/guides/rel_notes/release_26_07.rst
@@ -116,6 +116,12 @@ API Changes
Also, make sure to start the actual text at the margin.
=======================================================
+* ethdev: Added masked pattern conversion.
+
+ Added ``RTE_FLOW_CONV_OP_PATTERN_MASKED`` to ``rte_flow_conv()``
+ to copy an entire pattern while applying each item's mask to its
+ ``spec`` and ``last`` fields.
+
ABI Changes
-----------
diff --git a/lib/ethdev/rte_flow.c b/lib/ethdev/rte_flow.c
index 7a51b667cf..7cf9f6f6f3 100644
--- a/lib/ethdev/rte_flow.c
+++ b/lib/ethdev/rte_flow.c
@@ -178,6 +178,14 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = {
MK_FLOW_ITEM(COMPARE, sizeof(struct rte_flow_item_compare)),
};
+static inline size_t
+rte_flow_conv_item_mask_size(const struct rte_flow_item *item)
+{
+ if ((int)item->type >= 0)
+ return rte_flow_desc_item[item->type].size;
+ return sizeof(void *);
+}
+
/** Generate flow_action[] entry. */
#define MK_FLOW_ACTION(t, s) \
[RTE_FLOW_ACTION_TYPE_ ## t] = { \
@@ -835,6 +843,8 @@ rte_flow_conv_action_conf(void *buf, const size_t size,
* RTE_FLOW_ITEM_TYPE_END is encountered.
* @param[out] error
* Perform verbose error reporting if not NULL.
+ * @param[in] with_mask
+ * If true, @p src mask will be applied to spec and last.
*
* @return
* A positive value representing the number of bytes needed to store
@@ -847,12 +857,13 @@ rte_flow_conv_pattern(struct rte_flow_item *dst,
const size_t size,
const struct rte_flow_item *src,
unsigned int num,
+ bool with_mask,
struct rte_flow_error *error)
{
uintptr_t data = (uintptr_t)dst;
size_t off;
size_t ret;
- unsigned int i;
+ unsigned int i, j;
for (i = 0, off = 0; !num || i != num; ++i, ++src, ++dst) {
/**
@@ -876,15 +887,27 @@ rte_flow_conv_pattern(struct rte_flow_item *dst,
src -= num;
dst -= num;
do {
+ uint8_t *c_spec = NULL, *c_last = NULL;
+ const uint8_t *mask = src->mask;
+ size_t item_mask_size = mask ? rte_flow_conv_item_mask_size(src) : 0;
+
if (src->spec) {
off = RTE_ALIGN_CEIL(off, sizeof(double));
ret = rte_flow_conv_item_spec
((void *)(data + off),
size > off ? size - off : 0, src,
RTE_FLOW_CONV_ITEM_SPEC);
- if (size && size >= off + ret)
+ if (size && size >= off + ret) {
dst->spec = (void *)(data + off);
+ c_spec = (uint8_t *)(data + off);
+ }
off += ret;
+ if (with_mask && c_spec && mask) {
+ size_t mask_size = RTE_MIN(ret, item_mask_size);
+
+ for (j = 0; j < mask_size; j++)
+ c_spec[j] &= mask[j];
+ }
}
if (src->last) {
@@ -893,9 +916,17 @@ rte_flow_conv_pattern(struct rte_flow_item *dst,
((void *)(data + off),
size > off ? size - off : 0, src,
RTE_FLOW_CONV_ITEM_LAST);
- if (size && size >= off + ret)
+ if (size && size >= off + ret) {
dst->last = (void *)(data + off);
+ c_last = (uint8_t *)(data + off);
+ }
off += ret;
+ if (with_mask && c_last && mask) {
+ size_t mask_size = RTE_MIN(ret, item_mask_size);
+
+ for (j = 0; j < mask_size; j++)
+ c_last[j] &= mask[j];
+ }
}
if (src->mask) {
off = RTE_ALIGN_CEIL(off, sizeof(double));
@@ -1042,7 +1073,7 @@ rte_flow_conv_rule(struct rte_flow_conv_rule *dst,
off = RTE_ALIGN_CEIL(off, sizeof(double));
ret = rte_flow_conv_pattern((void *)((uintptr_t)dst + off),
size > off ? size - off : 0,
- src->pattern_ro, 0, error);
+ src->pattern_ro, 0, false, error);
if (ret < 0)
return ret;
if (size && size >= off + (size_t)ret)
@@ -1143,7 +1174,7 @@ rte_flow_conv(enum rte_flow_conv_op op,
ret = sizeof(*attr);
break;
case RTE_FLOW_CONV_OP_ITEM:
- ret = rte_flow_conv_pattern(dst, size, src, 1, error);
+ ret = rte_flow_conv_pattern(dst, size, src, 1, false, error);
break;
case RTE_FLOW_CONV_OP_ITEM_MASK:
item = src;
@@ -1158,7 +1189,7 @@ rte_flow_conv(enum rte_flow_conv_op op,
ret = rte_flow_conv_actions(dst, size, src, 1, error);
break;
case RTE_FLOW_CONV_OP_PATTERN:
- ret = rte_flow_conv_pattern(dst, size, src, 0, error);
+ ret = rte_flow_conv_pattern(dst, size, src, 0, false, error);
break;
case RTE_FLOW_CONV_OP_ACTIONS:
ret = rte_flow_conv_actions(dst, size, src, 0, error);
@@ -1178,6 +1209,9 @@ rte_flow_conv(enum rte_flow_conv_op op,
case RTE_FLOW_CONV_OP_ACTION_NAME_PTR:
ret = rte_flow_conv_name(1, 1, dst, size, src, error);
break;
+ case RTE_FLOW_CONV_OP_PATTERN_MASKED:
+ ret = rte_flow_conv_pattern(dst, size, src, 0, true, error);
+ break;
default:
ret = rte_flow_error_set
(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
diff --git a/lib/ethdev/rte_flow.h b/lib/ethdev/rte_flow.h
index ba3bcc89a3..f3102f4bb0 100644
--- a/lib/ethdev/rte_flow.h
+++ b/lib/ethdev/rte_flow.h
@@ -4558,6 +4558,19 @@ enum rte_flow_conv_op {
* @code const char ** @endcode
*/
RTE_FLOW_CONV_OP_ACTION_NAME_PTR,
+
+ /**
+ * Convert an entire pattern.
+ *
+ * Duplicates all pattern items at once, applying @p mask to @p spec
+ * and @p last.
+ *
+ * - @p src type:
+ * @code const struct rte_flow_item * @endcode
+ * - @p dst type:
+ * @code struct rte_flow_item * @endcode
+ */
+ RTE_FLOW_CONV_OP_PATTERN_MASKED,
};
/**
--
2.34.1
^ permalink raw reply related
* RE: [PATCH v2] app/test-pmd: add generic PROG action parser support
From: Konstantin Ananyev @ 2026-06-03 6:53 UTC (permalink / raw)
To: Ajmera, Megha, Stephen Hemminger
Cc: Richardson, Bruce, Dumitrescu, Cristian, Shetty, Praveen,
Singh, Aman Deep, dev@dpdk.org
In-Reply-To: <MW4PR11MB589283F734826ED3A83EBC9B97122@MW4PR11MB5892.namprd11.prod.outlook.com>
> > Ok, so it is predefined by the FW.
> > Then shouldn't CPFL PG contain a list of supported PROGs and their arguments?
> > Again, some tests/examples for it with testpmd/DTS.
> > Or that's all will be the next step (patch-series)?
> >
> For now, this can be independent patch since it only enable parsing in test-pmd.
> With this change one can use and test PROG actions for PMDs.
Well, right now there is simply no way for the user to test/try this functionality.
Usual requirement for introducing new HW/SW feature for DPDK:
1) provide at least one implementation (exist, cpfl)
2) provide some test cases for it (app/test-pmd, app/test, ...)
3) document it properly - what prog/args are supported for each HW, etc.
#2 and #3 are missing completely - which means that for DPDK community
that functionality is sort of dead code.
TBH, I think it shouldn't be accepted at all at first place in such incomplete stage.
Konstantin
^ permalink raw reply
* [PATCH v8 14/20] net/sxe2: implement get monitor address
From: liujie5 @ 2026-06-03 6:29 UTC (permalink / raw)
To: stephen; +Cc: dev, Jie Liu
In-Reply-To: <20260603062945.1253672-1-liujie5@linkdatatechnology.com>
From: Jie Liu <liujie5@linkdatatechnology.com>
This patch implements the 'get_monitor_addr' ethdev ops in the sxe2
PMD. This interface allows the Ethernet device to provide the
address of the next expected Rx descriptor to the power management
library.
The implementation calculates the address of the next Rx descriptor
based on the receive queue's current hardware ring position and
descriptor size. Applications can then use this address with
rte_power_monitor() to put the CPU into a low-power state until
new packets are written to the descriptor by the hardware.
Signed-off-by: Jie Liu <liujie5@linkdatatechnology.com>
---
drivers/net/sxe2/sxe2_ethdev.c | 2 ++
drivers/net/sxe2/sxe2_rx.c | 21 +++++++++++++++++++++
drivers/net/sxe2/sxe2_rx.h | 2 ++
3 files changed, 25 insertions(+)
diff --git a/drivers/net/sxe2/sxe2_ethdev.c b/drivers/net/sxe2/sxe2_ethdev.c
index 215ae772b5..45e245740b 100644
--- a/drivers/net/sxe2/sxe2_ethdev.c
+++ b/drivers/net/sxe2/sxe2_ethdev.c
@@ -184,6 +184,8 @@ static const struct eth_dev_ops sxe2_eth_dev_ops = {
.queue_stats_mapping_set = sxe2_queue_stats_mapping_set,
.fw_version_get = sxe2_fw_version_string_get,
+
+ .get_monitor_addr = sxe2_get_monitor_addr,
};
static int32_t sxe2_dev_configure(struct rte_eth_dev *dev)
diff --git a/drivers/net/sxe2/sxe2_rx.c b/drivers/net/sxe2/sxe2_rx.c
index 007192c7d8..79e65cfbf1 100644
--- a/drivers/net/sxe2/sxe2_rx.c
+++ b/drivers/net/sxe2/sxe2_rx.c
@@ -557,3 +557,24 @@ void __rte_cold sxe2_rxqs_all_stop(struct rte_eth_dev *dev)
}
}
}
+
+static int32_t sxe2_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t dd_state = rte_cpu_to_le_64(SXE2_RX_DESC_STATUS_DD_MASK);
+ return (value & dd_state) == dd_state ? -1 : 0;
+}
+
+int32_t sxe2_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
+{
+ volatile union sxe2_rx_desc *rxdp;
+ struct sxe2_rx_queue *rxq = (struct sxe2_rx_queue *)rx_queue;
+
+ rxdp = &rxq->desc_ring[rxq->processing_idx];
+
+ pmc->addr = &rxdp->wb.status_err_ptype_len;
+ pmc->fn = sxe2_monitor_callback;
+ pmc->size = sizeof(uint16_t);
+
+ return 0;
+}
diff --git a/drivers/net/sxe2/sxe2_rx.h b/drivers/net/sxe2/sxe2_rx.h
index 295d9005e0..c2582bc571 100644
--- a/drivers/net/sxe2/sxe2_rx.h
+++ b/drivers/net/sxe2/sxe2_rx.h
@@ -29,4 +29,6 @@ int32_t __rte_cold sxe2_rxqs_all_start(struct rte_eth_dev *dev);
void __rte_cold sxe2_rxqs_all_stop(struct rte_eth_dev *dev);
+int32_t sxe2_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc);
+
#endif /* SXE2_RX_H */
--
2.52.0
^ permalink raw reply related
* [PATCH v8 12/20] net/sxe2: add support for custom UDP tunnel ports
From: liujie5 @ 2026-06-03 6:29 UTC (permalink / raw)
To: stephen; +Cc: dev, Jie Liu
In-Reply-To: <20260603062945.1253672-1-liujie5@linkdatatechnology.com>
From: Jie Liu <liujie5@linkdatatechnology.com>
This patch enables the configuration of custom UDP port numbers for
tunneling protocols in the SXE2 PMD.
The change includes:
- Adding a new entry in the tunnel port lookup table.
- Updating the hardware profile to recognize
the custom UDP port as a tunnel type.
- Enabling inner header parsing for packets arriving on these ports.
This allows the Switch module to correctly apply recipes based on
inner packet fields (e.g., inner MAC or IP).
Signed-off-by: Jie Liu <liujie5@linkdatatechnology.com>
---
drivers/net/sxe2/sxe2_cmd_chnl.c | 96 ++++++++++
drivers/net/sxe2/sxe2_cmd_chnl.h | 17 ++
drivers/net/sxe2/sxe2_drv_cmd.h | 16 ++
drivers/net/sxe2/sxe2_ethdev.c | 206 ++++++++++++++++++++-
drivers/net/sxe2/sxe2_ethdev.h | 12 ++
drivers/net/sxe2/sxe2_flow.c | 54 ++++++
drivers/net/sxe2/sxe2_flow.h | 3 +-
drivers/net/sxe2/sxe2_flow_define.h | 1 +
drivers/net/sxe2/sxe2_flow_parse_pattern.c | 113 +++++++++++
drivers/net/sxe2/sxe2_flow_parse_pattern.h | 6 +
drivers/net/sxe2/sxe2_txrx_poll.c | 46 ++++-
11 files changed, 566 insertions(+), 4 deletions(-)
diff --git a/drivers/net/sxe2/sxe2_cmd_chnl.c b/drivers/net/sxe2/sxe2_cmd_chnl.c
index 6e2dd139a5..926eaee062 100644
--- a/drivers/net/sxe2/sxe2_cmd_chnl.c
+++ b/drivers/net/sxe2/sxe2_cmd_chnl.c
@@ -1455,6 +1455,102 @@ int32_t sxe2_drv_ipsec_txsa_delete(struct sxe2_adapter *adapter,
return ret;
}
+int32_t sxe2_drv_udp_tunnel_add(struct sxe2_adapter *adapter,
+ enum sxe2_udp_tunnel_protocol tunnel_proto,
+ uint16_t udp_port)
+{
+ struct sxe2_common_device *cdev = adapter->cdev;
+ struct sxe2_drv_udp_tunnel_req req = {};
+ struct sxe2_drv_cmd_params cmd = {};
+ int32_t ret = -1;
+
+ req.type = tunnel_proto;
+ req.port = udp_port;
+ sxe2_drv_cmd_params_fill(adapter, &cmd, SXE2_DRV_CMD_UDPTUNNEL_ADD,
+ &req, sizeof(req),
+ NULL, 0);
+ ret = sxe2_drv_cmd_exec(cdev, &cmd);
+ if (ret)
+ PMD_LOG_ERR(DRV, "Failed to add udp proto %d port %d, ret=%d",
+ tunnel_proto, udp_port, ret);
+
+ return ret;
+}
+
+int32_t sxe2_drv_udp_tunnel_del(struct sxe2_adapter *adapter,
+ enum sxe2_udp_tunnel_protocol tunnel_proto,
+ uint16_t udp_port)
+{
+ struct sxe2_common_device *cdev = adapter->cdev;
+ struct sxe2_drv_udp_tunnel_req req = {};
+ struct sxe2_drv_cmd_params cmd = {};
+ int32_t ret = -1;
+
+ req.type = tunnel_proto;
+ req.port = udp_port;
+ sxe2_drv_cmd_params_fill(adapter, &cmd, SXE2_DRV_CMD_UDPTUNNEL_DEL,
+ &req, sizeof(req),
+ NULL, 0);
+ ret = sxe2_drv_cmd_exec(cdev, &cmd);
+ if (ret)
+ PMD_LOG_ERR(DRV, "Failed to del udp proto %d port %d, ret=%d",
+ tunnel_proto, udp_port, ret);
+
+ return ret;
+}
+
+int32_t sxe2_drv_get_udp_tunnel_port(struct sxe2_adapter *adapter,
+ enum sxe2_flow_udp_tunnel_protocol proto,
+ uint16_t *port)
+{
+ int32_t ret = 0;
+ static const uint16_t flow_proto_to_udp_tunnel_proto[SXE2_FLOW_UDP_TUNNEL_MAX] = {
+ [SXE2_FLOW_UDP_TUNNEL_PROTOCOL_VXLAN] = SXE2_UDP_TUNNEL_PROTOCOL_VXLAN,
+ [SXE2_FLOW_UDP_TUNNEL_PROTOCOL_VXLAN_GPE] = SXE2_UDP_TUNNEL_PROTOCOL_VXLAN_GPE,
+ [SXE2_FLOW_UDP_TUNNEL_PROTOCOL_GENEVE] = SXE2_UDP_TUNNEL_PROTOCOL_GENEVE,
+ [SXE2_FLOW_UDP_TUNNEL_PROTOCOL_GTP_U] = SXE2_UDP_TUNNEL_PROTOCOL_GTP_U,
+ [SXE2_FLOW_UDP_TUNNEL_PROTOCOL_NVGRE] = SXE2_UDP_TUNNEL_PROTOCOL_NVGRE,
+ };
+ struct sxe2_udp_tunnel_cfg tunnel_config = {};
+
+ tunnel_config.protocol = flow_proto_to_udp_tunnel_proto[proto];
+ ret = sxe2_drv_udp_tunnel_get(adapter, &tunnel_config);
+ if (ret) {
+ PMD_DEV_LOG_ERR(adapter, DRV, "Failed to get udp tunnel port, ret=%d", ret);
+ goto l_end;
+ }
+
+ *port = tunnel_config.fw_port;
+l_end:
+ return ret;
+}
+
+int32_t sxe2_drv_udp_tunnel_get(struct sxe2_adapter *adapter,
+ struct sxe2_udp_tunnel_cfg *tunnel_config)
+{
+ struct sxe2_common_device *cdev = adapter->cdev;
+ struct sxe2_drv_udp_tunnel_req req = {};
+ struct sxe2_drv_udp_tunnel_resp resp = {};
+ struct sxe2_drv_cmd_params cmd = {};
+ int32_t ret = -1;
+
+ req.type = tunnel_config->protocol;
+ sxe2_drv_cmd_params_fill(adapter, &cmd, SXE2_DRV_CMD_UDPTUNNEL_GET,
+ &req, sizeof(req),
+ &resp, sizeof(resp));
+ ret = sxe2_drv_cmd_exec(cdev, &cmd);
+ if (ret)
+ PMD_LOG_ERR(DRV, "Failed to get udp proto %d port, ret=%d", req.type, ret);
+
+ tunnel_config->fw_port = resp.port;
+ tunnel_config->fw_status = resp.enable;
+ tunnel_config->fw_dst_en = resp.dst;
+ tunnel_config->fw_src_en = resp.src;
+ tunnel_config->fw_used = resp.fw_used;
+
+ return ret;
+}
+
int32_t sxe2_drv_queue_info_get_update(struct sxe2_adapter *adapter, struct eth_queue_stats *qstats)
{
struct sxe2_drv_cmd_params param = {0};
diff --git a/drivers/net/sxe2/sxe2_cmd_chnl.h b/drivers/net/sxe2/sxe2_cmd_chnl.h
index 52cd9922ad..97007c7cfa 100644
--- a/drivers/net/sxe2/sxe2_cmd_chnl.h
+++ b/drivers/net/sxe2/sxe2_cmd_chnl.h
@@ -67,6 +67,23 @@ int32_t sxe2_drv_ipsec_txsa_delete(struct sxe2_adapter *adapter,
int32_t sxe2_drv_promisc_config(struct sxe2_adapter *adapter, bool set);
+int32_t sxe2_drv_udp_tunnel_add(struct sxe2_adapter *adapter,
+ enum sxe2_udp_tunnel_protocol tunnel_proto,
+ uint16_t udp_port);
+
+int32_t sxe2_drv_udp_tunnel_del(struct sxe2_adapter *adapter,
+ enum sxe2_udp_tunnel_protocol tunnel_proto,
+ uint16_t udp_port);
+
+int32_t sxe2_drv_udp_tunnel_get(struct sxe2_adapter *adapter,
+ struct sxe2_udp_tunnel_cfg *tunnel_config);
+
+int32_t sxe2_drv_get_udp_tunnel_port(struct sxe2_adapter *adapter,
+ enum sxe2_flow_udp_tunnel_protocol proto,
+ uint16_t *port);
+
+int32_t sxe2_drv_vsi_info_get(struct sxe2_adapter *adapter, struct sxe2_vsi *vsi);
+
int32_t sxe2_drv_vsi_info_get(struct sxe2_adapter *adapter, struct sxe2_vsi *vsi);
int32_t sxe2_drv_mac_link_status_get(struct sxe2_adapter *adapter);
diff --git a/drivers/net/sxe2/sxe2_drv_cmd.h b/drivers/net/sxe2/sxe2_drv_cmd.h
index 9db8cb1ad1..9b18365cb8 100644
--- a/drivers/net/sxe2/sxe2_drv_cmd.h
+++ b/drivers/net/sxe2/sxe2_drv_cmd.h
@@ -617,6 +617,22 @@ struct __rte_aligned(4) __rte_packed_begin sxe2_drv_flow_fnav_query_stat_resp {
uint64_t stat_bytes;
} __rte_packed_end;
+struct __rte_aligned(4) __rte_packed_begin sxe2_drv_udp_tunnel_req {
+ uint8_t type;
+ uint8_t rsv;
+ uint16_t port;
+} __rte_packed_end;
+
+struct __rte_aligned(4) __rte_packed_begin sxe2_drv_udp_tunnel_resp {
+ uint8_t type;
+ uint8_t enable;
+ uint8_t dst;
+ uint8_t src;
+ uint16_t port;
+ uint8_t fw_used;
+ uint8_t rsv;
+} __rte_packed_end;
+
enum sxe2_drv_cmd_module {
SXE2_DRV_CMD_MODULE_HANDSHAKE = 0,
SXE2_DRV_CMD_MODULE_DEV = 1,
diff --git a/drivers/net/sxe2/sxe2_ethdev.c b/drivers/net/sxe2/sxe2_ethdev.c
index 317101fb60..14c8f6c16d 100644
--- a/drivers/net/sxe2/sxe2_ethdev.c
+++ b/drivers/net/sxe2/sxe2_ethdev.c
@@ -40,10 +40,11 @@
#include "sxe2_ioctl_chnl_func.h"
#include "sxe2_ethdev_repr.h"
#include "sxe2vf_regs.h"
+#include "sxe2_switchdev.h"
#define SXE2_PCI_VENDOR_ID_1 0x1ff2
#define SXE2_PCI_DEVICE_ID_PF_1 0x10b1
-#define SXE2_PCI_DEVICE_ID_VF_1 0x10b2
+#define SXE2_PCI_DEVICE_ID_VF_1 0x10b
#define SXE2_PCI_VENDOR_ID_2 0x1d94
#define SXE2_PCI_DEVICE_ID_PF_2 0x1260
@@ -115,6 +116,11 @@ static int32_t sxe2_dev_close(struct rte_eth_dev *dev);
static int32_t sxe2_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info);
static const uint32_t *sxe2_buffer_split_supported_hdr_ptypes_get(struct rte_eth_dev *dev
__rte_unused, size_t *no_of_elements __rte_unused);
+static int32_t sxe2_udp_tunnel_port_add(struct rte_eth_dev *dev,
+ struct rte_eth_udp_tunnel *tunnel_udp);
+static int32_t sxe2_udp_tunnel_port_del(struct rte_eth_dev *dev,
+ struct rte_eth_udp_tunnel *tunnel_udp);
+
static const struct eth_dev_ops sxe2_eth_dev_ops = {
.dev_configure = sxe2_dev_configure,
@@ -162,6 +168,9 @@ static const struct eth_dev_ops sxe2_eth_dev_ops = {
.rss_hash_update = sxe2_dev_rss_hash_update,
.rss_hash_conf_get = sxe2_dev_rss_hash_conf_get,
+ .udp_tunnel_port_add = sxe2_udp_tunnel_port_add,
+ .udp_tunnel_port_del = sxe2_udp_tunnel_port_del,
+
.flow_ops_get = sxe2_flow_ops_get,
.tm_ops_get = sxe2_tm_ops_get,
@@ -226,6 +235,12 @@ static int32_t sxe2_dev_start(struct rte_eth_dev *dev)
struct sxe2_adapter *adapter = SXE2_DEV_PRIVATE_TO_ADAPTER(dev);
PMD_INIT_FUNC_TRACE();
+ ret = sxe2_flow_init_udp_tunnel_port(dev);
+ if (ret) {
+ PMD_LOG_ERR(DRV, "Failed to init udp tunnel port, ret: %d.", ret);
+ goto l_end;
+ }
+
ret = sxe2_queues_init(dev);
if (ret) {
PMD_LOG_ERR(INIT, "Failed to init queues.");
@@ -271,6 +286,188 @@ static int32_t sxe2_dev_start(struct rte_eth_dev *dev)
return ret;
}
+static enum sxe2_udp_tunnel_protocol
+sxe2_udp_tunnel_type_rte_to_sxe2(enum rte_eth_tunnel_type rte_type)
+{
+ static enum sxe2_udp_tunnel_protocol sxe2_udp_proto_map[RTE_ETH_TUNNEL_TYPE_MAX] = {
+ [RTE_ETH_TUNNEL_TYPE_NONE] = SXE2_UDP_TUNNEL_MAX,
+ [RTE_ETH_TUNNEL_TYPE_VXLAN] = SXE2_UDP_TUNNEL_PROTOCOL_VXLAN,
+ [RTE_ETH_TUNNEL_TYPE_GENEVE] = SXE2_UDP_TUNNEL_PROTOCOL_GENEVE,
+ [RTE_ETH_TUNNEL_TYPE_TEREDO] = SXE2_UDP_TUNNEL_PROTOCOL_TEREDO,
+ [RTE_ETH_TUNNEL_TYPE_NVGRE] = SXE2_UDP_TUNNEL_PROTOCOL_NVGRE,
+ [RTE_ETH_TUNNEL_TYPE_IP_IN_GRE] = SXE2_UDP_TUNNEL_MAX,
+ [RTE_ETH_L2_TUNNEL_TYPE_E_TAG] = SXE2_UDP_TUNNEL_MAX,
+ [RTE_ETH_TUNNEL_TYPE_VXLAN_GPE] = SXE2_UDP_TUNNEL_PROTOCOL_VXLAN_GPE,
+ [RTE_ETH_TUNNEL_TYPE_ECPRI] = SXE2_UDP_TUNNEL_PROTOCOL_ECPRI
+ };
+
+ if (rte_type >= RTE_ETH_TUNNEL_TYPE_MAX) {
+ PMD_LOG_ERR(DRV, "Invalid rte_eth_tunnel_type %d!", rte_type);
+ rte_type = RTE_ETH_TUNNEL_TYPE_NONE;
+ }
+
+ return sxe2_udp_proto_map[rte_type];
+}
+
+int32_t sxe2_udp_tunnel_port_add_common(struct sxe2_adapter *ad,
+ enum sxe2_udp_tunnel_protocol tunnel_proto,
+ uint16_t udp_port)
+{
+ struct sxe2_udp_tunnel_cfg *tunnel_config;
+ int32_t ret = -1;
+
+ rte_spinlock_lock(&ad->udp_tunnel_ctx.lock);
+
+ tunnel_config = &ad->udp_tunnel_ctx.tunnel_conf[tunnel_proto];
+
+ if (tunnel_config->dev_status == SXE2_UDP_TUNNEL_ENABLE) {
+ if (udp_port == tunnel_config->dev_port &&
+ tunnel_config->dev_ref_cnt < 0xFFFFU) {
+ tunnel_config->dev_ref_cnt++;
+ ret = 0;
+ goto l_unlock_end;
+ } else {
+ PMD_LOG_ERR(DRV, "Adding multiple ports to the same protocol "
+ "is not supported!");
+ ret = -EINVAL;
+ goto l_unlock_end;
+ }
+ } else {
+ ret = sxe2_drv_udp_tunnel_add(ad, tunnel_proto, udp_port);
+ if (ret != 0)
+ goto l_unlock_end;
+
+ tunnel_config->protocol = tunnel_proto;
+ tunnel_config->dev_port = udp_port;
+ tunnel_config->dev_status = SXE2_UDP_TUNNEL_ENABLE;
+ tunnel_config->dev_ref_cnt++;
+ }
+
+l_unlock_end:
+ rte_spinlock_unlock(&ad->udp_tunnel_ctx.lock);
+ return ret;
+}
+
+int32_t sxe2_udp_tunnel_port_del_common(struct sxe2_adapter *ad,
+ enum sxe2_udp_tunnel_protocol tunnel_proto,
+ uint16_t udp_port)
+{
+ struct sxe2_udp_tunnel_cfg *tunnel_config;
+ int32_t ret = -1;
+
+ rte_spinlock_lock(&ad->udp_tunnel_ctx.lock);
+ tunnel_config = &ad->udp_tunnel_ctx.tunnel_conf[tunnel_proto];
+
+ if (tunnel_config->dev_status == SXE2_UDP_TUNNEL_ENABLE &&
+ udp_port == tunnel_config->dev_port) {
+ if (tunnel_config->dev_ref_cnt > 1) {
+ tunnel_config->dev_ref_cnt--;
+ ret = 0;
+ goto l_unlock_end;
+ } else {
+ ret = sxe2_drv_udp_tunnel_del(ad, tunnel_proto, udp_port);
+ if (ret != 0)
+ goto l_unlock_end;
+
+ tunnel_config->dev_status = SXE2_UDP_TUNNEL_DISABLE;
+ tunnel_config->dev_ref_cnt = 0;
+ }
+ goto l_unlock_end;
+ }
+
+ ret = -EINVAL;
+
+l_unlock_end:
+ rte_spinlock_unlock(&ad->udp_tunnel_ctx.lock);
+ return ret;
+}
+
+int32_t sxe2_udp_tunnel_port_get_common(struct sxe2_adapter *ad,
+ struct sxe2_udp_tunnel_cfg *tunnel_config)
+{
+ return sxe2_drv_udp_tunnel_get(ad, tunnel_config);
+}
+
+static int32_t sxe2_udp_tunnel_port_clear(struct rte_eth_dev *dev)
+{
+ struct sxe2_adapter *ad = SXE2_DEV_PRIVATE_TO_ADAPTER(dev);
+ struct sxe2_udp_tunnel_cfg *tunnel_config;
+ int32_t ret = 0;
+ uint16_t tunnel_proto = 0;
+
+ rte_spinlock_lock(&ad->udp_tunnel_ctx.lock);
+
+ for (tunnel_proto = 0; tunnel_proto < SXE2_UDP_TUNNEL_MAX; tunnel_proto++) {
+ tunnel_config = &ad->udp_tunnel_ctx.tunnel_conf[tunnel_proto];
+ if (tunnel_config->dev_status == SXE2_UDP_TUNNEL_ENABLE) {
+ ret = sxe2_drv_udp_tunnel_del(ad, tunnel_config->protocol,
+ tunnel_config->dev_port);
+ if (ret) {
+ PMD_LOG_ERR(DRV, "Failed to delete udp tunnel port %d, proto %d",
+ tunnel_config->dev_port, tunnel_config->protocol);
+ goto l_unlock_end;
+ }
+
+ tunnel_config->dev_status = SXE2_UDP_TUNNEL_DISABLE;
+ tunnel_config->dev_ref_cnt = 0;
+ }
+ }
+l_unlock_end:
+ rte_spinlock_unlock(&ad->udp_tunnel_ctx.lock);
+ return ret;
+}
+
+static int32_t sxe2_udp_tunnel_port_add(struct rte_eth_dev *dev,
+ struct rte_eth_udp_tunnel *tunnel_udp)
+{
+ int32_t ret = 0;
+ enum sxe2_udp_tunnel_protocol tunnel_proto;
+ struct sxe2_adapter *ad = SXE2_DEV_PRIVATE_TO_ADAPTER(dev);
+
+ if (tunnel_udp->udp_port == 0) {
+ ret = -EINVAL;
+ goto l_end;
+ }
+
+ tunnel_proto = sxe2_udp_tunnel_type_rte_to_sxe2(tunnel_udp->prot_type);
+ if (tunnel_proto >= SXE2_UDP_TUNNEL_MAX) {
+ ret = -EINVAL;
+ goto l_end;
+ }
+
+ ret = sxe2_udp_tunnel_port_add_common(ad, tunnel_proto, tunnel_udp->udp_port);
+ if (ret) {
+ PMD_LOG_ERR(DRV, "Add tunnel port failed, ret = %d", ret);
+ goto l_end;
+ }
+
+l_end:
+ return ret;
+}
+
+static int32_t sxe2_udp_tunnel_port_del(struct rte_eth_dev *dev,
+ struct rte_eth_udp_tunnel *tunnel_udp)
+{
+ int32_t ret = 0;
+ enum sxe2_udp_tunnel_protocol tunnel_proto;
+ struct sxe2_adapter *ad = SXE2_DEV_PRIVATE_TO_ADAPTER(dev);
+
+ tunnel_proto = sxe2_udp_tunnel_type_rte_to_sxe2(tunnel_udp->prot_type);
+ if (tunnel_proto >= SXE2_UDP_TUNNEL_MAX) {
+ ret = -EINVAL;
+ goto l_end;
+ }
+
+ ret = sxe2_udp_tunnel_port_del_common(ad, tunnel_proto, tunnel_udp->udp_port);
+ if (ret) {
+ PMD_LOG_ERR(DRV, "Delete tunnel port failed, ret = %d", ret);
+ goto l_end;
+ }
+
+l_end:
+ return ret;
+}
+
static int32_t sxe2_dev_infos_get(struct rte_eth_dev *dev,
struct rte_eth_dev_info *dev_info)
{
@@ -1300,15 +1497,20 @@ static int32_t sxe2_dev_close(struct rte_eth_dev *dev)
(void)sxe2_dev_stop(dev);
(void)sxe2_queues_release(dev);
sxe2_mp_uninit(dev);
- (void)sxe2_rss_disable(dev);
(void)sxe2_sched_uinit(dev);
+ (void)sxe2_rss_disable(dev);
+ (void)sxe2_flow_uninit(dev);
+ (void)sxe2_udp_tunnel_port_clear(dev);
sxe2_vsi_uninit(dev);
sxe2_security_uinit(dev);
sxe2_intr_uninit(dev);
(void)sxe2_switchdev_uninit(dev);
sxe2_sw_uninit(dev);
+ (void)sxe2_switchdev_uninit(dev);
+ sxe2_dev_pci_map_uinit(dev);
sxe2_eth_uinit(dev);
sxe2_dev_pci_map_uinit(dev);
+ sxe2_free_repr_info(dev);
l_end:
return 0;
diff --git a/drivers/net/sxe2/sxe2_ethdev.h b/drivers/net/sxe2/sxe2_ethdev.h
index ca4e23f5a8..32efa893d1 100644
--- a/drivers/net/sxe2/sxe2_ethdev.h
+++ b/drivers/net/sxe2/sxe2_ethdev.h
@@ -319,6 +319,7 @@ struct sxe2_adapter {
struct sxe2_sched_hw_cap sched_ctxt;
struct sxe2_tm_context tm_ctxt;
struct sxe2_devargs devargs;
+ struct sxe2_udp_tunnel_ctx udp_tunnel_ctx;
struct sxe2_security_ctx security_ctx;
struct sxe2_repr_context repr_ctxt;
struct sxe2_switchdev_info switchdev_info;
@@ -374,6 +375,17 @@ void sxe2_dev_pci_seg_unmap(struct sxe2_adapter *adapter, uint32_t res_type);
int32_t sxe2_dev_pci_map_init(struct rte_eth_dev *dev);
+void sxe2_dev_pci_seg_unmap(struct sxe2_adapter *adapter, uint32_t res_type);
+
+int32_t sxe2_udp_tunnel_port_get_common(struct sxe2_adapter *ad,
+ struct sxe2_udp_tunnel_cfg *tunnel_config);
+
+int32_t sxe2_udp_tunnel_port_del_common(struct sxe2_adapter *ad,
+ enum sxe2_udp_tunnel_protocol tunnel_proto, uint16_t udp_port);
+
+int32_t sxe2_udp_tunnel_port_add_common(struct sxe2_adapter *ad,
+ enum sxe2_udp_tunnel_protocol tunnel_proto, uint16_t udp_port);
+
void sxe2_dev_pci_map_uinit(struct rte_eth_dev *dev);
void sxe2_eth_uinit(struct rte_eth_dev *dev);
diff --git a/drivers/net/sxe2/sxe2_flow.c b/drivers/net/sxe2/sxe2_flow.c
index 6999cb0725..63cfc36968 100644
--- a/drivers/net/sxe2/sxe2_flow.c
+++ b/drivers/net/sxe2/sxe2_flow.c
@@ -523,6 +523,51 @@ static int32_t sxe2_flow_adjust_action(struct rte_eth_dev *dev __rte_unused,
return ret;
}
+int32_t sxe2_flow_init_udp_tunnel_port(struct rte_eth_dev *dev)
+{
+ struct sxe2_adapter *adapter = SXE2_DEV_PRIVATE_TO_ADAPTER(dev);
+ int32_t ret = 0;
+ uint16_t i = 0;
+ uint16_t *flow_udp_tunnel_port = NULL;
+
+ memset(adapter->flow_ctxt.tunnel_port_list, 0,
+ sizeof(adapter->flow_ctxt.tunnel_port_list));
+
+ flow_udp_tunnel_port = adapter->flow_ctxt.tunnel_port_list;
+ for (i = 0; i < SXE2_FLOW_UDP_TUNNEL_MAX; i++) {
+ if (flow_udp_tunnel_port[i] == 0) {
+ ret = sxe2_drv_get_udp_tunnel_port(adapter, i,
+ &flow_udp_tunnel_port[i]);
+ if (ret != 0) {
+ PMD_LOG_ERR(DRV, "Failed to get udp tunnel port, proto: %d,"
+ "ret: %d", i, ret);
+ goto l_end;
+ }
+ }
+ }
+
+l_end:
+ return ret;
+}
+
+static int32_t sxe2_flowlist_add_tunnel_port(struct rte_eth_dev *dev,
+ struct rte_flow *flow_list,
+ struct rte_flow_error *error)
+{
+ struct sxe2_flow_list_t *sxe2_flow_list = &flow_list->sxe2_flow_list;
+ struct sxe2_flow *flow = TAILQ_FIRST(sxe2_flow_list);
+ enum sxe2_flow_tunnel_type tunnel_type = flow->meta.tunnel_type;
+ DECLARE_BITMAP(flow_type, SXE2_EXPANSION_MAX);
+ sxe2_bitmap_zero(flow_type, SXE2_EXPANSION_MAX);
+ sxe2_bitmap_copy(flow_type, flow->flow_type, SXE2_EXPANSION_MAX);
+ int32_t ret = 0;
+
+ if (flow->engine_type == SXE2_FLOW_ENGINE_FNAV)
+ return sxe2_flow_add_tunnel_port(dev, error, flow, flow_type, tunnel_type);
+
+ return ret;
+}
+
static int32_t sxe2_flow_check_item_empty(uint8_t *item, uint16_t size)
{
uint16_t i = 0;
@@ -679,6 +724,10 @@ static int32_t sxe2_flow_post_proc(struct rte_eth_dev *dev,
{
int32_t ret = 0;
+ ret = sxe2_flowlist_add_tunnel_port(dev, flow_list, error);
+ if (ret)
+ goto l_end;
+
ret = sxe2_flowlist_add_proto_type(dev, flow_list, error);
if (ret)
goto l_end;
@@ -1308,6 +1357,11 @@ int32_t sxe2_flow_init(struct rte_eth_dev *dev)
adapter->flow_ctxt.fnav_inited = 1;
rte_spinlock_init(&adapter->flow_ctxt.flow_list_lock);
+
+ ret = sxe2_flow_init_udp_tunnel_port(dev);
+ if (ret)
+ PMD_LOG_ERR(DRV, "Failed to init udp tunnel port, ret: %d.", ret);
+
return ret;
}
diff --git a/drivers/net/sxe2/sxe2_flow.h b/drivers/net/sxe2/sxe2_flow.h
index 9970fddcf0..daaeedd4dc 100644
--- a/drivers/net/sxe2/sxe2_flow.h
+++ b/drivers/net/sxe2/sxe2_flow.h
@@ -8,7 +8,6 @@
#include "sxe2_osal.h"
#include "sxe2_common.h"
-
int32_t sxe2_flow_ops_get(struct rte_eth_dev *dev, const struct rte_flow_ops **ops);
int32_t sxe2_flow_init(struct rte_eth_dev *dev);
@@ -26,4 +25,6 @@ int32_t sxe2_flow_query_mgr(struct sxe2_adapter *adapter,
struct sxe2_flow *flow,
struct sxe2_fnav_cid_mgr **mgr_ptr,
struct rte_flow_error *error);
+
+int32_t sxe2_flow_init_udp_tunnel_port(struct rte_eth_dev *dev);
#endif /* __SXE2_FLOW_H__ */
diff --git a/drivers/net/sxe2/sxe2_flow_define.h b/drivers/net/sxe2/sxe2_flow_define.h
index d2f6000efa..263a573f04 100644
--- a/drivers/net/sxe2/sxe2_flow_define.h
+++ b/drivers/net/sxe2/sxe2_flow_define.h
@@ -119,6 +119,7 @@ struct sxe2_flow_context {
struct rte_flow_list_t rte_flow_list;
rte_spinlock_t flow_list_lock;
struct sxe2_fnav_count_resource hw_res;
+ uint16_t tunnel_port_list[SXE2_FLOW_UDP_TUNNEL_MAX];
uint32_t fnav_inited;
};
#define SXE2_INVALID_RSS_ATTR \
diff --git a/drivers/net/sxe2/sxe2_flow_parse_pattern.c b/drivers/net/sxe2/sxe2_flow_parse_pattern.c
index 189abb1a33..f5bf8922c6 100644
--- a/drivers/net/sxe2/sxe2_flow_parse_pattern.c
+++ b/drivers/net/sxe2/sxe2_flow_parse_pattern.c
@@ -1637,6 +1637,119 @@ static int32_t sxe2_flow_parse_pattern_vxlan_gpe(const struct rte_flow_item *ite
return ret;
}
+static int32_t sxe2_flow_parse_pattern_ipip(struct sxe2_flow *flow, BITMAP_TYPE *flow_type)
+{
+ sxe2_set_bit(SXE2_EXPANSION_IPIP, flow_type);
+ if (sxe2_test_bit(SXE2_EXPANSION_OUTER_IPV4, flow_type)) {
+ sxe2_set_bit(SXE2_FLOW_FLD_ID_IPV4_PROT, flow->pattern_outer.map_spec);
+ if (sxe2_test_bit(SXE2_EXPANSION_IPV4, flow_type))
+ flow->pattern_outer.item_spec.ipv4.protocol = SXE2_FLOW_IP_PROTOCOL_IPV4;
+ if (sxe2_test_bit(SXE2_EXPANSION_IPV6, flow_type))
+ flow->pattern_outer.item_spec.ipv4.protocol = SXE2_FLOW_IP_PROTOCOL_IPV6;
+ }
+ if (sxe2_test_bit(SXE2_EXPANSION_OUTER_IPV6, flow_type)) {
+ sxe2_set_bit(SXE2_FLOW_FLD_ID_IPV6_PROT, flow->pattern_outer.map_spec);
+ if (sxe2_test_bit(SXE2_EXPANSION_ETH, flow_type)) {
+ flow->pattern_outer.item_spec.ipv6.nexthdr = SXE2_FLOW_IP_PROTOCOL_ETH;
+ } else {
+ if (sxe2_test_bit(SXE2_EXPANSION_IPV4, flow_type))
+ flow->pattern_outer.item_spec.ipv6.nexthdr =
+ SXE2_FLOW_IP_PROTOCOL_IPV4;
+ if (sxe2_test_bit(SXE2_EXPANSION_IPV6, flow_type))
+ flow->pattern_outer.item_spec.ipv6.nexthdr =
+ SXE2_FLOW_IP_PROTOCOL_IPV6;
+ }
+ }
+ return 0;
+}
+
+static int32_t sxe2_flow_add_udp_tunnel_port(struct sxe2_adapter *adapter,
+ enum sxe2_flow_udp_tunnel_protocol proto,
+ struct sxe2_flow *flow,
+ BITMAP_TYPE *flow_type)
+{
+ int32_t ret = 0;
+ uint16_t tun_port;
+
+ tun_port = adapter->flow_ctxt.tunnel_port_list[proto];
+ if (tun_port == 0xffff || tun_port == 0) {
+ ret = -EINVAL;
+ PMD_LOG_ERR(DRV, "UDP tunnel port not initialized, proto: %d", proto);
+ goto l_end;
+ }
+ if (!sxe2_test_bit(SXE2_EXPANSION_OUTER_UDP, flow_type)) {
+ ret = -EINVAL;
+ PMD_LOG_ERR(DRV, "UDP must be over tunnel");
+ goto l_end;
+ }
+ sxe2_set_bit(SXE2_FLOW_FLD_ID_UDP_DST_PORT, flow->pattern_outer.map_spec);
+ flow->pattern_outer.item_spec.udp.dest = rte_cpu_to_be_16(tun_port);
+l_end:
+ return ret;
+}
+
+int32_t sxe2_flow_add_tunnel_port(struct rte_eth_dev *dev,
+ struct rte_flow_error *error,
+ struct sxe2_flow *flow, BITMAP_TYPE *flow_type,
+ enum sxe2_flow_tunnel_type tunnel_type)
+{
+ int32_t ret = 0;
+ enum sxe2_flow_udp_tunnel_protocol proto = SXE2_FLOW_UDP_TUNNEL_MAX;
+ struct sxe2_adapter *adapter = SXE2_DEV_PRIVATE_TO_ADAPTER(dev);
+ struct sxe2_flow_pattern *pattern = &flow->pattern_outer;
+ switch (tunnel_type) {
+ case SXE2_FLOW_TUNNEL_TYPE_VXLAN:
+ if (sxe2_test_bit(SXE2_EXPANSION_ETH, flow_type)) {
+ proto = SXE2_FLOW_UDP_TUNNEL_PROTOCOL_VXLAN;
+ } else if (sxe2_test_bit(SXE2_EXPANSION_IPV4, flow_type) ||
+ sxe2_test_bit(SXE2_EXPANSION_IPV6, flow_type)) {
+ proto = SXE2_FLOW_UDP_TUNNEL_PROTOCOL_VXLAN_GPE;
+ }
+ break;
+ case SXE2_FLOW_TUNNEL_TYPE_GTPU:
+ proto = SXE2_FLOW_UDP_TUNNEL_PROTOCOL_GTP_U;
+ break;
+ case SXE2_FLOW_TUNNEL_TYPE_GENEVE:
+ proto = SXE2_FLOW_UDP_TUNNEL_PROTOCOL_GENEVE;
+ break;
+ case SXE2_FLOW_TUNNEL_TYPE_GRE:
+ if (sxe2_test_bit(SXE2_EXPANSION_OUTER_UDP, flow_type)) {
+ proto = SXE2_FLOW_UDP_TUNNEL_PROTOCOL_NVGRE;
+ } else {
+ if (sxe2_test_bit(SXE2_EXPANSION_OUTER_IPV4, flow_type)) {
+ pattern->item_spec.ipv4.protocol = SXE2_FLOW_IP_PROTOCOL_GRE;
+ sxe2_set_bit(SXE2_FLOW_FLD_ID_IPV4_PROT, pattern->map_spec);
+ }
+ if (sxe2_test_bit(SXE2_EXPANSION_OUTER_IPV6, flow_type)) {
+ pattern->item_spec.ipv6.nexthdr = SXE2_FLOW_IP_PROTOCOL_GRE;
+ sxe2_set_bit(SXE2_FLOW_FLD_ID_IPV6_PROT, pattern->map_spec);
+ }
+ }
+ break;
+ case SXE2_FLOW_TUNNEL_TYPE_IPIP:
+ ret = sxe2_flow_parse_pattern_ipip(flow, flow_type);
+ break;
+ default:
+ break;
+ }
+ if (proto != SXE2_FLOW_UDP_TUNNEL_MAX) {
+ ret = sxe2_flow_add_udp_tunnel_port(adapter, proto, flow, flow_type);
+ if (ret != 0) {
+ rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ITEM,
+ NULL, "Failed to add udp port for tunnel.");
+ PMD_LOG_ERR(DRV, "Failed to add udp port for tunnel, ret %d.", ret);
+ goto l_end;
+ }
+ }
+ if (tunnel_type != SXE2_FLOW_TUNNEL_TYPE_NONE) {
+ if (!sxe2_test_bit(SXE2_EXPANSION_OUTER_UDP, flow_type))
+ sxe2_set_bit(SXE2_FLOW_HDR_IPV_OTHER, pattern->hdrs);
+ }
+l_end:
+ return ret;
+}
+
struct sxe2_flow_parse_pattern_ops sxe2_flow_parse_pattern_list[] = {
[SXE2_EXPANSION_OUTER_ETH] = {
.is_inner = false,
diff --git a/drivers/net/sxe2/sxe2_flow_parse_pattern.h b/drivers/net/sxe2/sxe2_flow_parse_pattern.h
index 69d83a6ea6..8442c35cae 100644
--- a/drivers/net/sxe2/sxe2_flow_parse_pattern.h
+++ b/drivers/net/sxe2/sxe2_flow_parse_pattern.h
@@ -37,4 +37,10 @@ int32_t sxe2_flow_parse_pattern(struct rte_eth_dev *dev,
struct rte_flow_error *error,
struct sxe2_flow *flow);
+int32_t sxe2_flow_add_tunnel_port(struct rte_eth_dev *dev,
+ struct rte_flow_error *error,
+ struct sxe2_flow *flow,
+ BITMAP_TYPE *flow_type,
+ enum sxe2_flow_tunnel_type tunnel_type);
+
#endif /* SXE2_FLOW_PARSE_PATTERN_H_ */
diff --git a/drivers/net/sxe2/sxe2_txrx_poll.c b/drivers/net/sxe2/sxe2_txrx_poll.c
index f3c4fa0d91..746f9cc2d5 100644
--- a/drivers/net/sxe2/sxe2_txrx_poll.c
+++ b/drivers/net/sxe2/sxe2_txrx_poll.c
@@ -234,6 +234,44 @@ sxe2_tx_pkt_data_desc_count(struct rte_mbuf *tx_pkt)
return count;
}
+static __rte_always_inline void sxe2_tx_desc_tunneling_params_fill(uint64_t offloads,
+ union sxe2_tx_offload_info ol_info,
+ uint32_t *desc_tunneling_params)
+{
+ if (offloads & RTE_MBUF_F_TX_OUTER_IP_CKSUM)
+ *desc_tunneling_params |= SXE2_TX_CTXT_DESC_EIPT_IPV4;
+ else if (offloads & RTE_MBUF_F_TX_OUTER_IPV4)
+ *desc_tunneling_params |= SXE2_TX_CTXT_DESC_EIPT_IPV4_NO_CSUM;
+ else if (offloads & RTE_MBUF_F_TX_OUTER_IPV6)
+ *desc_tunneling_params |= SXE2_TX_CTXT_DESC_EIPT_IPV6;
+
+ *desc_tunneling_params |=
+ SXE2_TX_CTXT_DESC_EIPLEN_VAL(ol_info.outer_l3_len);
+ switch (offloads & RTE_MBUF_F_TX_TUNNEL_MASK) {
+ case RTE_MBUF_F_TX_TUNNEL_IPIP:
+ break;
+ case RTE_MBUF_F_TX_TUNNEL_VXLAN:
+ case RTE_MBUF_F_TX_TUNNEL_VXLAN_GPE:
+ case RTE_MBUF_F_TX_TUNNEL_GTP:
+ case RTE_MBUF_F_TX_TUNNEL_GENEVE:
+ *desc_tunneling_params |= SXE2_TX_CTXT_DESC_UDP_TUNNE;
+ break;
+ case RTE_MBUF_F_TX_TUNNEL_GRE:
+ *desc_tunneling_params |= SXE2_TX_CTXT_DESC_GRE_TUNNE;
+ break;
+ default:
+ PMD_LOG_ERR(TX, "Tunnel type [0x%" PRIx64 "] is not supported.",
+ (uint64_t)(offloads & RTE_MBUF_F_TX_TUNNEL_MASK));
+ return;
+ }
+ *desc_tunneling_params |= SXE2_TX_CTXT_DESC_NATLEN_VAL(ol_info.l2_len);
+ if (!(*desc_tunneling_params & SXE2_TX_CTXT_DESC_EIPT_NONE) &&
+ (*desc_tunneling_params & SXE2_TX_CTXT_DESC_UDP_TUNNE) &&
+ (offloads & RTE_MBUF_F_TX_OUTER_UDP_CKSUM)) {
+ *desc_tunneling_params |= SXE2_TX_CTXT_DESC_L4T_CS_MASK;
+ }
+}
+
static __rte_always_inline void
sxe2_tx_desc_checksum_fill(uint64_t offloads, uint32_t *desc_cmd, uint32_t *desc_offset,
union sxe2_tx_offload_info ol_info)
@@ -414,7 +452,13 @@ uint16_t sxe2_tx_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkt
}
}
- desc_offset |= SXE2_TX_DATA_DESC_MACLEN_VAL(ol_info.l2_len);
+ if ((offloads & RTE_MBUF_F_TX_TUNNEL_MASK) && ctxt_desc_num) {
+ desc_offset |= SXE2_TX_DATA_DESC_MACLEN_VAL(ol_info.outer_l2_len);
+ sxe2_tx_desc_tunneling_params_fill(offloads, ol_info,
+ &desc_tunneling_params);
+ } else {
+ desc_offset |= SXE2_TX_DATA_DESC_MACLEN_VAL(ol_info.l2_len);
+ }
if (offloads & SXE2_TX_OFFLOAD_CKSUM_MASK) {
sxe2_tx_desc_checksum_fill(offloads, &desc_cmd,
--
2.52.0
^ permalink raw reply related
* [PATCH v8 15/20] common/sxe2: add shared SFP module definitions
From: liujie5 @ 2026-06-03 6:29 UTC (permalink / raw)
To: stephen; +Cc: dev, Jie Liu
In-Reply-To: <20260603062945.1253672-1-liujie5@linkdatatechnology.com>
From: Jie Liu <liujie5@linkdatatechnology.com>
This patch adds a new shared header file 'sxe2_msg.h' which
contains definitions for SFP/SFP+ modules. This file is shared across
Firmware, Kernel driver, and DPDK PMD to ensure consistent protocol
handling.
The header includes:
- SFP EEPROM memory map offsets.
- Module type encoding definitions.
By using this shared header, the PMD can correctly identify module
capabilities and report diagnostic information in a way that is
consistent with the underlying firmware logic.
Signed-off-by: Jie Liu <liujie5@linkdatatechnology.com>
---
drivers/common/sxe2/sxe2_msg.h | 118 +++++++++++++++++++++++++++++++++
1 file changed, 118 insertions(+)
create mode 100644 drivers/common/sxe2/sxe2_msg.h
diff --git a/drivers/common/sxe2/sxe2_msg.h b/drivers/common/sxe2/sxe2_msg.h
new file mode 100644
index 0000000000..f08944f7c9
--- /dev/null
+++ b/drivers/common/sxe2/sxe2_msg.h
@@ -0,0 +1,118 @@
+
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C), 2025, Wuxi Stars Micro System Technologies Co., Ltd.
+ */
+
+#ifndef __SXE2_MSG_H__
+#define __SXE2_MSG_H__
+
+enum sfp_type_identifier {
+ SXE2_SFP_TYPE_UNKNOWN = 0x00,
+ SXE2_SFP_TYPE_SFP = 0x03,
+
+ SXE2_SFP_TYPE_QSFP_PLUS = 0x0D,
+ SXE2_SFP_TYPE_QSFP28 = 0x11,
+
+ SXE2_SFP_TYPE_MAX = 0xFF,
+};
+
+#ifndef SFP_DEFINE
+#define SFP_DEFINE
+
+#define SXE2_SFP_EEP_WR 0x1
+#define SXE2_SFP_EEP_QSFP 0x1
+
+enum sfp_bus_addr {
+ SXE2_SFP_EEP_I2C_ADDR0 = 0xA0,
+ SXE2_SFP_EEP_I2C_ADDR1 = 0xA2,
+ SXE2_SFP_EEP_I2C_ADDR_NR = 0xFFFF,
+};
+
+struct sxe2_sfp_req {
+ uint8_t is_wr;
+ uint8_t is_qsfp;
+ uint16_t bus_addr;
+ uint16_t page_cnt;
+ uint16_t offset;
+ uint16_t data_len;
+ uint16_t rvd;
+ uint8_t data[];
+};
+
+struct sxe2_sfp_resp {
+ uint8_t is_wr;
+ uint8_t is_qsfp;
+ uint16_t data_len;
+ uint8_t data[];
+};
+
+enum sfp_page_cnt {
+ SXE2_SFP_EEP_PAGE_CNT0 = 0,
+ SXE2_SFP_EEP_PAGE_CNT1,
+ SXE2_SFP_EEP_PAGE_CNT2,
+ SXE2_SFP_EEP_PAGE_CNT3,
+ SXE2_SFP_EEP_PAGE_CNT20 = 20,
+ SXE2_SFP_EEP_PAGE_CNT21 = 21,
+
+ SXE2_SFP_EEP_PAGE_CNT_NR = 0xFFFF,
+};
+
+#define SXE2_SFP_E2P_I2C_7BIT_ADDR0 (SXE2_SFP_EEP_I2C_ADDR0 >> 1)
+#define SXE2_SFP_E2P_I2C_7BIT_ADDR1 (SXE2_SFP_EEP_I2C_ADDR1 >> 1)
+
+#define SXE2_QSFP_PAGE_OFST_START 128
+#define SXE2_SFP_EEP_OFST_MAX 255
+#define SXE2_SFP_EEP_LEN_MAX 256
+#endif
+
+#ifndef FW_STATE_DEFINE
+#define FW_STATE_DEFINE
+
+#define SXE2_FW_STATUS_MAIN_SHIF (16)
+#define SXE2_FW_STATUS_MAIN_MASK (0xFF0000)
+#define SXE2_FW_STATUS_SUB_MASK (0xFFFF)
+
+enum Sxe2FwStateMain {
+ SXE2_FW_STATE_MAIN_UNDEFINED = 0x00,
+ SXE2_FW_STATE_MAIN_INIT = 0x10000,
+ SXE2_FW_STATE_MAIN_RUN = 0x20000,
+ SXE2_FW_STATE_MAIN_ABNOMAL = 0x30000,
+};
+
+enum Sxe2FwState {
+ SXE2_FW_START_STATE_UNDEFINED = SXE2_FW_STATE_MAIN_UNDEFINED,
+ SXE2_FW_START_STATE_INIT_BASE = (SXE2_FW_STATE_MAIN_INIT + 0x1),
+ SXE2_FW_START_STATE_SCAN_DEVICE = (SXE2_FW_STATE_MAIN_INIT + 0x20),
+ SXE2_FW_START_STATE_FINISHED = (SXE2_FW_STATE_MAIN_RUN + 0x0),
+ SXE2_FW_START_STATE_UPGRADE = (SXE2_FW_STATE_MAIN_RUN + 0x1),
+ SXE2_FW_START_STATE_SYNC = (SXE2_FW_STATE_MAIN_RUN + 0x2),
+ SXE2_FW_RUNNING_STATE_ABNOMAL = (SXE2_FW_STATE_MAIN_ABNOMAL + 0x1),
+ SXE2_FW_RUNNING_STATE_ABNOMAL_CORE1 = (SXE2_FW_STATE_MAIN_ABNOMAL + 0x2),
+ SXE2_FW_RUNNING_STATE_ABNOMAL_HEART = (SXE2_FW_STATE_MAIN_ABNOMAL + 0x3),
+ SXE2_FW_START_STATE_MASK = (SXE2_FW_STATUS_MAIN_MASK | SXE2_FW_STATUS_SUB_MASK),
+};
+#endif
+
+#ifndef LED_DEFINE
+#define LED_DEFINE
+
+enum sxe2_led_mode {
+ SXE2_IDENTIFY_LED_BLINK_ON = 0,
+ SXE2_IDENTIFY_LED_BLINK_OFF,
+ SXE2_IDENTIFY_LED_ON,
+ SXE2_IDENTIFY_LED_OFF,
+ SXE2_IDENTIFY_LED_RESET,
+};
+
+
+typedef struct sxe2_led_ctrl {
+ uint32_t mode;
+ uint32_t duration;
+} sxe2_led_ctrl_s;
+
+typedef struct sxe2_led_ctrl_resp {
+ uint32_t ack;
+} sxe2_led_ctrl_resp_s;
+#endif
+
+#endif /* __SXE2_MSG_H__ */
--
2.52.0
^ permalink raw reply related
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