From: Philipp Zabel <p.zabel@pengutronix.de>
To: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
Cc: cphealy@gmail.com, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 2/6] drm/bridge: tc358767: filter out too high modes
Date: Tue, 01 Aug 2017 15:11:28 +0200 [thread overview]
Message-ID: <1501593088.3159.41.camel@pengutronix.de> (raw)
In-Reply-To: <20170727124736.3854-3-andrey.gusakov@cogentembedded.com>
On Thu, 2017-07-27 at 15:47 +0300, Andrey Gusakov wrote:
> Minimum pixel clock period is 6.5 nS for DPI. Do not accept modes
> with lower pixel clock period.
>
> Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
> ---
> drivers/gpu/drm/bridge/tc358767.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
> index f605bb7d1aa3..e8008e0c2e88 100644
> --- a/drivers/gpu/drm/bridge/tc358767.c
> +++ b/drivers/gpu/drm/bridge/tc358767.c
> @@ -1103,7 +1103,10 @@ static bool tc_bridge_mode_fixup(struct drm_bridge *bridge,
> static int tc_connector_mode_valid(struct drm_connector *connector,
> struct drm_display_mode *mode)
> {
> - /* Accept any mode */
> + /* PCLK limitation = 6.5 nS */
> + if (mode->clock > 163000)
> + return MODE_CLOCK_HIGH;
The comment doesn't match the code. If the limit is 6.5 nS, shouldn't
that be
if (mode->clock > 153846)
?
regards
Philipp
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next prev parent reply other threads:[~2017-08-01 13:12 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-27 12:47 [PATCH 0/6] drm/bridge: tc358767: fixes and improvements Andrey Gusakov
2017-07-27 12:47 ` [PATCH 1/6] drm/bridge: tc358767: do no fail on hi-res displays Andrey Gusakov
2017-08-01 13:11 ` Philipp Zabel
2017-07-27 12:47 ` [PATCH 2/6] drm/bridge: tc358767: filter out too high modes Andrey Gusakov
2017-08-01 13:11 ` Philipp Zabel [this message]
2017-08-02 17:34 ` Andrey Gusakov
2017-07-27 12:47 ` [PATCH 3/6] drm/bridge: tc358767: fix DP0_MISC register set Andrey Gusakov
2017-08-01 13:11 ` Philipp Zabel
2017-07-27 12:47 ` [PATCH 4/6] drm/bridge: tc358767: fix timing calculations Andrey Gusakov
2017-08-01 13:12 ` Philipp Zabel
2017-07-27 12:47 ` [PATCH 5/6] drm/bridge: tc358767: fix AUXDATAn registers access Andrey Gusakov
2017-08-01 13:12 ` Philipp Zabel
2017-07-27 12:47 ` [PATCH 6/6] drm/bridge: tc358767: fix 1-lane behavior Andrey Gusakov
2017-08-01 13:13 ` Philipp Zabel
2017-08-01 5:06 ` [PATCH 0/6] drm/bridge: tc358767: fixes and improvements Archit Taneja
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