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From: Sharat Masetty <smasetty@codeaurora.org>
To: freedreno@lists.freedesktop.org
Cc: linux-arm-msm@vger.kernel.org,
	Sharat Masetty <smasetty@codeaurora.org>,
	dri-devel@lists.freedesktop.org
Subject: [v2 3/7] drm/msm: rearrange the gpu_rmw() function
Date: Fri,  5 Oct 2018 18:38:31 +0530	[thread overview]
Message-ID: <1538744915-25490-4-git-send-email-smasetty@codeaurora.org> (raw)
In-Reply-To: <1538744915-25490-1-git-send-email-smasetty@codeaurora.org>

The register read-modify-write construct is generic enough
that it can be used by other subsystems as needed, create
a more generic rmw() function and have the gpu_rmw() use
this new function.

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
---
 drivers/gpu/drm/msm/msm_drv.c | 8 ++++++++
 drivers/gpu/drm/msm/msm_drv.h | 1 +
 drivers/gpu/drm/msm/msm_gpu.h | 5 +----
 3 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 85e46a3..d85e169 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -210,6 +210,14 @@ u32 msm_readl(const void __iomem *addr)
 	return val;
 }
 
+void msm_rmw(void __iomem *addr, u32 mask, u32 or)
+{
+	u32 val = msm_readl(addr);
+
+	val &= ~mask;
+	msm_writel(val | or, addr);
+}
+
 struct vblank_event {
 	struct list_head node;
 	int crtc_id;
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index 6f5c343..32c843c 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -444,6 +444,7 @@ void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
 		const char *dbgname);
 void msm_writel(u32 data, void __iomem *addr);
 u32 msm_readl(const void __iomem *addr);
+void msm_rmw(void __iomem *addr, u32 mask, u32 or);
 
 struct msm_gpu_submitqueue;
 int msm_submitqueue_init(struct drm_device *drm, struct msm_file_private *ctx);
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index 9df48e3..63ca28b 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -230,10 +230,7 @@ static inline u32 gpu_read(struct msm_gpu *gpu, u32 reg)
 
 static inline void gpu_rmw(struct msm_gpu *gpu, u32 reg, u32 mask, u32 or)
 {
-	uint32_t val = gpu_read(gpu, reg);
-
-	val &= ~mask;
-	gpu_write(gpu, reg, val | or);
+	msm_rmw(gpu->mmio + (reg << 2), mask, or);
 }
 
 static inline u64 gpu_read64(struct msm_gpu *gpu, u32 lo, u32 hi)
-- 
1.9.1

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  parent reply	other threads:[~2018-10-05 13:08 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-05 13:08 [v2 0/7] drm/msm/a6xx: System Cache Support Sharat Masetty
     [not found] ` <1538744915-25490-1-git-send-email-smasetty-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-05 13:08   ` [v2 1/7] soc: qcom: llcc-slice: Add error checks for API functions Sharat Masetty
     [not found]     ` <1538744915-25490-2-git-send-email-smasetty-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-11-14 18:00       ` Andy Gross
2018-10-05 13:08   ` [v2 5/7] arm64:dts:sdm845: Add register range for gpu CX Sharat Masetty
2018-10-05 13:08   ` [v2 6/7] drm/msm: Pass mmu features to generic layers Sharat Masetty
2018-10-05 13:08   ` [v2 7/7] drm/msm/a6xx: Add support for using system cache(LLC) Sharat Masetty
2018-10-05 15:07     ` Jordan Crouse
     [not found]       ` <20181005150745.GJ31641-9PYrDHPZ2Orvke4nUoYGnHL1okKdlPRT@public.gmane.org>
2018-10-08 13:59         ` Sharat Masetty
     [not found]           ` <4dd1439a-990e-6a34-0290-7adc4837ca7f-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-08 14:18             ` Jordan Crouse
2018-10-05 13:08 ` [v2 2/7] iommu/arm-smmu: Add support to use Last level cache Sharat Masetty
2018-10-05 13:08 ` Sharat Masetty [this message]
2018-10-05 13:08 ` [v2 4/7] drm/msm/adreno: Add registers in the GPU CX domain Sharat Masetty
     [not found]   ` <1538744915-25490-5-git-send-email-smasetty-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-05 15:01     ` Jordan Crouse
     [not found]       ` <20181005150157.GI31641-9PYrDHPZ2Orvke4nUoYGnHL1okKdlPRT@public.gmane.org>
2018-10-08 13:46         ` Sharat Masetty

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