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From: "Mun, Gwan-gyeong" <gwan-gyeong.mun@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "dri-devel@lists.freedesktop.org" <dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH 04/12] drm/i915: Extract intel_hdmi_limited_color_range()
Date: Wed, 18 Sep 2019 19:00:12 +0000	[thread overview]
Message-ID: <1db6cb112d79ff14fe2c9b93cab17890fed188a3.camel@intel.com> (raw)
In-Reply-To: <20190718145053.25808-5-ville.syrjala@linux.intel.com>

On Thu, 2019-07-18 at 17:50 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Pull the code for computing the limited color range
> setting into a small helper. We'll add a bit more to it
> later.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_hdmi.c | 30 +++++++++++++++----
> ----
>  1 file changed, 20 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index b8100cf21dd0..ca377ba3a15e 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2297,6 +2297,24 @@ intel_hdmi_ycbcr420_config(struct
> drm_connector *connector,
>  	return true;
>  }
>  
> +static bool intel_hdmi_limited_color_range(const struct
> intel_crtc_state *crtc_state,
> +					   const struct
> drm_connector_state *conn_state)
> +{
> +	const struct intel_digital_connector_state *intel_conn_state =
> +		to_intel_digital_connector_state(conn_state);
> +	const struct drm_display_mode *adjusted_mode =
> +		&crtc_state->base.adjusted_mode;
> +
> +	if (intel_conn_state->broadcast_rgb ==
> INTEL_BROADCAST_RGB_AUTO) {
> +		/* See CEA-861-E - 5.1 Default Encoding Parameters */
> +		return crtc_state->has_hdmi_sink &&
> +			drm_default_rgb_quant_range(adjusted_mode) ==
> +			HDMI_QUANTIZATION_RANGE_LIMITED;
> +	} else {
> +		return intel_conn_state->broadcast_rgb ==
> INTEL_BROADCAST_RGB_LIMITED;
> +	}
> +}
> +
>  int intel_hdmi_compute_config(struct intel_encoder *encoder,
>  			      struct intel_crtc_state *pipe_config,
>  			      struct drm_connector_state *conn_state)
> @@ -2323,16 +2341,8 @@ int intel_hdmi_compute_config(struct
> intel_encoder *encoder,
>  	if (pipe_config->has_hdmi_sink)
>  		pipe_config->has_infoframe = true;
>  
> -	if (intel_conn_state->broadcast_rgb ==
> INTEL_BROADCAST_RGB_AUTO) {
> -		/* See CEA-861-E - 5.1 Default Encoding Parameters */
> -		pipe_config->limited_color_range =
> -			pipe_config->has_hdmi_sink &&
> -			drm_default_rgb_quant_range(adjusted_mode) ==
> -			HDMI_QUANTIZATION_RANGE_LIMITED;
> -	} else {
> -		pipe_config->limited_color_range =
> -			intel_conn_state->broadcast_rgb ==
> INTEL_BROADCAST_RGB_LIMITED;
> -	}
> +	pipe_config->limited_color_range =
> +		intel_hdmi_limited_color_range(pipe_config,
> conn_state);
>  
>  	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK) {
>  		pipe_config->pixel_multiplier = 2;
The changes look good to me.
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-09-18 19:00 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-18 14:50 [PATCH 00/12] drm/i915: YCbCr output fixes and prep work for YCbCr 4:4:4 output Ville Syrjala
2019-07-18 14:50 ` [PATCH 01/12] drm/dp: Add definitons for MSA MISC bits Ville Syrjala
2019-09-18 18:55   ` [Intel-gfx] " Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 02/12] drm/i915: Fix HSW+ DP MSA YCbCr colorspace indication Ville Syrjala
2019-09-18 18:59   ` Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 03/12] drm/i915: Fix AVI infoframe quantization range for YCbCr output Ville Syrjala
2019-09-20 12:56   ` Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 04/12] drm/i915: Extract intel_hdmi_limited_color_range() Ville Syrjala
2019-09-18 19:00   ` Mun, Gwan-gyeong [this message]
2019-07-18 14:50 ` [PATCH 05/12] drm/i915: Never set limited_color_range=true for YCbCr output Ville Syrjala
2019-07-18 16:45   ` [PATCH v2 " Ville Syrjala
2019-09-18 19:01     ` [Intel-gfx] " Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 06/12] drm/i915: Switch to using DP_MSA_MISC_* defines Ville Syrjala
2019-09-18 19:01   ` Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 07/12] drm/i915: Don't look at unrelated PIPECONF bits for interlaced readout Ville Syrjala
2019-09-18 19:02   ` [Intel-gfx] " Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 08/12] drm/i915: Simplify intel_get_crtc_ycbcr_config() Ville Syrjala
2019-09-18 19:02   ` Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 09/12] drm/i915: Add PIPECONF YCbCr 4:4:4 programming for HSW Ville Syrjala
2019-09-18 19:03   ` Mun, Gwan-gyeong
2019-09-20 12:20     ` [Intel-gfx] " Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 10/12] drm/i915: Document ILK+ pipe csc matrix better Ville Syrjala
2019-09-20 14:24   ` [Intel-gfx] " Mun, Gwan-gyeong
2019-09-20 14:29     ` Ville Syrjälä
2019-07-18 14:50 ` [PATCH 11/12] drm/i915: Set up ILK/SNB csc unit properly for YCbCr output Ville Syrjala
2019-09-20 12:19   ` [Intel-gfx] " Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 12/12] drm/i915: Add PIPECONF YCbCr 4:4:4 programming for ILK-IVB Ville Syrjala
2019-09-18 19:05   ` Mun, Gwan-gyeong
2019-09-20 12:21     ` [Intel-gfx] " Mun, Gwan-gyeong
2019-09-20 18:48 ` [PATCH 00/12] drm/i915: YCbCr output fixes and prep work for YCbCr 4:4:4 output Ville Syrjälä

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