From: Marek Vasut <marex@denx.de>
To: dri-devel@lists.freedesktop.org
Cc: Marek Vasut <marex@denx.de>, Robert Foss <robert.foss@linaro.org>,
Jagan Teki <jagan@amarulasolutions.com>,
Thomas Zimmermann <tzimmermann@suse.de>,
Sam Ravnborg <sam@ravnborg.org>,
Maxime Ripard <maxime@cerno.tech>
Subject: [PATCH V2 08/12] drm: bridge: icn6211: Set SYS_CTRL_1 to value used in examples
Date: Thu, 17 Feb 2022 01:25:26 +0100 [thread overview]
Message-ID: <20220217002530.396563-9-marex@denx.de> (raw)
In-Reply-To: <20220217002530.396563-1-marex@denx.de>
Both example code [1], [2] as well as one provided by custom panel vendor
set register SYS_CTRL_1 to 0x88. What exactly does the value mean is unknown
due to unavailable datasheet. Align this register value with example code.
[1] https://github.com/rockchip-linux/kernel/blob/develop-4.19/drivers/gpu/drm/bridge/icn6211.c
[2] https://github.com/tdjastrzebski/ICN6211-Configurator
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Maxime Ripard <maxime@cerno.tech>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
To: dri-devel@lists.freedesktop.org
---
V2: Rebase on next-20220214
---
drivers/gpu/drm/bridge/chipone-icn6211.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/chipone-icn6211.c b/drivers/gpu/drm/bridge/chipone-icn6211.c
index f475426507f19..07e698dc38cb4 100644
--- a/drivers/gpu/drm/bridge/chipone-icn6211.c
+++ b/drivers/gpu/drm/bridge/chipone-icn6211.c
@@ -314,7 +314,7 @@ static void chipone_atomic_enable(struct drm_bridge *bridge,
chipone_configure_pll(icn, mode);
ICN6211_DSI(icn, SYS_CTRL(0), 0x40);
- ICN6211_DSI(icn, SYS_CTRL(1), 0x98);
+ ICN6211_DSI(icn, SYS_CTRL(1), 0x88);
/* icn6211 specific sequence */
ICN6211_DSI(icn, MIPI_FORCE_0, 0x20);
--
2.34.1
next prev parent reply other threads:[~2022-02-17 0:26 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-17 0:25 [PATCH V2 00/12] drm: bridge: icn6211: Fix hard-coded panel settings and add I2C support Marek Vasut
2022-02-17 0:25 ` [PATCH V2 01/12] drm: bridge: icn6211: Fix register layout Marek Vasut
2022-03-02 9:55 ` Maxime Ripard
2022-02-17 0:25 ` [PATCH V2 02/12] drm: bridge: icn6211: Fix HFP_HSW_HBP_HI and HFP_MIN handling Marek Vasut
2022-03-02 9:56 ` Maxime Ripard
2022-02-17 0:25 ` [PATCH V2 03/12] drm: bridge: icn6211: Add HS/VS/DE polarity handling Marek Vasut
2022-03-02 9:59 ` Maxime Ripard
2022-03-02 14:45 ` Marek Vasut
2022-02-17 0:25 ` [PATCH V2 04/12] drm: bridge: icn6211: Add DSI lane count DT property parsing Marek Vasut
2022-03-02 10:01 ` Maxime Ripard
2022-03-02 15:17 ` Marek Vasut
2022-03-03 12:54 ` Maxime Ripard
2022-03-04 0:26 ` Marek Vasut
2022-02-17 0:25 ` [PATCH V2 05/12] drm: bridge: icn6211: Add generic DSI-to-DPI PLL configuration Marek Vasut
2022-03-02 10:02 ` Maxime Ripard
2022-02-17 0:25 ` [PATCH V2 06/12] drm: bridge: icn6211: Use DSI burst mode without EoT and with LP command mode Marek Vasut
2022-03-02 10:03 ` Maxime Ripard
2022-02-17 0:25 ` [PATCH V2 07/12] drm: bridge: icn6211: Disable DPI color swap Marek Vasut
2022-03-02 10:04 ` Maxime Ripard
2022-02-17 0:25 ` Marek Vasut [this message]
2022-03-02 10:04 ` [PATCH V2 08/12] drm: bridge: icn6211: Set SYS_CTRL_1 to value used in examples Maxime Ripard
2022-02-17 0:25 ` [PATCH V2 09/12] drm: bridge: icn6211: Implement atomic_get_input_bus_fmts Marek Vasut
2022-03-02 10:05 ` Maxime Ripard
2022-02-17 0:25 ` [PATCH V2 10/12] drm: bridge: icn6211: Add I2C configuration support Marek Vasut
2022-03-02 10:07 ` Maxime Ripard
2022-02-17 0:25 ` [PATCH V2 11/12] drm: bridge: icn6211: Rework ICN6211_DSI to chipone_writeb() Marek Vasut
2022-03-02 10:08 ` Maxime Ripard
2022-02-17 0:25 ` [PATCH V2 12/12] drm: bridge: icn6211: Read and validate chip IDs before configuration Marek Vasut
2022-03-02 10:08 ` Maxime Ripard
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