Re: [PATCH v2 01/12] drm/panelreplay: Panel Replay capability DPCD register definitions

["Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>]

On 5/20/2025 10:23 PM, Jouni Högander wrote:
> Add new definition for size of Panel Replay DPCD capability registers
> area. Rename existing definitions to group capability registers together.
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

LGTM

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_psr.c |  8 ++++----
>   include/drm/display/drm_dp.h             | 12 +++++++-----
>   2 files changed, 11 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index cd833b63ea6b..0cfdeff268f9 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -516,7 +516,7 @@ static u8 intel_dp_get_su_capability(struct intel_dp *intel_dp)
>   
>   	if (intel_dp->psr.sink_panel_replay_su_support)
>   		drm_dp_dpcd_readb(&intel_dp->aux,
> -				  DP_PANEL_PANEL_REPLAY_CAPABILITY,
> +				  DP_PANEL_REPLAY_CAP_CAPABILITY,
>   				  &su_capability);
>   	else
>   		su_capability = intel_dp->psr_dpcd[1];
> @@ -528,7 +528,7 @@ static unsigned int
>   intel_dp_get_su_x_granularity_offset(struct intel_dp *intel_dp)
>   {
>   	return intel_dp->psr.sink_panel_replay_su_support ?
> -		DP_PANEL_PANEL_REPLAY_X_GRANULARITY :
> +		DP_PANEL_REPLAY_CAP_X_GRANULARITY :
>   		DP_PSR2_SU_X_GRANULARITY;
>   }
>   
> @@ -536,7 +536,7 @@ static unsigned int
>   intel_dp_get_su_y_granularity_offset(struct intel_dp *intel_dp)
>   {
>   	return intel_dp->psr.sink_panel_replay_su_support ?
> -		DP_PANEL_PANEL_REPLAY_Y_GRANULARITY :
> +		DP_PANEL_REPLAY_CAP_Y_GRANULARITY :
>   		DP_PSR2_SU_Y_GRANULARITY;
>   }
>   
> @@ -676,7 +676,7 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
>   {
>   	drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd,
>   			 sizeof(intel_dp->psr_dpcd));
> -	drm_dp_dpcd_readb(&intel_dp->aux, DP_PANEL_REPLAY_CAP,
> +	drm_dp_dpcd_readb(&intel_dp->aux, DP_PANEL_REPLAY_CAP_SUPPORT,
>   			  &intel_dp->pr_dpcd);
>   
>   	if (intel_dp->pr_dpcd & DP_PANEL_REPLAY_SUPPORT)
> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
> index 3001c0b6e7bb..3371e2edd9e9 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -547,16 +547,18 @@
>   /* DFP Capability Extension */
>   #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT	0x0a3	/* 2.0 */
>   
> -#define DP_PANEL_REPLAY_CAP				0x0b0  /* DP 2.0 */
> +#define DP_PANEL_REPLAY_CAP_SUPPORT			0x0b0  /* DP 2.0 */
>   # define DP_PANEL_REPLAY_SUPPORT			(1 << 0)
>   # define DP_PANEL_REPLAY_SU_SUPPORT			(1 << 1)
>   # define DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT	(1 << 2) /* eDP 1.5 */
>   
> -#define DP_PANEL_PANEL_REPLAY_CAPABILITY		0xb1
> -# define DP_PANEL_PANEL_REPLAY_SU_GRANULARITY_REQUIRED	(1 << 5)
> +#define DP_PANEL_REPLAY_CAP_SIZE	7
>   
> -#define DP_PANEL_PANEL_REPLAY_X_GRANULARITY		0xb2
> -#define DP_PANEL_PANEL_REPLAY_Y_GRANULARITY		0xb4
> +#define DP_PANEL_REPLAY_CAP_CAPABILITY			0xb1
> +# define DP_PANEL_REPLAY_SU_GRANULARITY_REQUIRED	(1 << 5)
> +
> +#define DP_PANEL_REPLAY_CAP_X_GRANULARITY		0xb2
> +#define DP_PANEL_REPLAY_CAP_Y_GRANULARITY		0xb4
>   
>   /* Link Configuration */
>   #define	DP_LINK_BW_SET		            0x100