Re: [igt-dev] [PATCH v17 7/7] test: perf_pmu: use the gem_engine_topology library

[Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>]

On 05/04/2019 02:07, Andi Shyti wrote:
> From: Andi Shyti <andi.shyti@intel.com>
> 
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.
> 
> Use whenever possible gem_engine_can_store_dword() that checks
> class instead of flags.
> 
> Now the __for_each_engine_class_instance and
> for_each_engine_class_instance are unused, remove them.
> 
> Signed-off-by: Andi Shyti <andi.shyti@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> ---
>   lib/igt_gt.h     |  7 -------
>   tests/perf_pmu.c | 53 ++++++++++++++++++++++--------------------------
>   2 files changed, 24 insertions(+), 36 deletions(-)
> 
> diff --git a/lib/igt_gt.h b/lib/igt_gt.h
> index af4cc38a1ef7..c2ca07e03738 100644
> --- a/lib/igt_gt.h
> +++ b/lib/igt_gt.h
> @@ -119,11 +119,4 @@ void gem_require_engine(int gem_fd,
>   	igt_require(gem_has_engine(gem_fd, class, instance));
>   }
>   
> -#define __for_each_engine_class_instance(e__) \
> -	for ((e__) = intel_execution_engines2; (e__)->name; (e__)++)
> -
> -#define for_each_engine_class_instance(fd__, e__) \
> -	for ((e__) = intel_execution_engines2; (e__)->name; (e__)++) \
> -		for_if (gem_has_engine((fd__), (e__)->class, (e__)->instance))
> -
>   #endif /* IGT_GT_H */
> diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
> index 4f552bc2ae28..c954a0d54b72 100644
> --- a/tests/perf_pmu.c
> +++ b/tests/perf_pmu.c
> @@ -158,11 +158,6 @@ static unsigned int measured_usleep(unsigned int usec)
>   	return igt_nsec_elapsed(&ts);
>   }
>   
> -static unsigned int e2ring(int gem_fd, const struct intel_execution_engine2 *e)
> -{
> -	return gem_class_instance_to_eb_flags(gem_fd, e->class, e->instance);
> -}
> -
>   #define TEST_BUSY (1)
>   #define FLAG_SYNC (2)
>   #define TEST_TRAILING_IDLE (4)
> @@ -177,7 +172,7 @@ static igt_spin_t * __spin_poll(int fd, uint32_t ctx, unsigned long flags)
>   		.engine = flags,
>   	};
>   
> -	if (gem_can_store_dword(fd, flags))
> +	if (gem_class_can_store_dword(fd, flags))

flags is not a class here but either legacy eb flags or engine map index.

I think you can refactor so this function (and the chain of callers) 
takes a pointer to intel_execution_engine2 and then use class and flags 
as needed.

The rest looks okay on a quick read through.

Regards,

Tvrtko

>   		opts.flags |= IGT_SPIN_POLL_RUN;
>   
>   	return __igt_spin_batch_factory(fd, &opts);
> @@ -267,7 +262,7 @@ single(int gem_fd, const struct intel_execution_engine2 *e, unsigned int flags)
>   	fd = open_pmu(I915_PMU_ENGINE_BUSY(e->class, e->instance));
>   
>   	if (flags & TEST_BUSY)
> -		spin = spin_sync(gem_fd, 0, e2ring(gem_fd, e));
> +		spin = spin_sync(gem_fd, 0, e->flags);
>   	else
>   		spin = NULL;
>   
> @@ -316,7 +311,7 @@ busy_start(int gem_fd, const struct intel_execution_engine2 *e)
>   	 */
>   	sleep(2);
>   
> -	spin = __spin_sync(gem_fd, 0, e2ring(gem_fd, e));
> +	spin = __spin_sync(gem_fd, 0, e->flags);
>   
>   	fd = open_pmu(I915_PMU_ENGINE_BUSY(e->class, e->instance));
>   
> @@ -359,11 +354,11 @@ busy_double_start(int gem_fd, const struct intel_execution_engine2 *e)
>   	 * re-submission in execlists mode. Make sure busyness is correctly
>   	 * reported with the engine busy, and after the engine went idle.
>   	 */
> -	spin[0] = __spin_sync(gem_fd, 0, e2ring(gem_fd, e));
> +	spin[0] = __spin_sync(gem_fd, 0, e->flags);
>   	usleep(500e3);
>   	spin[1] = __igt_spin_batch_new(gem_fd,
>   				       .ctx = ctx,
> -				       .engine = e2ring(gem_fd, e));
> +				       .engine = e->flags);
>   
>   	/*
>   	 * Open PMU as fast as possible after the second spin batch in attempt
> @@ -434,8 +429,8 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
>   
>   	i = 0;
>   	fd[0] = -1;
> -	for_each_engine_class_instance(gem_fd, e_) {
> -		if (e == e_)
> +	__for_each_physical_engine(gem_fd, e_) {
> +		if (e->class == e_->class && e->instance == e_->instance)
>   			busy_idx = i;
>   
>   		fd[i++] = open_group(I915_PMU_ENGINE_BUSY(e_->class,
> @@ -445,7 +440,7 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
>   
>   	igt_assert_eq(i, num_engines);
>   
> -	spin = spin_sync(gem_fd, 0, e2ring(gem_fd, e));
> +	spin = spin_sync(gem_fd, 0, e->flags);
>   	pmu_read_multi(fd[0], num_engines, tval[0]);
>   	slept = measured_usleep(batch_duration_ns / 1000);
>   	if (flags & TEST_TRAILING_IDLE)
> @@ -478,7 +473,7 @@ __submit_spin_batch(int gem_fd, igt_spin_t *spin,
>   	struct drm_i915_gem_execbuffer2 eb = spin->execbuf;
>   
>   	eb.flags &= ~(0x3f | I915_EXEC_BSD_MASK);
> -	eb.flags |= e2ring(gem_fd, e) | I915_EXEC_NO_RELOC;
> +	eb.flags |= e->flags | I915_EXEC_NO_RELOC;
>   	eb.batch_start_offset += offset;
>   
>   	gem_execbuf(gem_fd, &eb);
> @@ -497,13 +492,13 @@ most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
>   	unsigned int idle_idx, i;
>   
>   	i = 0;
> -	for_each_engine_class_instance(gem_fd, e_) {
> -		if (e == e_)
> +	__for_each_physical_engine(gem_fd, e_) {
> +		if (e->class == e_->class && e->instance == e_->instance)
>   			idle_idx = i;
>   		else if (spin)
>   			__submit_spin_batch(gem_fd, spin, e_, 64);
>   		else
> -			spin = __spin_poll(gem_fd, 0, e2ring(gem_fd, e_));
> +			spin = __spin_poll(gem_fd, 0, e->flags);
>   
>   		val[i++] = I915_PMU_ENGINE_BUSY(e_->class, e_->instance);
>   	}
> @@ -554,11 +549,11 @@ all_busy_check_all(int gem_fd, const unsigned int num_engines,
>   	unsigned int i;
>   
>   	i = 0;
> -	for_each_engine_class_instance(gem_fd, e) {
> +	__for_each_physical_engine(gem_fd, e) {
>   		if (spin)
>   			__submit_spin_batch(gem_fd, spin, e, 64);
>   		else
> -			spin = __spin_poll(gem_fd, 0, e2ring(gem_fd, e));
> +			spin = __spin_poll(gem_fd, 0, e->flags);
>   
>   		val[i++] = I915_PMU_ENGINE_BUSY(e->class, e->instance);
>   	}
> @@ -602,7 +597,7 @@ no_sema(int gem_fd, const struct intel_execution_engine2 *e, unsigned int flags)
>   	open_group(I915_PMU_ENGINE_WAIT(e->class, e->instance), fd);
>   
>   	if (flags & TEST_BUSY)
> -		spin = spin_sync(gem_fd, 0, e2ring(gem_fd, e));
> +		spin = spin_sync(gem_fd, 0, e->flags);
>   	else
>   		spin = NULL;
>   
> @@ -689,7 +684,7 @@ sema_wait(int gem_fd, const struct intel_execution_engine2 *e,
>   
>   	eb.buffer_count = 2;
>   	eb.buffers_ptr = to_user_pointer(obj);
> -	eb.flags = e2ring(gem_fd, e);
> +	eb.flags = e->flags;
>   
>   	/**
>   	 * Start the semaphore wait PMU and after some known time let the above
> @@ -845,7 +840,7 @@ event_wait(int gem_fd, const struct intel_execution_engine2 *e)
>   
>   	eb.buffer_count = 1;
>   	eb.buffers_ptr = to_user_pointer(&obj);
> -	eb.flags = e2ring(gem_fd, e) | I915_EXEC_SECURE;
> +	eb.flags = e->flags | I915_EXEC_SECURE;
>   
>   	for_each_pipe_with_valid_output(&data.display, p, output) {
>   		struct igt_helper_process waiter = { };
> @@ -936,7 +931,7 @@ multi_client(int gem_fd, const struct intel_execution_engine2 *e)
>   	 */
>   	fd[1] = open_pmu(config);
>   
> -	spin = spin_sync(gem_fd, 0, e2ring(gem_fd, e));
> +	spin = spin_sync(gem_fd, 0, e->flags);
>   
>   	val[0] = val[1] = __pmu_read_single(fd[0], &ts[0]);
>   	slept[1] = measured_usleep(batch_duration_ns / 1000);
> @@ -1465,7 +1460,7 @@ test_enable_race(int gem_fd, const struct intel_execution_engine2 *e)
>   
>   	eb.buffer_count = 1;
>   	eb.buffers_ptr = to_user_pointer(&obj);
> -	eb.flags = e2ring(gem_fd, e);
> +	eb.flags = e->flags;
>   
>   	/*
>   	 * This test is probabilistic so run in a few times to increase the
> @@ -1570,7 +1565,7 @@ accuracy(int gem_fd, const struct intel_execution_engine2 *e,
>   		igt_spin_t *spin;
>   
>   		/* Allocate our spin batch and idle it. */
> -		spin = igt_spin_batch_new(gem_fd, .engine = e2ring(gem_fd, e));
> +		spin = igt_spin_batch_new(gem_fd, .engine = e->flags);
>   		igt_spin_batch_end(spin);
>   		gem_sync(gem_fd, spin->handle);
>   
> @@ -1674,7 +1669,7 @@ igt_main
>   				I915_PMU_LAST - __I915_PMU_OTHER(0) + 1;
>   	unsigned int num_engines = 0;
>   	int fd = -1;
> -	const struct intel_execution_engine2 *e;
> +	struct intel_execution_engine2 *e;
>   	unsigned int i;
>   
>   	igt_fixture {
> @@ -1683,7 +1678,7 @@ igt_main
>   		igt_require_gem(fd);
>   		igt_require(i915_type_id() > 0);
>   
> -		for_each_engine_class_instance(fd, e)
> +		__for_each_physical_engine(fd, e)
>   			num_engines++;
>   	}
>   
> @@ -1693,7 +1688,7 @@ igt_main
>   	igt_subtest("invalid-init")
>   		invalid_init();
>   
> -	__for_each_engine_class_instance(e) {
> +	__for_each_physical_engine(fd, e) {
>   		const unsigned int pct[] = { 2, 50, 98 };
>   
>   		/**
> @@ -1897,7 +1892,7 @@ igt_main
>   			gem_quiescent_gpu(fd);
>   		}
>   
> -		__for_each_engine_class_instance(e) {
> +		__for_each_physical_engine(fd, e) {
>   			igt_subtest_group {
>   				igt_fixture {
>   					gem_require_engine(render_fd,
> 
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev