* [igt-dev] [PATCH i-g-t 2/5] lib/gen6_render.h: Use gen6 definitions where it is possible
2018-06-08 11:38 [igt-dev] [PATCH i-g-t 1/5] lib/gen7_render: include gen6_render header Lukasz Kalamarz
@ 2018-06-08 11:38 ` Lukasz Kalamarz
2018-06-11 7:44 ` Katarzyna Dec
2018-06-08 11:38 ` [igt-dev] [PATCH i-g-t 3/5] lib/gen7_render: Drop duplicated definitions Lukasz Kalamarz
` (5 subsequent siblings)
6 siblings, 1 reply; 16+ messages in thread
From: Lukasz Kalamarz @ 2018-06-08 11:38 UTC (permalink / raw)
To: igt-dev
As long as it is applicable, We should use in our libs
definitions from oldest gen if it is possible. This patch
reuse gen6 definitons if registers/fields/shifts that were
reintroduced in other genX_render headers.
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Ewelina Musial <ewelina.musial@intel.com>
---
lib/rendercopy_gen7.c | 108 +++++++++++++-------------
lib/rendercopy_gen8.c | 4 +-
lib/rendercopy_gen9.c | 4 +-
tools/null_state_gen/intel_renderstate_gen7.c | 108 +++++++++++++-------------
tools/null_state_gen/intel_renderstate_gen8.c | 10 +--
tools/null_state_gen/intel_renderstate_gen9.c | 10 +--
6 files changed, 122 insertions(+), 122 deletions(-)
diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c
index 82e33288..bdcf3c7b 100644
--- a/lib/rendercopy_gen7.c
+++ b/lib/rendercopy_gen7.c
@@ -101,35 +101,35 @@ gen7_bind_buf(struct intel_batchbuffer *batch,
static void
gen7_emit_vertex_elements(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_VERTEX_ELEMENTS |
+ OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS |
((2 * (1 + 2)) + 1 - 2));
- OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
- SURFACEFORMAT_R32G32B32A32_FLOAT << GEN7_VE0_FORMAT_SHIFT |
- 0 << GEN7_VE0_OFFSET_SHIFT);
+ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID |
+ SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT |
+ 0 << VE0_OFFSET_SHIFT);
- OUT_BATCH(GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_0_SHIFT |
- GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_1_SHIFT |
- GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT |
- GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_3_SHIFT);
+ OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT |
+ GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT |
+ GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT |
+ GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT);
/* x,y */
- OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
- SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT |
- 0 << GEN7_VE0_OFFSET_SHIFT); /* offsets vb in bytes */
- OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT |
- GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT |
- GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT |
- GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT);
+ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID |
+ SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT |
+ 0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */
+ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT |
+ GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT |
+ GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT |
+ GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT);
/* s,t */
- OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
- SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT |
- 4 << GEN7_VE0_OFFSET_SHIFT); /* offset vb in bytes */
- OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT |
- GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT |
- GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT |
- GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT);
+ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID |
+ SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT |
+ 4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */
+ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT |
+ GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT |
+ GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT |
+ GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT);
}
static uint32_t
@@ -166,11 +166,11 @@ static void gen7_emit_vertex_buffer(struct intel_batchbuffer *batch,
int width, int height,
uint32_t offset)
{
- OUT_BATCH(GEN7_3DSTATE_VERTEX_BUFFERS | (5 - 2));
- OUT_BATCH(0 << GEN7_VB0_BUFFER_INDEX_SHIFT |
- GEN7_VB0_VERTEXDATA |
+ OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | (5 - 2));
+ OUT_BATCH(0 << VB0_BUFFER_INDEX_SHIFT |
+ VB0_VERTEXDATA |
GEN7_VB0_ADDRESS_MODIFY_ENABLE |
- 4 * 2 << GEN7_VB0_BUFFER_PITCH_SHIFT);
+ 4 * 2 << VB0_BUFFER_PITCH_SHIFT);
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_VERTEX, 0, offset);
OUT_BATCH(~0);
@@ -207,7 +207,7 @@ gen7_emit_binding_table(struct intel_batchbuffer *batch,
static void
gen7_emit_drawing_rectangle(struct intel_batchbuffer *batch, struct igt_buf *dst)
{
- OUT_BATCH(GEN7_3DSTATE_DRAWING_RECTANGLE | (4 - 2));
+ OUT_BATCH(GEN6_3DSTATE_DRAWING_RECTANGLE | (4 - 2));
OUT_BATCH(0);
OUT_BATCH((igt_buf_height(dst) - 1) << 16 | (igt_buf_width(dst) - 1));
OUT_BATCH(0);
@@ -216,13 +216,13 @@ gen7_emit_drawing_rectangle(struct intel_batchbuffer *batch, struct igt_buf *dst
static uint32_t
gen7_create_blend_state(struct intel_batchbuffer *batch)
{
- struct gen7_blend_state *blend;
+ struct gen6_blend_state *blend;
blend = intel_batchbuffer_subdata_alloc(batch, sizeof(*blend), 64);
- blend->blend0.dest_blend_factor = GEN7_BLENDFACTOR_ZERO;
- blend->blend0.source_blend_factor = GEN7_BLENDFACTOR_ONE;
- blend->blend0.blend_func = GEN7_BLENDFUNCTION_ADD;
+ blend->blend0.dest_blend_factor = GEN6_BLENDFACTOR_ZERO;
+ blend->blend0.source_blend_factor = GEN6_BLENDFACTOR_ONE;
+ blend->blend0.blend_func = GEN6_BLENDFUNCTION_ADD;
blend->blend1.post_blend_clamp_enable = 1;
blend->blend1.pre_blend_clamp_enable = 1;
@@ -232,7 +232,7 @@ gen7_create_blend_state(struct intel_batchbuffer *batch)
static void
gen7_emit_state_base_address(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_STATE_BASE_ADDRESS | (10 - 2));
+ OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (10 - 2));
OUT_BATCH(0);
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
@@ -248,7 +248,7 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
static uint32_t
gen7_create_cc_viewport(struct intel_batchbuffer *batch)
{
- struct gen7_cc_viewport *vp;
+ struct gen6_cc_viewport *vp;
vp = intel_batchbuffer_subdata_alloc(batch, sizeof(*vp), 32);
vp->min_depth = -1.e35;
@@ -275,12 +275,12 @@ gen7_create_sampler(struct intel_batchbuffer *batch)
ss = intel_batchbuffer_subdata_alloc(batch, sizeof(*ss), 32);
- ss->ss0.min_filter = GEN7_MAPFILTER_NEAREST;
- ss->ss0.mag_filter = GEN7_MAPFILTER_NEAREST;
+ ss->ss0.min_filter = GEN6_MAPFILTER_NEAREST;
+ ss->ss0.mag_filter = GEN6_MAPFILTER_NEAREST;
- ss->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
- ss->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
- ss->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
+ ss->ss3.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP;
+ ss->ss3.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP;
+ ss->ss3.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP;
ss->ss3.non_normalized_coord = 1;
@@ -297,13 +297,13 @@ gen7_emit_sampler(struct intel_batchbuffer *batch, uint32_t sampler_off)
static void
gen7_emit_multisample(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE | (4 - 2));
- OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER |
- GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */
+ OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE | (4 - 2));
+ OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER |
+ GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */
OUT_BATCH(0);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_SAMPLE_MASK | (2 - 2));
+ OUT_BATCH(GEN6_3DSTATE_SAMPLE_MASK | (2 - 2));
OUT_BATCH(1);
}
@@ -335,7 +335,7 @@ gen7_emit_urb(struct intel_batchbuffer *batch)
static void
gen7_emit_vs(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_VS | (6 - 2));
+ OUT_BATCH(GEN6_3DSTATE_VS | (6 - 2));
OUT_BATCH(0); /* no VS kernel */
OUT_BATCH(0);
OUT_BATCH(0);
@@ -378,7 +378,7 @@ gen7_emit_ds(struct intel_batchbuffer *batch)
static void
gen7_emit_gs(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_GS | (7 - 2));
+ OUT_BATCH(GEN6_3DSTATE_GS | (7 - 2));
OUT_BATCH(0); /* no GS kernel */
OUT_BATCH(0);
OUT_BATCH(0);
@@ -398,10 +398,10 @@ gen7_emit_streamout(struct intel_batchbuffer *batch)
static void
gen7_emit_sf(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_SF | (7 - 2));
+ OUT_BATCH(GEN6_3DSTATE_SF | (7 - 2));
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_SF_CULL_NONE);
- OUT_BATCH(2 << GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT);
+ OUT_BATCH(GEN6_3DSTATE_SF_CULL_NONE);
+ OUT_BATCH(2 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT);
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
@@ -454,7 +454,7 @@ gen7_emit_ps(struct intel_batchbuffer *batch, uint32_t kernel_off)
static void
gen7_emit_clip(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_CLIP | (4 - 2));
+ OUT_BATCH(GEN6_3DSTATE_CLIP | (4 - 2));
OUT_BATCH(0);
OUT_BATCH(0); /* pass-through */
OUT_BATCH(0);
@@ -466,7 +466,7 @@ gen7_emit_clip(struct intel_batchbuffer *batch)
static void
gen7_emit_wm(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_WM | (3 - 2));
+ OUT_BATCH(GEN6_3DSTATE_WM | (3 - 2));
OUT_BATCH(GEN7_WM_DISPATCH_ENABLE |
GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC);
OUT_BATCH(0);
@@ -476,8 +476,8 @@ static void
gen7_emit_null_depth_buffer(struct intel_batchbuffer *batch)
{
OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7 - 2));
- OUT_BATCH(SURFACE_NULL << GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT |
- GEN7_DEPTHFORMAT_D32_FLOAT << GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT);
+ OUT_BATCH(SURFACE_NULL << GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT |
+ GEN6_DEPTHFORMAT_D32_FLOAT << GEN6_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT);
OUT_BATCH(0); /* disable depth, stencil and hiz */
OUT_BATCH(0);
OUT_BATCH(0);
@@ -520,7 +520,7 @@ void gen7_render_copyfunc(struct intel_batchbuffer *batch,
igt_assert(batch->ptr < &batch->buffer[4095]);
batch->ptr = batch->buffer;
- OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_3D);
+ OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D);
gen7_emit_state_base_address(batch);
gen7_emit_multisample(batch);
@@ -546,8 +546,8 @@ void gen7_render_copyfunc(struct intel_batchbuffer *batch,
gen7_emit_binding_table(batch, src, dst, ps_binding_table);
gen7_emit_drawing_rectangle(batch, dst);
- OUT_BATCH(GEN7_3DPRIMITIVE | (7 - 2));
- OUT_BATCH(GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST);
+ OUT_BATCH(GEN6_3DPRIMITIVE | (7 - 2));
+ OUT_BATCH(GEN6_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST);
OUT_BATCH(3);
OUT_BATCH(0);
OUT_BATCH(1); /* single instance */
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index b60d18a7..a328e2bd 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -622,7 +622,7 @@ gen8_emit_hs(struct intel_batchbuffer *batch) {
static void
gen8_emit_gs(struct intel_batchbuffer *batch) {
- OUT_BATCH(GEN7_3DSTATE_CONSTANT_GS | (11 - 2));
+ OUT_BATCH(GEN6_3DSTATE_CONSTANT_GS | (11 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
@@ -634,7 +634,7 @@ gen8_emit_gs(struct intel_batchbuffer *batch) {
OUT_BATCH(0);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_GS | (10-2));
+ OUT_BATCH(GEN6_3DSTATE_GS | (10-2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index ea69b95f..d1d72594 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -619,7 +619,7 @@ gen8_emit_hs(struct intel_batchbuffer *batch) {
static void
gen8_emit_gs(struct intel_batchbuffer *batch) {
- OUT_BATCH(GEN7_3DSTATE_CONSTANT_GS | (11-2));
+ OUT_BATCH(GEN6_3DSTATE_CONSTANT_GS | (11-2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
@@ -631,7 +631,7 @@ gen8_emit_gs(struct intel_batchbuffer *batch) {
OUT_BATCH(0);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_GS | (10-2));
+ OUT_BATCH(GEN6_3DSTATE_GS | (10-2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
diff --git a/tools/null_state_gen/intel_renderstate_gen7.c b/tools/null_state_gen/intel_renderstate_gen7.c
index ea5cfc29..75ee9d6d 100644
--- a/tools/null_state_gen/intel_renderstate_gen7.c
+++ b/tools/null_state_gen/intel_renderstate_gen7.c
@@ -49,36 +49,36 @@ gen7_bind_buf_null(struct intel_batchbuffer *batch)
static void
gen7_emit_vertex_elements(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_VERTEX_ELEMENTS |
+ OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS |
((2 * (1 + 2)) + 1 - 2));
- OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
+ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID |
SURFACEFORMAT_R32G32B32A32_FLOAT <<
- GEN7_VE0_FORMAT_SHIFT |
- 0 << GEN7_VE0_OFFSET_SHIFT);
+ VE0_FORMAT_SHIFT |
+ 0 << VE0_OFFSET_SHIFT);
- OUT_BATCH(GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_0_SHIFT |
- GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_1_SHIFT |
- GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT |
- GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_3_SHIFT);
+ OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT |
+ GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT |
+ GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT |
+ GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT);
/* x,y */
- OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
- SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT |
- 0 << GEN7_VE0_OFFSET_SHIFT); /* offsets vb in bytes */
- OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT |
- GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT |
- GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT |
- GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT);
+ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID |
+ SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT |
+ 0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */
+ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT |
+ GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT |
+ GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT |
+ GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT);
/* s,t */
- OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
- SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT |
- 4 << GEN7_VE0_OFFSET_SHIFT); /* offset vb in bytes */
- OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT |
- GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT |
- GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT |
- GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT);
+ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID |
+ SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT |
+ 4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */
+ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT |
+ GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT |
+ GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT |
+ GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT);
}
static uint32_t
@@ -95,12 +95,12 @@ static void gen7_emit_vertex_buffer(struct intel_batchbuffer *batch)
offset = gen7_create_vertex_buffer(batch);
- OUT_BATCH(GEN7_3DSTATE_VERTEX_BUFFERS | (5 - 2));
- OUT_BATCH(0 << GEN7_VB0_BUFFER_INDEX_SHIFT |
- GEN7_VB0_VERTEXDATA |
+ OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | (5 - 2));
+ OUT_BATCH(0 << VB0_BUFFER_INDEX_SHIFT |
+ VB0_VERTEXDATA |
GEN7_VB0_ADDRESS_MODIFY_ENABLE |
- GEN7_VB0_NULL_VERTEX_BUFFER |
- 4*2 << GEN7_VB0_BUFFER_PITCH_SHIFT);
+ VB0_NULL_VERTEX_BUFFER |
+ 4*2 << VB0_BUFFER_PITCH_SHIFT);
OUT_RELOC_STATE(batch, I915_GEM_DOMAIN_VERTEX, 0, offset);
OUT_BATCH(~0);
@@ -130,7 +130,7 @@ gen7_emit_binding_table(struct intel_batchbuffer *batch)
static void
gen7_emit_drawing_rectangle(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_DRAWING_RECTANGLE | (4 - 2));
+ OUT_BATCH(GEN6_3DSTATE_DRAWING_RECTANGLE | (4 - 2));
/* Purposedly set min > max for null rectangle */
OUT_BATCH(0xffffffff);
OUT_BATCH(0 | 0);
@@ -140,12 +140,12 @@ gen7_emit_drawing_rectangle(struct intel_batchbuffer *batch)
static uint32_t
gen7_create_blend_state(struct intel_batchbuffer *batch)
{
- struct gen7_blend_state blend;
+ struct gen6_blend_state blend;
memset(&blend, 0, sizeof(blend));
- blend.blend0.dest_blend_factor = GEN7_BLENDFACTOR_ZERO;
- blend.blend0.source_blend_factor = GEN7_BLENDFACTOR_ONE;
- blend.blend0.blend_func = GEN7_BLENDFUNCTION_ADD;
+ blend.blend0.dest_blend_factor = GEN6_BLENDFACTOR_ZERO;
+ blend.blend0.source_blend_factor = GEN6_BLENDFACTOR_ONE;
+ blend.blend0.blend_func = GEN6_BLENDFUNCTION_ADD;
blend.blend1.post_blend_clamp_enable = 1;
blend.blend1.pre_blend_clamp_enable = 1;
@@ -155,7 +155,7 @@ gen7_create_blend_state(struct intel_batchbuffer *batch)
static void
gen7_emit_state_base_address(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_STATE_BASE_ADDRESS | (10 - 2));
+ OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (10 - 2));
OUT_BATCH(0);
OUT_RELOC(batch, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
OUT_RELOC(batch, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
@@ -171,7 +171,7 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
static uint32_t
gen7_create_cc_viewport(struct intel_batchbuffer *batch)
{
- struct gen7_cc_viewport vp;
+ struct gen6_cc_viewport vp;
memset(&vp, 0, sizeof(vp));
vp.min_depth = -1.e35;
@@ -196,12 +196,12 @@ gen7_create_sampler(struct intel_batchbuffer *batch)
struct gen7_sampler_state ss;
memset(&ss, 0, sizeof(ss));
- ss.ss0.min_filter = GEN7_MAPFILTER_NEAREST;
- ss.ss0.mag_filter = GEN7_MAPFILTER_NEAREST;
+ ss.ss0.min_filter = GEN6_MAPFILTER_NEAREST;
+ ss.ss0.mag_filter = GEN6_MAPFILTER_NEAREST;
- ss.ss3.r_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
- ss.ss3.s_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
- ss.ss3.t_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
+ ss.ss3.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP;
+ ss.ss3.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP;
+ ss.ss3.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP;
ss.ss3.non_normalized_coord = 1;
@@ -218,13 +218,13 @@ gen7_emit_sampler(struct intel_batchbuffer *batch)
static void
gen7_emit_multisample(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE | (4 - 2));
- OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER |
- GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */
+ OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE | (4 - 2));
+ OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER |
+ GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */
OUT_BATCH(0);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_SAMPLE_MASK | (2 - 2));
+ OUT_BATCH(GEN6_3DSTATE_SAMPLE_MASK | (2 - 2));
OUT_BATCH(1);
}
@@ -256,7 +256,7 @@ gen7_emit_urb(struct intel_batchbuffer *batch)
static void
gen7_emit_vs(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_VS | (6 - 2));
+ OUT_BATCH(GEN6_3DSTATE_VS | (6 - 2));
OUT_BATCH(0); /* no VS kernel */
OUT_BATCH(0);
OUT_BATCH(0);
@@ -299,7 +299,7 @@ gen7_emit_ds(struct intel_batchbuffer *batch)
static void
gen7_emit_gs(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_GS | (7 - 2));
+ OUT_BATCH(GEN6_3DSTATE_GS | (7 - 2));
OUT_BATCH(0); /* no GS kernel */
OUT_BATCH(0);
OUT_BATCH(0);
@@ -319,10 +319,10 @@ gen7_emit_streamout(struct intel_batchbuffer *batch)
static void
gen7_emit_sf(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_SF | (7 - 2));
+ OUT_BATCH(GEN6_3DSTATE_SF | (7 - 2));
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_SF_CULL_NONE);
- OUT_BATCH(2 << GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT);
+ OUT_BATCH(GEN6_3DSTATE_SF_CULL_NONE);
+ OUT_BATCH(2 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT);
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
@@ -379,7 +379,7 @@ gen7_emit_ps(struct intel_batchbuffer *batch)
static void
gen7_emit_clip(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_CLIP | (4 - 2));
+ OUT_BATCH(GEN6_3DSTATE_CLIP | (4 - 2));
OUT_BATCH(0);
OUT_BATCH(0); /* pass-through */
OUT_BATCH(0);
@@ -391,7 +391,7 @@ gen7_emit_clip(struct intel_batchbuffer *batch)
static void
gen7_emit_wm(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_3DSTATE_WM | (3 - 2));
+ OUT_BATCH(GEN6_3DSTATE_WM | (3 - 2));
OUT_BATCH(GEN7_WM_DISPATCH_ENABLE |
GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC);
OUT_BATCH(0);
@@ -402,7 +402,7 @@ gen7_emit_null_depth_buffer(struct intel_batchbuffer *batch)
{
OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7 - 2));
OUT_BATCH(SURFACE_NULL << GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT |
- GEN7_DEPTHFORMAT_D32_FLOAT <<
+ GEN6_DEPTHFORMAT_D32_FLOAT <<
GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT);
OUT_BATCH(0); /* disable depth, stencil and hiz */
OUT_BATCH(0);
@@ -417,7 +417,7 @@ gen7_emit_null_depth_buffer(struct intel_batchbuffer *batch)
void gen7_setup_null_render_state(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_3D);
+ OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D);
gen7_emit_state_base_address(batch);
gen7_emit_multisample(batch);
@@ -442,8 +442,8 @@ void gen7_setup_null_render_state(struct intel_batchbuffer *batch)
gen7_emit_binding_table(batch);
gen7_emit_drawing_rectangle(batch);
- OUT_BATCH(GEN7_3DPRIMITIVE | (7 - 2));
- OUT_BATCH(GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST);
+ OUT_BATCH(GEN6_3DPRIMITIVE | (7 - 2));
+ OUT_BATCH(GEN6_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST);
OUT_BATCH(3);
OUT_BATCH(0);
OUT_BATCH(1); /* single instance */
diff --git a/tools/null_state_gen/intel_renderstate_gen8.c b/tools/null_state_gen/intel_renderstate_gen8.c
index 6a309d43..08def120 100644
--- a/tools/null_state_gen/intel_renderstate_gen8.c
+++ b/tools/null_state_gen/intel_renderstate_gen8.c
@@ -346,7 +346,7 @@ void gen8_setup_null_render_state(struct intel_batchbuffer *batch)
gen8_emit_vs(batch);
gen8_emit_hs(batch);
- OUT_CMD(GEN7_3DSTATE_GS, 10);
+ OUT_CMD(GEN6_3DSTATE_GS, 10);
OUT_CMD(GEN7_3DSTATE_STREAMOUT, 5);
OUT_CMD(GEN7_3DSTATE_DS, 9);
OUT_CMD(GEN6_3DSTATE_CLIP, 4);
@@ -368,8 +368,8 @@ void gen8_setup_null_render_state(struct intel_batchbuffer *batch)
OUT_CMD(GEN6_3DSTATE_CONSTANT_VS, 11);
OUT_CMD(GEN7_3DSTATE_CONSTANT_HS, 11);
OUT_CMD(GEN7_3DSTATE_CONSTANT_DS, 11);
- OUT_CMD(GEN7_3DSTATE_CONSTANT_GS, 11);
- OUT_CMD(GEN7_3DSTATE_CONSTANT_PS, 11);
+ OUT_CMD(GEN6_3DSTATE_CONSTANT_GS, 11);
+ OUT_CMD(GEN6_3DSTATE_CONSTANT_PS, 11);
OUT_CMD(GEN8_3DSTATE_VF_INSTANCING, 3);
OUT_CMD(GEN8_3DSTATE_VF_SGVS, 2);
@@ -399,8 +399,8 @@ void gen8_setup_null_render_state(struct intel_batchbuffer *batch)
OUT_CMD(GEN7_3DSTATE_CLEAR_PARAMS, 3);
OUT_CMD(GEN6_3DSTATE_MONOFILTER_SIZE, 2);
OUT_CMD(GEN8_3DSTATE_MULTISAMPLE, 2);
- OUT_CMD(GEN8_3DSTATE_POLY_STIPPLE_OFFSET, 2);
- OUT_CMD(GEN8_3DSTATE_POLY_STIPPLE_PATTERN, 33);
+ OUT_CMD(GEN6_3DSTATE_POLY_STIPPLE_OFFSET, 2);
+ OUT_CMD(GEN6_3DSTATE_POLY_STIPPLE_PATTERN, 33);
OUT_CMD(GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0, 16 + 1);
OUT_CMD(GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1, 16 + 1);
OUT_CMD(GEN6_3DSTATE_INDEX_BUFFER, 5);
diff --git a/tools/null_state_gen/intel_renderstate_gen9.c b/tools/null_state_gen/intel_renderstate_gen9.c
index a0b7d8ad..1b77e552 100644
--- a/tools/null_state_gen/intel_renderstate_gen9.c
+++ b/tools/null_state_gen/intel_renderstate_gen9.c
@@ -369,7 +369,7 @@ void gen9_setup_null_render_state(struct intel_batchbuffer *batch)
gen8_emit_vs(batch);
gen8_emit_hs(batch);
- OUT_CMD(GEN7_3DSTATE_GS, 10);
+ OUT_CMD(GEN6_3DSTATE_GS, 10);
OUT_CMD(GEN7_3DSTATE_STREAMOUT, 5);
OUT_CMD(GEN7_3DSTATE_DS, 11); /* Check w/ Gen8 code */
OUT_CMD(GEN6_3DSTATE_CLIP, 4);
@@ -396,8 +396,8 @@ void gen9_setup_null_render_state(struct intel_batchbuffer *batch)
OUT_CMD(GEN6_3DSTATE_CONSTANT_VS, 11);
OUT_CMD(GEN7_3DSTATE_CONSTANT_HS, 11);
OUT_CMD(GEN7_3DSTATE_CONSTANT_DS, 11);
- OUT_CMD(GEN7_3DSTATE_CONSTANT_GS, 11);
- OUT_CMD(GEN7_3DSTATE_CONSTANT_PS, 11);
+ OUT_CMD(GEN6_3DSTATE_CONSTANT_GS, 11);
+ OUT_CMD(GEN6_3DSTATE_CONSTANT_PS, 11);
OUT_CMD(GEN8_3DSTATE_VF_INSTANCING, 3);
OUT_CMD(GEN8_3DSTATE_VF_SGVS, 2);
@@ -430,8 +430,8 @@ void gen9_setup_null_render_state(struct intel_batchbuffer *batch)
OUT_CMD(GEN7_3DSTATE_CLEAR_PARAMS, 3);
OUT_CMD(GEN6_3DSTATE_MONOFILTER_SIZE, 2);
OUT_CMD(GEN8_3DSTATE_MULTISAMPLE, 2);
- OUT_CMD(GEN8_3DSTATE_POLY_STIPPLE_OFFSET, 2);
- OUT_CMD(GEN8_3DSTATE_POLY_STIPPLE_PATTERN, 1 + 32);
+ OUT_CMD(GEN6_3DSTATE_POLY_STIPPLE_OFFSET, 2);
+ OUT_CMD(GEN6_3DSTATE_POLY_STIPPLE_PATTERN, 1 + 32);
OUT_CMD(GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0, 1 + 16);
OUT_CMD(GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1, 1 + 16);
OUT_CMD(GEN6_3DSTATE_INDEX_BUFFER, 5);
--
2.14.3
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^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [igt-dev] [PATCH i-g-t 2/5] lib/gen6_render.h: Use gen6 definitions where it is possible
2018-06-08 11:38 ` [igt-dev] [PATCH i-g-t 2/5] lib/gen6_render.h: Use gen6 definitions where it is possible Lukasz Kalamarz
@ 2018-06-11 7:44 ` Katarzyna Dec
2018-06-11 12:46 ` Kalamarz, Lukasz
0 siblings, 1 reply; 16+ messages in thread
From: Katarzyna Dec @ 2018-06-11 7:44 UTC (permalink / raw)
To: Lukasz Kalamarz; +Cc: igt-dev
On Fri, Jun 08, 2018 at 01:38:52PM +0200, Lukasz Kalamarz wrote:
I think lib/gen6_render.h header is not for this patch.
And with adding new header title needs to be changed I guess.
(this header confused my when I started to do a review on Fri - I thought
that changes are made in gen6_render :) )
I would also changed commit msg, maybe sth like this:
> As long as it is applicable, We should use in our libs
> definitions from oldest gen if it is possible.
When using genX_render definitions, we should use the oldest definition it
is possible.
> This patch
> reuse gen6 definitons if registers/fields/shifts that were
> reintroduced in other genX_render headers.
>
> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Ewelina Musial <ewelina.musial@intel.com>
> ---
> lib/rendercopy_gen7.c | 108 +++++++++++++-------------
> lib/rendercopy_gen8.c | 4 +-
> lib/rendercopy_gen9.c | 4 +-
> tools/null_state_gen/intel_renderstate_gen7.c | 108 +++++++++++++-------------
> tools/null_state_gen/intel_renderstate_gen8.c | 10 +--
> tools/null_state_gen/intel_renderstate_gen9.c | 10 +--
> 6 files changed, 122 insertions(+), 122 deletions(-)
>
> diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c
> index 82e33288..bdcf3c7b 100644
> --- a/lib/rendercopy_gen7.c
> +++ b/lib/rendercopy_gen7.c
> @@ -101,35 +101,35 @@ gen7_bind_buf(struct intel_batchbuffer *batch,
> static void
> gen7_emit_vertex_elements(struct intel_batchbuffer *batch)
> {
> - OUT_BATCH(GEN7_3DSTATE_VERTEX_ELEMENTS |
> + OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS |
> ((2 * (1 + 2)) + 1 - 2));
>
> - OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
> - SURFACEFORMAT_R32G32B32A32_FLOAT << GEN7_VE0_FORMAT_SHIFT |
> - 0 << GEN7_VE0_OFFSET_SHIFT);
> + OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID |
> + SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT |
> + 0 << VE0_OFFSET_SHIFT);
Why GENX_prefix was removed from SURFACEFORMAT_R32G32B32A32_FLOAT (in already
merged patches), but this prefix is still in e.g.GEN6_3DSTATE_VERTEX_ELEMENTS?
This is only a question for a reason, not a suggestion :)
Kasia :)
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^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [igt-dev] [PATCH i-g-t 2/5] lib/gen6_render.h: Use gen6 definitions where it is possible
2018-06-11 7:44 ` Katarzyna Dec
@ 2018-06-11 12:46 ` Kalamarz, Lukasz
2018-06-11 13:40 ` Katarzyna Dec
0 siblings, 1 reply; 16+ messages in thread
From: Kalamarz, Lukasz @ 2018-06-11 12:46 UTC (permalink / raw)
To: Dec, Katarzyna; +Cc: igt-dev@lists.freedesktop.org
On Mon, 2018-06-11 at 09:44 +0200, Katarzyna Dec wrote:
> On Fri, Jun 08, 2018 at 01:38:52PM +0200, Lukasz Kalamarz wrote:
> I think lib/gen6_render.h header is not for this patch.
> And with adding new header title needs to be changed I guess.
>
> (this header confused my when I started to do a review on Fri - I
> thought
> that changes are made in gen6_render :) )
>
My bad, will fix that.
> I would also changed commit msg, maybe sth like this:
> > As long as it is applicable, We should use in our libs
> > definitions from oldest gen if it is possible.
>
> When using genX_render definitions, we should use the oldest
> definition it
> is possible.
>
Will fix that in next version.
> > This patch
> > reuse gen6 definitons if registers/fields/shifts that were
> > reintroduced in other genX_render headers.
> >
> > Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> > Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> > Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > Cc: Ewelina Musial <ewelina.musial@intel.com>
> > ---
> > lib/rendercopy_gen7.c | 108 +++++++++++++-
> > ------------
> > lib/rendercopy_gen8.c | 4 +-
> > lib/rendercopy_gen9.c | 4 +-
> > tools/null_state_gen/intel_renderstate_gen7.c | 108 +++++++++++++-
> > ------------
> > tools/null_state_gen/intel_renderstate_gen8.c | 10 +--
> > tools/null_state_gen/intel_renderstate_gen9.c | 10 +--
> > 6 files changed, 122 insertions(+), 122 deletions(-)
> >
> > diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c
> > index 82e33288..bdcf3c7b 100644
> > --- a/lib/rendercopy_gen7.c
> > +++ b/lib/rendercopy_gen7.c
> > @@ -101,35 +101,35 @@ gen7_bind_buf(struct intel_batchbuffer
> > *batch,
> > static void
> > gen7_emit_vertex_elements(struct intel_batchbuffer *batch)
> > {
> > - OUT_BATCH(GEN7_3DSTATE_VERTEX_ELEMENTS |
> > + OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS |
> > ((2 * (1 + 2)) + 1 - 2));
> >
> > - OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT |
> > GEN7_VE0_VALID |
> > - SURFACEFORMAT_R32G32B32A32_FLOAT <<
> > GEN7_VE0_FORMAT_SHIFT |
> > - 0 << GEN7_VE0_OFFSET_SHIFT);
> > + OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID |
> > + SURFACEFORMAT_R32G32B32A32_FLOAT <<
> > VE0_FORMAT_SHIFT |
> > + 0 << VE0_OFFSET_SHIFT);
>
> Why GENX_prefix was removed from SURFACEFORMAT_R32G32B32A32_FLOAT (in
> already
> merged patches), but this prefix is still in
> e.g.GEN6_3DSTATE_VERTEX_ELEMENTS?
> This is only a question for a reason, not a suggestion :)
Surface formats were not changing, but some registers/fields/shifts
changed their definitions across gens. This is why I believe we should
stay with this naming convention.
>
> Kasia :)
>
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^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [igt-dev] [PATCH i-g-t 2/5] lib/gen6_render.h: Use gen6 definitions where it is possible
2018-06-11 12:46 ` Kalamarz, Lukasz
@ 2018-06-11 13:40 ` Katarzyna Dec
0 siblings, 0 replies; 16+ messages in thread
From: Katarzyna Dec @ 2018-06-11 13:40 UTC (permalink / raw)
To: Kalamarz, Lukasz; +Cc: igt-dev
On Mon, Jun 11, 2018 at 01:46:26PM +0100, Kalamarz, Lukasz wrote:
> On Mon, 2018-06-11 at 09:44 +0200, Katarzyna Dec wrote:
> > On Fri, Jun 08, 2018 at 01:38:52PM +0200, Lukasz Kalamarz wrote:
> > I think lib/gen6_render.h header is not for this patch.
> > And with adding new header title needs to be changed I guess.
> >
> > (this header confused my when I started to do a review on Fri - I
> > thought
> > that changes are made in gen6_render :) )
> >
>
> My bad, will fix that.
>
> > I would also changed commit msg, maybe sth like this:
> > > As long as it is applicable, We should use in our libs
> > > definitions from oldest gen if it is possible.
> >
> > When using genX_render definitions, we should use the oldest
> > definition it
> > is possible.
> >
>
> Will fix that in next version.
>
> > > This patch
> > > reuse gen6 definitons if registers/fields/shifts that were
> > > reintroduced in other genX_render headers.
> > >
> > > Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> > > Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> > > Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > > Cc: Ewelina Musial <ewelina.musial@intel.com>
> > > ---
> > > lib/rendercopy_gen7.c | 108 +++++++++++++-
> > > ------------
> > > lib/rendercopy_gen8.c | 4 +-
> > > lib/rendercopy_gen9.c | 4 +-
> > > tools/null_state_gen/intel_renderstate_gen7.c | 108 +++++++++++++-
> > > ------------
> > > tools/null_state_gen/intel_renderstate_gen8.c | 10 +--
> > > tools/null_state_gen/intel_renderstate_gen9.c | 10 +--
> > > 6 files changed, 122 insertions(+), 122 deletions(-)
> > >
> > > diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c
> > > index 82e33288..bdcf3c7b 100644
> > > --- a/lib/rendercopy_gen7.c
> > > +++ b/lib/rendercopy_gen7.c
> > > @@ -101,35 +101,35 @@ gen7_bind_buf(struct intel_batchbuffer
> > > *batch,
> > > static void
> > > gen7_emit_vertex_elements(struct intel_batchbuffer *batch)
> > > {
> > > - OUT_BATCH(GEN7_3DSTATE_VERTEX_ELEMENTS |
> > > + OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS |
> > > ((2 * (1 + 2)) + 1 - 2));
> > >
> > > - OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT |
> > > GEN7_VE0_VALID |
> > > - SURFACEFORMAT_R32G32B32A32_FLOAT <<
> > > GEN7_VE0_FORMAT_SHIFT |
> > > - 0 << GEN7_VE0_OFFSET_SHIFT);
> > > + OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID |
> > > + SURFACEFORMAT_R32G32B32A32_FLOAT <<
> > > VE0_FORMAT_SHIFT |
> > > + 0 << VE0_OFFSET_SHIFT);
> >
> > Why GENX_prefix was removed from SURFACEFORMAT_R32G32B32A32_FLOAT (in
> > already
> > merged patches), but this prefix is still in
> > e.g.GEN6_3DSTATE_VERTEX_ELEMENTS?
> > This is only a question for a reason, not a suggestion :)
>
> Surface formats were not changing, but some registers/fields/shifts
> changed their definitions across gens. This is why I believe we should
> stay with this naming convention.
>
Fair enough,
Kasia :)
> >
> > Kasia :)
> >
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^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 3/5] lib/gen7_render: Drop duplicated definitions
2018-06-08 11:38 [igt-dev] [PATCH i-g-t 1/5] lib/gen7_render: include gen6_render header Lukasz Kalamarz
2018-06-08 11:38 ` [igt-dev] [PATCH i-g-t 2/5] lib/gen6_render.h: Use gen6 definitions where it is possible Lukasz Kalamarz
@ 2018-06-08 11:38 ` Lukasz Kalamarz
2018-06-08 11:38 ` [igt-dev] [PATCH i-g-t 4/5] lib/gen8_render: Cleanup of libs Lukasz Kalamarz
` (4 subsequent siblings)
6 siblings, 0 replies; 16+ messages in thread
From: Lukasz Kalamarz @ 2018-06-08 11:38 UTC (permalink / raw)
To: igt-dev
Dropping duplicated definitions of registers,fields
and shiftsm, which were implemented in gen6 and
does not changed in gen7.
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Ewelina Musial <ewelina.musial@intel.com>
---
lib/gen7_render.h | 1100 ++++++-----------------------------------------------
1 file changed, 116 insertions(+), 984 deletions(-)
diff --git a/lib/gen7_render.h b/lib/gen7_render.h
index 0c3d83cd..60e9aad4 100644
--- a/lib/gen7_render.h
+++ b/lib/gen7_render.h
@@ -7,84 +7,8 @@
#define INTEL_MASK(high, low) (((1 << ((high) - (low) + 1)) - 1) << (low))
-#define GEN7_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \
- ((Pipeline) << 27) | \
- ((Opcode) << 24) | \
- ((Subopcode) << 16))
-#define GEN7_STATE_BASE_ADDRESS GEN7_3D(0, 1, 1)
-#define GEN7_STATE_SIP GEN7_3D(0, 1, 2)
-
-#define GEN7_PIPELINE_SELECT GEN7_3D(1, 1, 4)
-
-#define GEN7_MEDIA_STATE_POINTERS GEN7_3D(2, 0, 0)
-#define GEN7_MEDIA_OBJECT GEN7_3D(2, 1, 0)
-
-#define GEN7_3DSTATE_VERTEX_BUFFERS GEN7_3D(3, 0, 8)
-#define GEN7_3DSTATE_VERTEX_ELEMENTS GEN7_3D(3, 0, 9)
-#define GEN7_3DSTATE_INDEX_BUFFER GEN7_3D(3, 0, 0xa)
-#define GEN7_3DSTATE_VF_STATISTICS GEN7_3D(3, 0, 0xb)
-
-#define GEN7_3DSTATE_DRAWING_RECTANGLE GEN7_3D(3, 1, 0)
-#define GEN7_3DSTATE_CONSTANT_COLOR GEN7_3D(3, 1, 1)
-#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD GEN7_3D(3, 1, 2)
-#define GEN7_3DSTATE_CHROMA_KEY GEN7_3D(3, 1, 4)
-
-#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET GEN7_3D(3, 1, 6)
-#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN GEN7_3D(3, 1, 7)
-#define GEN7_3DSTATE_LINE_STIPPLE GEN7_3D(3, 1, 8)
-#define GEN7_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP GEN7_3D(3, 1, 9)
-/* These two are BLC and CTG only, not BW or CL */
-#define GEN7_3DSTATE_AA_LINE_PARAMS GEN7_3D(3, 1, 0xa)
-#define GEN7_3DSTATE_GS_SVB_INDEX GEN7_3D(3, 1, 0xb)
-
-#define GEN7_3DPRIMITIVE GEN7_3D(3, 3, 0)
-
-#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS GEN7_3D(3, 0, 0x02)
-# define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12)
-# define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9)
-# define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8)
-
-#define GEN7_3DSTATE_URB GEN7_3D(3, 0, 0x05)
-/* DW1 */
-# define GEN7_3DSTATE_URB_VS_SIZE_SHIFT 16
-# define GEN7_3DSTATE_URB_VS_ENTRIES_SHIFT 0
-/* DW2 */
-# define GEN7_3DSTATE_URB_GS_ENTRIES_SHIFT 8
-# define GEN7_3DSTATE_URB_GS_SIZE_SHIFT 0
-
-#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS GEN7_3D(3, 0, 0x0d)
-# define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12)
-# define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11)
-# define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10)
-
-#define GEN7_3DSTATE_CC_STATE_POINTERS GEN7_3D(3, 0, 0x0e)
-
-#define GEN7_3DSTATE_VS GEN7_3D(3, 0, 0x10)
-
-#define GEN7_3DSTATE_GS GEN7_3D(3, 0, 0x11)
-/* DW4 */
-# define GEN7_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0
-
-#define GEN7_3DSTATE_CLIP GEN7_3D(3, 0, 0x12)
-
-#define GEN7_3DSTATE_SF GEN7_3D(3, 0, 0x13)
-/* DW1 */
-# define GEN7_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22
-# define GEN7_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11
-# define GEN7_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4
-/* DW2 */
-/* DW3 */
-# define GEN7_3DSTATE_SF_CULL_BOTH (0 << 29)
-# define GEN7_3DSTATE_SF_CULL_NONE (1 << 29)
-# define GEN7_3DSTATE_SF_CULL_FRONT (2 << 29)
-# define GEN7_3DSTATE_SF_CULL_BACK (3 << 29)
-/* DW4 */
-# define GEN7_3DSTATE_SF_TRI_PROVOKE_SHIFT 29
-# define GEN7_3DSTATE_SF_LINE_PROVOKE_SHIFT 27
-# define GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25
-
-#define GEN7_3DSTATE_WM GEN7_3D(3, 0, 0x14)
+/* GEN7_3DSTATE_WM */
/* DW1 */
# define GEN7_WM_STATISTICS_ENABLE (1 << 31)
# define GEN7_WM_DEPTH_CLEAR (1 << 30)
@@ -126,704 +50,142 @@
/* DW2 */
# define GEN7_WM_MSDISPMODE_PERPIXEL (1 << 31)
+/* Surface state DW0 */
+#define GEN7_SURFACE_RC_READ_WRITE (1 << 8)
+#define GEN7_SURFACE_TILED (1 << 14)
+#define GEN7_SURFACE_TILED_Y (1 << 13)
+#define GEN7_SURFACE_FORMAT_SHIFT 18
+#define GEN7_SURFACE_TYPE_SHIFT 29
-#define GEN7_3DSTATE_CONSTANT_VS GEN7_3D(3, 0, 0x15)
-#define GEN7_3DSTATE_CONSTANT_GS GEN7_3D(3, 0, 0x16)
-#define GEN7_3DSTATE_CONSTANT_PS GEN7_3D(3, 0, 0x17)
+/* Surface state DW2 */
+#define GEN7_SURFACE_HEIGHT_SHIFT 16
+#define GEN7_SURFACE_WIDTH_SHIFT 0
-#define GEN7_3DSTATE_SAMPLE_MASK GEN7_3D(3, 0, 0x18)
+/* Surface state DW3 */
+#define GEN7_SURFACE_DEPTH_SHIFT 21
+#define GEN7_SURFACE_PITCH_SHIFT 0
-#define GEN7_3DSTATE_MULTISAMPLE GEN7_3D(3, 1, 0x0d)
+#define HSW_SWIZZLE_ZERO 0
+#define HSW_SWIZZLE_ONE 1
+#define HSW_SWIZZLE_RED 4
+#define HSW_SWIZZLE_GREEN 5
+#define HSW_SWIZZLE_BLUE 6
+#define HSW_SWIZZLE_ALPHA 7
+#define __HSW_SURFACE_SWIZZLE(r,g,b,a) \
+ ((a) << 16 | (b) << 19 | (g) << 22 | (r) << 25)
+#define HSW_SURFACE_SWIZZLE(r,g,b,a) \
+ __HSW_SURFACE_SWIZZLE(HSW_SWIZZLE_##r, HSW_SWIZZLE_##g, HSW_SWIZZLE_##b, HSW_SWIZZLE_##a)
+
+/* _3DSTATE_VERTEX_BUFFERS on GEN7*/
/* DW1 */
-# define GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4)
-# define GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4)
-# define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1)
-# define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1)
-# define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1)
+#define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14)
-#define PIPELINE_SELECT_3D 0
-#define PIPELINE_SELECT_MEDIA 1
+/* _3DPRIMITIVE on GEN7 */
+/* DW1 */
+# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8)
+# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8)
+
+#define GEN7_3DSTATE_CLEAR_PARAMS GEN6_3D(3, 0, 0x04)
+#define GEN7_3DSTATE_DEPTH_BUFFER GEN6_3D(3, 0, 0x05)
+# define GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29
+# define GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18
+/* DW1 */
+# define GEN7_3DSTATE_DEPTH_CLEAR_VALID (1 << 15)
+
+#define GEN7_3DSTATE_CONSTANT_HS GEN6_3D(3, 0, 0x19)
+#define GEN7_3DSTATE_CONSTANT_DS GEN6_3D(3, 0, 0x1a)
+
+#define GEN7_3DSTATE_HS GEN6_3D(3, 0, 0x1b)
+#define GEN7_3DSTATE_TE GEN6_3D(3, 0, 0x1c)
+#define GEN7_3DSTATE_DS GEN6_3D(3, 0, 0x1d)
+#define GEN7_3DSTATE_STREAMOUT GEN6_3D(3, 0, 0x1e)
+#define GEN7_3DSTATE_SBE GEN6_3D(3, 0, 0x1f)
+
+/* DW1 */
+# define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28)
+# define GEN7_SBE_NUM_OUTPUTS_SHIFT 22
+# define GEN7_SBE_SWIZZLE_ENABLE (1 << 21)
+# define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20)
+# define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11
+# define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4
+
+#define GEN7_3DSTATE_PS GEN6_3D(3, 0, 0x20)
+/* DW1: kernel pointer */
+/* DW2 */
+# define GEN7_PS_SPF_MODE (1 << 31)
+# define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30)
+# define GEN7_PS_SAMPLER_COUNT_SHIFT 27
+# define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
+# define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
+# define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16)
+/* DW3: scratch space */
+/* DW4 */
+# define IVB_PS_MAX_THREADS_SHIFT 24
+# define HSW_PS_MAX_THREADS_SHIFT 23
+# define HSW_PS_SAMPLE_MASK_SHIFT 12
+# define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11)
+# define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10)
+# define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9)
+# define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7)
+# define GEN7_PS_POSOFFSET_NONE (0 << 3)
+# define GEN7_PS_POSOFFSET_CENTROID (2 << 3)
+# define GEN7_PS_POSOFFSET_SAMPLE (3 << 3)
+# define GEN7_PS_32_DISPATCH_ENABLE (1 << 2)
+# define GEN7_PS_16_DISPATCH_ENABLE (1 << 1)
+# define GEN7_PS_8_DISPATCH_ENABLE (1 << 0)
+/* DW5 */
+# define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16
+# define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8
+# define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0
+/* DW6: kernel 1 pointer */
+/* DW7: kernel 2 pointer */
+
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL GEN6_3D(3, 0, 0x21)
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC GEN6_3D(3, 0, 0x23)
+
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS GEN6_3D(3, 0, 0x24)
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS GEN6_3D(3, 0, 0x25)
+
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS GEN6_3D(3, 0, 0x26)
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS GEN6_3D(3, 0, 0x27)
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS GEN6_3D(3, 0, 0x28)
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS GEN6_3D(3, 0, 0x29)
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS GEN6_3D(3, 0, 0x2a)
+
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS GEN6_3D(3, 0, 0x2b)
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS GEN6_3D(3, 0, 0x2e)
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS GEN6_3D(3, 0, 0x2f)
+
+#define GEN7_3DSTATE_URB_VS GEN6_3D(3, 0, 0x30)
+#define GEN7_3DSTATE_URB_HS GEN6_3D(3, 0, 0x31)
+#define GEN7_3DSTATE_URB_DS GEN6_3D(3, 0, 0x32)
+#define GEN7_3DSTATE_URB_GS GEN6_3D(3, 0, 0x33)
+/* DW1 */
+# define GEN7_URB_ENTRY_NUMBER_SHIFT 0
+# define GEN7_URB_ENTRY_SIZE_SHIFT 16
+# define GEN7_URB_STARTING_ADDRESS_SHIFT 25
+
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS GEN6_3D(3, 1, 0x12)
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS GEN6_3D(3, 1, 0x16)
+/* DW1 */
+# define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16
/* for GEN7_STATE_BASE_ADDRESS */
#define BASE_ADDRESS_MODIFY (1 << 0)
/* for GEN7_PIPE_CONTROL */
-#define GEN7_PIPE_CONTROL GEN7_3D(3, 2, 0)
#define GEN7_PIPE_CONTROL_CS_STALL (1 << 20)
-#define GEN7_PIPE_CONTROL_NOWRITE (0 << 14)
-#define GEN7_PIPE_CONTROL_WRITE_QWORD (1 << 14)
-#define GEN7_PIPE_CONTROL_WRITE_DEPTH (2 << 14)
-#define GEN7_PIPE_CONTROL_WRITE_TIME (3 << 14)
-#define GEN7_PIPE_CONTROL_DEPTH_STALL (1 << 13)
-#define GEN7_PIPE_CONTROL_WC_FLUSH (1 << 12)
-#define GEN7_PIPE_CONTROL_IS_FLUSH (1 << 11)
-#define GEN7_PIPE_CONTROL_TC_FLUSH (1 << 10)
-#define GEN7_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8)
-#define GEN7_PIPE_CONTROL_GLOBAL_GTT (1 << 2)
-#define GEN7_PIPE_CONTROL_LOCAL_PGTT (0 << 2)
#define GEN7_PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1)
-#define GEN7_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0)
/* VERTEX_BUFFER_STATE Structure */
-#define GEN7_VB0_BUFFER_INDEX_SHIFT 26
-#define GEN7_VB0_VERTEXDATA (0 << 20)
-#define GEN7_VB0_INSTANCEDATA (1 << 20)
-#define GEN7_VB0_BUFFER_PITCH_SHIFT 0
-#define GEN7_VB0_NULL_VERTEX_BUFFER (1 << 13)
#define GEN7_VB0_ADDRESS_MODIFY_ENABLE (1 << 14)
-/* VERTEX_ELEMENT_STATE Structure */
-#define GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT 26
-#define GEN7_VE0_VALID (1 << 25)
-#define GEN7_VE0_FORMAT_SHIFT 16
-#define GEN7_VE0_OFFSET_SHIFT 0
-#define GEN7_VE1_VFCOMPONENT_0_SHIFT 28
-#define GEN7_VE1_VFCOMPONENT_1_SHIFT 24
-#define GEN7_VE1_VFCOMPONENT_2_SHIFT 20
-#define GEN7_VE1_VFCOMPONENT_3_SHIFT 16
-#define GEN7_VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0
-
-/* 3DPRIMITIVE bits */
-#define GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15)
-#define GEN7_3DPRIMITIVE_VERTEX_RANDOM (1 << 15)
-
-#define GEN7_SVG_CTL 0x7400
-
-#define GEN7_SVG_CTL_GS_BA (0 << 8)
-#define GEN7_SVG_CTL_SS_BA (1 << 8)
-#define GEN7_SVG_CTL_IO_BA (2 << 8)
-#define GEN7_SVG_CTL_GS_AUB (3 << 8)
-#define GEN7_SVG_CTL_IO_AUB (4 << 8)
-#define GEN7_SVG_CTL_SIP (5 << 8)
-
-#define GEN7_VF_CTL_SNAPSHOT_COMPLETE (1 << 31)
-#define GEN7_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8)
-#define GEN7_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8)
-#define GEN7_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4)
-#define GEN7_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4)
-#define GEN7_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3)
-#define GEN7_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2)
-#define GEN7_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1)
-#define GEN7_VF_CTL_SNAPSHOT_ENABLE (1 << 0)
-
-#define GEN7_VF_STRG_VAL 0x7504
-#define GEN7_VF_STR_VL_OVR 0x7508
-#define GEN7_VF_VC_OVR 0x750c
-#define GEN7_VF_STR_PSKIP 0x7510
-#define GEN7_VF_MAX_PRIM 0x7514
-#define GEN7_VF_RDATA 0x7518
-
-#define GEN7_VS_CTL 0x7600
-#define GEN7_VS_CTL_SNAPSHOT_COMPLETE (1 << 31)
-#define GEN7_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8)
-#define GEN7_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8)
-#define GEN7_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8)
-#define GEN7_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8)
-#define GEN7_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
-#define GEN7_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
-#define GEN7_VS_CTL_SNAPSHOT_ENABLE (1 << 0)
-
-#define GEN7_VS_STRG_VAL 0x7604
-#define GEN7_VS_RDATA 0x7608
-
-#define GEN7_SF_CTL 0x7b00
-#define GEN7_SF_CTL_SNAPSHOT_COMPLETE (1 << 31)
-#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8)
-#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8)
-#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8)
-#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8)
-#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8)
-#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8)
-#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8)
-#define GEN7_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8)
-#define GEN7_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4)
-#define GEN7_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3)
-#define GEN7_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
-#define GEN7_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
-#define GEN7_SF_CTL_SNAPSHOT_ENABLE (1 << 0)
-
-#define GEN7_SF_STRG_VAL 0x7b04
-#define GEN7_SF_RDATA 0x7b18
-
-#define GEN7_WIZ_CTL 0x7c00
-#define GEN7_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31)
-#define GEN7_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16
-#define GEN7_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8)
-#define GEN7_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8)
-#define GEN7_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8)
-#define GEN7_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6)
-#define GEN7_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5)
-#define GEN7_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4)
-#define GEN7_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3)
-#define GEN7_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
-#define GEN7_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
-#define GEN7_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0)
-
-#define GEN7_WIZ_STRG_VAL 0x7c04
-#define GEN7_WIZ_RDATA 0x7c18
-
-#define GEN7_TS_CTL 0x7e00
-#define GEN7_TS_CTL_SNAPSHOT_COMPLETE (1 << 31)
-#define GEN7_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8)
-#define GEN7_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8)
-#define GEN7_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2)
-#define GEN7_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1)
-#define GEN7_TS_CTL_SNAPSHOT_ENABLE (1 << 0)
-
-#define GEN7_TS_STRG_VAL 0x7e04
-#define GEN7_TS_RDATA 0x7e08
-
#define GEN7_TD_CTL 0x8000
-#define GEN7_TD_CTL_MUX_SHIFT 8
-#define GEN7_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7)
-#define GEN7_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6)
-#define GEN7_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5)
-#define GEN7_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4)
-#define GEN7_TD_CTL_BREAKPOINT_ENABLE (1 << 2)
-#define GEN7_TD_CTL2 0x8004
-#define GEN7_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28)
-#define GEN7_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26)
-#define GEN7_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25)
-#define GEN7_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16
-#define GEN7_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8)
-#define GEN7_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7)
-#define GEN7_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6)
-#define GEN7_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5)
-#define GEN7_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4)
-#define GEN7_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3)
-#define GEN7_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0)
-#define GEN7_TD_VF_VS_EMSK 0x8008
-#define GEN7_TD_GS_EMSK 0x800c
-#define GEN7_TD_CLIP_EMSK 0x8010
-#define GEN7_TD_SF_EMSK 0x8014
-#define GEN7_TD_WIZ_EMSK 0x8018
-#define GEN7_TD_0_6_EHTRG_VAL 0x801c
-#define GEN7_TD_0_7_EHTRG_VAL 0x8020
-#define GEN7_TD_0_6_EHTRG_MSK 0x8024
-#define GEN7_TD_0_7_EHTRG_MSK 0x8028
-#define GEN7_TD_RDATA 0x802c
-#define GEN7_TD_TS_EMSK 0x8030
-#define GEN7_EU_CTL 0x8800
-#define GEN7_EU_CTL_SELECT_SHIFT 16
-#define GEN7_EU_CTL_DATA_MUX_SHIFT 8
-#define GEN7_EU_ATT_0 0x8810
-#define GEN7_EU_ATT_1 0x8814
-#define GEN7_EU_ATT_DATA_0 0x8820
-#define GEN7_EU_ATT_DATA_1 0x8824
-#define GEN7_EU_ATT_CLR_0 0x8830
-#define GEN7_EU_ATT_CLR_1 0x8834
-#define GEN7_EU_RDATA 0x8840
+/* Execution Unit (EU) defines */
-#define _3DPRIM_POINTLIST 0x01
-#define _3DPRIM_LINELIST 0x02
-#define _3DPRIM_LINESTRIP 0x03
-#define _3DPRIM_TRILIST 0x04
-#define _3DPRIM_TRISTRIP 0x05
-#define _3DPRIM_TRIFAN 0x06
-#define _3DPRIM_QUADLIST 0x07
-#define _3DPRIM_QUADSTRIP 0x08
-#define _3DPRIM_LINELIST_ADJ 0x09
-#define _3DPRIM_LINESTRIP_ADJ 0x0A
-#define _3DPRIM_TRILIST_ADJ 0x0B
-#define _3DPRIM_TRISTRIP_ADJ 0x0C
-#define _3DPRIM_TRISTRIP_REVERSE 0x0D
-#define _3DPRIM_POLYGON 0x0E
-#define _3DPRIM_RECTLIST 0x0F
-#define _3DPRIM_LINELOOP 0x10
-#define _3DPRIM_POINTLIST_BF 0x11
-#define _3DPRIM_LINESTRIP_CONT 0x12
-#define _3DPRIM_LINESTRIP_BF 0x13
-#define _3DPRIM_LINESTRIP_CONT_BF 0x14
-#define _3DPRIM_TRIFAN_NOSTIPPLE 0x15
-
-#define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0
-#define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1
-
-#define GEN7_ANISORATIO_2 0
-#define GEN7_ANISORATIO_4 1
-#define GEN7_ANISORATIO_6 2
-#define GEN7_ANISORATIO_8 3
-#define GEN7_ANISORATIO_10 4
-#define GEN7_ANISORATIO_12 5
-#define GEN7_ANISORATIO_14 6
-#define GEN7_ANISORATIO_16 7
-
-#define GEN7_BLENDFACTOR_ONE 0x1
-#define GEN7_BLENDFACTOR_SRC_COLOR 0x2
-#define GEN7_BLENDFACTOR_SRC_ALPHA 0x3
-#define GEN7_BLENDFACTOR_DST_ALPHA 0x4
-#define GEN7_BLENDFACTOR_DST_COLOR 0x5
-#define GEN7_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6
-#define GEN7_BLENDFACTOR_CONST_COLOR 0x7
-#define GEN7_BLENDFACTOR_CONST_ALPHA 0x8
-#define GEN7_BLENDFACTOR_SRC1_COLOR 0x9
-#define GEN7_BLENDFACTOR_SRC1_ALPHA 0x0A
-#define GEN7_BLENDFACTOR_ZERO 0x11
-#define GEN7_BLENDFACTOR_INV_SRC_COLOR 0x12
-#define GEN7_BLENDFACTOR_INV_SRC_ALPHA 0x13
-#define GEN7_BLENDFACTOR_INV_DST_ALPHA 0x14
-#define GEN7_BLENDFACTOR_INV_DST_COLOR 0x15
-#define GEN7_BLENDFACTOR_INV_CONST_COLOR 0x17
-#define GEN7_BLENDFACTOR_INV_CONST_ALPHA 0x18
-#define GEN7_BLENDFACTOR_INV_SRC1_COLOR 0x19
-#define GEN7_BLENDFACTOR_INV_SRC1_ALPHA 0x1A
-
-#define GEN7_BLENDFUNCTION_ADD 0
-#define GEN7_BLENDFUNCTION_SUBTRACT 1
-#define GEN7_BLENDFUNCTION_REVERSE_SUBTRACT 2
-#define GEN7_BLENDFUNCTION_MIN 3
-#define GEN7_BLENDFUNCTION_MAX 4
-
-#define GEN7_ALPHATEST_FORMAT_UNORM8 0
-#define GEN7_ALPHATEST_FORMAT_FLOAT32 1
-
-#define GEN7_CHROMAKEY_KILL_ON_ANY_MATCH 0
-#define GEN7_CHROMAKEY_REPLACE_BLACK 1
-
-#define GEN7_CLIP_API_OGL 0
-#define GEN7_CLIP_API_DX 1
-
-#define GEN7_CLIPMODE_NORMAL 0
-#define GEN7_CLIPMODE_CLIP_ALL 1
-#define GEN7_CLIPMODE_CLIP_NON_REJECTED 2
-#define GEN7_CLIPMODE_REJECT_ALL 3
-#define GEN7_CLIPMODE_ACCEPT_ALL 4
-
-#define GEN7_CLIP_NDCSPACE 0
-#define GEN7_CLIP_SCREENSPACE 1
-
-#define GEN7_COMPAREFUNCTION_ALWAYS 0
-#define GEN7_COMPAREFUNCTION_NEVER 1
-#define GEN7_COMPAREFUNCTION_LESS 2
-#define GEN7_COMPAREFUNCTION_EQUAL 3
-#define GEN7_COMPAREFUNCTION_LEQUAL 4
-#define GEN7_COMPAREFUNCTION_GREATER 5
-#define GEN7_COMPAREFUNCTION_NOTEQUAL 6
-#define GEN7_COMPAREFUNCTION_GEQUAL 7
-
-#define GEN7_COVERAGE_PIXELS_HALF 0
-#define GEN7_COVERAGE_PIXELS_1 1
-#define GEN7_COVERAGE_PIXELS_2 2
-#define GEN7_COVERAGE_PIXELS_4 3
-
-#define GEN7_CULLMODE_BOTH 0
-#define GEN7_CULLMODE_NONE 1
-#define GEN7_CULLMODE_FRONT 2
-#define GEN7_CULLMODE_BACK 3
-
-#define GEN7_DEFAULTCOLOR_R8G8B8A8_UNORM 0
-#define GEN7_DEFAULTCOLOR_R32G32B32A32_FLOAT 1
-
-#define GEN7_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0
-#define GEN7_DEPTHFORMAT_D32_FLOAT 1
-#define GEN7_DEPTHFORMAT_D24_UNORM_S8_UINT 2
-#define GEN7_DEPTHFORMAT_D16_UNORM 5
-
-#define GEN7_FLOATING_POINT_IEEE_754 0
-#define GEN7_FLOATING_POINT_NON_IEEE_754 1
-
-#define GEN7_FRONTWINDING_CW 0
-#define GEN7_FRONTWINDING_CCW 1
-
-#define GEN7_INDEX_BYTE 0
-#define GEN7_INDEX_WORD 1
-#define GEN7_INDEX_DWORD 2
-
-#define GEN7_LOGICOPFUNCTION_CLEAR 0
-#define GEN7_LOGICOPFUNCTION_NOR 1
-#define GEN7_LOGICOPFUNCTION_AND_INVERTED 2
-#define GEN7_LOGICOPFUNCTION_COPY_INVERTED 3
-#define GEN7_LOGICOPFUNCTION_AND_REVERSE 4
-#define GEN7_LOGICOPFUNCTION_INVERT 5
-#define GEN7_LOGICOPFUNCTION_XOR 6
-#define GEN7_LOGICOPFUNCTION_NAND 7
-#define GEN7_LOGICOPFUNCTION_AND 8
-#define GEN7_LOGICOPFUNCTION_EQUIV 9
-#define GEN7_LOGICOPFUNCTION_NOOP 10
-#define GEN7_LOGICOPFUNCTION_OR_INVERTED 11
-#define GEN7_LOGICOPFUNCTION_COPY 12
-#define GEN7_LOGICOPFUNCTION_OR_REVERSE 13
-#define GEN7_LOGICOPFUNCTION_OR 14
-#define GEN7_LOGICOPFUNCTION_SET 15
-
-#define GEN7_MAPFILTER_NEAREST 0x0
-#define GEN7_MAPFILTER_LINEAR 0x1
-#define GEN7_MAPFILTER_ANISOTROPIC 0x2
-
-#define GEN7_MIPFILTER_NONE 0
-#define GEN7_MIPFILTER_NEAREST 1
-#define GEN7_MIPFILTER_LINEAR 3
-
-#define GEN7_POLYGON_FRONT_FACING 0
-#define GEN7_POLYGON_BACK_FACING 1
-
-#define GEN7_PREFILTER_ALWAYS 0x0
-#define GEN7_PREFILTER_NEVER 0x1
-#define GEN7_PREFILTER_LESS 0x2
-#define GEN7_PREFILTER_EQUAL 0x3
-#define GEN7_PREFILTER_LEQUAL 0x4
-#define GEN7_PREFILTER_GREATER 0x5
-#define GEN7_PREFILTER_NOTEQUAL 0x6
-#define GEN7_PREFILTER_GEQUAL 0x7
-
-#define GEN7_PROVOKING_VERTEX_0 0
-#define GEN7_PROVOKING_VERTEX_1 1
-#define GEN7_PROVOKING_VERTEX_2 2
-
-#define GEN7_RASTRULE_UPPER_LEFT 0
-#define GEN7_RASTRULE_UPPER_RIGHT 1
-
-#define GEN7_RENDERTARGET_CLAMPRANGE_UNORM 0
-#define GEN7_RENDERTARGET_CLAMPRANGE_SNORM 1
-#define GEN7_RENDERTARGET_CLAMPRANGE_FORMAT 2
-
-#define GEN7_STENCILOP_KEEP 0
-#define GEN7_STENCILOP_ZERO 1
-#define GEN7_STENCILOP_REPLACE 2
-#define GEN7_STENCILOP_INCRSAT 3
-#define GEN7_STENCILOP_DECRSAT 4
-#define GEN7_STENCILOP_INCR 5
-#define GEN7_STENCILOP_DECR 6
-#define GEN7_STENCILOP_INVERT 7
-
-#define GEN7_BORDER_COLOR_MODE_DEFAULT 0
-#define GEN7_BORDER_COLOR_MODE_LEGACY 1
-
-#define GEN7_TEXCOORDMODE_WRAP 0
-#define GEN7_TEXCOORDMODE_MIRROR 1
-#define GEN7_TEXCOORDMODE_CLAMP 2
-#define GEN7_TEXCOORDMODE_CUBE 3
-#define GEN7_TEXCOORDMODE_CLAMP_BORDER 4
-#define GEN7_TEXCOORDMODE_MIRROR_ONCE 5
-
-#define GEN7_THREAD_PRIORITY_NORMAL 0
-#define GEN7_THREAD_PRIORITY_HIGH 1
-
-#define GEN7_TILEWALK_XMAJOR 0
-#define GEN7_TILEWALK_YMAJOR 1
-
-#define GEN7_VERTEX_SUBPIXEL_PRECISION_8BITS 0
-#define GEN7_VERTEX_SUBPIXEL_PRECISION_4BITS 1
-
-#define GEN7_VERTEXBUFFER_ACCESS_VERTEXDATA 0
-#define GEN7_VERTEXBUFFER_ACCESS_INSTANCEDATA 1
-
-#define GEN7_VFCOMPONENT_NOSTORE 0
-#define GEN7_VFCOMPONENT_STORE_SRC 1
-#define GEN7_VFCOMPONENT_STORE_0 2
-#define GEN7_VFCOMPONENT_STORE_1_FLT 3
-#define GEN7_VFCOMPONENT_STORE_1_INT 4
-#define GEN7_VFCOMPONENT_STORE_VID 5
-#define GEN7_VFCOMPONENT_STORE_IID 6
-#define GEN7_VFCOMPONENT_STORE_PID 7
-
-
-/* Execution Unit (EU) defines
- */
-
-#define GEN7_ALIGN_1 0
-#define GEN7_ALIGN_16 1
-
-#define GEN7_ADDRESS_DIRECT 0
-#define GEN7_ADDRESS_REGISTER_INDIRECT_REGISTER 1
-
-#define GEN7_CHANNEL_X 0
-#define GEN7_CHANNEL_Y 1
-#define GEN7_CHANNEL_Z 2
-#define GEN7_CHANNEL_W 3
-
-#define GEN7_COMPRESSION_NONE 0
-#define GEN7_COMPRESSION_2NDHALF 1
-#define GEN7_COMPRESSION_COMPRESSED 2
-
-#define GEN7_CONDITIONAL_NONE 0
-#define GEN7_CONDITIONAL_Z 1
-#define GEN7_CONDITIONAL_NZ 2
-#define GEN7_CONDITIONAL_EQ 1 /* Z */
-#define GEN7_CONDITIONAL_NEQ 2 /* NZ */
-#define GEN7_CONDITIONAL_G 3
-#define GEN7_CONDITIONAL_GE 4
-#define GEN7_CONDITIONAL_L 5
-#define GEN7_CONDITIONAL_LE 6
-#define GEN7_CONDITIONAL_C 7
-#define GEN7_CONDITIONAL_O 8
-
-#define GEN7_DEBUG_NONE 0
-#define GEN7_DEBUG_BREAKPOINT 1
-
-#define GEN7_DEPENDENCY_NORMAL 0
-#define GEN7_DEPENDENCY_NOTCLEARED 1
-#define GEN7_DEPENDENCY_NOTCHECKED 2
-#define GEN7_DEPENDENCY_DISABLE 3
-
-#define GEN7_EXECUTE_1 0
-#define GEN7_EXECUTE_2 1
-#define GEN7_EXECUTE_4 2
-#define GEN7_EXECUTE_8 3
-#define GEN7_EXECUTE_16 4
-#define GEN7_EXECUTE_32 5
-
-#define GEN7_HORIZONTAL_STRIDE_0 0
-#define GEN7_HORIZONTAL_STRIDE_1 1
-#define GEN7_HORIZONTAL_STRIDE_2 2
-#define GEN7_HORIZONTAL_STRIDE_4 3
-
-#define GEN7_INSTRUCTION_NORMAL 0
-#define GEN7_INSTRUCTION_SATURATE 1
-
-#define INTEL_MASK_ENABLE 0
-#define INTEL_MASK_DISABLE 1
-
-#define GEN7_OPCODE_MOV 1
-#define GEN7_OPCODE_SEL 2
-#define GEN7_OPCODE_NOT 4
-#define GEN7_OPCODE_AND 5
-#define GEN7_OPCODE_OR 6
-#define GEN7_OPCODE_XOR 7
-#define GEN7_OPCODE_SHR 8
-#define GEN7_OPCODE_SHL 9
-#define GEN7_OPCODE_RSR 10
-#define GEN7_OPCODE_RSL 11
-#define GEN7_OPCODE_ASR 12
-#define GEN7_OPCODE_CMP 16
-#define GEN7_OPCODE_JMPI 32
-#define GEN7_OPCODE_IF 34
-#define GEN7_OPCODE_IFF 35
-#define GEN7_OPCODE_ELSE 36
-#define GEN7_OPCODE_ENDIF 37
-#define GEN7_OPCODE_DO 38
-#define GEN7_OPCODE_WHILE 39
-#define GEN7_OPCODE_BREAK 40
-#define GEN7_OPCODE_CONTINUE 41
-#define GEN7_OPCODE_HALT 42
-#define GEN7_OPCODE_MSAVE 44
-#define GEN7_OPCODE_MRESTORE 45
-#define GEN7_OPCODE_PUSH 46
-#define GEN7_OPCODE_POP 47
-#define GEN7_OPCODE_WAIT 48
-#define GEN7_OPCODE_SEND 49
-#define GEN7_OPCODE_ADD 64
-#define GEN7_OPCODE_MUL 65
-#define GEN7_OPCODE_AVG 66
-#define GEN7_OPCODE_FRC 67
-#define GEN7_OPCODE_RNDU 68
-#define GEN7_OPCODE_RNDD 69
-#define GEN7_OPCODE_RNDE 70
-#define GEN7_OPCODE_RNDZ 71
-#define GEN7_OPCODE_MAC 72
-#define GEN7_OPCODE_MACH 73
-#define GEN7_OPCODE_LZD 74
-#define GEN7_OPCODE_SAD2 80
-#define GEN7_OPCODE_SADA2 81
-#define GEN7_OPCODE_DP4 84
-#define GEN7_OPCODE_DPH 85
-#define GEN7_OPCODE_DP3 86
-#define GEN7_OPCODE_DP2 87
-#define GEN7_OPCODE_DPA2 88
-#define GEN7_OPCODE_LINE 89
-#define GEN7_OPCODE_NOP 126
-
-#define GEN7_PREDICATE_NONE 0
-#define GEN7_PREDICATE_NORMAL 1
-#define GEN7_PREDICATE_ALIGN1_ANYV 2
-#define GEN7_PREDICATE_ALIGN1_ALLV 3
-#define GEN7_PREDICATE_ALIGN1_ANY2H 4
-#define GEN7_PREDICATE_ALIGN1_ALL2H 5
-#define GEN7_PREDICATE_ALIGN1_ANY4H 6
-#define GEN7_PREDICATE_ALIGN1_ALL4H 7
-#define GEN7_PREDICATE_ALIGN1_ANY8H 8
-#define GEN7_PREDICATE_ALIGN1_ALL8H 9
-#define GEN7_PREDICATE_ALIGN1_ANY16H 10
-#define GEN7_PREDICATE_ALIGN1_ALL16H 11
-#define GEN7_PREDICATE_ALIGN16_REPLICATE_X 2
-#define GEN7_PREDICATE_ALIGN16_REPLICATE_Y 3
-#define GEN7_PREDICATE_ALIGN16_REPLICATE_Z 4
-#define GEN7_PREDICATE_ALIGN16_REPLICATE_W 5
-#define GEN7_PREDICATE_ALIGN16_ANY4H 6
-#define GEN7_PREDICATE_ALIGN16_ALL4H 7
-
-#define GEN7_ARCHITECTURE_REGISTER_FILE 0
-#define GEN7_GENERAL_REGISTER_FILE 1
-#define GEN7_MESSAGE_REGISTER_FILE 2
-#define GEN7_IMMEDIATE_VALUE 3
-
-#define GEN7_REGISTER_TYPE_UD 0
-#define GEN7_REGISTER_TYPE_D 1
-#define GEN7_REGISTER_TYPE_UW 2
-#define GEN7_REGISTER_TYPE_W 3
-#define GEN7_REGISTER_TYPE_UB 4
-#define GEN7_REGISTER_TYPE_B 5
-#define GEN7_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */
-#define GEN7_REGISTER_TYPE_HF 6
-#define GEN7_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */
-#define GEN7_REGISTER_TYPE_F 7
-
-#define GEN7_ARF_NULL 0x00
-#define GEN7_ARF_ADDRESS 0x10
-#define GEN7_ARF_ACCUMULATOR 0x20
-#define GEN7_ARF_FLAG 0x30
-#define GEN7_ARF_MASK 0x40
-#define GEN7_ARF_MASK_STACK 0x50
-#define GEN7_ARF_MASK_STACK_DEPTH 0x60
-#define GEN7_ARF_STATE 0x70
-#define GEN7_ARF_CONTROL 0x80
-#define GEN7_ARF_NOTIFICATION_COUNT 0x90
#define GEN7_ARF_IP 0xA0
-#define GEN7_AMASK 0
-#define GEN7_IMASK 1
-#define GEN7_LMASK 2
-#define GEN7_CMASK 3
-
-#define GEN7_THREAD_NORMAL 0
-#define GEN7_THREAD_ATOMIC 1
-#define GEN7_THREAD_SWITCH 2
-
-#define GEN7_VERTICAL_STRIDE_0 0
-#define GEN7_VERTICAL_STRIDE_1 1
-#define GEN7_VERTICAL_STRIDE_2 2
-#define GEN7_VERTICAL_STRIDE_4 3
-#define GEN7_VERTICAL_STRIDE_8 4
-#define GEN7_VERTICAL_STRIDE_16 5
-#define GEN7_VERTICAL_STRIDE_32 6
-#define GEN7_VERTICAL_STRIDE_64 7
-#define GEN7_VERTICAL_STRIDE_128 8
-#define GEN7_VERTICAL_STRIDE_256 9
-#define GEN7_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF
-
-#define GEN7_WIDTH_1 0
-#define GEN7_WIDTH_2 1
-#define GEN7_WIDTH_4 2
-#define GEN7_WIDTH_8 3
-#define GEN7_WIDTH_16 4
-
-#define GEN7_STATELESS_BUFFER_BOUNDARY_1K 0
-#define GEN7_STATELESS_BUFFER_BOUNDARY_2K 1
-#define GEN7_STATELESS_BUFFER_BOUNDARY_4K 2
-#define GEN7_STATELESS_BUFFER_BOUNDARY_8K 3
-#define GEN7_STATELESS_BUFFER_BOUNDARY_16K 4
-#define GEN7_STATELESS_BUFFER_BOUNDARY_32K 5
-#define GEN7_STATELESS_BUFFER_BOUNDARY_64K 6
-#define GEN7_STATELESS_BUFFER_BOUNDARY_128K 7
-#define GEN7_STATELESS_BUFFER_BOUNDARY_256K 8
-#define GEN7_STATELESS_BUFFER_BOUNDARY_512K 9
-#define GEN7_STATELESS_BUFFER_BOUNDARY_1M 10
-#define GEN7_STATELESS_BUFFER_BOUNDARY_2M 11
-
-#define GEN7_POLYGON_FACING_FRONT 0
-#define GEN7_POLYGON_FACING_BACK 1
-
-#define GEN7_MESSAGE_TARGET_NULL 0
-#define GEN7_MESSAGE_TARGET_MATH 1
-#define GEN7_MESSAGE_TARGET_SAMPLER 2
-#define GEN7_MESSAGE_TARGET_GATEWAY 3
-#define GEN7_MESSAGE_TARGET_DATAPORT_READ 4
-#define GEN7_MESSAGE_TARGET_DATAPORT_WRITE 5
-#define GEN7_MESSAGE_TARGET_URB 6
-#define GEN7_MESSAGE_TARGET_THREAD_SPAWNER 7
-
-#define GEN7_SAMPLER_RETURN_FORMAT_FLOAT32 0
-#define GEN7_SAMPLER_RETURN_FORMAT_UINT32 2
-#define GEN7_SAMPLER_RETURN_FORMAT_SINT32 3
-
-#define GEN7_SAMPLER_MESSAGE_SIMD8_SAMPLE 0
-#define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE 0
-#define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0
-#define GEN7_SAMPLER_MESSAGE_SIMD8_KILLPIX 1
-#define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1
-#define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1
-#define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2
-#define GEN7_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2
-#define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0
-#define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2
-#define GEN7_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2
-#define GEN7_SAMPLER_MESSAGE_SIMD8_RESINFO 2
-#define GEN7_SAMPLER_MESSAGE_SIMD16_RESINFO 2
-#define GEN7_SAMPLER_MESSAGE_SIMD4X2_LD 3
-#define GEN7_SAMPLER_MESSAGE_SIMD8_LD 3
-#define GEN7_SAMPLER_MESSAGE_SIMD16_LD 3
-
-#define GEN7_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0
-#define GEN7_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1
-#define GEN7_DATAPORT_OWORD_BLOCK_2_OWORDS 2
-#define GEN7_DATAPORT_OWORD_BLOCK_4_OWORDS 3
-#define GEN7_DATAPORT_OWORD_BLOCK_8_OWORDS 4
-
-#define GEN7_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0
-#define GEN7_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2
-
-#define GEN7_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2
-#define GEN7_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3
-
-#define GEN7_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0
-#define GEN7_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1
-#define GEN7_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2
-#define GEN7_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3
-
-#define GEN7_DATAPORT_READ_TARGET_DATA_CACHE 0
-#define GEN7_DATAPORT_READ_TARGET_RENDER_CACHE 1
-#define GEN7_DATAPORT_READ_TARGET_SAMPLER_CACHE 2
-
-#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0
-#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1
-#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2
-#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3
-#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4
-
-#define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0
-#define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1
-#define GEN7_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2
-#define GEN7_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3
-#define GEN7_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4
-#define GEN7_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5
-#define GEN7_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7
-
-#define GEN7_MATH_FUNCTION_INV 1
-#define GEN7_MATH_FUNCTION_LOG 2
-#define GEN7_MATH_FUNCTION_EXP 3
-#define GEN7_MATH_FUNCTION_SQRT 4
-#define GEN7_MATH_FUNCTION_RSQ 5
-#define GEN7_MATH_FUNCTION_SIN 6 /* was 7 */
-#define GEN7_MATH_FUNCTION_COS 7 /* was 8 */
-#define GEN7_MATH_FUNCTION_SINCOS 8 /* was 6 */
-#define GEN7_MATH_FUNCTION_TAN 9
-#define GEN7_MATH_FUNCTION_POW 10
-#define GEN7_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11
-#define GEN7_MATH_FUNCTION_INT_DIV_QUOTIENT 12
-#define GEN7_MATH_FUNCTION_INT_DIV_REMAINDER 13
-
-#define GEN7_MATH_INTEGER_UNSIGNED 0
-#define GEN7_MATH_INTEGER_SIGNED 1
-
-#define GEN7_MATH_PRECISION_FULL 0
-#define GEN7_MATH_PRECISION_PARTIAL 1
-
-#define GEN7_MATH_SATURATE_NONE 0
-#define GEN7_MATH_SATURATE_SATURATE 1
-
-#define GEN7_MATH_DATA_VECTOR 0
-#define GEN7_MATH_DATA_SCALAR 1
-
-#define GEN7_URB_OPCODE_WRITE 0
-
-#define GEN7_URB_SWIZZLE_NONE 0
-#define GEN7_URB_SWIZZLE_INTERLEAVE 1
-#define GEN7_URB_SWIZZLE_TRANSPOSE 2
-
-#define GEN7_SCRATCH_SPACE_SIZE_1K 0
-#define GEN7_SCRATCH_SPACE_SIZE_2K 1
-#define GEN7_SCRATCH_SPACE_SIZE_4K 2
-#define GEN7_SCRATCH_SPACE_SIZE_8K 3
-#define GEN7_SCRATCH_SPACE_SIZE_16K 4
-#define GEN7_SCRATCH_SPACE_SIZE_32K 5
-#define GEN7_SCRATCH_SPACE_SIZE_64K 6
-#define GEN7_SCRATCH_SPACE_SIZE_128K 7
-#define GEN7_SCRATCH_SPACE_SIZE_256K 8
-#define GEN7_SCRATCH_SPACE_SIZE_512K 9
-#define GEN7_SCRATCH_SPACE_SIZE_1M 10
-#define GEN7_SCRATCH_SPACE_SIZE_2M 11
-
/* The hardware supports two different modes for border color. The
* default (OpenGL) mode uses floating-point color channels, while the
* legacy mode uses 4 bytes.
@@ -836,111 +198,6 @@
* The legacy mode matches the semantics specified by the Render
* extension.
*/
-struct gen7_sampler_default_border_color {
- float color[4];
-};
-
-struct gen7_sampler_legacy_border_color {
- uint8_t color[4];
-};
-
-struct gen7_blend_state {
- struct {
- uint32_t dest_blend_factor:5;
- uint32_t source_blend_factor:5;
- uint32_t pad3:1;
- uint32_t blend_func:3;
- uint32_t pad2:1;
- uint32_t ia_dest_blend_factor:5;
- uint32_t ia_source_blend_factor:5;
- uint32_t pad1:1;
- uint32_t ia_blend_func:3;
- uint32_t pad0:1;
- uint32_t ia_blend_enable:1;
- uint32_t blend_enable:1;
- } blend0;
-
- struct {
- uint32_t post_blend_clamp_enable:1;
- uint32_t pre_blend_clamp_enable:1;
- uint32_t clamp_range:2;
- uint32_t pad0:4;
- uint32_t x_dither_offset:2;
- uint32_t y_dither_offset:2;
- uint32_t dither_enable:1;
- uint32_t alpha_test_func:3;
- uint32_t alpha_test_enable:1;
- uint32_t pad1:1;
- uint32_t logic_op_func:4;
- uint32_t logic_op_enable:1;
- uint32_t pad2:1;
- uint32_t write_disable_b:1;
- uint32_t write_disable_g:1;
- uint32_t write_disable_r:1;
- uint32_t write_disable_a:1;
- uint32_t pad3:1;
- uint32_t alpha_to_coverage_dither:1;
- uint32_t alpha_to_one:1;
- uint32_t alpha_to_coverage:1;
- } blend1;
-};
-
-struct gen7_color_calc_state {
- struct {
- uint32_t alpha_test_format:1;
- uint32_t pad0:14;
- uint32_t round_disable:1;
- uint32_t bf_stencil_ref:8;
- uint32_t stencil_ref:8;
- } cc0;
-
- union {
- float alpha_ref_f;
- struct {
- uint32_t ui:8;
- uint32_t pad0:24;
- } alpha_ref_fi;
- } cc1;
-
- float constant_r;
- float constant_g;
- float constant_b;
- float constant_a;
-};
-
-struct gen7_depth_stencil_state {
- struct {
- uint32_t pad0:3;
- uint32_t bf_stencil_pass_depth_pass_op:3;
- uint32_t bf_stencil_pass_depth_fail_op:3;
- uint32_t bf_stencil_fail_op:3;
- uint32_t bf_stencil_func:3;
- uint32_t bf_stencil_enable:1;
- uint32_t pad1:2;
- uint32_t stencil_write_enable:1;
- uint32_t stencil_pass_depth_pass_op:3;
- uint32_t stencil_pass_depth_fail_op:3;
- uint32_t stencil_fail_op:3;
- uint32_t stencil_func:3;
- uint32_t stencil_enable:1;
- } ds0;
-
- struct {
- uint32_t bf_stencil_write_mask:8;
- uint32_t bf_stencil_test_mask:8;
- uint32_t stencil_write_mask:8;
- uint32_t stencil_test_mask:8;
- } ds1;
-
- struct {
- uint32_t pad0:26;
- uint32_t depth_write_enable:1;
- uint32_t depth_test_func:3;
- uint32_t pad1:1;
- uint32_t depth_test_enable:1;
- } ds2;
-};
-
struct gen7_surface_state {
struct {
unsigned int cube_pos_z:1;
@@ -1059,129 +316,4 @@ struct gen7_sampler_state {
} ss3;
};
-/* Surface state DW0 */
-#define GEN7_SURFACE_RC_READ_WRITE (1 << 8)
-#define GEN7_SURFACE_TILED (1 << 14)
-#define GEN7_SURFACE_TILED_Y (1 << 13)
-#define GEN7_SURFACE_FORMAT_SHIFT 18
-#define GEN7_SURFACE_TYPE_SHIFT 29
-
-/* Surface state DW2 */
-#define GEN7_SURFACE_HEIGHT_SHIFT 16
-#define GEN7_SURFACE_WIDTH_SHIFT 0
-
-/* Surface state DW3 */
-#define GEN7_SURFACE_DEPTH_SHIFT 21
-#define GEN7_SURFACE_PITCH_SHIFT 0
-
-#define HSW_SWIZZLE_ZERO 0
-#define HSW_SWIZZLE_ONE 1
-#define HSW_SWIZZLE_RED 4
-#define HSW_SWIZZLE_GREEN 5
-#define HSW_SWIZZLE_BLUE 6
-#define HSW_SWIZZLE_ALPHA 7
-#define __HSW_SURFACE_SWIZZLE(r,g,b,a) \
- ((a) << 16 | (b) << 19 | (g) << 22 | (r) << 25)
-#define HSW_SURFACE_SWIZZLE(r,g,b,a) \
- __HSW_SURFACE_SWIZZLE(HSW_SWIZZLE_##r, HSW_SWIZZLE_##g, HSW_SWIZZLE_##b, HSW_SWIZZLE_##a)
-
-/* _3DSTATE_VERTEX_BUFFERS on GEN7*/
-/* DW1 */
-#define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14)
-
-/* _3DPRIMITIVE on GEN7 */
-/* DW1 */
-# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8)
-# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8)
-
-#define GEN7_3DSTATE_CLEAR_PARAMS GEN7_3D(3, 0, 0x04)
-#define GEN7_3DSTATE_DEPTH_BUFFER GEN7_3D(3, 0, 0x05)
-# define GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29
-# define GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18
-/* DW1 */
-# define GEN7_3DSTATE_DEPTH_CLEAR_VALID (1 << 15)
-
-#define GEN7_3DSTATE_CONSTANT_HS GEN7_3D(3, 0, 0x19)
-#define GEN7_3DSTATE_CONSTANT_DS GEN7_3D(3, 0, 0x1a)
-
-#define GEN7_3DSTATE_HS GEN7_3D(3, 0, 0x1b)
-#define GEN7_3DSTATE_TE GEN7_3D(3, 0, 0x1c)
-#define GEN7_3DSTATE_DS GEN7_3D(3, 0, 0x1d)
-#define GEN7_3DSTATE_STREAMOUT GEN7_3D(3, 0, 0x1e)
-#define GEN7_3DSTATE_SBE GEN7_3D(3, 0, 0x1f)
-
-/* DW1 */
-# define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28)
-# define GEN7_SBE_NUM_OUTPUTS_SHIFT 22
-# define GEN7_SBE_SWIZZLE_ENABLE (1 << 21)
-# define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20)
-# define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11
-# define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4
-
-#define GEN7_3DSTATE_PS GEN7_3D(3, 0, 0x20)
-/* DW1: kernel pointer */
-/* DW2 */
-# define GEN7_PS_SPF_MODE (1 << 31)
-# define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30)
-# define GEN7_PS_SAMPLER_COUNT_SHIFT 27
-# define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
-# define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
-# define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16)
-/* DW3: scratch space */
-/* DW4 */
-# define IVB_PS_MAX_THREADS_SHIFT 24
-# define HSW_PS_MAX_THREADS_SHIFT 23
-# define HSW_PS_SAMPLE_MASK_SHIFT 12
-# define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11)
-# define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10)
-# define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9)
-# define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7)
-# define GEN7_PS_POSOFFSET_NONE (0 << 3)
-# define GEN7_PS_POSOFFSET_CENTROID (2 << 3)
-# define GEN7_PS_POSOFFSET_SAMPLE (3 << 3)
-# define GEN7_PS_32_DISPATCH_ENABLE (1 << 2)
-# define GEN7_PS_16_DISPATCH_ENABLE (1 << 1)
-# define GEN7_PS_8_DISPATCH_ENABLE (1 << 0)
-/* DW5 */
-# define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16
-# define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8
-# define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0
-/* DW6: kernel 1 pointer */
-/* DW7: kernel 2 pointer */
-
-#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL GEN7_3D(3, 0, 0x21)
-#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC GEN7_3D(3, 0, 0x23)
-
-#define GEN7_3DSTATE_BLEND_STATE_POINTERS GEN7_3D(3, 0, 0x24)
-#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS GEN7_3D(3, 0, 0x25)
-
-#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS GEN7_3D(3, 0, 0x26)
-#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS GEN7_3D(3, 0, 0x27)
-#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS GEN7_3D(3, 0, 0x28)
-#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS GEN7_3D(3, 0, 0x29)
-#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS GEN7_3D(3, 0, 0x2a)
-
-#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS GEN7_3D(3, 0, 0x2b)
-#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS GEN7_3D(3, 0, 0x2e)
-#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS GEN7_3D(3, 0, 0x2f)
-
-#define GEN7_3DSTATE_URB_VS GEN7_3D(3, 0, 0x30)
-#define GEN7_3DSTATE_URB_HS GEN7_3D(3, 0, 0x31)
-#define GEN7_3DSTATE_URB_DS GEN7_3D(3, 0, 0x32)
-#define GEN7_3DSTATE_URB_GS GEN7_3D(3, 0, 0x33)
-/* DW1 */
-# define GEN7_URB_ENTRY_NUMBER_SHIFT 0
-# define GEN7_URB_ENTRY_SIZE_SHIFT 16
-# define GEN7_URB_STARTING_ADDRESS_SHIFT 25
-
-#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS GEN7_3D(3, 1, 0x12)
-#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS GEN7_3D(3, 1, 0x16)
-/* DW1 */
-# define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16
-
-struct gen7_cc_viewport {
- float min_depth;
- float max_depth;
-};
-
#endif
--
2.14.3
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^ permalink raw reply related [flat|nested] 16+ messages in thread* [igt-dev] [PATCH i-g-t 4/5] lib/gen8_render: Cleanup of libs
2018-06-08 11:38 [igt-dev] [PATCH i-g-t 1/5] lib/gen7_render: include gen6_render header Lukasz Kalamarz
2018-06-08 11:38 ` [igt-dev] [PATCH i-g-t 2/5] lib/gen6_render.h: Use gen6 definitions where it is possible Lukasz Kalamarz
2018-06-08 11:38 ` [igt-dev] [PATCH i-g-t 3/5] lib/gen7_render: Drop duplicated definitions Lukasz Kalamarz
@ 2018-06-08 11:38 ` Lukasz Kalamarz
2018-06-11 7:58 ` Katarzyna Dec
2018-06-08 11:38 ` [igt-dev] [PATCH i-g-t 5/5] lib/gen9_render: Header cleanup Lukasz Kalamarz
` (3 subsequent siblings)
6 siblings, 1 reply; 16+ messages in thread
From: Lukasz Kalamarz @ 2018-06-08 11:38 UTC (permalink / raw)
To: igt-dev
This patch implement some changes in gen8_render header and
all files that include it. Renamed definition that were
introduced in that file to GEN8_* instead of previous names.
Modified include to use gen7_render header instead of gen6.
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Ewelina Musial <ewelina.musial@intel.com>
---
lib/gen8_render.h | 74 ++++++---------------------
lib/rendercopy_gen8.c | 22 ++++----
lib/rendercopy_gen9.c | 22 ++++----
tools/null_state_gen/intel_renderstate_gen8.c | 26 +++++-----
tools/null_state_gen/intel_renderstate_gen9.c | 26 +++++-----
5 files changed, 65 insertions(+), 105 deletions(-)
diff --git a/lib/gen8_render.h b/lib/gen8_render.h
index ba3f9f27..79f2f388 100644
--- a/lib/gen8_render.h
+++ b/lib/gen8_render.h
@@ -1,59 +1,33 @@
#ifndef GEN8_RENDER_H
#define GEN8_RENDER_H
-#include "gen6_render.h"
+#include "gen7_render.h"
-#define GEN7_3DSTATE_URB_VS (0x7830 << 16)
-#define GEN7_3DSTATE_URB_HS (0x7831 << 16)
-#define GEN7_3DSTATE_URB_DS (0x7832 << 16)
-#define GEN7_3DSTATE_URB_GS (0x7833 << 16)
+# define GEN8_WM_LEGACY_DIAMOND_LINE_RASTERIZATION (1 << 26)
-# define GEN7_WM_LEGACY_DIAMOND_LINE_RASTERIZATION (1 << 26)
-
-#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS GEN6_3D(3, 0, 0xf)
-#define GEN7_3DSTATE_CLEAR_PARAMS GEN6_3D(3, 0, 0x04)
-#define GEN7_3DSTATE_DEPTH_BUFFER GEN6_3D(3, 0, 0x05)
-#define GEN7_3DSTATE_STENCIL_BUFFER GEN6_3D(3, 0, 0x06)
-#define GEN7_3DSTATE_HIER_DEPTH_BUFFER GEN6_3D(3, 0, 0x07)
+#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS GEN6_3D(3, 0, 0xf)
+#define GEN8_3DSTATE_STENCIL_BUFFER GEN6_3D(3, 0, 0x06)
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER GEN6_3D(3, 0, 0x07)
#define GEN8_3DSTATE_MULTISAMPLE GEN6_3D(3, 0, 0x0d)
-# define GEN8_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4)
-# define GEN8_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4)
-# define GEN8_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1)
# define GEN8_3DSTATE_MULTISAMPLE_NUMSAMPLES_2 (1 << 1)
-# define GEN8_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1)
-# define GEN8_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1)
# define GEN9_3DSTATE_MULTISAMPLE_NUMSAMPLES_16 (4 << 1)
#define GEN8_3DSTATE_WM_HZ_OP GEN6_3D(3, 0, 0x52)
#define GEN8_3DSTATE_VF_INSTANCING GEN6_3D(3, 0, 0x49)
-#define GEN7_3DSTATE_GS GEN6_3D(3, 0, 0x11)
-#define GEN7_3DSTATE_CONSTANT_GS GEN6_3D(3, 0, 0x16)
-#define GEN7_3DSTATE_CONSTANT_HS GEN6_3D(3, 0, 0x19)
-#define GEN7_3DSTATE_CONSTANT_DS GEN6_3D(3, 0, 0x1a)
-#define GEN7_3DSTATE_CONSTANT_PS GEN6_3D(3, 0, 0x17)
-#define GEN7_3DSTATE_HS GEN6_3D(3, 0, 0x1b)
-#define GEN7_3DSTATE_TE GEN6_3D(3, 0, 0x1c)
-#define GEN7_3DSTATE_DS GEN6_3D(3, 0, 0x1d)
-#define GEN7_3DSTATE_STREAMOUT GEN6_3D(3, 0, 0x1e)
-#define GEN7_3DSTATE_SBE GEN6_3D(3, 0, 0x1f)
# define GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH (1 << 29)
# define GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET (1 << 28)
-# define GEN7_SBE_NUM_OUTPUTS_SHIFT 22
-# define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11
# define GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT 5
#define GEN8_3DSTATE_SBE_SWIZ GEN6_3D(3, 0, 0x51)
#define GEN8_3DSTATE_RASTER GEN6_3D(3, 0, 0x50)
# define GEN8_RASTER_FRONT_WINDING_CCW (1 << 21)
# define GEN8_RASTER_CULL_NONE (1 << 16)
-#define GEN7_3DSTATE_PS GEN6_3D(3, 0, 0x20)
-# define GEN7_PS_SPF_MODE (1 << 31)
-# define GEN7_SF_POINT_WIDTH_FROM_SOURCE (1 << 11)
+# define GEN8_SF_POINT_WIDTH_FROM_SOURCE (1 << 11)
-# define GEN7_VS_FLOATING_POINT_MODE_ALTERNATE (1 << 16)
+# define GEN8_VS_FLOATING_POINT_MODE_ALTERNATE (1 << 16)
-#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP \
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP \
GEN6_3D(3, 0, 0x21)
#define GEN8_3DSTATE_PS_BLEND GEN6_3D(3, 0, 0x4d)
# define GEN8_PS_BLEND_HAS_WRITEABLE_RT (1 << 30)
@@ -62,20 +36,10 @@
# define GEN8_PSX_PIXEL_SHADER_VALID (1 << 31)
# define GEN8_PSX_ATTRIBUTE_ENABLE (1 << 8)
-#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC GEN6_3D(3, 0, 0x23)
-#define GEN7_3DSTATE_BLEND_STATE_POINTERS GEN6_3D(3, 0, 0x24)
-#define GEN7_3DSTATE_DS_STATE_POINTERS GEN6_3D(3, 0, 0x25)
-#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS GEN6_3D(3, 0, 0x26)
-#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS GEN6_3D(3, 0, 0x27)
-#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS GEN6_3D(3, 0, 0x28)
-#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS GEN6_3D(3, 0, 0x29)
-#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS GEN6_3D(3, 0, 0x2a)
+#define GEN8_3DSTATE_DS_STATE_POINTERS GEN6_3D(3, 0, 0x25)
-#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS GEN6_3D(3, 0, 0x2b)
-#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS GEN6_3D(3, 0, 0x2c)
-#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS GEN6_3D(3, 0, 0x2d)
-#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS GEN6_3D(3, 0, 0x2e)
-#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS GEN6_3D(3, 0, 0x2f)
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS GEN6_3D(3, 0, 0x2c)
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS GEN6_3D(3, 0, 0x2d)
#define GEN8_3DSTATE_VF GEN6_3D(3, 0, 0x0c)
#define GEN8_3DSTATE_VF_TOPOLOGY GEN6_3D(3, 0, 0x4b)
@@ -83,24 +47,20 @@
#define GEN8_3DSTATE_BIND_TABLE_POOL_ALLOC GEN6_3D(3, 1, 0x19)
#define GEN8_3DSTATE_GATHER_POOL_ALLOC GEN6_3D(3, 1, 0x1a)
#define GEN8_3DSTATE_DX9_CONSTANT_BUFFER_POOL_ALLOC GEN6_3D(3, 1, 0x1b)
-#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS GEN6_3D(3, 1, 0x12)
-#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS GEN6_3D(3, 1, 0x13)
-#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS GEN6_3D(3, 1, 0x14)
-#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS GEN6_3D(3, 1, 0x15)
-#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS GEN6_3D(3, 1, 0x16)
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS GEN6_3D(3, 1, 0x13)
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS GEN6_3D(3, 1, 0x14)
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS GEN6_3D(3, 1, 0x15)
#define GEN8_3DSTATE_VF_SGVS GEN6_3D(3, 0, 0x4a)
#define GEN8_3DSTATE_SO_DECL_LIST GEN6_3D(3, 1, 0x17)
#define GEN8_3DSTATE_SO_BUFFER GEN6_3D(3, 1, 0x18)
-#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET GEN6_3D(3, 1, 0x06)
-#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN GEN6_3D(3, 1, 0x07)
#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0 GEN6_3D(3, 1, 0x02)
#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1 GEN6_3D(3, 1, 0x0c)
/* Some random bits that we care about */
-#define GEN7_VB0_BUFFER_ADDR_MOD_EN (1 << 14)
-#define GEN7_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11)
-#define GEN7_3DSTATE_PS_ATTRIBUTE_ENABLED (1 << 10)
+#define GEN8_VB0_BUFFER_ADDR_MOD_EN (1 << 14)
+#define GEN8_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11)
+#define GEN8_3DSTATE_PS_ATTRIBUTE_ENABLED (1 << 10)
/* Random shifts */
#define GEN8_3DSTATE_PS_MAX_THREADS_SHIFT 23
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index a328e2bd..2b5d9b52 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -365,7 +365,7 @@ static void gen8_emit_vertex_buffer(struct intel_batchbuffer *batch,
uint32_t offset) {
OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | (1 + (4 * 1) - 2));
OUT_BATCH(0 << VB0_BUFFER_INDEX_SHIFT | /* VB 0th index */
- GEN7_VB0_BUFFER_ADDR_MOD_EN | /* Address Modify Enable */
+ GEN8_VB0_BUFFER_ADDR_MOD_EN | /* Address Modify Enable */
VERTEX_SIZE << VB0_BUFFER_PITCH_SHIFT);
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_VERTEX, 0, offset);
OUT_BATCH(3 * VERTEX_SIZE);
@@ -478,11 +478,11 @@ static void
gen7_emit_push_constants(struct intel_batchbuffer *batch) {
OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS);
+ OUT_BATCH(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS);
+ OUT_BATCH(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS);
+ OUT_BATCH(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS);
OUT_BATCH(0);
OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS);
OUT_BATCH(0);
@@ -616,7 +616,7 @@ gen8_emit_hs(struct intel_batchbuffer *batch) {
OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS);
+ OUT_BATCH(GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS);
OUT_BATCH(0);
}
@@ -679,7 +679,7 @@ gen8_emit_ds(struct intel_batchbuffer *batch) {
OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS);
+ OUT_BATCH(GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS);
OUT_BATCH(0);
}
@@ -753,7 +753,7 @@ gen8_emit_ps(struct intel_batchbuffer *batch, uint32_t kernel) {
OUT_BATCH(/* XXX: I don't understand the BARYCENTRIC stuff, but it
* appears we need it to put our setup data in the place we
* expect (g6, see below) */
- GEN7_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC);
+ GEN8_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC);
OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (11-2));
OUT_BATCH(0);
@@ -804,13 +804,13 @@ gen8_emit_depth(struct intel_batchbuffer *batch) {
OUT_BATCH(0);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER | (5 - 2));
+ OUT_BATCH(GEN8_3DSTATE_HIER_DEPTH_BUFFER | (5 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER | (5 - 2));
+ OUT_BATCH(GEN8_3DSTATE_STENCIL_BUFFER | (5 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
@@ -940,7 +940,7 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch,
OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC);
OUT_BATCH(viewport.cc_state);
- OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP);
+ OUT_BATCH(GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP);
OUT_BATCH(viewport.sf_clip_state);
gen7_emit_urb(batch);
@@ -969,7 +969,7 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch,
gen8_emit_ps(batch, ps_kernel_off);
- OUT_BATCH(GEN6_3DSTATE_SCISSOR_STATE_POINTERS);
+ OUT_BATCH(GEN8_3DSTATE_SCISSOR_STATE_POINTERS);
OUT_BATCH(scissor_state);
gen8_emit_depth(batch);
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index d1d72594..eaf7f17e 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -359,7 +359,7 @@ static void gen7_emit_vertex_buffer(struct intel_batchbuffer *batch,
uint32_t offset) {
OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | (1 + (4 * 1) - 2));
OUT_BATCH(0 << VB0_BUFFER_INDEX_SHIFT | /* VB 0th index */
- GEN7_VB0_BUFFER_ADDR_MOD_EN | /* Address Modify Enable */
+ GEN8_VB0_BUFFER_ADDR_MOD_EN | /* Address Modify Enable */
VERTEX_SIZE << VB0_BUFFER_PITCH_SHIFT);
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_VERTEX, 0, offset);
OUT_BATCH(3 * VERTEX_SIZE);
@@ -466,11 +466,11 @@ static void
gen7_emit_push_constants(struct intel_batchbuffer *batch) {
OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS);
+ OUT_BATCH(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS);
+ OUT_BATCH(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS);
+ OUT_BATCH(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS);
OUT_BATCH(0);
OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS);
OUT_BATCH(0);
@@ -613,7 +613,7 @@ gen8_emit_hs(struct intel_batchbuffer *batch) {
OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS);
+ OUT_BATCH(GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS);
OUT_BATCH(0);
}
@@ -678,7 +678,7 @@ gen9_emit_ds(struct intel_batchbuffer *batch) {
OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS);
+ OUT_BATCH(GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS);
OUT_BATCH(0);
}
@@ -755,7 +755,7 @@ gen8_emit_ps(struct intel_batchbuffer *batch, uint32_t kernel) {
OUT_BATCH(/* XXX: I don't understand the BARYCENTRIC stuff, but it
* appears we need it to put our setup data in the place we
* expect (g6, see below) */
- GEN7_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC);
+ GEN8_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC);
OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (11-2));
OUT_BATCH(0);
@@ -808,13 +808,13 @@ gen9_emit_depth(struct intel_batchbuffer *batch)
OUT_BATCH(0);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER | (5-2));
+ OUT_BATCH(GEN8_3DSTATE_HIER_DEPTH_BUFFER | (5-2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
- OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER | (5-2));
+ OUT_BATCH(GEN8_3DSTATE_STENCIL_BUFFER | (5-2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
@@ -944,7 +944,7 @@ void gen9_render_copyfunc(struct intel_batchbuffer *batch,
OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC);
OUT_BATCH(viewport.cc_state);
- OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP);
+ OUT_BATCH(GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP);
OUT_BATCH(viewport.sf_clip_state);
gen7_emit_urb(batch);
@@ -973,7 +973,7 @@ void gen9_render_copyfunc(struct intel_batchbuffer *batch,
OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS);
OUT_BATCH(ps_sampler_state);
- OUT_BATCH(GEN6_3DSTATE_SCISSOR_STATE_POINTERS);
+ OUT_BATCH(GEN8_3DSTATE_SCISSOR_STATE_POINTERS);
OUT_BATCH(scissor_state);
gen9_emit_depth(batch);
diff --git a/tools/null_state_gen/intel_renderstate_gen8.c b/tools/null_state_gen/intel_renderstate_gen8.c
index 08def120..c6973e0e 100644
--- a/tools/null_state_gen/intel_renderstate_gen8.c
+++ b/tools/null_state_gen/intel_renderstate_gen8.c
@@ -33,7 +33,7 @@
static void gen8_emit_wm(struct intel_batchbuffer *batch)
{
OUT_BATCH(GEN6_3DSTATE_WM | (2 - 2));
- OUT_BATCH(GEN7_WM_LEGACY_DIAMOND_LINE_RASTERIZATION);
+ OUT_BATCH(GEN8_WM_LEGACY_DIAMOND_LINE_RASTERIZATION);
}
static void gen8_emit_ps(struct intel_batchbuffer *batch)
@@ -59,7 +59,7 @@ static void gen8_emit_sf(struct intel_batchbuffer *batch)
OUT_BATCH(0);
OUT_BATCH(1 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT |
1 << GEN6_3DSTATE_SF_VERTEX_SUB_PIXEL_PRECISION_SHIFT |
- GEN7_SF_POINT_WIDTH_FROM_SOURCE |
+ GEN8_SF_POINT_WIDTH_FROM_SOURCE |
8);
}
@@ -68,7 +68,7 @@ static void gen8_emit_vs(struct intel_batchbuffer *batch)
OUT_BATCH(GEN6_3DSTATE_VS | (9 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
- OUT_BATCH(GEN7_VS_FLOATING_POINT_MODE_ALTERNATE);
+ OUT_BATCH(GEN8_VS_FLOATING_POINT_MODE_ALTERNATE);
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
@@ -204,7 +204,7 @@ static void gen8_emit_vertex_buffers(struct intel_batchbuffer *batch)
for (i = 0; i < buffers; i++) {
OUT_BATCH(i << VB0_BUFFER_INDEX_SHIFT |
- GEN7_VB0_BUFFER_ADDR_MOD_EN);
+ GEN8_VB0_BUFFER_ADDR_MOD_EN);
OUT_BATCH(0); /* Addr */
OUT_BATCH(0);
OUT_BATCH(0);
@@ -308,7 +308,7 @@ static void gen8_emit_viewport_state_pointers_sf_clip(struct intel_batchbuffer *
for (i = 0; i < 16; i++)
OUT_STATE(0);
- OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP | (2 - 2));
+ OUT_BATCH(GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP | (2 - 2));
OUT_BATCH_STATE_OFFSET(offset);
}
@@ -361,9 +361,9 @@ void gen8_setup_null_render_state(struct intel_batchbuffer *batch)
OUT_CMD(GEN8_3DSTATE_GATHER_POOL_ALLOC, 4);
OUT_CMD(GEN8_3DSTATE_DX9_CONSTANT_BUFFER_POOL_ALLOC, 4);
OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS, 2);
- OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS, 2);
- OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS, 2);
- OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS, 2);
+ OUT_CMD(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS, 2);
+ OUT_CMD(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS, 2);
+ OUT_CMD(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS, 2);
OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS, 2);
OUT_CMD(GEN6_3DSTATE_CONSTANT_VS, 11);
OUT_CMD(GEN7_3DSTATE_CONSTANT_HS, 11);
@@ -394,8 +394,8 @@ void gen8_setup_null_render_state(struct intel_batchbuffer *batch)
OUT_CMD(GEN6_3DSTATE_LINE_STIPPLE, 3);
OUT_CMD(GEN6_3DSTATE_AA_LINE_PARAMS, 3);
- OUT_CMD(GEN7_3DSTATE_STENCIL_BUFFER, 5);
- OUT_CMD(GEN7_3DSTATE_HIER_DEPTH_BUFFER, 5);
+ OUT_CMD(GEN8_3DSTATE_STENCIL_BUFFER, 5);
+ OUT_CMD(GEN8_3DSTATE_HIER_DEPTH_BUFFER, 5);
OUT_CMD(GEN7_3DSTATE_CLEAR_PARAMS, 3);
OUT_CMD(GEN6_3DSTATE_MONOFILTER_SIZE, 2);
OUT_CMD(GEN8_3DSTATE_MULTISAMPLE, 2);
@@ -423,12 +423,12 @@ void gen8_setup_null_render_state(struct intel_batchbuffer *batch)
gen8_emit_ps_blend(batch);
OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS, 2);
- OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS, 2);
- OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS, 2);
+ OUT_CMD(GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS, 2);
+ OUT_CMD(GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS, 2);
OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS, 2);
OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS, 2);
- OUT_CMD(GEN6_3DSTATE_SCISSOR_STATE_POINTERS, 2);
+ OUT_CMD(GEN8_3DSTATE_SCISSOR_STATE_POINTERS, 2);
gen8_emit_viewport_state_pointers_cc(batch);
gen8_emit_viewport_state_pointers_sf_clip(batch);
diff --git a/tools/null_state_gen/intel_renderstate_gen9.c b/tools/null_state_gen/intel_renderstate_gen9.c
index 1b77e552..9f338bbf 100644
--- a/tools/null_state_gen/intel_renderstate_gen9.c
+++ b/tools/null_state_gen/intel_renderstate_gen9.c
@@ -32,7 +32,7 @@
static void gen8_emit_wm(struct intel_batchbuffer *batch)
{
OUT_BATCH(GEN6_3DSTATE_WM | (2 - 2));
- OUT_BATCH(GEN7_WM_LEGACY_DIAMOND_LINE_RASTERIZATION);
+ OUT_BATCH(GEN8_WM_LEGACY_DIAMOND_LINE_RASTERIZATION);
}
static void gen8_emit_ps(struct intel_batchbuffer *batch)
@@ -58,7 +58,7 @@ static void gen8_emit_sf(struct intel_batchbuffer *batch)
OUT_BATCH(0);
OUT_BATCH(1 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT |
1 << GEN6_3DSTATE_SF_VERTEX_SUB_PIXEL_PRECISION_SHIFT |
- GEN7_SF_POINT_WIDTH_FROM_SOURCE |
+ GEN8_SF_POINT_WIDTH_FROM_SOURCE |
8);
}
@@ -67,7 +67,7 @@ static void gen8_emit_vs(struct intel_batchbuffer *batch)
OUT_BATCH(GEN6_3DSTATE_VS | (9 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
- OUT_BATCH(GEN7_VS_FLOATING_POINT_MODE_ALTERNATE);
+ OUT_BATCH(GEN8_VS_FLOATING_POINT_MODE_ALTERNATE);
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
@@ -168,7 +168,7 @@ static void gen8_emit_vertex_buffers(struct intel_batchbuffer *batch)
for (i = 0; i < buffers; i++) {
OUT_BATCH(i << VB0_BUFFER_INDEX_SHIFT |
- GEN7_VB0_BUFFER_ADDR_MOD_EN);
+ GEN8_VB0_BUFFER_ADDR_MOD_EN);
OUT_BATCH(0); /* Address */
OUT_BATCH(0);
OUT_BATCH(0);
@@ -271,7 +271,7 @@ static void gen8_emit_viewport_state_pointers_sf_clip(struct intel_batchbuffer *
for (i = 0; i < 16; i++)
OUT_STATE(0);
- OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP | (2 - 2));
+ OUT_BATCH(GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP | (2 - 2));
OUT_BATCH_STATE_OFFSET(offset);
}
@@ -387,9 +387,9 @@ void gen9_setup_null_render_state(struct intel_batchbuffer *batch)
/* Push Constants */
OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS, 2);
- OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS, 2);
- OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS, 2);
- OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS, 2);
+ OUT_CMD(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS, 2);
+ OUT_CMD(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS, 2);
+ OUT_CMD(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS, 2);
OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS, 2);
/* Constants */
@@ -425,8 +425,8 @@ void gen9_setup_null_render_state(struct intel_batchbuffer *batch)
OUT_CMD(GEN6_3DSTATE_LINE_STIPPLE, 3);
OUT_CMD(GEN6_3DSTATE_AA_LINE_PARAMS, 3);
- OUT_CMD(GEN7_3DSTATE_STENCIL_BUFFER, 5);
- OUT_CMD(GEN7_3DSTATE_HIER_DEPTH_BUFFER, 5);
+ OUT_CMD(GEN8_3DSTATE_STENCIL_BUFFER, 5);
+ OUT_CMD(GEN8_3DSTATE_HIER_DEPTH_BUFFER, 5);
OUT_CMD(GEN7_3DSTATE_CLEAR_PARAMS, 3);
OUT_CMD(GEN6_3DSTATE_MONOFILTER_SIZE, 2);
OUT_CMD(GEN8_3DSTATE_MULTISAMPLE, 2);
@@ -455,12 +455,12 @@ void gen9_setup_null_render_state(struct intel_batchbuffer *batch)
/* 3D state sampler state pointers */
OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS, 2);
- OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS, 2);
- OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS, 2);
+ OUT_CMD(GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS, 2);
+ OUT_CMD(GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS, 2);
OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS, 2);
OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS, 2);
- OUT_CMD(GEN6_3DSTATE_SCISSOR_STATE_POINTERS, 2);
+ OUT_CMD(GEN8_3DSTATE_SCISSOR_STATE_POINTERS, 2);
gen8_emit_viewport_state_pointers_cc(batch);
gen8_emit_viewport_state_pointers_sf_clip(batch);
--
2.14.3
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^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [igt-dev] [PATCH i-g-t 4/5] lib/gen8_render: Cleanup of libs
2018-06-08 11:38 ` [igt-dev] [PATCH i-g-t 4/5] lib/gen8_render: Cleanup of libs Lukasz Kalamarz
@ 2018-06-11 7:58 ` Katarzyna Dec
2018-06-11 12:50 ` Kalamarz, Lukasz
0 siblings, 1 reply; 16+ messages in thread
From: Katarzyna Dec @ 2018-06-11 7:58 UTC (permalink / raw)
To: Lukasz Kalamarz; +Cc: igt-dev
On Fri, Jun 08, 2018 at 01:38:54PM +0200, Lukasz Kalamarz wrote:
> This patch implement
s/implement/implements
>some changes in gen8_render header and
> all files that include it. Renamed definition that were
> introduced in that file to GEN8_* instead of previous names.
What did you mean by this sentence ^^^^^^?
> Modified include to use gen7_render header instead of gen6.
>
> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Ewelina Musial <ewelina.musial@intel.com>
> ---
> lib/gen8_render.h | 74 ++++++---------------------
> lib/rendercopy_gen8.c | 22 ++++----
> lib/rendercopy_gen9.c | 22 ++++----
> tools/null_state_gen/intel_renderstate_gen8.c | 26 +++++-----
> tools/null_state_gen/intel_renderstate_gen9.c | 26 +++++-----
> 5 files changed, 65 insertions(+), 105 deletions(-)
>
> diff --git a/lib/gen8_render.h b/lib/gen8_render.h
> index ba3f9f27..79f2f388 100644
> --- a/lib/gen8_render.h
> +++ b/lib/gen8_render.h
> @@ -1,59 +1,33 @@
> #ifndef GEN8_RENDER_H
> #define GEN8_RENDER_H
>
> -#include "gen6_render.h"
> +#include "gen7_render.h"
>
> -#define GEN7_3DSTATE_URB_VS (0x7830 << 16)
> -#define GEN7_3DSTATE_URB_HS (0x7831 << 16)
> -#define GEN7_3DSTATE_URB_DS (0x7832 << 16)
> -#define GEN7_3DSTATE_URB_GS (0x7833 << 16)
> +# define GEN8_WM_LEGACY_DIAMOND_LINE_RASTERIZATION (1 << 26)
>
> -# define GEN7_WM_LEGACY_DIAMOND_LINE_RASTERIZATION (1 << 26)
If I see correctly there was so much mess in this libs previously, so
gen7 definitions were included here as well? Right?
Huge copy-paste in the past then...
Kasia :)
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 4/5] lib/gen8_render: Cleanup of libs
2018-06-11 7:58 ` Katarzyna Dec
@ 2018-06-11 12:50 ` Kalamarz, Lukasz
2018-06-11 13:38 ` Katarzyna Dec
0 siblings, 1 reply; 16+ messages in thread
From: Kalamarz, Lukasz @ 2018-06-11 12:50 UTC (permalink / raw)
To: Dec, Katarzyna; +Cc: igt-dev@lists.freedesktop.org
On Mon, 2018-06-11 at 09:58 +0200, Katarzyna Dec wrote:
> On Fri, Jun 08, 2018 at 01:38:54PM +0200, Lukasz Kalamarz wrote:
> > This patch implement
>
> s/implement/implements
> > some changes in gen8_render header and
> > all files that include it. Renamed definition that were
> > introduced in that file to GEN8_* instead of previous names.
>
> What did you mean by this sentence ^^^^^^?
There were some registers, that were introduced in this file with gen7
prefix, but when I checked gen7_render file, those definitions were
missing. this is why i swapped GEN7_ prefix to GEN8_ to be in sync with
naming convention.
> > Modified include to use gen7_render header instead of gen6.
> >
> > Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> > Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> > Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > Cc: Ewelina Musial <ewelina.musial@intel.com>
> > ---
> > lib/gen8_render.h | 74 ++++++---------
> > ------------
> > lib/rendercopy_gen8.c | 22 ++++----
> > lib/rendercopy_gen9.c | 22 ++++----
> > tools/null_state_gen/intel_renderstate_gen8.c | 26 +++++-----
> > tools/null_state_gen/intel_renderstate_gen9.c | 26 +++++-----
> > 5 files changed, 65 insertions(+), 105 deletions(-)
> >
> > diff --git a/lib/gen8_render.h b/lib/gen8_render.h
> > index ba3f9f27..79f2f388 100644
> > --- a/lib/gen8_render.h
> > +++ b/lib/gen8_render.h
> > @@ -1,59 +1,33 @@
> > #ifndef GEN8_RENDER_H
> > #define GEN8_RENDER_H
> >
> > -#include "gen6_render.h"
> > +#include "gen7_render.h"
> >
> > -#define GEN7_3DSTATE_URB_VS (0x7830 << 16)
> > -#define GEN7_3DSTATE_URB_HS (0x7831 << 16)
> > -#define GEN7_3DSTATE_URB_DS (0x7832 << 16)
> > -#define GEN7_3DSTATE_URB_GS (0x7833 << 16)
> > +# define GEN8_WM_LEGACY_DIAMOND_LINE_RASTERIZATION (1 <<
> > 26)
> >
> > -# define GEN7_WM_LEGACY_DIAMOND_LINE_RASTERIZATION (1 <<
> > 26)
>
> If I see correctly there was so much mess in this libs previously, so
> gen7 definitions were included here as well? Right?
> Huge copy-paste in the past then...
>
Previously this header included gen6_render.h and was missing some
registers definitions introduced by gen7. Once we fixed that, there is
no need to redefine them here.
> Kasia :)
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 4/5] lib/gen8_render: Cleanup of libs
2018-06-11 12:50 ` Kalamarz, Lukasz
@ 2018-06-11 13:38 ` Katarzyna Dec
0 siblings, 0 replies; 16+ messages in thread
From: Katarzyna Dec @ 2018-06-11 13:38 UTC (permalink / raw)
To: Kalamarz, Lukasz; +Cc: igt-dev
On Mon, Jun 11, 2018 at 01:50:02PM +0100, Kalamarz, Lukasz wrote:
> On Mon, 2018-06-11 at 09:58 +0200, Katarzyna Dec wrote:
> > On Fri, Jun 08, 2018 at 01:38:54PM +0200, Lukasz Kalamarz wrote:
> > > This patch implement
> >
> > s/implement/implements
> > > some changes in gen8_render header and
> > > all files that include it. Renamed definition that were
> > > introduced in that file to GEN8_* instead of previous names.
> >
> > What did you mean by this sentence ^^^^^^?
>
> There were some registers, that were introduced in this file with gen7
> prefix, but when I checked gen7_render file, those definitions were
> missing. this is why i swapped GEN7_ prefix to GEN8_ to be in sync with
> naming convention.
Now I got that :) So maybe we can reword this sentence so this info
is more clear?
>
> > > Modified include to use gen7_render header instead of gen6.
> > >
> > > Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> > > Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> > > Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > > Cc: Ewelina Musial <ewelina.musial@intel.com>
> > > ---
> > > lib/gen8_render.h | 74 ++++++---------
> > > ------------
> > > lib/rendercopy_gen8.c | 22 ++++----
> > > lib/rendercopy_gen9.c | 22 ++++----
> > > tools/null_state_gen/intel_renderstate_gen8.c | 26 +++++-----
> > > tools/null_state_gen/intel_renderstate_gen9.c | 26 +++++-----
> > > 5 files changed, 65 insertions(+), 105 deletions(-)
> > >
> > > diff --git a/lib/gen8_render.h b/lib/gen8_render.h
> > > index ba3f9f27..79f2f388 100644
> > > --- a/lib/gen8_render.h
> > > +++ b/lib/gen8_render.h
> > > @@ -1,59 +1,33 @@
> > > #ifndef GEN8_RENDER_H
> > > #define GEN8_RENDER_H
> > >
> > > -#include "gen6_render.h"
> > > +#include "gen7_render.h"
> > >
> > > -#define GEN7_3DSTATE_URB_VS (0x7830 << 16)
> > > -#define GEN7_3DSTATE_URB_HS (0x7831 << 16)
> > > -#define GEN7_3DSTATE_URB_DS (0x7832 << 16)
> > > -#define GEN7_3DSTATE_URB_GS (0x7833 << 16)
> > > +# define GEN8_WM_LEGACY_DIAMOND_LINE_RASTERIZATION (1 <<
> > > 26)
> > >
> > > -# define GEN7_WM_LEGACY_DIAMOND_LINE_RASTERIZATION (1 <<
> > > 26)
> >
> > If I see correctly there was so much mess in this libs previously, so
> > gen7 definitions were included here as well? Right?
> > Huge copy-paste in the past then...
> >
>
> Previously this header included gen6_render.h and was missing some
> registers definitions introduced by gen7. Once we fixed that, there is
> no need to redefine them here.
>
Thanks for clarifying that! :)
Kasia :)
> > Kasia :)
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^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 5/5] lib/gen9_render: Header cleanup
2018-06-08 11:38 [igt-dev] [PATCH i-g-t 1/5] lib/gen7_render: include gen6_render header Lukasz Kalamarz
` (2 preceding siblings ...)
2018-06-08 11:38 ` [igt-dev] [PATCH i-g-t 4/5] lib/gen8_render: Cleanup of libs Lukasz Kalamarz
@ 2018-06-08 11:38 ` Lukasz Kalamarz
2018-06-11 7:59 ` Katarzyna Dec
2018-06-08 12:16 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/5] lib/gen7_render: include gen6_render header Patchwork
` (2 subsequent siblings)
6 siblings, 1 reply; 16+ messages in thread
From: Lukasz Kalamarz @ 2018-06-08 11:38 UTC (permalink / raw)
To: igt-dev
This patch cleans gen9 header from a duplicate definition
and it dependency.
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Ewelina Musial <ewelina.musial@intel.com>
---
lib/gen9_render.h | 1 -
lib/rendercopy_gen9.c | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/lib/gen9_render.h b/lib/gen9_render.h
index aac620a0..90f56053 100644
--- a/lib/gen9_render.h
+++ b/lib/gen9_render.h
@@ -3,7 +3,6 @@
#include "gen8_render.h"
-#define GEN7_3DSTATE_VF GEN6_3D(3, 0, 0x0c)
#define GEN9_3DSTATE_COMPONENT_PACKING GEN6_3D(3, 0, 0x55)
#define GEN9_SBE_ACTIVE_COMPONENT_NONE 0
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index eaf7f17e..0157ced9 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -846,7 +846,7 @@ static void gen8_emit_vf_topology(struct intel_batchbuffer *batch)
/* Vertex elements MUST be defined before this according to spec */
static void gen8_emit_primitive(struct intel_batchbuffer *batch, uint32_t offset)
{
- OUT_BATCH(GEN7_3DSTATE_VF | (2 - 2));
+ OUT_BATCH(GEN8_3DSTATE_VF | (2 - 2));
OUT_BATCH(0);
OUT_BATCH(GEN8_3DSTATE_VF_INSTANCING | (3 - 2));
--
2.14.3
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^ permalink raw reply related [flat|nested] 16+ messages in thread* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/5] lib/gen7_render: include gen6_render header
2018-06-08 11:38 [igt-dev] [PATCH i-g-t 1/5] lib/gen7_render: include gen6_render header Lukasz Kalamarz
` (3 preceding siblings ...)
2018-06-08 11:38 ` [igt-dev] [PATCH i-g-t 5/5] lib/gen9_render: Header cleanup Lukasz Kalamarz
@ 2018-06-08 12:16 ` Patchwork
2018-06-08 14:52 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
2018-06-11 7:31 ` [igt-dev] [PATCH i-g-t 1/5] " Katarzyna Dec
6 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2018-06-08 12:16 UTC (permalink / raw)
To: Lukasz Kalamarz; +Cc: igt-dev
== Series Details ==
Series: series starting with [i-g-t,1/5] lib/gen7_render: include gen6_render header
URL : https://patchwork.freedesktop.org/series/44482/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4293 -> IGTPW_1433 =
== Summary - WARNING ==
Minor unknown changes coming with IGTPW_1433 need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_1433, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/44482/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in IGTPW_1433:
=== IGT changes ===
==== Warnings ====
igt@kms_pipe_crc_basic@read-crc-pipe-c:
fi-glk-j4005: PASS -> SKIP
== Known issues ==
Here are the changes found in IGTPW_1433 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_sync@basic-each:
fi-cnl-y3: PASS -> INCOMPLETE (fdo#105086)
igt@kms_flip@basic-flip-vs-dpms:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000, fdo#106097)
igt@kms_flip@basic-plain-flip:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000)
igt@prime_vgem@basic-fence-flip:
fi-ilk-650: PASS -> FAIL (fdo#104008)
==== Possible fixes ====
igt@gem_exec_fence@basic-await-default:
fi-glk-j4005: DMESG-WARN (fdo#106000) -> PASS +1
igt@kms_flip@basic-flip-vs-modeset:
fi-glk-j4005: DMESG-WARN (fdo#106000, fdo#106097) -> PASS +1
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#105086 https://bugs.freedesktop.org/show_bug.cgi?id=105086
fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097
== Participating hosts (42 -> 38) ==
Missing (4): fi-byt-j1900 fi-ilk-m540 fi-byt-squawks fi-skl-6700hq
== Build changes ==
* IGT: IGT_4511 -> IGTPW_1433
CI_DRM_4293: 70d3bb47919b2acc66aa1d7a6566cdf60a0cf66d @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_1433: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1433/
IGT_4511: 44b837c9b498a2749d2564cbd8acb5a57da02217 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1433/issues.html
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^ permalink raw reply [flat|nested] 16+ messages in thread* [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/5] lib/gen7_render: include gen6_render header
2018-06-08 11:38 [igt-dev] [PATCH i-g-t 1/5] lib/gen7_render: include gen6_render header Lukasz Kalamarz
` (4 preceding siblings ...)
2018-06-08 12:16 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/5] lib/gen7_render: include gen6_render header Patchwork
@ 2018-06-08 14:52 ` Patchwork
2018-06-11 7:31 ` [igt-dev] [PATCH i-g-t 1/5] " Katarzyna Dec
6 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2018-06-08 14:52 UTC (permalink / raw)
To: Lukasz Kalamarz; +Cc: igt-dev
== Series Details ==
Series: series starting with [i-g-t,1/5] lib/gen7_render: include gen6_render header
URL : https://patchwork.freedesktop.org/series/44482/
State : success
== Summary ==
= CI Bug Log - changes from IGT_4511_full -> IGTPW_1433_full =
== Summary - WARNING ==
Minor unknown changes coming with IGTPW_1433_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_1433_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/44482/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in IGTPW_1433_full:
=== IGT changes ===
==== Warnings ====
igt@gem_exec_schedule@deep-bsd2:
shard-kbl: PASS -> SKIP +1
igt@gem_mocs_settings@mocs-rc6-vebox:
shard-kbl: SKIP -> PASS +2
igt@gem_pwrite@big-gtt-random:
shard-apl: SKIP -> PASS
shard-glk: SKIP -> PASS
== Known issues ==
Here are the changes found in IGTPW_1433_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_selftest@live_hangcheck:
shard-kbl: PASS -> DMESG-FAIL (fdo#106560)
shard-glk: NOTRUN -> DMESG-FAIL (fdo#106560)
igt@gem_eio@hibernate:
shard-snb: PASS -> INCOMPLETE (fdo#105411)
igt@gem_ppgtt@blt-vs-render-ctxn:
shard-kbl: PASS -> INCOMPLETE (fdo#103665, fdo#106023)
igt@kms_available_modes_crc@available_mode_test_crc:
shard-snb: PASS -> FAIL (fdo#106641)
igt@kms_flip@2x-modeset-vs-vblank-race:
shard-hsw: PASS -> FAIL (fdo#103060)
igt@kms_flip@flip-vs-expired-vblank-interruptible:
shard-glk: PASS -> FAIL (fdo#105363, fdo#102887)
igt@kms_flip@plain-flip-fb-recreate-interruptible:
shard-glk: PASS -> FAIL (fdo#100368) +1
igt@kms_flip_tiling@flip-x-tiled:
shard-glk: PASS -> FAIL (fdo#104724, fdo#103822) +2
igt@perf_pmu@busy-accuracy-98-vcs0:
shard-snb: SKIP -> INCOMPLETE (fdo#105411)
==== Possible fixes ====
igt@gem_exec_reuse@single:
shard-snb: INCOMPLETE (fdo#105411) -> PASS
igt@gem_ppgtt@blt-vs-render-ctx0:
shard-kbl: INCOMPLETE (fdo#103665, fdo#106023) -> PASS
igt@gem_workarounds@suspend-resume-fd:
shard-kbl: INCOMPLETE (fdo#103665) -> PASS
igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
shard-hsw: FAIL (fdo#102670) -> PASS
igt@kms_flip@2x-dpms-vs-vblank-race:
shard-hsw: FAIL (fdo#103060) -> PASS
igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
shard-hsw: FAIL (fdo#102887) -> PASS
igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
shard-hsw: FAIL (fdo#100368) -> PASS
igt@kms_flip@plain-flip-fb-recreate:
shard-glk: FAIL (fdo#100368) -> PASS
igt@kms_setmode@basic:
shard-kbl: FAIL (fdo#99912) -> PASS
==== Warnings ====
igt@drv_selftest@live_gtt:
shard-glk: INCOMPLETE (k.org#198133, fdo#103359) -> FAIL (fdo#105347)
igt@kms_sysfs_edid_timing:
shard-hsw: FAIL (fdo#100047) -> WARN (fdo#100047)
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822
fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347
fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#106641 https://bugs.freedesktop.org/show_bug.cgi?id=106641
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133
== Participating hosts (5 -> 5) ==
No changes in participating hosts
== Build changes ==
* IGT: IGT_4511 -> IGTPW_1433
* Linux: CI_DRM_4292 -> CI_DRM_4293
CI_DRM_4292: 0646de2b0b0abe16b836b804bf03ce24ea618264 @ git://anongit.freedesktop.org/gfx-ci/linux
CI_DRM_4293: 70d3bb47919b2acc66aa1d7a6566cdf60a0cf66d @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_1433: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1433/
IGT_4511: 44b837c9b498a2749d2564cbd8acb5a57da02217 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1433/shards.html
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^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [igt-dev] [PATCH i-g-t 1/5] lib/gen7_render: include gen6_render header
2018-06-08 11:38 [igt-dev] [PATCH i-g-t 1/5] lib/gen7_render: include gen6_render header Lukasz Kalamarz
` (5 preceding siblings ...)
2018-06-08 14:52 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
@ 2018-06-11 7:31 ` Katarzyna Dec
2018-06-11 12:42 ` Kalamarz, Lukasz
6 siblings, 1 reply; 16+ messages in thread
From: Katarzyna Dec @ 2018-06-11 7:31 UTC (permalink / raw)
To: Lukasz Kalamarz; +Cc: igt-dev
On Fri, Jun 08, 2018 at 01:38:51PM +0200, Lukasz Kalamarz wrote:
> We would like to start including previous gens headers,
> like we are doing in genX_media headers. For render we were
> missing proper includes in gen7 and gen8 headers. This patch
> fixes gen7 issue and also remove redefinition of two enums.
There is something wrong with this commit msg what makes it hard
to understang.
Maybe sth like this:
After removing duplications from gen6_render (others??) I would like
to use this library for gen7_render. Some 'proper??' includes
are missing for gen7 and gen8 headers.
I am also removing redefinition of 2 enums (they are the same as for gen6).
Maybe sth like this? (it is not perfect :))
Kasia
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^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [igt-dev] [PATCH i-g-t 1/5] lib/gen7_render: include gen6_render header
2018-06-11 7:31 ` [igt-dev] [PATCH i-g-t 1/5] " Katarzyna Dec
@ 2018-06-11 12:42 ` Kalamarz, Lukasz
0 siblings, 0 replies; 16+ messages in thread
From: Kalamarz, Lukasz @ 2018-06-11 12:42 UTC (permalink / raw)
To: Dec, Katarzyna; +Cc: igt-dev@lists.freedesktop.org
On Mon, 2018-06-11 at 09:31 +0200, Katarzyna Dec wrote:
> On Fri, Jun 08, 2018 at 01:38:51PM +0200, Lukasz Kalamarz wrote:
> > We would like to start including previous gens headers,
> > like we are doing in genX_media headers. For render we were
> > missing proper includes in gen7 and gen8 headers. This patch
> > fixes gen7 issue and also remove redefinition of two enums.
>
> There is something wrong with this commit msg what makes it hard
> to understang.
> Maybe sth like this:
> After removing duplications from gen6_render (others??) I would like
> to use this library for gen7_render. Some 'proper??' includes
> are missing for gen7 and gen8 headers.
> I am also removing redefinition of 2 enums (they are the same as for
> gen6).
>
> Maybe sth like this? (it is not perfect :))
> Kasia
>
Will fix that in next version of patch
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^ permalink raw reply [flat|nested] 16+ messages in thread