From: Talha Nassar <talha.nassar@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: [igt-dev] [PATCH i-g-t] i915/gem_workarounds: adding 0xe420 register to WO list
Date: Wed, 19 Dec 2018 09:10:32 -0800 [thread overview]
Message-ID: <1545239432-4936-1-git-send-email-talha.nassar@intel.com> (raw)
From: talha nassar <talha.nassar@intel.com>
HW team confirmed that this register is write-only.
References: https://bugs.freedesktop.org/show_bug.cgi?id=107338
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: talha nassar <talha.nassar@intel.com>
---
tests/i915/gem_workarounds.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c
index 78478ad..b7d7d9c 100644
--- a/tests/i915/gem_workarounds.c
+++ b/tests/i915/gem_workarounds.c
@@ -51,7 +51,8 @@ static struct write_only_list {
unsigned int gen;
uint32_t addr;
} wo_list[] = {
- { 10, 0xE5F0 } /* WaForceContextSaveRestoreNonCoherent:cnl */
+ { 10, 0xE5F0 }, /* WaForceContextSaveRestoreNonCoherent:cnl */
+ { 11, 0xE420 } /* WaEnableFloatBlendOptimization:icl */
/*
* FIXME: If you are contemplating adding stuff here
--
2.7.4
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next reply other threads:[~2018-12-19 17:10 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-19 17:10 Talha Nassar [this message]
2018-12-19 17:57 ` [igt-dev] ✓ Fi.CI.BAT: success for i915/gem_workarounds: adding 0xe420 register to WO list Patchwork
2018-12-19 19:13 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
2018-12-20 10:54 ` [igt-dev] [PATCH i-g-t] " Mika Kuoppala
2018-12-20 11:01 ` Chris Wilson
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