[igt-dev] [PATCH RFC i-g-t 00/10] GEN12 render and media compression with Clear Color

[igt-dev] [PATCH RFC i-g-t 00/10] GEN12 render and media compression with Clear Color

[Mika Kahola]

Gen-12 render and media decompression is supported with Y-tiled main surface.
The patch series introduces CCS and MCS support for IGT tests. The patches 7
and 8 introduce format modifier required by Color Clear feature.

The patch series is sent as RFC as the corresponding kernel series

https://patchwork.freedesktop.org/series/67078/

has been sent as RFC and pending reviews comments. As kernel series is a subject
to change, so is this IGT counterpart.

Mika Kahola (10):
  Format modifier for Intel Gen-12 render compression
  lib/igt_fb.c: Update tile sizes for GEN12 CCS
  tests/kms_ccs: Add GEN12 CCS render compression format modifiers
  Format modifier for Intel Gen-12 media compression
  lib/igt_fb.c: Update tile sizes for GEN12 MCS
  tests/kms_ccs: Add GEN12 CCS media compression format modifiers
  Format modifier for Gen-12 render engine with Color Clear
  lib/igt_fb.c: Update tile sizes for GEN12 Color Clear
  tests/kms_ccs: Add GEN12 CCS Color Clear format modifiers
  tests/kms_getgfb: Update GEN12 CCS format modifiers

 include/drm-uapi/drm_fourcc.h |  4 +++-
 lib/igt_fb.c                  | 40 +++++++++++++++++++++++++++++++++--
 lib/ioctl_wrappers.h          |  4 +++-
 tests/kms_ccs.c               | 19 ++++++++++++++---
 tests/kms_getfb.c             |  5 +++++
 5 files changed, 65 insertions(+), 7 deletions(-)

-- 
2.17.1

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[igt-dev] [PATCH RFC i-g-t 01/10] Format modifier for Intel Gen-12 render compression

[Mika Kahola]

Gen-12 has a new compression format for render compression.
For this, a new modifier is needed to indicate that.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 include/drm-uapi/drm_fourcc.h | 1 +
 lib/ioctl_wrappers.h          | 1 +
 2 files changed, 2 insertions(+)

diff --git a/include/drm-uapi/drm_fourcc.h b/include/drm-uapi/drm_fourcc.h
index 3feeaa3f..b93eb2d4 100644
--- a/include/drm-uapi/drm_fourcc.h
+++ b/include/drm-uapi/drm_fourcc.h
@@ -409,6 +409,7 @@ extern "C" {
  */
 #define I915_FORMAT_MOD_Y_TILED_CCS	fourcc_mod_code(INTEL, 4)
 #define I915_FORMAT_MOD_Yf_TILED_CCS	fourcc_mod_code(INTEL, 5)
+#define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS fourcc_mod_code(INTEL, 6)
 
 /*
  * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index 03211c97..f2412d78 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -200,6 +200,7 @@ struct local_drm_mode_fb_cmd2 {
 #define LOCAL_I915_FORMAT_MOD_Yf_TILED	local_fourcc_mod_code(INTEL, 3)
 #define LOCAL_I915_FORMAT_MOD_Y_TILED_CCS	local_fourcc_mod_code(INTEL, 4)
 #define LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS	local_fourcc_mod_code(INTEL, 5)
+#define LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS fourcc_mod_code(INTEL, 6)
 
 #define LOCAL_DRM_IOCTL_MODE_ADDFB2	DRM_IOWR(0xB8, \
 						 struct local_drm_mode_fb_cmd2)
-- 
2.17.1

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Re: [igt-dev] [PATCH RFC i-g-t 01/10] Format modifier for Intel Gen-12 render compression

[Radhakrishna Sripada]

On Wed, Sep 25, 2019 at 04:09:22PM +0300, Mika Kahola wrote:
> Gen-12 has a new compression format for render compression.
> For this, a new modifier is needed to indicate that.
> 
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
>  include/drm-uapi/drm_fourcc.h | 1 +
>  lib/ioctl_wrappers.h          | 1 +
>  2 files changed, 2 insertions(+)
> 
> diff --git a/include/drm-uapi/drm_fourcc.h b/include/drm-uapi/drm_fourcc.h
> index 3feeaa3f..b93eb2d4 100644
> --- a/include/drm-uapi/drm_fourcc.h
> +++ b/include/drm-uapi/drm_fourcc.h
> @@ -409,6 +409,7 @@ extern "C" {
>   */
>  #define I915_FORMAT_MOD_Y_TILED_CCS	fourcc_mod_code(INTEL, 4)
>  #define I915_FORMAT_MOD_Yf_TILED_CCS	fourcc_mod_code(INTEL, 5)
> +#define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS fourcc_mod_code(INTEL, 6)
>  
>  /*
>   * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
> diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
> index 03211c97..f2412d78 100644
> --- a/lib/ioctl_wrappers.h
> +++ b/lib/ioctl_wrappers.h
> @@ -200,6 +200,7 @@ struct local_drm_mode_fb_cmd2 {
>  #define LOCAL_I915_FORMAT_MOD_Yf_TILED	local_fourcc_mod_code(INTEL, 3)
>  #define LOCAL_I915_FORMAT_MOD_Y_TILED_CCS	local_fourcc_mod_code(INTEL, 4)
>  #define LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS	local_fourcc_mod_code(INTEL, 5)
> +#define LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS fourcc_mod_code(INTEL, 6)
>  
>  #define LOCAL_DRM_IOCTL_MODE_ADDFB2	DRM_IOWR(0xB8, \
>  						 struct local_drm_mode_fb_cmd2)
> -- 
> 2.17.1
> 
> _______________________________________________
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> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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[igt-dev] [PATCH RFC i-g-t 02/10] lib/igt_fb.c: Update tile sizes for GEN12 CCS

[Mika Kahola]

Update tile sizes for GEN12 CCS.

BSpec: 2422

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 lib/igt_fb.c | 34 ++++++++++++++++++++++++++++++++--
 1 file changed, 32 insertions(+), 2 deletions(-)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index bad3eeca..826d9f70 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -381,6 +381,33 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
 			*height_ret = 32;
 		}
 		break;
+	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
+		igt_require_intel(fd);
+		switch (fb_bpp) {
+		case 8:
+			*width_ret = 512;
+			*height_ret = 32;
+			break;
+		case 16:
+			*width_ret = 256;
+			*height_ret = 32;
+			break;
+		case 32:
+			*width_ret = 128;
+			*height_ret = 32;
+			break;
+		case 64:
+			*width_ret = 64;
+			*height_ret = 32;
+			break;
+		case 128:
+			*width_ret = 32;
+			*height_ret = 32;
+			break;
+		default:
+			igt_assert(false);
+		}
+		break;
 	case LOCAL_I915_FORMAT_MOD_Yf_TILED:
 	case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS:
 		igt_require_intel(fd);
@@ -435,8 +462,10 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
 
 static bool is_ccs_modifier(uint64_t modifier)
 {
-	return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_CCS ||
-		modifier == LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS;
+
+	return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
+		modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
+		modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
 }
 
 static unsigned fb_plane_width(const struct igt_fb *fb, int plane)
@@ -655,6 +684,7 @@ uint64_t igt_fb_mod_to_tiling(uint64_t modifier)
 		return I915_TILING_X;
 	case LOCAL_I915_FORMAT_MOD_Y_TILED:
 	case LOCAL_I915_FORMAT_MOD_Y_TILED_CCS:
+	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
 		return I915_TILING_Y;
 	case LOCAL_I915_FORMAT_MOD_Yf_TILED:
 	case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS:
-- 
2.17.1

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Re: [igt-dev] [PATCH RFC i-g-t 02/10] lib/igt_fb.c: Update tile sizes for GEN12 CCS

[Radhakrishna Sripada]

On Wed, Sep 25, 2019 at 04:09:23PM +0300, Mika Kahola wrote:
> Update tile sizes for GEN12 CCS.
> 
> BSpec: 2422
BSpec:47709 - Gen12
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
>  lib/igt_fb.c | 34 ++++++++++++++++++++++++++++++++--
>  1 file changed, 32 insertions(+), 2 deletions(-)
> 
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index bad3eeca..826d9f70 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -381,6 +381,33 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
>  			*height_ret = 32;
>  		}
>  		break;
> +	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
> +		igt_require_intel(fd);
> +		switch (fb_bpp) {
> +		case 8:
> +			*width_ret = 512;
> +			*height_ret = 32;
> +			break;
> +		case 16:
> +			*width_ret = 256;
> +			*height_ret = 32;
> +			break;
> +		case 32:
> +			*width_ret = 128;
> +			*height_ret = 32;
> +			break;
> +		case 64:
> +			*width_ret = 64;
> +			*height_ret = 32;
> +			break;
> +		case 128:
> +			*width_ret = 32;
> +			*height_ret = 32;
> +			break;
> +		default:
> +			igt_assert(false);
> +		}
> +		break;
>  	case LOCAL_I915_FORMAT_MOD_Yf_TILED:
>  	case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS:
>  		igt_require_intel(fd);
> @@ -435,8 +462,10 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
>  
>  static bool is_ccs_modifier(uint64_t modifier)
>  {
> -	return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_CCS ||
> -		modifier == LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS;
> +
> +	return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
> +		modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
> +		modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
>  }
>  
>  static unsigned fb_plane_width(const struct igt_fb *fb, int plane)
> @@ -655,6 +684,7 @@ uint64_t igt_fb_mod_to_tiling(uint64_t modifier)
>  		return I915_TILING_X;
>  	case LOCAL_I915_FORMAT_MOD_Y_TILED:
>  	case LOCAL_I915_FORMAT_MOD_Y_TILED_CCS:
> +	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
>  		return I915_TILING_Y;
>  	case LOCAL_I915_FORMAT_MOD_Yf_TILED:
>  	case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS:
> -- 
> 2.17.1
> 
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Re: [igt-dev] [PATCH RFC i-g-t 02/10] lib/igt_fb.c: Update tile sizes for GEN12 CCS

[Kahola, Mika]

On Tue, 2019-10-29 at 14:25 -0700, Radhakrishna Sripada wrote:
> On Wed, Sep 25, 2019 at 04:09:23PM +0300, Mika Kahola wrote:
> > Update tile sizes for GEN12 CCS.
> > 
> > BSpec: 2422
> 
> BSpec:47709 - Gen12
I'll fix this. Thanks for pointing out the correct reference and for
the review!

> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> > 
> > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> > ---
> >  lib/igt_fb.c | 34 ++++++++++++++++++++++++++++++++--
> >  1 file changed, 32 insertions(+), 2 deletions(-)
> > 
> > diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> > index bad3eeca..826d9f70 100644
> > --- a/lib/igt_fb.c
> > +++ b/lib/igt_fb.c
> > @@ -381,6 +381,33 @@ void igt_get_fb_tile_size(int fd, uint64_t
> > modifier, int fb_bpp,
> >  			*height_ret = 32;
> >  		}
> >  		break;
> > +	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
> > +		igt_require_intel(fd);
> > +		switch (fb_bpp) {
> > +		case 8:
> > +			*width_ret = 512;
> > +			*height_ret = 32;
> > +			break;
> > +		case 16:
> > +			*width_ret = 256;
> > +			*height_ret = 32;
> > +			break;
> > +		case 32:
> > +			*width_ret = 128;
> > +			*height_ret = 32;
> > +			break;
> > +		case 64:
> > +			*width_ret = 64;
> > +			*height_ret = 32;
> > +			break;
> > +		case 128:
> > +			*width_ret = 32;
> > +			*height_ret = 32;
> > +			break;
> > +		default:
> > +			igt_assert(false);
> > +		}
> > +		break;
> >  	case LOCAL_I915_FORMAT_MOD_Yf_TILED:
> >  	case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS:
> >  		igt_require_intel(fd);
> > @@ -435,8 +462,10 @@ void igt_get_fb_tile_size(int fd, uint64_t
> > modifier, int fb_bpp,
> >  
> >  static bool is_ccs_modifier(uint64_t modifier)
> >  {
> > -	return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_CCS ||
> > -		modifier == LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS;
> > +
> > +	return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
> > +		modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
> > +		modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
> >  }
> >  
> >  static unsigned fb_plane_width(const struct igt_fb *fb, int plane)
> > @@ -655,6 +684,7 @@ uint64_t igt_fb_mod_to_tiling(uint64_t
> > modifier)
> >  		return I915_TILING_X;
> >  	case LOCAL_I915_FORMAT_MOD_Y_TILED:
> >  	case LOCAL_I915_FORMAT_MOD_Y_TILED_CCS:
> > +	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
> >  		return I915_TILING_Y;
> >  	case LOCAL_I915_FORMAT_MOD_Yf_TILED:
> >  	case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS:
> > -- 
> > 2.17.1
> > 
> > _______________________________________________
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> > igt-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/igt-dev
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[igt-dev] [PATCH RFC i-g-t 03/10] tests/kms_ccs: Add GEN12 CCS render compression format modifiers

[Mika Kahola]

Add GEN12 CCS format modifiers for render compression.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 tests/kms_ccs.c | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index 1ce66cde..cde62416 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
@@ -75,6 +75,10 @@ static const uint64_t ccs_modifiers[] = {
 	LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS,
 };
 
+static const uint64_t ccs_gen12_modifiers[] = {
+	LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
+};
+
 /*
  * Limit maximum used sprite plane width so this test will not mistakenly
  * fail on hardware limitations which are not interesting to this test.
@@ -307,9 +311,16 @@ static int __test_output(data_t *data)
 
 	igt_output_set_pipe(data->output, data->pipe);
 
-	for (i = 0; i < ARRAY_SIZE(ccs_modifiers); i++) {
-		data->ccs_modifier = ccs_modifiers[i];
-		valid_tests += test_ccs(data);
+	if (intel_gen(intel_get_drm_devid(data->drm_fd)) >= 12) {
+		for (i = 0; i < ARRAY_SIZE(ccs_gen12_modifiers); i++) {
+			data->ccs_modifier = ccs_gen12_modifiers[i];
+			valid_tests += test_ccs(data);
+		}
+	} else {
+		for (i = 0; i < ARRAY_SIZE(ccs_modifiers); i++) {
+			data->ccs_modifier = ccs_modifiers[i];
+			valid_tests += test_ccs(data);
+		}
 	}
 
 	igt_output_set_pipe(data->output, PIPE_NONE);
-- 
2.17.1

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Re: [igt-dev] [PATCH RFC i-g-t 03/10] tests/kms_ccs: Add GEN12 CCS render compression format modifiers

[Radhakrishna Sripada]

On Wed, Sep 25, 2019 at 04:09:24PM +0300, Mika Kahola wrote:
> Add GEN12 CCS format modifiers for render compression.
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
>  tests/kms_ccs.c | 17 ++++++++++++++---
>  1 file changed, 14 insertions(+), 3 deletions(-)
> 
> diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
> index 1ce66cde..cde62416 100644
> --- a/tests/kms_ccs.c
> +++ b/tests/kms_ccs.c
> @@ -75,6 +75,10 @@ static const uint64_t ccs_modifiers[] = {
>  	LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS,
>  };
>  
> +static const uint64_t ccs_gen12_modifiers[] = {
> +	LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
> +};
> +
>  /*
>   * Limit maximum used sprite plane width so this test will not mistakenly
>   * fail on hardware limitations which are not interesting to this test.
> @@ -307,9 +311,16 @@ static int __test_output(data_t *data)
>  
>  	igt_output_set_pipe(data->output, data->pipe);
>  
> -	for (i = 0; i < ARRAY_SIZE(ccs_modifiers); i++) {
> -		data->ccs_modifier = ccs_modifiers[i];
> -		valid_tests += test_ccs(data);
> +	if (intel_gen(intel_get_drm_devid(data->drm_fd)) >= 12) {
> +		for (i = 0; i < ARRAY_SIZE(ccs_gen12_modifiers); i++) {
> +			data->ccs_modifier = ccs_gen12_modifiers[i];
Do we skip the gen9 ccs modifiers here?

- Radhakrishna(RK) Sripada
> +			valid_tests += test_ccs(data);
> +		}
> +	} else {
> +		for (i = 0; i < ARRAY_SIZE(ccs_modifiers); i++) {
> +			data->ccs_modifier = ccs_modifiers[i];
> +			valid_tests += test_ccs(data);
> +		}
>  	}
>  
>  	igt_output_set_pipe(data->output, PIPE_NONE);
> -- 
> 2.17.1
> 
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Re: [igt-dev] [PATCH RFC i-g-t 03/10] tests/kms_ccs: Add GEN12 CCS render compression format modifiers

[Kahola, Mika]

On Tue, 2019-10-29 at 14:27 -0700, Radhakrishna Sripada wrote:
> On Wed, Sep 25, 2019 at 04:09:24PM +0300, Mika Kahola wrote:
> > Add GEN12 CCS format modifiers for render compression.
> > 
> > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> > ---
> >  tests/kms_ccs.c | 17 ++++++++++++++---
> >  1 file changed, 14 insertions(+), 3 deletions(-)
> > 
> > diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
> > index 1ce66cde..cde62416 100644
> > --- a/tests/kms_ccs.c
> > +++ b/tests/kms_ccs.c
> > @@ -75,6 +75,10 @@ static const uint64_t ccs_modifiers[] = {
> >  	LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS,
> >  };
> >  
> > +static const uint64_t ccs_gen12_modifiers[] = {
> > +	LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
> > +};
> > +
> >  /*
> >   * Limit maximum used sprite plane width so this test will not
> > mistakenly
> >   * fail on hardware limitations which are not interesting to this
> > test.
> > @@ -307,9 +311,16 @@ static int __test_output(data_t *data)
> >  
> >  	igt_output_set_pipe(data->output, data->pipe);
> >  
> > -	for (i = 0; i < ARRAY_SIZE(ccs_modifiers); i++) {
> > -		data->ccs_modifier = ccs_modifiers[i];
> > -		valid_tests += test_ccs(data);
> > +	if (intel_gen(intel_get_drm_devid(data->drm_fd)) >= 12) {
> > +		for (i = 0; i < ARRAY_SIZE(ccs_gen12_modifiers); i++) {
> > +			data->ccs_modifier = ccs_gen12_modifiers[i];
> 
> Do we skip the gen9 ccs modifiers here?
The idea here was to use gen12 modifiers for gen12+ platforms. 

Actually, I noticed from BSpec later on that 90/270 is not supported
for render compression (BSpec #49252) and I need to update the patch
accordingly.

> 
> - Radhakrishna(RK) Sripada
> > +			valid_tests += test_ccs(data);
> > +		}
> > +	} else {
> > +		for (i = 0; i < ARRAY_SIZE(ccs_modifiers); i++) {
> > +			data->ccs_modifier = ccs_modifiers[i];
> > +			valid_tests += test_ccs(data);
> > +		}
> >  	}
> >  
> >  	igt_output_set_pipe(data->output, PIPE_NONE);
> > -- 
> > 2.17.1
> > 
> > _______________________________________________
> > igt-dev mailing list
> > igt-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/igt-dev
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Re: [igt-dev] [PATCH RFC i-g-t 03/10] tests/kms_ccs: Add GEN12 CCS render compression format modifiers

[Ville Syrjälä]

On Wed, Oct 30, 2019 at 01:47:22PM +0000, Kahola, Mika wrote:
> On Tue, 2019-10-29 at 14:27 -0700, Radhakrishna Sripada wrote:
> > On Wed, Sep 25, 2019 at 04:09:24PM +0300, Mika Kahola wrote:
> > > Add GEN12 CCS format modifiers for render compression.
> > > 
> > > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> > > ---
> > >  tests/kms_ccs.c | 17 ++++++++++++++---
> > >  1 file changed, 14 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
> > > index 1ce66cde..cde62416 100644
> > > --- a/tests/kms_ccs.c
> > > +++ b/tests/kms_ccs.c
> > > @@ -75,6 +75,10 @@ static const uint64_t ccs_modifiers[] = {
> > >  	LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS,
> > >  };
> > >  
> > > +static const uint64_t ccs_gen12_modifiers[] = {
> > > +	LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
> > > +};
> > > +
> > >  /*
> > >   * Limit maximum used sprite plane width so this test will not
> > > mistakenly
> > >   * fail on hardware limitations which are not interesting to this
> > > test.
> > > @@ -307,9 +311,16 @@ static int __test_output(data_t *data)
> > >  
> > >  	igt_output_set_pipe(data->output, data->pipe);
> > >  
> > > -	for (i = 0; i < ARRAY_SIZE(ccs_modifiers); i++) {
> > > -		data->ccs_modifier = ccs_modifiers[i];
> > > -		valid_tests += test_ccs(data);
> > > +	if (intel_gen(intel_get_drm_devid(data->drm_fd)) >= 12) {
> > > +		for (i = 0; i < ARRAY_SIZE(ccs_gen12_modifiers); i++) {
> > > +			data->ccs_modifier = ccs_gen12_modifiers[i];
> > 
> > Do we skip the gen9 ccs modifiers here?
> The idea here was to use gen12 modifiers for gen12+ platforms. 

We have igt_display_has_format_mod() & co.

Though we should perhaps also check that we don't accept the wrong
modifiers. But that's probably better handled by some other test.
In fact I seem to recall having posted one like that. Ah yes, these
two:
https://patchwork.freedesktop.org/patch/239809/?series=46876&rev=1
https://patchwork.freedesktop.org/patch/239814/?series=46876&rev=1

> 
> Actually, I noticed from BSpec later on that 90/270 is not supported
> for render compression (BSpec #49252) and I need to update the patch
> accordingly.
> 
> > 
> > - Radhakrishna(RK) Sripada
> > > +			valid_tests += test_ccs(data);
> > > +		}
> > > +	} else {
> > > +		for (i = 0; i < ARRAY_SIZE(ccs_modifiers); i++) {
> > > +			data->ccs_modifier = ccs_modifiers[i];
> > > +			valid_tests += test_ccs(data);
> > > +		}
> > >  	}
> > >  
> > >  	igt_output_set_pipe(data->output, PIPE_NONE);
> > > -- 
> > > 2.17.1
> > > 
> > > _______________________________________________
> > > igt-dev mailing list
> > > igt-dev@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/igt-dev
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev

-- 
Ville Syrjälä
Intel
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[igt-dev] [PATCH RFC i-g-t 04/10] Format modifier for Intel Gen-12 media compression

[Mika Kahola]

Gen-12 has a new compression format for media compression.
For this, a new modifier is needed to indicate that.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 include/drm-uapi/drm_fourcc.h | 1 +
 lib/ioctl_wrappers.h          | 1 +
 2 files changed, 2 insertions(+)

diff --git a/include/drm-uapi/drm_fourcc.h b/include/drm-uapi/drm_fourcc.h
index b93eb2d4..d226403a 100644
--- a/include/drm-uapi/drm_fourcc.h
+++ b/include/drm-uapi/drm_fourcc.h
@@ -410,6 +410,7 @@ extern "C" {
 #define I915_FORMAT_MOD_Y_TILED_CCS	fourcc_mod_code(INTEL, 4)
 #define I915_FORMAT_MOD_Yf_TILED_CCS	fourcc_mod_code(INTEL, 5)
 #define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS fourcc_mod_code(INTEL, 6)
+#define I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS fourcc_mod_code(INTEL, 7)
 
 /*
  * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index f2412d78..7dd2a1e8 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -201,6 +201,7 @@ struct local_drm_mode_fb_cmd2 {
 #define LOCAL_I915_FORMAT_MOD_Y_TILED_CCS	local_fourcc_mod_code(INTEL, 4)
 #define LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS	local_fourcc_mod_code(INTEL, 5)
 #define LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS fourcc_mod_code(INTEL, 6)
+#define LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS fourcc_mod_code(INTEL, 7)
 
 #define LOCAL_DRM_IOCTL_MODE_ADDFB2	DRM_IOWR(0xB8, \
 						 struct local_drm_mode_fb_cmd2)
-- 
2.17.1

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[igt-dev] [PATCH RFC i-g-t 05/10] lib/igt_fb.c: Update tile sizes for GEN12 MCS

[Mika Kahola]

Update tile sizes for GEN12 MCS.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 lib/igt_fb.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 826d9f70..618e7a63 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -382,6 +382,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
 		}
 		break;
 	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
+	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
 		igt_require_intel(fd);
 		switch (fb_bpp) {
 		case 8:
@@ -464,6 +465,7 @@ static bool is_ccs_modifier(uint64_t modifier)
 {
 
 	return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
+		modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
 		modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
 		modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
 }
@@ -685,6 +687,7 @@ uint64_t igt_fb_mod_to_tiling(uint64_t modifier)
 	case LOCAL_I915_FORMAT_MOD_Y_TILED:
 	case LOCAL_I915_FORMAT_MOD_Y_TILED_CCS:
 	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
+	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
 		return I915_TILING_Y;
 	case LOCAL_I915_FORMAT_MOD_Yf_TILED:
 	case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS:
-- 
2.17.1

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[igt-dev] [PATCH RFC i-g-t 06/10] tests/kms_ccs: Add GEN12 CCS media compression format modifiers

[Mika Kahola]

Add GEN12 CCS format modifiers for media compression.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 tests/kms_ccs.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index cde62416..6d2ae840 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
@@ -77,6 +77,7 @@ static const uint64_t ccs_modifiers[] = {
 
 static const uint64_t ccs_gen12_modifiers[] = {
 	LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
+	LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS,
 };
 
 /*
-- 
2.17.1

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[igt-dev] [PATCH RFC i-g-t 07/10] Format modifier for Gen-12 render engine with Color Clear

[Mika Kahola]

Gen12 display can decompress surfaces compressed by render engine with Clear Color, add
a new modifier as the driver needs to know the surface was compressed by render engine.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 include/drm-uapi/drm_fourcc.h | 2 +-
 lib/ioctl_wrappers.h          | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/drm-uapi/drm_fourcc.h b/include/drm-uapi/drm_fourcc.h
index d226403a..ca7ea6b7 100644
--- a/include/drm-uapi/drm_fourcc.h
+++ b/include/drm-uapi/drm_fourcc.h
@@ -411,7 +411,7 @@ extern "C" {
 #define I915_FORMAT_MOD_Yf_TILED_CCS	fourcc_mod_code(INTEL, 5)
 #define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS fourcc_mod_code(INTEL, 6)
 #define I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS fourcc_mod_code(INTEL, 7)
-
+#define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8)
 /*
  * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
  *
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index 7dd2a1e8..5ee23ea6 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -202,7 +202,7 @@ struct local_drm_mode_fb_cmd2 {
 #define LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS	local_fourcc_mod_code(INTEL, 5)
 #define LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS fourcc_mod_code(INTEL, 6)
 #define LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS fourcc_mod_code(INTEL, 7)
-
+#define LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8)
 #define LOCAL_DRM_IOCTL_MODE_ADDFB2	DRM_IOWR(0xB8, \
 						 struct local_drm_mode_fb_cmd2)
 
-- 
2.17.1

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[igt-dev] [PATCH RFC i-g-t 08/10] lib/igt_fb.c: Update tile sizes for GEN12 Color Clear

[Mika Kahola]

Update tile sizes for GEN12 Color Clear.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 lib/igt_fb.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 618e7a63..603636be 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -383,6 +383,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
 		break;
 	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
 	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
+	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
 		igt_require_intel(fd);
 		switch (fb_bpp) {
 		case 8:
@@ -466,6 +467,7 @@ static bool is_ccs_modifier(uint64_t modifier)
 
 	return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
 		modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
+		modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
 		modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
 		modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
 }
@@ -688,6 +690,7 @@ uint64_t igt_fb_mod_to_tiling(uint64_t modifier)
 	case LOCAL_I915_FORMAT_MOD_Y_TILED_CCS:
 	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
 	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
+	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
 		return I915_TILING_Y;
 	case LOCAL_I915_FORMAT_MOD_Yf_TILED:
 	case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS:
-- 
2.17.1

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Re: [igt-dev] [PATCH RFC i-g-t 08/10] lib/igt_fb.c: Update tile sizes for GEN12 Color Clear

[Radhakrishna Sripada]

On Wed, Sep 25, 2019 at 04:09:29PM +0300, Mika Kahola wrote:
> Update tile sizes for GEN12 Color Clear.
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
>  lib/igt_fb.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index 618e7a63..603636be 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -383,6 +383,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
>  		break;
>  	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
>  	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
> +	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
>  		igt_require_intel(fd);
>  		switch (fb_bpp) {
>  		case 8:
> @@ -466,6 +467,7 @@ static bool is_ccs_modifier(uint64_t modifier)
>  
>  	return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
>  		modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
> +		modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC uses 3 planes. The third plane for Clear Color structure.
We need to make additional changes to support 3rd plane.

- Radhakrishna(RK) Sripada
>  		modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
>  		modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
>  }
> @@ -688,6 +690,7 @@ uint64_t igt_fb_mod_to_tiling(uint64_t modifier)
>  	case LOCAL_I915_FORMAT_MOD_Y_TILED_CCS:
>  	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
>  	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
> +	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
>  		return I915_TILING_Y;
>  	case LOCAL_I915_FORMAT_MOD_Yf_TILED:
>  	case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS:
> -- 
> 2.17.1
> 
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Re: [igt-dev] [PATCH RFC i-g-t 08/10] lib/igt_fb.c: Update tile sizes for GEN12 Color Clear

[Kahola, Mika]

On Tue, 2019-10-29 at 14:31 -0700, Radhakrishna Sripada wrote:
> On Wed, Sep 25, 2019 at 04:09:29PM +0300, Mika Kahola wrote:
> > Update tile sizes for GEN12 Color Clear.
> > 
> > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> > ---
> >  lib/igt_fb.c | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> > index 618e7a63..603636be 100644
> > --- a/lib/igt_fb.c
> > +++ b/lib/igt_fb.c
> > @@ -383,6 +383,7 @@ void igt_get_fb_tile_size(int fd, uint64_t
> > modifier, int fb_bpp,
> >  		break;
> >  	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
> >  	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
> > +	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
> >  		igt_require_intel(fd);
> >  		switch (fb_bpp) {
> >  		case 8:
> > @@ -466,6 +467,7 @@ static bool is_ccs_modifier(uint64_t modifier)
> >  
> >  	return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
> >  		modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
> > +		modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
> 
> I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC uses 3 planes. The third
> plane for Clear Color structure.
> We need to make additional changes to support 3rd plane.
You're right. The kernel counterpart has changed a bit since I wrote
this. I'll update this patch to be aligned with kernel changes.

> 
> - Radhakrishna(RK) Sripada
> >  		modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
> >  		modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
> >  }
> > @@ -688,6 +690,7 @@ uint64_t igt_fb_mod_to_tiling(uint64_t
> > modifier)
> >  	case LOCAL_I915_FORMAT_MOD_Y_TILED_CCS:
> >  	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
> >  	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
> > +	case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
> >  		return I915_TILING_Y;
> >  	case LOCAL_I915_FORMAT_MOD_Yf_TILED:
> >  	case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS:
> > -- 
> > 2.17.1
> > 
> > _______________________________________________
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> > igt-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/igt-dev
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[igt-dev] [PATCH RFC i-g-t 09/10] tests/kms_ccs: Add GEN12 CCS Color Clear format modifiers

[Mika Kahola]

Add GEN12 CCS format modifiers for render compression Color Clear feature.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 tests/kms_ccs.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index 6d2ae840..e9115281 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
@@ -78,6 +78,7 @@ static const uint64_t ccs_modifiers[] = {
 static const uint64_t ccs_gen12_modifiers[] = {
 	LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
 	LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS,
+	LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC,
 };
 
 /*
-- 
2.17.1

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[igt-dev] [PATCH RFC i-g-t 10/10] tests/kms_getgfb: Update GEN12 CCS format modifiers

[Mika Kahola]

Update Intel GEN12 format modifiers for getfb-reject-ccs
subtest

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 tests/kms_getfb.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/tests/kms_getfb.c b/tests/kms_getfb.c
index ca0b01c0..1d3c4ac1 100644
--- a/tests/kms_getfb.c
+++ b/tests/kms_getfb.c
@@ -88,6 +88,11 @@ static void get_ccs_fb(int fd, struct drm_mode_fb_cmd2 *ret)
 	};
 	int size;
 
+	if (intel_gen(intel_get_drm_devid(fd)) >= 12) {
+		add.modifier[0] = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
+		add.modifier[1] = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
+	}
+
 	igt_require(has_addfb2_iface(fd));
 	igt_require_intel(fd);
 
-- 
2.17.1

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[igt-dev] ✓ Fi.CI.BAT: success for GEN12 render and media compression with Clear Color

[Patchwork]

== Series Details ==

Series: GEN12 render and media compression with Clear Color
URL   : https://patchwork.freedesktop.org/series/67215/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6956 -> IGTPW_3500
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/67215/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_3500 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          [PASS][1] -> [FAIL][2] ([fdo#103167])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-blb-e6850:       [INCOMPLETE][3] ([fdo#107718]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html

  
#### Warnings ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][5] ([fdo#111168 ]) -> [FAIL][6] ([fdo#111407])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#111168 ]: https://bugs.freedesktop.org/show_bug.cgi?id=111168 
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#111600]: https://bugs.freedesktop.org/show_bug.cgi?id=111600
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736


Participating hosts (51 -> 44)
------------------------------

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5202 -> IGTPW_3500

  CI-20190529: 20190529
  CI_DRM_6956: e514b64998c2845943242b1d4dc2e568b01fddcb @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3500: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/
  IGT_5202: 3499c5eb17054e2abd88023fe962768140d24302 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

[igt-dev] ✗ Fi.CI.IGT: failure for GEN12 render and media compression with Clear Color

[Patchwork]

== Series Details ==

Series: GEN12 render and media compression with Clear Color
URL   : https://patchwork.freedesktop.org/series/67215/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6956_full -> IGTPW_3500_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_3500_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_3500_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/67215/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_3500_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_schedule@independent-bsd2:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#109276]) +14 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb2/igt@gem_exec_schedule@independent-bsd2.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-iclb6/igt@gem_exec_schedule@independent-bsd2.html

  * igt@gem_exec_schedule@reorder-wide-bsd:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#111325]) +2 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb7/igt@gem_exec_schedule@reorder-wide-bsd.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-apl:          [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-apl8/igt@gem_workarounds@suspend-resume-context.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-apl6/igt@gem_workarounds@suspend-resume-context.html

  * igt@kms_flip@flip-vs-panning:
    - shard-hsw:          [PASS][7] -> [INCOMPLETE][8] ([fdo#103540])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-hsw1/igt@kms_flip@flip-vs-panning.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-hsw8/igt@kms_flip@flip-vs-panning.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
    - shard-iclb:         [PASS][9] -> [FAIL][10] ([fdo#103167]) +5 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([fdo#109642] / [fdo#111068]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-iclb7/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_primary_page_flip:
    - shard-iclb:         [PASS][13] -> [SKIP][14] ([fdo#109441]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-iclb1/igt@kms_psr@psr2_primary_page_flip.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-apl:          [DMESG-WARN][15] ([fdo#108566]) -> [PASS][16] +4 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-apl8/igt@gem_ctx_isolation@rcs0-s3.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-apl1/igt@gem_ctx_isolation@rcs0-s3.html

  * igt@gem_eio@unwedge-stress:
    - shard-snb:          [FAIL][17] ([fdo#109661]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-snb6/igt@gem_eio@unwedge-stress.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-snb7/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_schedule@preempt-queue-bsd:
    - shard-iclb:         [SKIP][19] ([fdo#111325]) -> [PASS][20] +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-iclb5/igt@gem_exec_schedule@preempt-queue-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
    - shard-iclb:         [SKIP][21] ([fdo#109276]) -> [PASS][22] +23 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb8/igt@gem_exec_schedule@preempt-queue-bsd1.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd1.html

  * igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen:
    - shard-iclb:         [INCOMPLETE][23] ([fdo#107713]) -> [PASS][24] +1 similar issue
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb7/igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-iclb5/igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-iclb:         [FAIL][25] ([fdo#103167]) -> [PASS][26] +3 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
    - shard-apl:          [INCOMPLETE][27] ([fdo#103927]) -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-apl1/igt@kms_plane@pixel-format-pipe-a-planes-source-clamping.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-apl7/igt@kms_plane@pixel-format-pipe-a-planes-source-clamping.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
    - shard-iclb:         [FAIL][29] ([fdo#103166]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb7/igt@kms_plane_lowres@pipe-a-tiling-y.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-iclb8/igt@kms_plane_lowres@pipe-a-tiling-y.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [SKIP][31] ([fdo#109441]) -> [PASS][32] +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb8/igt@kms_psr@psr2_primary_mmap_cpu.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html

  * igt@kms_sequence@queue-idle:
    - shard-hsw:          [DMESG-WARN][33] ([fdo#102614]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-hsw5/igt@kms_sequence@queue-idle.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-hsw4/igt@kms_sequence@queue-idle.html

  
#### Warnings ####

  * igt@gem_mocs_settings@mocs-isolation-bsd2:
    - shard-iclb:         [FAIL][35] ([fdo#111330]) -> [SKIP][36] ([fdo#109276])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb2/igt@gem_mocs_settings@mocs-isolation-bsd2.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/shard-iclb3/igt@gem_mocs_settings@mocs-isolation-bsd2.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330


Participating hosts (15 -> 6)
------------------------------

  ERROR: It appears as if the changes made in IGTPW_3500_full prevented too many machines from booting.

  Missing    (9): shard-skl pig-hsw-4770r shard-tglb1 shard-tglb2 shard-tglb3 shard-tglb4 shard-tglb5 shard-tglb6 pig-skl-6260u 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5202 -> IGTPW_3500
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_6956: e514b64998c2845943242b1d4dc2e568b01fddcb @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3500: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/
  IGT_5202: 3499c5eb17054e2abd88023fe962768140d24302 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3500/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev