[igt-dev] [PATCH 1/2] [PATCH i-g-t] i915/sysfs_heartbeat_interval: Update test to work with GuC submission

[igt-dev] [PATCH 1/2] [PATCH i-g-t] i915/sysfs_heartbeat_interval: Update test to work with GuC submission

[pallavi.mishra]

From: Pallavi Mishra <pallavi.mishra@intel.com>

Increase reset timeout as resets can take a bit longer with GuC
submission because an error capture is done and with a large GuC log (16
MB) these take a while.

Co-authored-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Pallavi Mishra <pallavi.mishra@intel.com>
---
 tests/i915/sysfs_heartbeat_interval.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/i915/sysfs_heartbeat_interval.c b/tests/i915/sysfs_heartbeat_interval.c
index 8cebf627..63e56cbf 100644
--- a/tests/i915/sysfs_heartbeat_interval.c
+++ b/tests/i915/sysfs_heartbeat_interval.c
@@ -43,7 +43,7 @@
 #include "sw_sync.h"
 
 #define ATTR "heartbeat_interval_ms"
-#define RESET_TIMEOUT 50 /* milliseconds, at least one jiffie for kworker */
+#define RESET_TIMEOUT 1000 /* milliseconds, long enough for an error capture */
 
 static bool __enable_hangcheck(int dir, bool state)
 {
-- 
2.34.1

[igt-dev] [PATCH 2/2] [PATCH i-g-t] i915/sysfs_timeslice_duration: Update test to work with GuC submission

[pallavi.mishra]

From: Pallavi Mishra <pallavi.mishra@intel.com>

Increase reset timeout as resets can take a bit longer with GuC
submission because an error capture is done and with a large GuC log (16
MB) these take a while.

Don't run 'off' section as with GuC submission we don't handle
dynamically changing the timeslice duration from 'off' to 'on' on a
currently running context. This is not bug in GuC submission rather an
architectural decision to not implement this as there is no user aside
from IGTs.

Co-authored-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Pallavi Mishra <pallavi.mishra@intel.com>
---
 tests/i915/sysfs_timeslice_duration.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/tests/i915/sysfs_timeslice_duration.c b/tests/i915/sysfs_timeslice_duration.c
index 95dc3777..e4bf3ca7 100644
--- a/tests/i915/sysfs_timeslice_duration.c
+++ b/tests/i915/sysfs_timeslice_duration.c
@@ -29,6 +29,7 @@
 #include <sys/types.h>
 #include <unistd.h>
 
+#include "igt.h"
 #include "igt_params.h"
 #include "drmtest.h"
 #include "i915/gem.h"
@@ -44,7 +45,7 @@
 #include "sw_sync.h"
 
 #define ATTR "timeslice_duration_ms"
-#define RESET_TIMEOUT 50 /* milliseconds, at least one jiffie for kworker */
+#define RESET_TIMEOUT 1000 /* milliseconds, at long enough for a error capture */
 
 #define MI_SEMAPHORE_WAIT		(0x1c << 23)
 #define   MI_SEMAPHORE_POLL             (1 << 15)
@@ -484,6 +485,9 @@ static void test_off(int i915, int engine)
 	gem_quiescent_gpu(i915);
 	igt_require(enable_hangcheck(i915, false));
 
+	/* Not a supported behavior for GuC enabled platforms */
+	igt_require(!gem_using_guc_submission(i915));
+
 	igt_assert(igt_sysfs_scanf(engine, "class", "%u", &class) == 1);
 	igt_assert(igt_sysfs_scanf(engine, "instance", "%u", &inst) == 1);
 
-- 
2.34.1

[igt-dev] ✗ Fi.CI.BAT: failure for series starting with [1/2,i-g-t] i915/sysfs_heartbeat_interval: Update test to work with GuC submission

[Patchwork]

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== Series Details ==

Series: series starting with [1/2,i-g-t] i915/sysfs_heartbeat_interval: Update test to work with GuC submission
URL   : https://patchwork.freedesktop.org/series/114435/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12787 -> IGTPW_8533
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_8533 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_8533, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8533/index.html

Participating hosts (39 -> 38)
------------------------------

  Additional (1): bat-adls-5 
  Missing    (2): fi-kbl-soraka fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_8533:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_fence@basic-busy@vecs0:
    - bat-adls-5:         NOTRUN -> [ABORT][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8533/bat-adls-5/igt@gem_exec_fence@basic-busy@vecs0.html

  
#### Warnings ####

  * igt@gem_exec_fence@basic-busy@vecs0:
    - fi-kbl-x1275:       [DMESG-WARN][2] -> [ABORT][3]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12787/fi-kbl-x1275/igt@gem_exec_fence@basic-busy@vecs0.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8533/fi-kbl-x1275/igt@gem_exec_fence@basic-busy@vecs0.html

  
Known issues
------------

  Here are the changes found in IGTPW_8533 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@debugfs_test@basic-hwmon:
    - bat-adls-5:         NOTRUN -> [SKIP][4] ([i915#7456])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8533/bat-adls-5/igt@debugfs_test@basic-hwmon.html

  
#### Possible fixes ####

  * igt@gem_exec_fence@basic-busy@vcs0:
    - fi-kbl-x1275:       [ABORT][5] -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12787/fi-kbl-x1275/igt@gem_exec_fence@basic-busy@vcs0.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8533/fi-kbl-x1275/igt@gem_exec_fence@basic-busy@vcs0.html

  
  [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7173 -> IGTPW_8533

  CI-20190529: 20190529
  CI_DRM_12787: 70da1d04c2abaaaef514174168a7e5595dbae6f3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8533: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8533/index.html
  IGT_7173: deab4e0bdf5a9366b67d0a44f478f3da3c9a943b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8533/index.html

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Re: [igt-dev] ✗ Fi.CI.BAT: failure for series starting with [1/2,i-g-t] i915/sysfs_heartbeat_interval: Update test to work with GuC submission

[Mishra, Pallavi]

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From: Patchwork <patchwork@emeril.freedesktop.org>
Sent: Monday, February 27, 2023 11:26 AM
To: Mishra, Pallavi <pallavi.mishra@intel.com>
Cc: igt-dev@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: failure for series starting with [1/2,i-g-t] i915/sysfs_heartbeat_interval: Update test to work with GuC submission

Patch Details
Series:
series starting with [1/2,i-g-t] i915/sysfs_heartbeat_interval: Update test to work with GuC submission
URL:
https://patchwork.freedesktop.org/series/114435/
State:
failure
Details:
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8533/index.html
CI Bug Log - changes from CI_DRM_12787 -> IGTPW_8533
Summary

FAILURE

Serious unknown changes coming with IGTPW_8533 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in IGTPW_8533, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8533/index.html

Participating hosts (39 -> 38)

Additional (1): bat-adls-5
Missing (2): fi-kbl-soraka fi-snb-2520m

Possible new issues

Here are the unknown changes that may have been introduced in IGTPW_8533:

IGT changes
Possible regressions

  *   igt@gem_exec_fence@basic-busy@vecs0:

     *   bat-adls-5: NOTRUN -> ABORT<https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8533/bat-adls-5/igt@gem_exec_fence@basic-busy@vecs0.html>
This failure is unrelated to the changes made in the patch. Changes in the patch are limited to sysfs_heatbeat_interval and sysfs_timeslice test.
Warnings

  *   igt@gem_exec_fence@basic-busy@vecs0:

     *   fi-kbl-x1275: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12787/fi-kbl-x1275/igt@gem_exec_fence@basic-busy@vecs0.html> -> ABORT<https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8533/fi-kbl-x1275/igt@gem_exec_fence@basic-busy@vecs0.html>
Same as above.
Known issues

Here are the changes found in IGTPW_8533 that come from known issues:

IGT changes
Issues hit

  *   igt@debugfs_test@basic-hwmon:

     *   bat-adls-5: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8533/bat-adls-5/igt@debugfs_test@basic-hwmon.html> (i915#7456<https://gitlab.freedesktop.org/drm/intel/issues/7456>)

Possible fixes

  *   igt@gem_exec_fence@basic-busy@vcs0:

     *   fi-kbl-x1275: ABORT<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12787/fi-kbl-x1275/igt@gem_exec_fence@basic-busy@vcs0.html> -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8533/fi-kbl-x1275/igt@gem_exec_fence@basic-busy@vcs0.html>

Build changes

  *   CI: CI-20190529 -> None
  *   IGT: IGT_7173 -> IGTPW_8533

CI-20190529: 20190529
CI_DRM_12787: 70da1d04c2abaaaef514174168a7e5595dbae6f3 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_8533: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8533/index.html
IGT_7173: deab4e0bdf5a9366b67d0a44f478f3da3c9a943b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

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[igt-dev] [PATCH 1/2] [PATCH i-g-t] i915/sysfs_heartbeat_interval: Update test to work with GuC submission

[pallavi.mishra]

From: Pallavi Mishra <pallavi.mishra@intel.com>

Increase reset timeout as resets can take a bit longer with GuC
submission because an error capture is done and with a large GuC log (16
MB) these take a while.

Co-authored-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Pallavi Mishra <pallavi.mishra@intel.com>
---
 tests/i915/sysfs_heartbeat_interval.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/i915/sysfs_heartbeat_interval.c b/tests/i915/sysfs_heartbeat_interval.c
index 8cebf627..63e56cbf 100644
--- a/tests/i915/sysfs_heartbeat_interval.c
+++ b/tests/i915/sysfs_heartbeat_interval.c
@@ -43,7 +43,7 @@
 #include "sw_sync.h"
 
 #define ATTR "heartbeat_interval_ms"
-#define RESET_TIMEOUT 50 /* milliseconds, at least one jiffie for kworker */
+#define RESET_TIMEOUT 1000 /* milliseconds, long enough for an error capture */
 
 static bool __enable_hangcheck(int dir, bool state)
 {
-- 
2.34.1

[igt-dev] [PATCH 2/2] [PATCH i-g-t] i915/sysfs_timeslice_duration: Update test to work with GuC submission

[pallavi.mishra]

From: Pallavi Mishra <pallavi.mishra@intel.com>

Increase reset timeout as resets can take a bit longer with GuC
submission because an error capture is done and with a large GuC log (16
MB) these take a while.

Don't run 'off' section as with GuC submission we don't handle
dynamically changing the timeslice duration from 'off' to 'on' on a
currently running context. This is not bug in GuC submission rather an
architectural decision to not implement this as there is no user aside
from IGTs.

Co-authored-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Pallavi Mishra <pallavi.mishra@intel.com>
---
 tests/i915/sysfs_timeslice_duration.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/tests/i915/sysfs_timeslice_duration.c b/tests/i915/sysfs_timeslice_duration.c
index 95dc3777..e4bf3ca7 100644
--- a/tests/i915/sysfs_timeslice_duration.c
+++ b/tests/i915/sysfs_timeslice_duration.c
@@ -29,6 +29,7 @@
 #include <sys/types.h>
 #include <unistd.h>
 
+#include "igt.h"
 #include "igt_params.h"
 #include "drmtest.h"
 #include "i915/gem.h"
@@ -44,7 +45,7 @@
 #include "sw_sync.h"
 
 #define ATTR "timeslice_duration_ms"
-#define RESET_TIMEOUT 50 /* milliseconds, at least one jiffie for kworker */
+#define RESET_TIMEOUT 1000 /* milliseconds, at long enough for a error capture */
 
 #define MI_SEMAPHORE_WAIT		(0x1c << 23)
 #define   MI_SEMAPHORE_POLL             (1 << 15)
@@ -484,6 +485,9 @@ static void test_off(int i915, int engine)
 	gem_quiescent_gpu(i915);
 	igt_require(enable_hangcheck(i915, false));
 
+	/* Not a supported behavior for GuC enabled platforms */
+	igt_require(!gem_using_guc_submission(i915));
+
 	igt_assert(igt_sysfs_scanf(engine, "class", "%u", &class) == 1);
 	igt_assert(igt_sysfs_scanf(engine, "instance", "%u", &inst) == 1);
 
-- 
2.34.1

Re: [igt-dev] [PATCH 2/2] [PATCH i-g-t] i915/sysfs_timeslice_duration: Update test to work with GuC submission

[Kamil Konieczny]

Hi Pallavi,

On 2023-02-24 at 20:09:41 +0000, pallavi.mishra@intel.com wrote:
> From: Pallavi Mishra <pallavi.mishra@intel.com>
> 
> Increase reset timeout as resets can take a bit longer with GuC
> submission because an error capture is done and with a large GuC log (16
> MB) these take a while.

Please split this patch into two, one with a subject and
description above, second with change below.

> 
> Don't run 'off' section as with GuC submission we don't handle
> dynamically changing the timeslice duration from 'off' to 'on' on a
> currently running context. This is not bug in GuC submission rather an
> architectural decision to not implement this as there is no user aside
> from IGTs.
> 
> Co-authored-by: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: Pallavi Mishra <pallavi.mishra@intel.com>
> ---
>  tests/i915/sysfs_timeslice_duration.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/tests/i915/sysfs_timeslice_duration.c b/tests/i915/sysfs_timeslice_duration.c
> index 95dc3777..e4bf3ca7 100644
> --- a/tests/i915/sysfs_timeslice_duration.c
> +++ b/tests/i915/sysfs_timeslice_duration.c
> @@ -29,6 +29,7 @@
>  #include <sys/types.h>
>  #include <unistd.h>
>  
> +#include "igt.h"
>  #include "igt_params.h"
>  #include "drmtest.h"
>  #include "i915/gem.h"
> @@ -44,7 +45,7 @@
>  #include "sw_sync.h"
>  
>  #define ATTR "timeslice_duration_ms"
> -#define RESET_TIMEOUT 50 /* milliseconds, at least one jiffie for kworker */
> +#define RESET_TIMEOUT 1000 /* milliseconds, at long enough for a error capture */
>  
>  #define MI_SEMAPHORE_WAIT		(0x1c << 23)
>  #define   MI_SEMAPHORE_POLL             (1 << 15)
> @@ -484,6 +485,9 @@ static void test_off(int i915, int engine)
>  	gem_quiescent_gpu(i915);
>  	igt_require(enable_hangcheck(i915, false));
>  
> +	/* Not a supported behavior for GuC enabled platforms */
---------- ^
Here write a little longer description (you can take part from
commit message).

Regards,
Kamil

> +	igt_require(!gem_using_guc_submission(i915));
> +
>  	igt_assert(igt_sysfs_scanf(engine, "class", "%u", &class) == 1);
>  	igt_assert(igt_sysfs_scanf(engine, "instance", "%u", &inst) == 1);
>  
> -- 
> 2.34.1
>