[igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support

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* [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support
@ 2023-05-17 21:25 Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 01/15] perf_pmu: Support multi-tile in rc6 subtest Umesh Nerlige Ramappa
                   ` (17 more replies)
  0 siblings, 18 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

Enable IGT PMU support for multi-tile platforms.
Add multi-tile support for intel_gpu_top.

v2: (Tvrtko)
- Instead of adding gtN suffix to item, add it to parent group
- Show split gt values only if -p option is specified
- Display aggregate value as default without -p option
- Break down patches into reviewable units

v3: (Ashutosh, Tvrtko)
- Reformat GT info in INTERACTIVE mode
- Use i915_for_each_gt
- Move uapi to i915_drm_local.h
- Use gem_list_engines() and drop unnecessary code

v4: Rebase to resolve conflict and rerun CI

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>

Riana Tauro (1):
  perf_pmu: Use correct pmu config for multi-tile

Tvrtko Ursulin (3):
  perf_pmu: Support multi-tile in rc6 subtest
  perf_pmu: Two new rc6 subtests
  perf_pmu: Support multi-tile in frequency subtest

Umesh Nerlige Ramappa (11):
  perf_pmu: Quiesce GPU if measuring idle busyness without spinner
  intel_gpu_top: Add an array of freq and rc6 counters
  intel_gpu_top: Determine number of tiles
  intel_gpu_top: Capture freq and rc6 counters from each gt
  intel_gpu_top: Switch pmu_counter to use aggregated values
  intel_gpu_top: Add definitions for gt-specific items and groups
  intel_gpu_top: Bump up size of groups to accomodate multi-gt
  intel_gpu_top: Increase visibility for class_view
  intel_gpu_top: Show gt specific values if requested
  intel_gpu_top: Reduce one level of indent
  intel_gpu_top: Add gt specific values to header in interactive mode

 lib/i915/i915_drm_local.h |  15 ++
 tests/i915/perf_pmu.c     | 307 +++++++++++++++++++++++++++-----------
 tools/intel_gpu_top.c     | 238 ++++++++++++++++++++++++-----
 3 files changed, 432 insertions(+), 128 deletions(-)

-- 
2.36.1

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 01/15] perf_pmu: Support multi-tile in rc6 subtest
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 02/15] perf_pmu: Two new rc6 subtests Umesh Nerlige Ramappa
                   ` (16 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Teach test how to wake up a particular tile and make it iterate all of
them using dynamic subtests.

v2: Finalize SHIFT to 60. Drop FIXME from i915_drm.h
v3: (Ashutosh)
- Use i915_for_each_gt
- Move uapi to i915_drm_local.h

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
 lib/i915/i915_drm_local.h | 15 +++++++++++++++
 tests/i915/perf_pmu.c     | 34 +++++++++++++++++++++++-----------
 2 files changed, 38 insertions(+), 11 deletions(-)

diff --git a/lib/i915/i915_drm_local.h b/lib/i915/i915_drm_local.h
index af0176500..bb2ebef38 100644
--- a/lib/i915/i915_drm_local.h
+++ b/lib/i915/i915_drm_local.h
@@ -26,6 +26,21 @@ extern "C" {
 #define DRM_I915_PERF_PROP_OA_ENGINE_CLASS	9
 #define DRM_I915_PERF_PROP_OA_ENGINE_INSTANCE	10
 
+/*
+ * Top 4 bits of every non-engine counter are GT id.
+ */
+#define __I915_PMU_GT_SHIFT (60)
+
+#define ___I915_PMU_OTHER(gt, x) \
+	(((__u64)__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x)) | \
+	((__u64)(gt) << __I915_PMU_GT_SHIFT))
+
+#define __I915_PMU_ACTUAL_FREQUENCY(gt)		___I915_PMU_OTHER(gt, 0)
+#define __I915_PMU_REQUESTED_FREQUENCY(gt)	___I915_PMU_OTHER(gt, 1)
+#define __I915_PMU_INTERRUPTS(gt)		___I915_PMU_OTHER(gt, 2)
+#define __I915_PMU_RC6_RESIDENCY(gt)		___I915_PMU_OTHER(gt, 3)
+#define __I915_PMU_SOFTWARE_GT_AWAKE_TIME(gt)	___I915_PMU_OTHER(gt, 4)
+
 #if defined(__cplusplus)
 }
 #endif
diff --git a/tests/i915/perf_pmu.c b/tests/i915/perf_pmu.c
index bedadbe92..3c46614a7 100644
--- a/tests/i915/perf_pmu.c
+++ b/tests/i915/perf_pmu.c
@@ -1845,8 +1845,16 @@ static bool wait_for_suspended(int gem_fd)
 	return suspended;
 }
 
+static int open_forcewake_handle(int fd, unsigned int gt)
+{
+	if (getenv("IGT_NO_FORCEWAKE"))
+		return -1;
+
+	return igt_debugfs_gt_open(fd, gt, "forcewake_user", O_WRONLY);
+}
+
 static void
-test_rc6(int gem_fd, unsigned int flags)
+test_rc6(int gem_fd, unsigned int gt, unsigned int flags)
 {
 	int64_t duration_ns = 2e9;
 	uint64_t idle, busy, prev, ts[2];
@@ -1855,7 +1863,7 @@ test_rc6(int gem_fd, unsigned int flags)
 
 	gem_quiescent_gpu(gem_fd);
 
-	fd = open_pmu(gem_fd, I915_PMU_RC6_RESIDENCY);
+	fd = open_pmu(gem_fd, __I915_PMU_RC6_RESIDENCY(gt));
 
 	if (flags & TEST_RUNTIME_PM) {
 		drmModeRes *res;
@@ -1922,7 +1930,7 @@ test_rc6(int gem_fd, unsigned int flags)
 	assert_within_epsilon(idle - prev, ts[1] - ts[0], tolerance);
 
 	/* Wake up device and check no RC6. */
-	fw = igt_open_forcewake_handle(gem_fd);
+	fw = open_forcewake_handle(gem_fd, gt);
 	igt_assert(fw >= 0);
 	usleep(1e3); /* wait for the rc6 cycle counter to stop ticking */
 
@@ -2317,7 +2325,7 @@ igt_main
 	const struct intel_execution_engine2 *e;
 	unsigned int num_engines = 0;
 	const intel_ctx_t *ctx = NULL;
-	int fd = -1;
+	int gt, tmp, fd = -1;
 
 	/**
 	 * All PMU should be accompanied by a test.
@@ -2534,17 +2542,21 @@ igt_main
 	/**
 	 * Test RC6 residency reporting.
 	 */
-	igt_subtest("rc6")
-		test_rc6(fd, 0);
+	igt_subtest_with_dynamic("rc6") {
+		i915_for_each_gt(fd, tmp, gt) {
+			igt_dynamic_f("gt%u", gt)
+				test_rc6(fd, gt, 0);
 
-	igt_subtest("rc6-runtime-pm")
-		test_rc6(fd, TEST_RUNTIME_PM);
+			igt_dynamic_f("runtime-pm-gt%u", gt)
+				test_rc6(fd, gt, TEST_RUNTIME_PM);
 
-	igt_subtest("rc6-runtime-pm-long")
-		test_rc6(fd, TEST_RUNTIME_PM | FLAG_LONG);
+			igt_dynamic_f("runtime-pm-long-gt%u", gt)
+				test_rc6(fd, gt, TEST_RUNTIME_PM | FLAG_LONG);
+		}
+	}
 
 	igt_subtest("rc6-suspend")
-		test_rc6(fd, TEST_S3);
+		test_rc6(fd, 0, TEST_S3);
 
 	/**
 	 * Test GT wakeref tracking (similar to RC0, opposite of RC6)
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 02/15] perf_pmu: Two new rc6 subtests
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 01/15] perf_pmu: Support multi-tile in rc6 subtest Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 03/15] perf_pmu: Support multi-tile in frequency subtest Umesh Nerlige Ramappa
                   ` (15 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

1.
Keep one tile awake and check rc6 counters on all tiles.

2.
Keep all tiles awake and check rc6 counters on all.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 tests/i915/perf_pmu.c | 149 +++++++++++++++++++++++++++++++-----------
 1 file changed, 111 insertions(+), 38 deletions(-)

diff --git a/tests/i915/perf_pmu.c b/tests/i915/perf_pmu.c
index 3c46614a7..520d156b9 100644
--- a/tests/i915/perf_pmu.c
+++ b/tests/i915/perf_pmu.c
@@ -311,6 +311,8 @@ static unsigned int measured_usleep(unsigned int usec)
 #define FLAG_LONG (16)
 #define FLAG_HANG (32)
 #define TEST_S3 (64)
+#define TEST_OTHER (128)
+#define TEST_ALL   (256)
 
 static igt_spin_t *__spin_poll(int fd, uint64_t ahnd, const intel_ctx_t *ctx,
 			       const struct intel_execution_engine2 *e)
@@ -1814,20 +1816,23 @@ test_frequency_idle(int gem_fd)
 		     "Actual frequency should be 0 while parked!\n");
 }
 
-static bool wait_for_rc6(int fd, int timeout)
+static bool wait_for_rc6(int fd, int timeout, unsigned int pmus, unsigned int idx)
 {
 	struct timespec tv = {};
+	uint64_t val[pmus];
 	uint64_t start, now;
 
 	/* First wait for roughly an RC6 Evaluation Interval */
 	usleep(160 * 1000);
 
 	/* Then poll for RC6 to start ticking */
-	now = pmu_read_single(fd);
+	pmu_read_multi(fd, pmus, val);
+	now = val[idx];
 	do {
 		start = now;
 		usleep(5000);
-		now = pmu_read_single(fd);
+		pmu_read_multi(fd, pmus, val);
+		now = val[idx];
 		if (now - start > 1e6)
 			return true;
 	} while (igt_seconds_elapsed(&tv) <= timeout);
@@ -1854,16 +1859,38 @@ static int open_forcewake_handle(int fd, unsigned int gt)
 }
 
 static void
-test_rc6(int gem_fd, unsigned int gt, unsigned int flags)
+test_rc6(int gem_fd, unsigned int gt, unsigned int num_gt, unsigned int flags)
 {
 	int64_t duration_ns = 2e9;
-	uint64_t idle, busy, prev, ts[2];
+	uint64_t idle[16], busy[16], prev[16], ts[2];
+	int fd[num_gt], fw[num_gt], gt_, pmus = 0, test_idx = -1;
 	unsigned long slept;
-	int fd, fw;
+
+	igt_require(!(flags & TEST_OTHER) ||
+		    ((flags & TEST_OTHER) && num_gt > 1));
+
+	igt_require(!(flags & TEST_ALL) ||
+		    ((flags & TEST_ALL) && num_gt > 1));
 
 	gem_quiescent_gpu(gem_fd);
 
-	fd = open_pmu(gem_fd, __I915_PMU_RC6_RESIDENCY(gt));
+	fd[0] = -1;
+	for (gt_ = 0; gt_ < num_gt; gt_++) {
+		if (gt_ != gt && !(flags & TEST_OTHER))
+			continue;
+
+		if (gt_ == gt) {
+			igt_assert(test_idx == -1);
+			test_idx = pmus;
+		}
+
+		fd[pmus] = perf_i915_open_group(gem_fd,
+						__I915_PMU_RC6_RESIDENCY(gt_),
+						fd[0]);
+		igt_skip_on(fd[pmus] < 0 && errno == ENODEV);
+		pmus++;
+	}
+	igt_assert(test_idx >= 0);
 
 	if (flags & TEST_RUNTIME_PM) {
 		drmModeRes *res;
@@ -1884,21 +1911,26 @@ test_rc6(int gem_fd, unsigned int gt, unsigned int flags)
 		 * drifted to far in advance of real RC6.
 		 */
 		if (flags & FLAG_LONG) {
-			pmu_read_single(fd);
+			pmu_read_multi(fd[0], pmus, idle);
 			sleep(5);
-			pmu_read_single(fd);
+			pmu_read_multi(fd[0], pmus, idle);
 		}
 	}
 
-	igt_require(wait_for_rc6(fd, 1));
+	igt_require(wait_for_rc6(fd[0], 1, pmus, test_idx));
 
 	/* While idle check full RC6. */
-	prev = __pmu_read_single(fd, &ts[0]);
+	ts[0] = pmu_read_multi(fd[0], pmus, prev);
 	slept = measured_usleep(duration_ns / 1000);
-	idle = __pmu_read_single(fd, &ts[1]);
-
-	igt_debug("slept=%lu perf=%"PRIu64"\n", slept, ts[1] - ts[0]);
-	assert_within_epsilon(idle - prev, ts[1] - ts[0], tolerance);
+	ts[1] = pmu_read_multi(fd[0], pmus, idle);
+
+	for (gt_ = 0; gt_ < pmus; gt_++) {
+		igt_debug("gt%u: idle rc6=%"PRIu64", slept=%lu, perf=%"PRIu64"\n",
+			  gt_, idle[gt_] - prev[gt_], slept, ts[1] - ts[0]);
+		assert_within_epsilon(idle[gt_] - prev[gt_],
+				      ts[1] - ts[0],
+				      tolerance);
+	}
 
 	if (flags & TEST_S3) {
 		/*
@@ -1911,40 +1943,70 @@ test_rc6(int gem_fd, unsigned int gt, unsigned int flags)
 		 * However, in practice it appears we are not entering rc6
 		 * immediately after resume... A bug?
 		 */
-		prev = __pmu_read_single(fd, &ts[0]);
+		ts[0] = pmu_read_multi(fd[0], pmus, prev);
 		igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
 					      SUSPEND_TEST_NONE);
-		idle = __pmu_read_single(fd, &ts[1]);
-		igt_debug("suspend=%"PRIu64", rc6=%"PRIu64"\n",
-			  ts[1] - ts[0], idle -prev);
-		//assert_within_epsilon(idle - prev, ts[1] - ts[0], tolerance);
+		ts[1] = pmu_read_multi(fd[0], pmus, idle);
+		for (gt_ = 0; gt_ < pmus; gt_++) {
+			igt_debug("gt%u: rc6=%"PRIu64", suspend=%"PRIu64"\n",
+				  gt_, idle[gt_] - prev[gt_], ts[1] - ts[0]);
+			// assert_within_epsilon(idle[gt_] - prev[gt_],
+			//		      ts[1] - ts[0], tolerance);
+		}
 	}
 
-	igt_assert(wait_for_rc6(fd, 5));
+	igt_assert(wait_for_rc6(fd[0], 5, pmus, test_idx));
 
-	prev = __pmu_read_single(fd, &ts[0]);
+	ts[0] = pmu_read_multi(fd[0], pmus, prev);
 	slept = measured_usleep(duration_ns / 1000);
-	idle = __pmu_read_single(fd, &ts[1]);
-
-	igt_debug("slept=%lu perf=%"PRIu64"\n", slept, ts[1] - ts[0]);
-	assert_within_epsilon(idle - prev, ts[1] - ts[0], tolerance);
+	ts[1] = pmu_read_multi(fd[0], pmus, idle);
+
+	for (gt_ = 0; gt_ < pmus; gt_++) {
+		igt_debug("gt%u: idle rc6=%"PRIu64", slept=%lu, perf=%"PRIu64"\n",
+			  gt_, idle[gt_] - prev[gt_], slept, ts[1] - ts[0]);
+		assert_within_epsilon(idle[gt_] - prev[gt_],
+				      ts[1] - ts[0],
+				      tolerance);
+	}
 
 	/* Wake up device and check no RC6. */
-	fw = open_forcewake_handle(gem_fd, gt);
-	igt_assert(fw >= 0);
+	for (gt_ = 0; gt_ < num_gt; gt_++) {
+		if (gt_ != gt && !(flags & TEST_ALL))
+			continue;
+
+		fw[gt_] = open_forcewake_handle(gem_fd, gt_);
+		igt_assert(fw[gt_] >= 0);
+	}
+
 	usleep(1e3); /* wait for the rc6 cycle counter to stop ticking */
 
-	prev = pmu_read_single(fd);
-	usleep(duration_ns / 1000);
-	busy = pmu_read_single(fd);
+	ts[0] = pmu_read_multi(fd[0], pmus, prev);
+	slept = measured_usleep(duration_ns / 1000);
+	ts[1] = pmu_read_multi(fd[0], pmus, busy);
 
-	close(fw);
-	close(fd);
+	for (gt_ = 0; gt_ < num_gt; gt_++) {
+		if (gt_ == gt || (flags & TEST_ALL))
+			close(fw[gt_]);
+	}
+
+	for (gt_ = 0; gt_ < pmus; gt_++)
+		close(fd[gt_]);
 
 	if (flags & TEST_RUNTIME_PM)
 		igt_restore_runtime_pm();
 
-	assert_within_epsilon(busy - prev, 0.0, tolerance);
+	for (gt_ = 0; gt_ < pmus; gt_++) {
+		igt_debug("gt%u: busy rc6=%"PRIu64", slept=%lu, perf=%"PRIu64"\n",
+			  gt_, busy[gt_] - prev[gt_], slept, ts[1] - ts[0]);
+		if (gt_ == test_idx || (flags & TEST_ALL))
+			assert_within_epsilon(busy[gt_] - prev[gt_],
+					      0.0,
+					      tolerance);
+		else
+			assert_within_epsilon(busy[gt_] - prev[gt_],
+					      ts[1] - ts[0],
+					      tolerance);
+	}
 }
 
 static void
@@ -2326,6 +2388,7 @@ igt_main
 	unsigned int num_engines = 0;
 	const intel_ctx_t *ctx = NULL;
 	int gt, tmp, fd = -1;
+	int num_gt = 0;
 
 	/**
 	 * All PMU should be accompanied by a test.
@@ -2344,6 +2407,9 @@ igt_main
 		for_each_ctx_engine(fd, ctx, e)
 			num_engines++;
 		igt_require(num_engines);
+
+		i915_for_each_gt(fd, tmp, gt)
+			num_gt++;
 	}
 
 	igt_describe("Verify i915 pmu dir exists and read all events");
@@ -2545,18 +2611,25 @@ igt_main
 	igt_subtest_with_dynamic("rc6") {
 		i915_for_each_gt(fd, tmp, gt) {
 			igt_dynamic_f("gt%u", gt)
-				test_rc6(fd, gt, 0);
+				test_rc6(fd, gt, num_gt, 0);
 
 			igt_dynamic_f("runtime-pm-gt%u", gt)
-				test_rc6(fd, gt, TEST_RUNTIME_PM);
+				test_rc6(fd, gt, num_gt, TEST_RUNTIME_PM);
 
 			igt_dynamic_f("runtime-pm-long-gt%u", gt)
-				test_rc6(fd, gt, TEST_RUNTIME_PM | FLAG_LONG);
+				test_rc6(fd, gt, num_gt,
+					 TEST_RUNTIME_PM | FLAG_LONG);
+
+			igt_dynamic_f("other-idle-gt%u", gt)
+				test_rc6(fd, gt, num_gt, TEST_OTHER);
 		}
 	}
 
 	igt_subtest("rc6-suspend")
-		test_rc6(fd, 0, TEST_S3);
+		test_rc6(fd, 0, num_gt, TEST_S3);
+
+	igt_subtest("rc6-all-gts")
+		test_rc6(fd, 0, num_gt, TEST_ALL | TEST_OTHER);
 
 	/**
 	 * Test GT wakeref tracking (similar to RC0, opposite of RC6)
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 03/15] perf_pmu: Support multi-tile in frequency subtest
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 01/15] perf_pmu: Support multi-tile in rc6 subtest Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 02/15] perf_pmu: Two new rc6 subtests Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 04/15] perf_pmu: Quiesce GPU if measuring idle busyness without spinner Umesh Nerlige Ramappa
                   ` (14 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Simple conversion to run the frequency tests per each tile, as dynamic
subtests, picking the correct engine to stimulate each.

v2: Added new intel_ctx_t implementation for frequency subtest.
v3: Replace distance query with mtl specific static mapping
v4: Break as soon as you find one engine in gt
v5: Use gem_list_engines() and drop unnecessary code (Ashutosh)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com> (v2)
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
 tests/i915/perf_pmu.c | 128 ++++++++++++++++++++++++++++--------------
 1 file changed, 86 insertions(+), 42 deletions(-)

diff --git a/tests/i915/perf_pmu.c b/tests/i915/perf_pmu.c
index 520d156b9..c476c422c 100644
--- a/tests/i915/perf_pmu.c
+++ b/tests/i915/perf_pmu.c
@@ -376,19 +376,6 @@ static igt_spin_t *spin_sync(int fd, uint64_t ahnd, const intel_ctx_t *ctx,
 	return __spin_sync(fd, ahnd, ctx, e);
 }
 
-static igt_spin_t *spin_sync_flags(int fd, uint64_t ahnd,
-				   const intel_ctx_t *ctx, unsigned int flags)
-{
-	struct intel_execution_engine2 e = { };
-
-	e.class = gem_execbuf_flags_to_engine_class(flags);
-	e.instance = (flags & (I915_EXEC_BSD_MASK | I915_EXEC_RING_MASK)) ==
-		     (I915_EXEC_BSD | I915_EXEC_BSD_RING2) ? 1 : 0;
-	e.flags = flags;
-
-	return spin_sync(fd, ahnd, ctx, &e);
-}
-
 static void end_spin(int fd, igt_spin_t *spin, unsigned int flags)
 {
 	if (!spin)
@@ -1677,8 +1664,58 @@ test_interrupts_sync(int gem_fd)
 	igt_assert_lte(target, busy);
 }
 
+static struct i915_engine_class_instance
+find_dword_engine(int i915, const unsigned int gt)
+{
+	struct i915_engine_class_instance *engines, ci = { -1, -1 };
+	unsigned int i, count;
+
+	engines = gem_list_engines(i915, 1u << gt, ~0u, &count);
+	igt_assert(engines);
+
+	for (i = 0; i < count; i++) {
+		if (!gem_class_can_store_dword(i915, engines[i].engine_class))
+			continue;
+
+		ci = engines[i];
+		break;
+	}
+
+	free(engines);
+
+	return ci;
+}
+
+static igt_spin_t *spin_sync_gt(int i915, uint64_t ahnd, unsigned int gt,
+				const intel_ctx_t **ctx)
+{
+	struct i915_engine_class_instance ci = { -1, -1 };
+	struct intel_execution_engine2 e = { };
+
+	ci = find_dword_engine(i915, gt);
+
+	igt_require(ci.engine_class != (uint16_t)I915_ENGINE_CLASS_INVALID);
+
+	if (gem_has_contexts(i915)) {
+		e.class = ci.engine_class;
+		e.instance = ci.engine_instance;
+		e.flags = 0;
+		*ctx = intel_ctx_create_for_engine(i915, e.class, e.instance);
+	} else {
+		igt_require(gt == 0); /* Impossible anyway. */
+		e.class = gem_execbuf_flags_to_engine_class(I915_EXEC_DEFAULT);
+		e.instance = 0;
+		e.flags = I915_EXEC_DEFAULT;
+		*ctx = intel_ctx_0(i915);
+	}
+
+	igt_debug("Using engine %u:%u\n", e.class, e.instance);
+
+	return spin_sync(i915, ahnd, *ctx, &e);
+}
+
 static void
-test_frequency(int gem_fd)
+test_frequency(int gem_fd, unsigned int gt)
 {
 	uint32_t min_freq, max_freq, boost_freq;
 	uint64_t val[2], start[2], slept;
@@ -1686,13 +1723,14 @@ test_frequency(int gem_fd)
 	igt_spin_t *spin;
 	int fd[2], sysfs;
 	uint64_t ahnd = get_reloc_ahnd(gem_fd, 0);
+	const intel_ctx_t *ctx;
 
-	sysfs = igt_sysfs_open(gem_fd);
+	sysfs = igt_sysfs_gt_open(gem_fd, gt);
 	igt_require(sysfs >= 0);
 
-	min_freq = igt_sysfs_get_u32(sysfs, "gt_RPn_freq_mhz");
-	max_freq = igt_sysfs_get_u32(sysfs, "gt_RP0_freq_mhz");
-	boost_freq = igt_sysfs_get_u32(sysfs, "gt_boost_freq_mhz");
+	min_freq = igt_sysfs_get_u32(sysfs, "rps_RPn_freq_mhz");
+	max_freq = igt_sysfs_get_u32(sysfs, "rps_RP0_freq_mhz");
+	boost_freq = igt_sysfs_get_u32(sysfs, "rps_boost_freq_mhz");
 	igt_info("Frequency: min=%u, max=%u, boost=%u MHz\n",
 		 min_freq, max_freq, boost_freq);
 	igt_require(min_freq > 0 && max_freq > 0 && boost_freq > 0);
@@ -1705,15 +1743,15 @@ test_frequency(int gem_fd)
 	/*
 	 * Set GPU to min frequency and read PMU counters.
 	 */
-	igt_require(igt_sysfs_set_u32(sysfs, "gt_min_freq_mhz", min_freq));
-	igt_require(igt_sysfs_get_u32(sysfs, "gt_min_freq_mhz") == min_freq);
-	igt_require(igt_sysfs_set_u32(sysfs, "gt_max_freq_mhz", min_freq));
-	igt_require(igt_sysfs_get_u32(sysfs, "gt_max_freq_mhz") == min_freq);
-	igt_require(igt_sysfs_set_u32(sysfs, "gt_boost_freq_mhz", min_freq));
-	igt_require(igt_sysfs_get_u32(sysfs, "gt_boost_freq_mhz") == min_freq);
+	igt_require(igt_sysfs_set_u32(sysfs, "rps_min_freq_mhz", min_freq));
+	igt_require(igt_sysfs_get_u32(sysfs, "rps_min_freq_mhz") == min_freq);
+	igt_require(igt_sysfs_set_u32(sysfs, "rps_max_freq_mhz", min_freq));
+	igt_require(igt_sysfs_get_u32(sysfs, "rps_max_freq_mhz") == min_freq);
+	igt_require(igt_sysfs_set_u32(sysfs, "rps_boost_freq_mhz", min_freq));
+	igt_require(igt_sysfs_get_u32(sysfs, "rps_boost_freq_mhz") == min_freq);
 
 	gem_quiescent_gpu(gem_fd); /* Idle to be sure the change takes effect */
-	spin = spin_sync_flags(gem_fd, ahnd, 0, I915_EXEC_DEFAULT);
+	spin = spin_sync_gt(gem_fd, ahnd, gt, &ctx);
 
 	slept = pmu_read_multi(fd[0], 2, start);
 	measured_usleep(batch_duration_ns / 1000);
@@ -1722,6 +1760,7 @@ test_frequency(int gem_fd)
 	min[0] = 1e9*(val[0] - start[0]) / slept;
 	min[1] = 1e9*(val[1] - start[1]) / slept;
 
+	intel_ctx_destroy(gem_fd, ctx);
 	igt_spin_free(gem_fd, spin);
 	gem_quiescent_gpu(gem_fd); /* Don't leak busy bo into the next phase */
 
@@ -1730,16 +1769,16 @@ test_frequency(int gem_fd)
 	/*
 	 * Set GPU to max frequency and read PMU counters.
 	 */
-	igt_require(igt_sysfs_set_u32(sysfs, "gt_max_freq_mhz", max_freq));
-	igt_require(igt_sysfs_get_u32(sysfs, "gt_max_freq_mhz") == max_freq);
-	igt_require(igt_sysfs_set_u32(sysfs, "gt_boost_freq_mhz", boost_freq));
-	igt_require(igt_sysfs_get_u32(sysfs, "gt_boost_freq_mhz") == boost_freq);
+	igt_require(igt_sysfs_set_u32(sysfs, "rps_max_freq_mhz", max_freq));
+	igt_require(igt_sysfs_get_u32(sysfs, "rps_max_freq_mhz") == max_freq);
+	igt_require(igt_sysfs_set_u32(sysfs, "rps_boost_freq_mhz", boost_freq));
+	igt_require(igt_sysfs_get_u32(sysfs, "rps_boost_freq_mhz") == boost_freq);
 
-	igt_require(igt_sysfs_set_u32(sysfs, "gt_min_freq_mhz", max_freq));
-	igt_require(igt_sysfs_get_u32(sysfs, "gt_min_freq_mhz") == max_freq);
+	igt_require(igt_sysfs_set_u32(sysfs, "rps_min_freq_mhz", max_freq));
+	igt_require(igt_sysfs_get_u32(sysfs, "rps_min_freq_mhz") == max_freq);
 
 	gem_quiescent_gpu(gem_fd);
-	spin = spin_sync_flags(gem_fd, ahnd, 0, I915_EXEC_DEFAULT);
+	spin = spin_sync_gt(gem_fd, ahnd, gt, &ctx);
 
 	slept = pmu_read_multi(fd[0], 2, start);
 	measured_usleep(batch_duration_ns / 1000);
@@ -1748,16 +1787,17 @@ test_frequency(int gem_fd)
 	max[0] = 1e9*(val[0] - start[0]) / slept;
 	max[1] = 1e9*(val[1] - start[1]) / slept;
 
+	intel_ctx_destroy(gem_fd, ctx);
 	igt_spin_free(gem_fd, spin);
 	gem_quiescent_gpu(gem_fd);
 
 	/*
 	 * Restore min/max.
 	 */
-	igt_sysfs_set_u32(sysfs, "gt_min_freq_mhz", min_freq);
-	if (igt_sysfs_get_u32(sysfs, "gt_min_freq_mhz") != min_freq)
+	igt_sysfs_set_u32(sysfs, "rps_min_freq_mhz", min_freq);
+	if (igt_sysfs_get_u32(sysfs, "rps_min_freq_mhz") != min_freq)
 		igt_warn("Unable to restore min frequency to saved value [%u MHz], now %u MHz\n",
-			 min_freq, igt_sysfs_get_u32(sysfs, "gt_min_freq_mhz"));
+			 min_freq, igt_sysfs_get_u32(sysfs, "rps_min_freq_mhz"));
 	close(fd[0]);
 	close(fd[1]);
 	put_ahnd(ahnd);
@@ -1776,17 +1816,17 @@ test_frequency(int gem_fd)
 }
 
 static void
-test_frequency_idle(int gem_fd)
+test_frequency_idle(int gem_fd, unsigned int gt)
 {
 	uint32_t min_freq;
 	uint64_t val[2], start[2], slept;
 	double idle[2];
 	int fd[2], sysfs;
 
-	sysfs = igt_sysfs_open(gem_fd);
+	sysfs = igt_sysfs_gt_open(gem_fd, gt);
 	igt_require(sysfs >= 0);
 
-	min_freq = igt_sysfs_get_u32(sysfs, "gt_RPn_freq_mhz");
+	min_freq = igt_sysfs_get_u32(sysfs, "rps_RPn_freq_mhz");
 	close(sysfs);
 
 	/* While parked, our convention is to report the GPU at 0Hz */
@@ -2591,10 +2631,14 @@ igt_main
 	/**
 	 * Test GPU frequency.
 	 */
-	igt_subtest("frequency")
-		test_frequency(fd);
-	igt_subtest("frequency-idle")
-		test_frequency_idle(fd);
+	igt_subtest_with_dynamic("frequency") {
+		i915_for_each_gt(fd, tmp, gt) {
+			igt_dynamic_f("gt%u", gt)
+				test_frequency(fd, gt);
+			igt_dynamic_f("idle-gt%u", gt)
+				test_frequency_idle(fd, gt);
+		}
+	}
 
 	/**
 	 * Test interrupt count reporting.
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 04/15] perf_pmu: Quiesce GPU if measuring idle busyness without spinner
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (2 preceding siblings ...)
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 03/15] perf_pmu: Support multi-tile in frequency subtest Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 05/15] perf_pmu: Use correct pmu config for multi-tile Umesh Nerlige Ramappa
                   ` (13 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

The assumption in some tests is that the engines are not busy if no
spinners are being run. This is not true in some cases where we see
that the render is busy at the start of the test. Quiesce GPU to wait
for such work to complete before checking for idle busyness.

v2: Move gem_quiescent_gpu to beginning of test (Tvrtko)

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
 tests/i915/perf_pmu.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tests/i915/perf_pmu.c b/tests/i915/perf_pmu.c
index c476c422c..6c9cd5ca8 100644
--- a/tests/i915/perf_pmu.c
+++ b/tests/i915/perf_pmu.c
@@ -417,6 +417,7 @@ single(int gem_fd, const intel_ctx_t *ctx,
 	int fd;
 	uint64_t ahnd = get_reloc_ahnd(gem_fd, ctx->id);
 
+	gem_quiescent_gpu(gem_fd);
 	fd = open_pmu(gem_fd, I915_PMU_ENGINE_BUSY(e->class, e->instance));
 
 	if (flags & TEST_BUSY)
@@ -777,6 +778,7 @@ no_sema(int gem_fd, const intel_ctx_t *ctx,
 	int fd[2];
 	uint64_t ahnd = get_reloc_ahnd(gem_fd, ctx->id);
 
+	gem_quiescent_gpu(gem_fd);
 	fd[0] = open_group(gem_fd, I915_PMU_ENGINE_SEMA(e->class, e->instance),
 			   -1);
 	fd[1] = open_group(gem_fd, I915_PMU_ENGINE_WAIT(e->class, e->instance),
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 05/15] perf_pmu: Use correct pmu config for multi-tile
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (3 preceding siblings ...)
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 04/15] perf_pmu: Quiesce GPU if measuring idle busyness without spinner Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 06/15] intel_gpu_top: Add an array of freq and rc6 counters Umesh Nerlige Ramappa
                   ` (12 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

From: Riana Tauro <riana.tauro@intel.com>

Use the correct perf_pmu config for actual and requested frequency in
multi-tile frequency test.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 tests/i915/perf_pmu.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/tests/i915/perf_pmu.c b/tests/i915/perf_pmu.c
index 6c9cd5ca8..358a2e7ac 100644
--- a/tests/i915/perf_pmu.c
+++ b/tests/i915/perf_pmu.c
@@ -1739,8 +1739,8 @@ test_frequency(int gem_fd, unsigned int gt)
 	igt_require(max_freq > min_freq);
 	igt_require(boost_freq > min_freq);
 
-	fd[0] = open_group(gem_fd, I915_PMU_REQUESTED_FREQUENCY, -1);
-	fd[1] = open_group(gem_fd, I915_PMU_ACTUAL_FREQUENCY, fd[0]);
+	fd[0] = open_group(gem_fd, __I915_PMU_REQUESTED_FREQUENCY(gt), -1);
+	fd[1] = open_group(gem_fd, __I915_PMU_ACTUAL_FREQUENCY(gt), fd[0]);
 
 	/*
 	 * Set GPU to min frequency and read PMU counters.
@@ -1833,8 +1833,8 @@ test_frequency_idle(int gem_fd, unsigned int gt)
 
 	/* While parked, our convention is to report the GPU at 0Hz */
 
-	fd[0] = open_group(gem_fd, I915_PMU_REQUESTED_FREQUENCY, -1);
-	fd[1] = open_group(gem_fd, I915_PMU_ACTUAL_FREQUENCY, fd[0]);
+	fd[0] = open_group(gem_fd, __I915_PMU_REQUESTED_FREQUENCY(gt), -1);
+	fd[1] = open_group(gem_fd, __I915_PMU_ACTUAL_FREQUENCY(gt), fd[0]);
 
 	gem_quiescent_gpu(gem_fd); /* Be idle! */
 	measured_usleep(2000); /* Wait for timers to cease */
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 06/15] intel_gpu_top: Add an array of freq and rc6 counters
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (4 preceding siblings ...)
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 05/15] perf_pmu: Use correct pmu config for multi-tile Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 07/15] intel_gpu_top: Determine number of tiles Umesh Nerlige Ramappa
                   ` (11 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

Since rc6 and frequency events are specific to a tile in multi-tile platforms,
prepare support for multi-tile by storing these events in an array.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tools/intel_gpu_top.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 453090c29..ae086ae12 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -88,6 +88,7 @@ struct engine {
 	struct pmu_counter sema;
 };
 
+#define MAX_GTS 4
 struct engines {
 	unsigned int num_engines;
 	unsigned int num_classes;
@@ -107,9 +108,12 @@ struct engines {
 	unsigned int num_imc;
 
 	struct pmu_counter freq_req;
+	struct pmu_counter freq_req_gt[MAX_GTS];
 	struct pmu_counter freq_act;
+	struct pmu_counter freq_act_gt[MAX_GTS];
 	struct pmu_counter irq;
 	struct pmu_counter rc6;
+	struct pmu_counter rc6_gt[MAX_GTS];
 
 	bool discrete;
 	char *device;
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 07/15] intel_gpu_top: Determine number of tiles
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (5 preceding siblings ...)
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 06/15] intel_gpu_top: Add an array of freq and rc6 counters Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 08/15] intel_gpu_top: Capture freq and rc6 counters from each gt Umesh Nerlige Ramappa
                   ` (10 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

Find out how many tiles are present in the platforms for multi-tile support.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tools/intel_gpu_top.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index ae086ae12..fc57f6857 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -118,6 +118,8 @@ struct engines {
 	bool discrete;
 	char *device;
 
+	int num_gts;
+
 	/* Do not edit below this line.
 	 * This structure is reallocated every time a new engine is
 	 * found and size is increased by sizeof (engine).
@@ -539,6 +541,25 @@ static void imc_reads_open(struct pmu_counter *pmu, struct engines *engines)
 	imc_open(pmu, "data_reads", engines);
 }
 
+static int get_num_gts(uint64_t type)
+{
+	int fd, cnt;
+
+	errno = 0;
+	for (cnt = 0; cnt < MAX_GTS; cnt++) {
+		fd = igt_perf_open(type, __I915_PMU_REQUESTED_FREQUENCY(cnt));
+		if (fd < 0)
+			break;
+
+		close(fd);
+	}
+	assert(!errno || errno == ENOENT);
+	assert(cnt > 0);
+	errno = 0;
+
+	return cnt;
+}
+
 static int pmu_init(struct engines *engines)
 {
 	unsigned int i;
@@ -547,6 +568,7 @@ static int pmu_init(struct engines *engines)
 
 	engines->fd = -1;
 	engines->num_counters = 0;
+	engines->num_gts = get_num_gts(type);
 
 	engines->irq.config = I915_PMU_INTERRUPTS;
 	fd = _open_pmu(type, engines->num_counters, &engines->irq, engines->fd);
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 08/15] intel_gpu_top: Capture freq and rc6 counters from each gt
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (6 preceding siblings ...)
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 07/15] intel_gpu_top: Determine number of tiles Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 09/15] intel_gpu_top: Switch pmu_counter to use aggregated values Umesh Nerlige Ramappa
                   ` (9 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

Loop through available gts and store the frequency and rc6 counters.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tools/intel_gpu_top.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index fc57f6857..aab301bd1 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -584,6 +584,17 @@ static int pmu_init(struct engines *engines)
 	engines->rc6.config = I915_PMU_RC6_RESIDENCY;
 	_open_pmu(type, engines->num_counters, &engines->rc6, engines->fd);
 
+	for (i = 0; i < engines->num_gts; i++) {
+		engines->freq_req_gt[i].config = __I915_PMU_REQUESTED_FREQUENCY(i);
+		_open_pmu(type, engines->num_counters, &engines->freq_req_gt[i], engines->fd);
+
+		engines->freq_act_gt[i].config = __I915_PMU_ACTUAL_FREQUENCY(i);
+		_open_pmu(type, engines->num_counters, &engines->freq_act_gt[i], engines->fd);
+
+		engines->rc6_gt[i].config = __I915_PMU_RC6_RESIDENCY(i);
+		_open_pmu(type, engines->num_counters, &engines->rc6_gt[i], engines->fd);
+	}
+
 	for (i = 0; i < engines->num_engines; i++) {
 		struct engine *engine = engine_ptr(engines, i);
 		struct {
@@ -685,6 +696,12 @@ static void pmu_sample(struct engines *engines)
 	engines->ts.prev = engines->ts.cur;
 	engines->ts.cur = pmu_read_multi(engines->fd, num_val, val);
 
+	for (i = 0; i < engines->num_gts; i++) {
+		update_sample(&engines->freq_req_gt[i], val);
+		update_sample(&engines->freq_act_gt[i], val);
+		update_sample(&engines->rc6_gt[i], val);
+	}
+
 	update_sample(&engines->freq_req, val);
 	update_sample(&engines->freq_act, val);
 	update_sample(&engines->irq, val);
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 09/15] intel_gpu_top: Switch pmu_counter to use aggregated values
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (7 preceding siblings ...)
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 08/15] intel_gpu_top: Capture freq and rc6 counters from each gt Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 10/15] intel_gpu_top: Add definitions for gt-specific items and groups Umesh Nerlige Ramappa
                   ` (8 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

Aggregate gt specific values for freq and rc6 counters.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tools/intel_gpu_top.c | 49 +++++++++++++++++++++++++++++++++----------
 1 file changed, 38 insertions(+), 11 deletions(-)

diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index aab301bd1..88c876dfe 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -560,6 +560,26 @@ static int get_num_gts(uint64_t type)
 	return cnt;
 }
 
+static void init_aggregate_counters(struct engines *engines)
+{
+	struct pmu_counter *pmu;
+
+	pmu = &engines->freq_req;
+	pmu->type = igt_perf_type_id(engines->device);
+	pmu->config = I915_PMU_REQUESTED_FREQUENCY;
+	pmu->present = true;
+
+	pmu = &engines->freq_act;
+	pmu->type = igt_perf_type_id(engines->device);
+	pmu->config = I915_PMU_ACTUAL_FREQUENCY;
+	pmu->present = true;
+
+	pmu = &engines->rc6;
+	pmu->type = igt_perf_type_id(engines->device);
+	pmu->config = I915_PMU_RC6_RESIDENCY;
+	pmu->present = true;
+}
+
 static int pmu_init(struct engines *engines)
 {
 	unsigned int i;
@@ -575,14 +595,7 @@ static int pmu_init(struct engines *engines)
 	if (fd < 0)
 		return -1;
 
-	engines->freq_req.config = I915_PMU_REQUESTED_FREQUENCY;
-	_open_pmu(type, engines->num_counters, &engines->freq_req, engines->fd);
-
-	engines->freq_act.config = I915_PMU_ACTUAL_FREQUENCY;
-	_open_pmu(type, engines->num_counters, &engines->freq_act, engines->fd);
-
-	engines->rc6.config = I915_PMU_RC6_RESIDENCY;
-	_open_pmu(type, engines->num_counters, &engines->rc6, engines->fd);
+	init_aggregate_counters(engines);
 
 	for (i = 0; i < engines->num_gts; i++) {
 		engines->freq_req_gt[i].config = __I915_PMU_REQUESTED_FREQUENCY(i);
@@ -698,14 +711,28 @@ static void pmu_sample(struct engines *engines)
 
 	for (i = 0; i < engines->num_gts; i++) {
 		update_sample(&engines->freq_req_gt[i], val);
+		engines->freq_req.val.cur += engines->freq_req_gt[i].val.cur;
+		engines->freq_req.val.prev += engines->freq_req_gt[i].val.prev;
+
 		update_sample(&engines->freq_act_gt[i], val);
+		engines->freq_act.val.cur += engines->freq_act_gt[i].val.cur;
+		engines->freq_act.val.prev += engines->freq_act_gt[i].val.prev;
+
 		update_sample(&engines->rc6_gt[i], val);
+		engines->rc6.val.cur += engines->rc6_gt[i].val.cur;
+		engines->rc6.val.prev += engines->rc6_gt[i].val.prev;
 	}
 
-	update_sample(&engines->freq_req, val);
-	update_sample(&engines->freq_act, val);
+	engines->freq_req.val.cur /= engines->num_gts;
+	engines->freq_req.val.prev /= engines->num_gts;
+
+	engines->freq_act.val.cur /= engines->num_gts;
+	engines->freq_act.val.prev /= engines->num_gts;
+
+	engines->rc6.val.cur /= engines->num_gts;
+	engines->rc6.val.prev /= engines->num_gts;
+
 	update_sample(&engines->irq, val);
-	update_sample(&engines->rc6, val);
 
 	for (i = 0; i < engines->num_engines; i++) {
 		struct engine *engine = engine_ptr(engines, i);
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 10/15] intel_gpu_top: Add definitions for gt-specific items and groups
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (8 preceding siblings ...)
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 09/15] intel_gpu_top: Switch pmu_counter to use aggregated values Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 11/15] intel_gpu_top: Bump up size of groups to accomodate multi-gt Umesh Nerlige Ramappa
                   ` (7 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

Prepare to pass a modified groups array to print_groups by defining
separate items and groups for each gt.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tools/intel_gpu_top.c | 44 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 88c876dfe..c8b6b92dd 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -1436,6 +1436,30 @@ print_header(const struct igt_device_card *card,
 		.display_name = "Freq MHz",
 		.items = freq_items,
 	};
+	struct cnt_item freq_items_gt[] = {
+		{ &engines->freq_req_gt[0], 6, 0, 1.0, t, 1, "requested", "req" },
+		{ &engines->freq_act_gt[0], 6, 0, 1.0, t, 1, "actual", "act" },
+		{ NULL, 0, 0, 0.0, 0.0, 0.0, "unit", "MHz" },
+		{ },
+		{ &engines->freq_req_gt[1], 6, 0, 1.0, t, 1, "requested", "req" },
+		{ &engines->freq_act_gt[1], 6, 0, 1.0, t, 1, "actual", "act" },
+		{ NULL, 0, 0, 0.0, 0.0, 0.0, "unit", "MHz" },
+		{ },
+		{ &engines->freq_req_gt[2], 6, 0, 1.0, t, 1, "requested", "req" },
+		{ &engines->freq_act_gt[2], 6, 0, 1.0, t, 1, "actual", "act" },
+		{ NULL, 0, 0, 0.0, 0.0, 0.0, "unit", "MHz" },
+		{ },
+		{ &engines->freq_req_gt[3], 6, 0, 1.0, t, 1, "requested", "req" },
+		{ &engines->freq_act_gt[3], 6, 0, 1.0, t, 1, "actual", "act" },
+		{ NULL, 0, 0, 0.0, 0.0, 0.0, "unit", "MHz" },
+		{ },
+	};
+	struct cnt_group freq_group_gt[MAX_GTS] = {
+		{ .name = "frequency-gt0", .display_name = "Freq GT0 MHz", .items = &freq_items_gt[0] },
+		{ .name = "frequency-gt1", .display_name = "Freq GT1 MHz", .items = &freq_items_gt[4] },
+		{ .name = "frequency-gt2", .display_name = "Freq GT2 MHz", .items = &freq_items_gt[8] },
+		{ .name = "frequency-gt3", .display_name = "Freq GT3 MHz", .items = &freq_items_gt[12] },
+	};
 	struct cnt_item irq_items[] = {
 		{ &engines->irq, 8, 0, 1.0, t, 1, "count", "/s" },
 		{ NULL, 0, 0, 0.0, 0.0, 0.0, "unit", "irq/s" },
@@ -1456,6 +1480,26 @@ print_header(const struct igt_device_card *card,
 		.display_name = "RC6",
 		.items = rc6_items,
 	};
+	struct cnt_item rc6_items_gt[] = {
+		{ &engines->rc6_gt[0], 8, 0, 1e9, t, 100, "value", "%" },
+		{ NULL, 0, 0, 0.0, 0.0, 0.0, "unit", "%" },
+		{ },
+		{ &engines->rc6_gt[1], 8, 0, 1e9, t, 100, "value", "%" },
+		{ NULL, 0, 0, 0.0, 0.0, 0.0, "unit", "%" },
+		{ },
+		{ &engines->rc6_gt[2], 8, 0, 1e9, t, 100, "value", "%" },
+		{ NULL, 0, 0, 0.0, 0.0, 0.0, "unit", "%" },
+		{ },
+		{ &engines->rc6_gt[3], 8, 0, 1e9, t, 100, "value", "%" },
+		{ NULL, 0, 0, 0.0, 0.0, 0.0, "unit", "%" },
+		{ },
+	};
+	struct cnt_group rc6_group_gt[MAX_GTS] = {
+		{ .name = "rc6-gt0", .display_name = "RC6 GT0", .items = &rc6_items_gt[0] },
+		{ .name = "rc6-gt1", .display_name = "RC6 GT1", .items = &rc6_items_gt[3] },
+		{ .name = "rc6-gt2", .display_name = "RC6 GT2", .items = &rc6_items_gt[6] },
+		{ .name = "rc6-gt3", .display_name = "RC6 GT3", .items = &rc6_items_gt[9] },
+	};
 	struct cnt_item power_items[] = {
 		{ &engines->r_gpu, 4, 2, 1.0, t, engines->r_gpu.scale, "GPU", "gpu" },
 		{ &engines->r_pkg, 4, 2, 1.0, t, engines->r_pkg.scale, "Package", "pkg" },
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 11/15] intel_gpu_top: Bump up size of groups to accomodate multi-gt
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (9 preceding siblings ...)
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 10/15] intel_gpu_top: Add definitions for gt-specific items and groups Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 12/15] intel_gpu_top: Increase visibility for class_view Umesh Nerlige Ramappa
                   ` (6 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

Create more space in groups to add gt specific freq and rc6 groups.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tools/intel_gpu_top.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index c8b6b92dd..9bb933cab 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -1511,7 +1511,13 @@ print_header(const struct igt_device_card *card,
 		.display_name = "Power W",
 		.items = power_items,
 	};
-	struct cnt_group *groups[] = {
+	/*
+	 * Array size calculation:
+	 * One group each for period, irq, power, NULL = 4
+	 * One group per gt for freq = MAX_GTS
+	 * One group per gt for rc6  = MAX_GTS
+	 */
+	struct cnt_group *groups[4 + MAX_GTS + MAX_GTS] = {
 		&period_group,
 		&freq_group,
 		&irq_group,
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 12/15] intel_gpu_top: Increase visibility for class_view
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (10 preceding siblings ...)
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 11/15] intel_gpu_top: Bump up size of groups to accomodate multi-gt Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 13/15] intel_gpu_top: Show gt specific values if requested Umesh Nerlige Ramappa
                   ` (5 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

Some future changes may access class_view before it's declared, so move
it to top

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tools/intel_gpu_top.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 9bb933cab..2b867f8dc 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -135,6 +135,7 @@ struct intel_clients {
 };
 
 static struct termios termios_orig;
+static bool class_view;
 
 __attribute__((format(scanf,3,4)))
 static int igt_sysfs_scanf(int dir, const char *attr, const char *fmt, ...)
@@ -1636,8 +1637,6 @@ print_imc(struct engines *engines, double t, int lines, int con_w, int con_h)
 	return lines;
 }
 
-static bool class_view;
-
 static int
 print_engines_header(struct engines *engines, double t,
 		     int lines, int con_w, int con_h)
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 13/15] intel_gpu_top: Show gt specific values if requested
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (11 preceding siblings ...)
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 12/15] intel_gpu_top: Increase visibility for class_view Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 14/15] intel_gpu_top: Reduce one level of indent Umesh Nerlige Ramappa
                   ` (4 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

On multi-gt platforms, the aggregate values are displayed as default. If
user passes -p (physical) option for these platforms, show gt specific
counter values.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tools/intel_gpu_top.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 2b867f8dc..6e9b3416c 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -1526,6 +1526,26 @@ print_header(const struct igt_device_card *card,
 		&power_group,
 		NULL
 	};
+	int i;
+
+	/*
+	 * If we have multi-gt and the user has specified -p options, show gt
+	 * specific values.
+	 */
+	if (!class_view && engines->num_gts > 1) {
+		int j = 0;
+
+		groups[j++] = &period_group;
+		for (i = 0; i < engines->num_gts; i++)
+			groups[j++] = &freq_group_gt[i];
+
+		groups[j++] = &irq_group;
+		for (i = 0; i < engines->num_gts; i++)
+			groups[j++] = &rc6_group_gt[i];
+
+		groups[j++] = &power_group;
+		groups[j++] = NULL;
+	}
 
 	if (output_mode != JSON)
 		memmove(&groups[0], &groups[1],
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 14/15] intel_gpu_top: Reduce one level of indent
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (12 preceding siblings ...)
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 13/15] intel_gpu_top: Show gt specific values if requested Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 15/15] intel_gpu_top: Add gt specific values to header in interactive mode Umesh Nerlige Ramappa
                   ` (3 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

Prepare to display gt specific items in INTERACTIVE mode with the -p
option. An additional for loop will push code more towards right, so
reduce one level of indent.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tools/intel_gpu_top.c | 74 ++++++++++++++++++++++---------------------
 1 file changed, 38 insertions(+), 36 deletions(-)

diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 6e9b3416c..11ef4c0e2 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -1526,7 +1526,7 @@ print_header(const struct igt_device_card *card,
 		&power_group,
 		NULL
 	};
-	int i;
+	int rem, i;
 
 	/*
 	 * If we have multi-gt and the user has specified -p options, show gt
@@ -1553,51 +1553,53 @@ print_header(const struct igt_device_card *card,
 
 	*consumed = print_groups(groups);
 
-	if (output_mode == INTERACTIVE) {
-		int rem = con_w;
+	if (output_mode != INTERACTIVE)
+		return lines;
 
-		printf("\033[H\033[J");
+	/* INTERACTIVE MODE */
+	rem = con_w;
 
-		lines = print_header_token(NULL, lines, con_w, con_h, &rem,
-					   "intel-gpu-top:");
+	printf("\033[H\033[J");
 
-		lines = print_header_token(" ", lines, con_w, con_h, &rem,
-					   "%s", codename);
+	lines = print_header_token(NULL, lines, con_w, con_h, &rem,
+				   "intel-gpu-top:");
 
-		lines = print_header_token(" @ ", lines, con_w, con_h, &rem,
-					   "%s", card->card);
+	lines = print_header_token(" ", lines, con_w, con_h, &rem,
+				   "%s", codename);
 
-		lines = print_header_token(" - ", lines, con_w, con_h, &rem,
-					   "%s/%s MHz",
-					   freq_items[1].buf,
-					   freq_items[0].buf);
+	lines = print_header_token(" @ ", lines, con_w, con_h, &rem,
+				   "%s", card->card);
 
-		lines = print_header_token("; ", lines, con_w, con_h, &rem,
-					   "%s%% RC6",
-					   rc6_items[0].buf);
+	lines = print_header_token(" - ", lines, con_w, con_h, &rem,
+				   "%s/%s MHz",
+				   freq_items[1].buf,
+				   freq_items[0].buf);
 
-		if (engines->r_gpu.present) {
-			lines = print_header_token("; ", lines, con_w, con_h,
-						   &rem,
-						   "%s/%s W",
-						   power_items[0].buf,
-						   power_items[1].buf);
-		}
+	lines = print_header_token("; ", lines, con_w, con_h, &rem,
+				   "%s%% RC6",
+				   rc6_items[0].buf);
 
-		lines = print_header_token("; ", lines, con_w, con_h, &rem,
-					   "%s irqs/s",
-					   irq_items[0].buf);
+	if (engines->r_gpu.present) {
+		lines = print_header_token("; ", lines, con_w, con_h,
+					   &rem,
+					   "%s/%s W",
+					   power_items[0].buf,
+					   power_items[1].buf);
+	}
 
-		if (lines++ < con_h)
-			printf("\n");
+	lines = print_header_token("; ", lines, con_w, con_h, &rem,
+				   "%s irqs/s",
+				   irq_items[0].buf);
 
-		if (lines++ < con_h) {
-			if (header_msg) {
-				printf(" >>> %s\n", header_msg);
-				header_msg = NULL;
-			} else {
-				printf("\n");
-			}
+	if (lines++ < con_h)
+		printf("\n");
+
+	if (lines++ < con_h) {
+		if (header_msg) {
+			printf(" >>> %s\n", header_msg);
+			header_msg = NULL;
+		} else {
+			printf("\n");
 		}
 	}
 
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] [PATCH i-g-t v2 15/15] intel_gpu_top: Add gt specific values to header in interactive mode
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (13 preceding siblings ...)
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 14/15] intel_gpu_top: Reduce one level of indent Umesh Nerlige Ramappa
@ 2023-05-17 21:25 ` Umesh Nerlige Ramappa
  2023-05-17 22:15 ` [igt-dev] ✗ Fi.CI.BAT: failure for PMU: multi-tile support (rev4) Patchwork
                   ` (2 subsequent siblings)
  17 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-17 21:25 UTC (permalink / raw)
  To: igt-dev

If -p options is specified in INTERACTIVE mode, show the gt specific
values.

v2: Reformat GT info for INTERACTIVE mode (Tvrtko)

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tools/intel_gpu_top.c | 33 +++++++++++++++++++++++++--------
 1 file changed, 25 insertions(+), 8 deletions(-)

diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 11ef4c0e2..da72c0166 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -1570,14 +1570,31 @@ print_header(const struct igt_device_card *card,
 	lines = print_header_token(" @ ", lines, con_w, con_h, &rem,
 				   "%s", card->card);
 
-	lines = print_header_token(" - ", lines, con_w, con_h, &rem,
-				   "%s/%s MHz",
-				   freq_items[1].buf,
-				   freq_items[0].buf);
-
-	lines = print_header_token("; ", lines, con_w, con_h, &rem,
-				   "%s%% RC6",
-				   rc6_items[0].buf);
+	if (class_view || engines->num_gts == 1) {
+		lines = print_header_token(" - ", lines, con_w, con_h, &rem,
+					   "%s/%s MHz",
+					   freq_items[1].buf,
+					   freq_items[0].buf);
+
+		lines = print_header_token("; ", lines, con_w, con_h, &rem,
+					   "%s%% RC6",
+					   rc6_items[0].buf);
+	} else {
+		for (i = 0; i < engines->num_gts; i++) {
+			const char *cont = !i ? " - ": "; ";
+
+			lines = print_header_token(cont, lines, con_w, con_h, &rem,
+						   "%s/%s MHz GT%d",
+						   freq_items_gt[i * 4 + 1].buf,
+						   freq_items_gt[i * 4 + 0].buf,
+						   i);
+
+			lines = print_header_token("; ", lines, con_w, con_h, &rem,
+						   "%s%% RC6 GT%d",
+						   rc6_items_gt[i * 3].buf,
+						   i);
+		}
+	}
 
 	if (engines->r_gpu.present) {
 		lines = print_header_token("; ", lines, con_w, con_h,
-- 
2.36.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [igt-dev] ✗ Fi.CI.BAT: failure for PMU: multi-tile support (rev4)
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (14 preceding siblings ...)
  2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 15/15] intel_gpu_top: Add gt specific values to header in interactive mode Umesh Nerlige Ramappa
@ 2023-05-17 22:15 ` Patchwork
  2023-05-18 12:04   ` Kamil Konieczny
  2023-05-18 12:19 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
  2023-05-19  0:13 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
  17 siblings, 1 reply; 24+ messages in thread
From: Patchwork @ 2023-05-17 22:15 UTC (permalink / raw)
  To: Umesh Nerlige Ramappa; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 8235 bytes --]

== Series Details ==

Series: PMU: multi-tile support (rev4)
URL   : https://patchwork.freedesktop.org/series/117406/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13160 -> IGTPW_8990
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_8990 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_8990, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html

Participating hosts (36 -> 37)
------------------------------

  Additional (2): fi-kbl-soraka bat-mtlp-6 
  Missing    (1): fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_8990:

### IGT changes ###

#### Possible regressions ####

  * igt@vgem_basic@setversion:
    - fi-kbl-soraka:      NOTRUN -> [INCOMPLETE][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@vgem_basic@setversion.html

  
Known issues
------------

  Here are the changes found in IGTPW_8990 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html

  * igt@i915_module_load@reload:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-WARN][4] ([i915#1982] / [i915#8189])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@i915_module_load@reload.html

  * igt@i915_selftest@live@gt_pm:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][5] ([i915#1886] / [i915#7913])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@migrate:
    - bat-dg2-11:         [PASS][6] -> [DMESG-WARN][7] ([i915#7699])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-dg2-11/igt@i915_selftest@live@migrate.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-dg2-11/igt@i915_selftest@live@migrate.html

  * igt@i915_selftest@live@requests:
    - bat-rpls-1:         [PASS][8] -> [ABORT][9] ([i915#7911] / [i915#7920])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-rpls-1/igt@i915_selftest@live@requests.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-1/igt@i915_selftest@live@requests.html

  * igt@i915_selftest@live@slpc:
    - bat-rpls-2:         NOTRUN -> [DMESG-WARN][10] ([i915#6367])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-2/igt@i915_selftest@live@slpc.html

  * igt@i915_suspend@basic-s2idle-without-i915:
    - bat-rpls-2:         NOTRUN -> [ABORT][11] ([i915#6687])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-2/igt@i915_suspend@basic-s2idle-without-i915.html

  * igt@kms_chamelium_frames@hdmi-crc-fast:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][12] ([fdo#109271]) +14 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@kms_chamelium_frames@hdmi-crc-fast.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4579])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@kms_setmode@basic-clone-single-crtc.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@reset:
    - bat-rpls-2:         [ABORT][14] ([i915#4983] / [i915#7461] / [i915#7913] / [i915#8347]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-rpls-2/igt@i915_selftest@live@reset.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-2/igt@i915_selftest@live@reset.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
    - bat-dg2-8:          [FAIL][16] ([i915#7932]) -> [PASS][17] +1 similar issue
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
  [i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
  [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
  [i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
  [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920
  [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
  [i915#8189]: https://gitlab.freedesktop.org/drm/intel/issues/8189
  [i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7294 -> IGTPW_8990

  CI-20190529: 20190529
  CI_DRM_13160: 2147c8fcc283c183aba29e5f51b653332d90a3ed @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8990: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html
  IGT_7294: e1ab60dc90fc49f6b2ec1b37f14b021e59455e73 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git


Testlist changes
----------------

+igt@perf_pmu@rc6-all-gts
-igt@perf_pmu@frequency-idle
-igt@perf_pmu@rc6-runtime-pm
-igt@perf_pmu@rc6-runtime-pm-long
-igt@xe_eudebug@basic-client
-igt@xe_eudebug@basic-close
-igt@xe_eudebug@basic-connect
-igt@xe_eudebug@basic-read-event
-igt@xe_eudebug@basic-vms
-igt@xe_eudebug@discovery-empty
-igt@xe_eudebug@discovery-empty-clients
-igt@xe_eudebug@discovery-race
-igt@xe_eudebug@multiple-sessions

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html

[-- Attachment #2: Type: text/html, Size: 8136 bytes --]

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [igt-dev] ✗ Fi.CI.BAT:  failure for PMU: multi-tile support (rev4)
  2023-05-17 22:15 ` [igt-dev] ✗ Fi.CI.BAT: failure for PMU: multi-tile support (rev4) Patchwork
@ 2023-05-18 12:04   ` Kamil Konieczny
  2023-05-18 12:20     ` Yedireswarapu, SaiX Nandan
  0 siblings, 1 reply; 24+ messages in thread
From: Kamil Konieczny @ 2023-05-18 12:04 UTC (permalink / raw)
  To: igt-dev; +Cc: SaiX Nandan Yedireswarapu

Hi Sai,

On 2023-05-17 at 22:15:22 -0000, Patchwork wrote:
> == Series Details ==
> 
> Series: PMU: multi-tile support (rev4)
> URL   : https://patchwork.freedesktop.org/series/117406/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_13160 -> IGTPW_8990
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with IGTPW_8990 absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in IGTPW_8990, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html
> 
> Participating hosts (36 -> 37)
> ------------------------------
> 
>   Additional (2): fi-kbl-soraka bat-mtlp-6 
>   Missing    (1): fi-snb-2520m 
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in IGTPW_8990:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@vgem_basic@setversion:
>     - fi-kbl-soraka:      NOTRUN -> [INCOMPLETE][1]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@vgem_basic@setversion.html

This is unrelated to perf_pmu and tools,

Regards,
Kamil

> 
>   
> Known issues
> ------------
> 
>   Here are the changes found in IGTPW_8990 that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@gem_huc_copy@huc-copy:
>     - fi-kbl-soraka:      NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
> 
>   * igt@gem_lmem_swapping@basic:
>     - fi-kbl-soraka:      NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 similar issues
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html
> 
>   * igt@i915_module_load@reload:
>     - fi-kbl-soraka:      NOTRUN -> [DMESG-WARN][4] ([i915#1982] / [i915#8189])
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@i915_module_load@reload.html
> 
>   * igt@i915_selftest@live@gt_pm:
>     - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][5] ([i915#1886] / [i915#7913])
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
> 
>   * igt@i915_selftest@live@migrate:
>     - bat-dg2-11:         [PASS][6] -> [DMESG-WARN][7] ([i915#7699])
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-dg2-11/igt@i915_selftest@live@migrate.html
>    [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-dg2-11/igt@i915_selftest@live@migrate.html
> 
>   * igt@i915_selftest@live@requests:
>     - bat-rpls-1:         [PASS][8] -> [ABORT][9] ([i915#7911] / [i915#7920])
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-rpls-1/igt@i915_selftest@live@requests.html
>    [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-1/igt@i915_selftest@live@requests.html
> 
>   * igt@i915_selftest@live@slpc:
>     - bat-rpls-2:         NOTRUN -> [DMESG-WARN][10] ([i915#6367])
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-2/igt@i915_selftest@live@slpc.html
> 
>   * igt@i915_suspend@basic-s2idle-without-i915:
>     - bat-rpls-2:         NOTRUN -> [ABORT][11] ([i915#6687])
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-2/igt@i915_suspend@basic-s2idle-without-i915.html
> 
>   * igt@kms_chamelium_frames@hdmi-crc-fast:
>     - fi-kbl-soraka:      NOTRUN -> [SKIP][12] ([fdo#109271]) +14 similar issues
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@kms_chamelium_frames@hdmi-crc-fast.html
> 
>   * igt@kms_setmode@basic-clone-single-crtc:
>     - fi-kbl-soraka:      NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4579])
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@kms_setmode@basic-clone-single-crtc.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@i915_selftest@live@reset:
>     - bat-rpls-2:         [ABORT][14] ([i915#4983] / [i915#7461] / [i915#7913] / [i915#8347]) -> [PASS][15]
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-rpls-2/igt@i915_selftest@live@reset.html
>    [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-2/igt@i915_selftest@live@reset.html
> 
>   * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
>     - bat-dg2-8:          [FAIL][16] ([i915#7932]) -> [PASS][17] +1 similar issue
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
>    [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
>   [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
>   [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
>   [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
>   [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
>   [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
>   [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
>   [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
>   [i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
>   [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
>   [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
>   [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
>   [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
>   [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
>   [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
>   [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
>   [i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
>   [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
>   [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
>   [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
>   [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
>   [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
>   [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
>   [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
>   [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
>   [i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
>   [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
>   [i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
>   [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
>   [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
>   [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
>   [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
>   [i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920
>   [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
>   [i915#8189]: https://gitlab.freedesktop.org/drm/intel/issues/8189
>   [i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
> 
> 
> Build changes
> -------------
> 
>   * CI: CI-20190529 -> None
>   * IGT: IGT_7294 -> IGTPW_8990
> 
>   CI-20190529: 20190529
>   CI_DRM_13160: 2147c8fcc283c183aba29e5f51b653332d90a3ed @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGTPW_8990: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html
>   IGT_7294: e1ab60dc90fc49f6b2ec1b37f14b021e59455e73 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
> 
> 
> Testlist changes
> ----------------
> 
> +igt@perf_pmu@rc6-all-gts
> -igt@perf_pmu@frequency-idle
> -igt@perf_pmu@rc6-runtime-pm
> -igt@perf_pmu@rc6-runtime-pm-long
> -igt@xe_eudebug@basic-client
> -igt@xe_eudebug@basic-close
> -igt@xe_eudebug@basic-connect
> -igt@xe_eudebug@basic-read-event
> -igt@xe_eudebug@basic-vms
> -igt@xe_eudebug@discovery-empty
> -igt@xe_eudebug@discovery-empty-clients
> -igt@xe_eudebug@discovery-race
> -igt@xe_eudebug@multiple-sessions
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [igt-dev] ✗ Fi.CI.BAT: failure for PMU: multi-tile support (rev4)
  2023-05-18 12:04   ` Kamil Konieczny
@ 2023-05-18 12:20     ` Yedireswarapu, SaiX Nandan
  0 siblings, 0 replies; 24+ messages in thread
From: Yedireswarapu, SaiX Nandan @ 2023-05-18 12:20 UTC (permalink / raw)
  To: Kamil Konieczny, igt-dev@lists.freedesktop.org
  Cc: Marikkar, SanjuX, Veesam, RavitejaX

Hi,

Issue re-reported, https://patchwork.freedesktop.org/series/117406/

Thanks,
Y Sai Nandan

-----Original Message-----
From: Kamil Konieczny <kamil.konieczny@linux.intel.com> 
Sent: Thursday, May 18, 2023 5:34 PM
To: igt-dev@lists.freedesktop.org
Cc: Nerlige Ramappa, Umesh <umesh.nerlige.ramappa@intel.com>; Yedireswarapu, SaiX Nandan <saix.nandan.yedireswarapu@intel.com>
Subject: Re: [igt-dev] ✗ Fi.CI.BAT: failure for PMU: multi-tile support (rev4)

Hi Sai,

On 2023-05-17 at 22:15:22 -0000, Patchwork wrote:
> == Series Details ==
> 
> Series: PMU: multi-tile support (rev4)
> URL   : https://patchwork.freedesktop.org/series/117406/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_13160 -> IGTPW_8990 
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with IGTPW_8990 absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in IGTPW_8990, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html
> 
> Participating hosts (36 -> 37)
> ------------------------------
> 
>   Additional (2): fi-kbl-soraka bat-mtlp-6 
>   Missing    (1): fi-snb-2520m 
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in IGTPW_8990:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@vgem_basic@setversion:
>     - fi-kbl-soraka:      NOTRUN -> [INCOMPLETE][1]
>    [1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@
> vgem_basic@setversion.html

This is unrelated to perf_pmu and tools,

Regards,
Kamil

> 
>   
> Known issues
> ------------
> 
>   Here are the changes found in IGTPW_8990 that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@gem_huc_copy@huc-copy:
>     - fi-kbl-soraka:      NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
>    [2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@
> gem_huc_copy@huc-copy.html
> 
>   * igt@gem_lmem_swapping@basic:
>     - fi-kbl-soraka:      NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 similar issues
>    [3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@
> gem_lmem_swapping@basic.html
> 
>   * igt@i915_module_load@reload:
>     - fi-kbl-soraka:      NOTRUN -> [DMESG-WARN][4] ([i915#1982] / [i915#8189])
>    [4]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@
> i915_module_load@reload.html
> 
>   * igt@i915_selftest@live@gt_pm:
>     - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][5] ([i915#1886] / [i915#7913])
>    [5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@
> i915_selftest@live@gt_pm.html
> 
>   * igt@i915_selftest@live@migrate:
>     - bat-dg2-11:         [PASS][6] -> [DMESG-WARN][7] ([i915#7699])
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-dg2-11/igt@i915_selftest@live@migrate.html
>    [7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-dg2-11/igt@i91
> 5_selftest@live@migrate.html
> 
>   * igt@i915_selftest@live@requests:
>     - bat-rpls-1:         [PASS][8] -> [ABORT][9] ([i915#7911] / [i915#7920])
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-rpls-1/igt@i915_selftest@live@requests.html
>    [9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-1/igt@i91
> 5_selftest@live@requests.html
> 
>   * igt@i915_selftest@live@slpc:
>     - bat-rpls-2:         NOTRUN -> [DMESG-WARN][10] ([i915#6367])
>    [10]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-2/igt@i91
> 5_selftest@live@slpc.html
> 
>   * igt@i915_suspend@basic-s2idle-without-i915:
>     - bat-rpls-2:         NOTRUN -> [ABORT][11] ([i915#6687])
>    [11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-2/igt@i91
> 5_suspend@basic-s2idle-without-i915.html
> 
>   * igt@kms_chamelium_frames@hdmi-crc-fast:
>     - fi-kbl-soraka:      NOTRUN -> [SKIP][12] ([fdo#109271]) +14 similar issues
>    [12]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@
> kms_chamelium_frames@hdmi-crc-fast.html
> 
>   * igt@kms_setmode@basic-clone-single-crtc:
>     - fi-kbl-soraka:      NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4579])
>    [13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@
> kms_setmode@basic-clone-single-crtc.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@i915_selftest@live@reset:
>     - bat-rpls-2:         [ABORT][14] ([i915#4983] / [i915#7461] / [i915#7913] / [i915#8347]) -> [PASS][15]
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-rpls-2/igt@i915_selftest@live@reset.html
>    [15]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-2/igt@i91
> 5_selftest@live@reset.html
> 
>   * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
>     - bat-dg2-8:          [FAIL][16] ([i915#7932]) -> [PASS][17] +1 similar issue
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
>    [17]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-dg2-8/igt@kms_
> pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
>   [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
>   [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
>   [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
>   [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
>   [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
>   [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
>   [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
>   [i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
>   [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
>   [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
>   [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
>   [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
>   [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
>   [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
>   [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
>   [i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
>   [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
>   [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
>   [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
>   [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
>   [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
>   [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
>   [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
>   [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
>   [i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
>   [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
>   [i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
>   [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
>   [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
>   [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
>   [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
>   [i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920
>   [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
>   [i915#8189]: https://gitlab.freedesktop.org/drm/intel/issues/8189
>   [i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
> 
> 
> Build changes
> -------------
> 
>   * CI: CI-20190529 -> None
>   * IGT: IGT_7294 -> IGTPW_8990
> 
>   CI-20190529: 20190529
>   CI_DRM_13160: 2147c8fcc283c183aba29e5f51b653332d90a3ed @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGTPW_8990: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html
>   IGT_7294: e1ab60dc90fc49f6b2ec1b37f14b021e59455e73 @ 
> https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
> 
> 
> Testlist changes
> ----------------
> 
> +igt@perf_pmu@rc6-all-gts
> -igt@perf_pmu@frequency-idle
> -igt@perf_pmu@rc6-runtime-pm
> -igt@perf_pmu@rc6-runtime-pm-long
> -igt@xe_eudebug@basic-client
> -igt@xe_eudebug@basic-close
> -igt@xe_eudebug@basic-connect
> -igt@xe_eudebug@basic-read-event
> -igt@xe_eudebug@basic-vms
> -igt@xe_eudebug@discovery-empty
> -igt@xe_eudebug@discovery-empty-clients
> -igt@xe_eudebug@discovery-race
> -igt@xe_eudebug@multiple-sessions
> 
> == Logs ==
> 
> For more details see: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [igt-dev] ✓ Fi.CI.BAT: success for PMU: multi-tile support (rev4)
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (15 preceding siblings ...)
  2023-05-17 22:15 ` [igt-dev] ✗ Fi.CI.BAT: failure for PMU: multi-tile support (rev4) Patchwork
@ 2023-05-18 12:19 ` Patchwork
  2023-05-19  0:13 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
  17 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2023-05-18 12:19 UTC (permalink / raw)
  To: Umesh Nerlige Ramappa; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 7852 bytes --]

== Series Details ==

Series: PMU: multi-tile support (rev4)
URL   : https://patchwork.freedesktop.org/series/117406/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13160 -> IGTPW_8990
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html

Participating hosts (36 -> 37)
------------------------------

  Additional (2): fi-kbl-soraka bat-mtlp-6 
  Missing    (1): fi-snb-2520m 

Known issues
------------

  Here are the changes found in IGTPW_8990 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613]) +3 similar issues
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html

  * igt@i915_module_load@reload:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-WARN][3] ([i915#1982] / [i915#8189])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@i915_module_load@reload.html

  * igt@i915_selftest@live@gt_pm:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][4] ([i915#1886] / [i915#7913])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@migrate:
    - bat-dg2-11:         [PASS][5] -> [DMESG-WARN][6] ([i915#7699])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-dg2-11/igt@i915_selftest@live@migrate.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-dg2-11/igt@i915_selftest@live@migrate.html

  * igt@i915_selftest@live@requests:
    - bat-rpls-1:         [PASS][7] -> [ABORT][8] ([i915#7911] / [i915#7920])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-rpls-1/igt@i915_selftest@live@requests.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-1/igt@i915_selftest@live@requests.html

  * igt@i915_selftest@live@slpc:
    - bat-rpls-2:         NOTRUN -> [DMESG-WARN][9] ([i915#6367])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-2/igt@i915_selftest@live@slpc.html

  * igt@i915_suspend@basic-s2idle-without-i915:
    - bat-rpls-2:         NOTRUN -> [ABORT][10] ([i915#6687])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-2/igt@i915_suspend@basic-s2idle-without-i915.html

  * igt@kms_chamelium_frames@hdmi-crc-fast:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][11] ([fdo#109271]) +14 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@kms_chamelium_frames@hdmi-crc-fast.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#4579])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@vgem_basic@setversion:
    - fi-kbl-soraka:      NOTRUN -> [INCOMPLETE][13] ([i915#8467])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/fi-kbl-soraka/igt@vgem_basic@setversion.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@reset:
    - bat-rpls-2:         [ABORT][14] ([i915#4983] / [i915#7461] / [i915#7913] / [i915#8347]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-rpls-2/igt@i915_selftest@live@reset.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-rpls-2/igt@i915_selftest@live@reset.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
    - bat-dg2-8:          [FAIL][16] ([i915#7932]) -> [PASS][17] +1 similar issue
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
  [i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
  [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
  [i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
  [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920
  [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
  [i915#8189]: https://gitlab.freedesktop.org/drm/intel/issues/8189
  [i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
  [i915#8467]: https://gitlab.freedesktop.org/drm/intel/issues/8467


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7294 -> IGTPW_8990

  CI-20190529: 20190529
  CI_DRM_13160: 2147c8fcc283c183aba29e5f51b653332d90a3ed @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8990: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html
  IGT_7294: e1ab60dc90fc49f6b2ec1b37f14b021e59455e73 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git


Testlist changes
----------------

+igt@perf_pmu@rc6-all-gts
-igt@perf_pmu@frequency-idle
-igt@perf_pmu@rc6-runtime-pm
-igt@perf_pmu@rc6-runtime-pm-long
-igt@xe_eudebug@basic-client
-igt@xe_eudebug@basic-close
-igt@xe_eudebug@basic-connect
-igt@xe_eudebug@basic-read-event
-igt@xe_eudebug@basic-vms
-igt@xe_eudebug@discovery-empty
-igt@xe_eudebug@discovery-empty-clients
-igt@xe_eudebug@discovery-race
-igt@xe_eudebug@multiple-sessions

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html

[-- Attachment #2: Type: text/html, Size: 7741 bytes --]

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [igt-dev] ✗ Fi.CI.IGT: failure for PMU: multi-tile support (rev4)
  2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
                   ` (16 preceding siblings ...)
  2023-05-18 12:19 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-05-19  0:13 ` Patchwork
  2023-05-19  6:44   ` Umesh Nerlige Ramappa
  17 siblings, 1 reply; 24+ messages in thread
From: Patchwork @ 2023-05-19  0:13 UTC (permalink / raw)
  To: Umesh Nerlige Ramappa; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 16421 bytes --]

== Series Details ==

Series: PMU: multi-tile support (rev4)
URL   : https://patchwork.freedesktop.org/series/117406/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13160_full -> IGTPW_8990_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_8990_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_8990_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html

Participating hosts (7 -> 7)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_8990_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
    - shard-apl:          [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-apl1/igt@gem_ctx_isolation@preservation-s3@vcs0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-apl2/igt@gem_ctx_isolation@preservation-s3@vcs0.html

  * {igt@perf_pmu@frequency@gt0} (NEW):
    - {shard-rkl}:        NOTRUN -> [SKIP][3] +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-rkl-1/igt@perf_pmu@frequency@gt0.html

  * {igt@perf_pmu@rc6-all-gts} (NEW):
    - {shard-dg1}:        NOTRUN -> [SKIP][4] +1 similar issue
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-dg1-15/igt@perf_pmu@rc6-all-gts.html
    - {shard-tglu}:       NOTRUN -> [SKIP][5] +2 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-tglu-2/igt@perf_pmu@rc6-all-gts.html

  
New tests
---------

  New tests have been introduced between CI_DRM_13160_full and IGTPW_8990_full:

### New IGT tests (7) ###

  * igt@perf_pmu@frequency@gt0:
    - Statuses : 6 skip(s)
    - Exec time: [0.0] s

  * igt@perf_pmu@frequency@idle-gt0:
    - Statuses : 6 pass(s)
    - Exec time: [0.0] s

  * igt@perf_pmu@rc6-all-gts:
    - Statuses : 6 skip(s)
    - Exec time: [0.0] s

  * igt@perf_pmu@rc6@gt0:
    - Statuses : 4 pass(s)
    - Exec time: [0.0] s

  * igt@perf_pmu@rc6@other-idle-gt0:
    - Statuses : 4 skip(s)
    - Exec time: [0.0] s

  * igt@perf_pmu@rc6@runtime-pm-gt0:
    - Statuses : 3 pass(s) 1 skip(s)
    - Exec time: [0.0] s

  * igt@perf_pmu@rc6@runtime-pm-long-gt0:
    - Statuses : 3 pass(s) 1 skip(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in IGTPW_8990_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-apl:          [PASS][6] -> [FAIL][7] ([i915#2842])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-apl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-apl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@kms_color@ctm-green-to-red@pipe-a-hdmi-a-1:
    - shard-snb:          NOTRUN -> [SKIP][8] ([fdo#109271]) +14 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-snb1/igt@kms_color@ctm-green-to-red@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-apl:          [PASS][9] -> [FAIL][10] ([i915#2346]) +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-apl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-b-hdmi-a-1:
    - shard-snb:          NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#4579]) +10 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-snb1/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-b-hdmi-a-1.html

  * {igt@perf_pmu@rc6-all-gts} (NEW):
    - shard-apl:          NOTRUN -> [SKIP][12] ([fdo#109271]) +2 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-apl4/igt@perf_pmu@rc6-all-gts.html
    - shard-glk:          NOTRUN -> [SKIP][13] ([fdo#109271]) +2 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-glk9/igt@perf_pmu@rc6-all-gts.html

  
#### Possible fixes ####

  * igt@drm_fdinfo@most-busy-check-all@rcs0:
    - {shard-rkl}:        [FAIL][14] ([i915#7742]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-rkl-7/igt@drm_fdinfo@most-busy-check-all@rcs0.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-rkl-6/igt@drm_fdinfo@most-busy-check-all@rcs0.html

  * igt@gem_barrier_race@remote-request@rcs0:
    - {shard-dg1}:        [ABORT][16] ([i915#7461] / [i915#8234]) -> [PASS][17]
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-dg1-17/igt@gem_barrier_race@remote-request@rcs0.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-dg1-12/igt@gem_barrier_race@remote-request@rcs0.html

  * igt@gem_ctx_exec@basic-nohangcheck:
    - {shard-rkl}:        [FAIL][18] ([i915#6268]) -> [PASS][19]
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-rkl-4/igt@gem_ctx_exec@basic-nohangcheck.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-rkl-2/igt@gem_ctx_exec@basic-nohangcheck.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - {shard-rkl}:        [FAIL][20] ([i915#2842]) -> [PASS][21] +2 similar issues
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-rkl-7/igt@gem_exec_fair@basic-pace@rcs0.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-rkl-7/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@i915_module_load@reload-with-fault-injection:
    - {shard-dg1}:        [DMESG-WARN][22] ([i915#4391]) -> [PASS][23]
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-dg1-17/igt@i915_module_load@reload-with-fault-injection.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-dg1-13/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a:
    - {shard-rkl}:        [SKIP][24] ([i915#1937] / [i915#4579]) -> [PASS][25]
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-rkl-2/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-rkl-7/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html

  * igt@i915_pm_rpm@modeset-lpsp-stress:
    - {shard-rkl}:        [SKIP][26] ([i915#1397]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-rkl-3/igt@i915_pm_rpm@modeset-lpsp-stress.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-rkl-7/igt@i915_pm_rpm@modeset-lpsp-stress.html

  * igt@i915_pm_rps@reset:
    - {shard-tglu}:       [INCOMPLETE][28] ([i915#8320]) -> [PASS][29]
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-tglu-5/igt@i915_pm_rps@reset.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-tglu-6/igt@i915_pm_rps@reset.html

  * igt@i915_suspend@basic-s3-without-i915:
    - {shard-rkl}:        [FAIL][30] ([fdo#103375]) -> [PASS][31]
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-rkl-6/igt@i915_suspend@basic-s3-without-i915.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-rkl-7/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          [FAIL][32] ([i915#2346]) -> [PASS][33]
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@forked-bo@pipe-b:
    - {shard-rkl}:        [INCOMPLETE][34] ([i915#8011]) -> [PASS][35]
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-rkl-7/igt@kms_cursor_legacy@forked-bo@pipe-b.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-rkl-1/igt@kms_cursor_legacy@forked-bo@pipe-b.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@bc-hdmi-a1-hdmi-a2:
    - shard-glk:          [FAIL][36] ([i915#2122]) -> [PASS][37] +1 similar issue
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-glk8/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@bc-hdmi-a1-hdmi-a2.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-glk9/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@bc-hdmi-a1-hdmi-a2.html

  * igt@kms_hdmi_inject@inject-audio:
    - {shard-tglu}:       [SKIP][38] ([i915#433]) -> [PASS][39]
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13160/shard-tglu-4/igt@kms_hdmi_inject@inject-audio.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-tglu-6/igt@kms_hdmi_inject@inject-audio.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
  [fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
  [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
  [i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
  [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
  [i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
  [i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
  [i915#4958]: https://gitlab.freedesktop.org/drm/intel/issues/4958
  [i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
  [i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
  [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
  [i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
  [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
  [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
  [i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
  [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
  [i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
  [i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
  [i915#8234]: https://gitlab.freedesktop.org/drm/intel/issues/8234
  [i915#8304]: https://gitlab.freedesktop.org/drm/intel/issues/8304
  [i915#8320]: https://gitlab.freedesktop.org/drm/intel/issues/8320
  [i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7294 -> IGTPW_8990
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_13160: 2147c8fcc283c183aba29e5f51b653332d90a3ed @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8990: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html
  IGT_7294: e1ab60dc90fc49f6b2ec1b37f14b021e59455e73 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html

[-- Attachment #2: Type: text/html, Size: 13015 bytes --]

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [igt-dev] ✗ Fi.CI.IGT: failure for PMU: multi-tile support (rev4)
  2023-05-19  0:13 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
@ 2023-05-19  6:44   ` Umesh Nerlige Ramappa
  2023-05-19  8:39     ` Dixit, Ashutosh
  0 siblings, 1 reply; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-19  6:44 UTC (permalink / raw)
  To: igt-dev, ashutosh.dixit

Hi Ashutosh,

One of the SKIPs below is not expected,

On Fri, May 19, 2023 at 12:13:01AM +0000, Patchwork wrote:
>   Patch Details
>
>   Series:  PMU: multi-tile support (rev4)
>   URL:     [1]https://patchwork.freedesktop.org/series/117406/
>   State:   failure
>   Details: [2]https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html
>
>         CI Bug Log - changes from CI_DRM_13160_full -> IGTPW_8990_full
>
>Summary
>
>   FAILURE
>
>   Serious unknown changes coming with IGTPW_8990_full absolutely need to be
>   verified manually.
>
>   If you think the reported changes have nothing to do with the changes
>   introduced in IGTPW_8990_full, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in
>   CI.
>
>   External URL:
>   https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html
>
>Participating hosts (7 -> 7)
>
>   No changes in participating hosts
>
>Possible new issues
>
>   Here are the unknown changes that may have been introduced in
>   IGTPW_8990_full:
>
>  IGT changes
>
>    Possible regressions
>
>     * igt@gem_ctx_isolation@preservation-s3@vcs0:
>
>          * shard-apl: [3]PASS -> [4]ABORT
>
>     * {igt@perf_pmu@frequency@gt0} (NEW):
>
>          * {shard-rkl}: NOTRUN -> [5]SKIP +1 similar issue

With this IGT series - https://patchwork.freedesktop.org/series/117406/, 
we do not have igt@perf_pmu@frequency test anymore. It is replaced by 
igt@perf_pmu@frequency@gt0 for all single tile platforms. For non-MTL 
platforms, gem_engine_to_gt_map() should just return 0.

>
>     * {igt@perf_pmu@rc6-all-gts} (NEW):
>
>          * {shard-dg1}: NOTRUN -> [6]SKIP +1 similar issue
>
>          * {shard-tglu}: NOTRUN -> [7]SKIP +2 similar issues

These are expected to skip.

Umesh
>
>New tests

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [igt-dev] ✗ Fi.CI.IGT: failure for PMU: multi-tile support (rev4)
  2023-05-19  6:44   ` Umesh Nerlige Ramappa
@ 2023-05-19  8:39     ` Dixit, Ashutosh
  2023-05-19 15:55       ` Umesh Nerlige Ramappa
  0 siblings, 1 reply; 24+ messages in thread
From: Dixit, Ashutosh @ 2023-05-19  8:39 UTC (permalink / raw)
  To: Umesh Nerlige Ramappa; +Cc: igt-dev

On Thu, 18 May 2023 23:44:03 -0700, Umesh Nerlige Ramappa wrote:
>

Hi Umesh,

>
> One of the SKIPs below is not expected,
>
> On Fri, May 19, 2023 at 12:13:01AM +0000, Patchwork wrote:
> >   Patch Details
> >
> >   Series:  PMU: multi-tile support (rev4)
> >   URL:     [1]https://patchwork.freedesktop.org/series/117406/
> >   State:   failure
> >   Details: [2]https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html
> >
> >         CI Bug Log - changes from CI_DRM_13160_full -> IGTPW_8990_full
> >
> > Summary
> >
> >   FAILURE
> >
> >   Serious unknown changes coming with IGTPW_8990_full absolutely need to be
> >   verified manually.
> >
> >   If you think the reported changes have nothing to do with the changes
> >   introduced in IGTPW_8990_full, please notify your bug team to allow them
> >   to document this new failure mode, which will reduce false positives in
> >   CI.
> >
> >   External URL:
> >   https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html
> >
> > Participating hosts (7 -> 7)
> >
> >   No changes in participating hosts
> >
> > Possible new issues
> >
> >   Here are the unknown changes that may have been introduced in
> >   IGTPW_8990_full:
> >
> >  IGT changes
> >
> >    Possible regressions
> >
> >     * igt@gem_ctx_isolation@preservation-s3@vcs0:
> >
> >          * shard-apl: [3]PASS -> [4]ABORT
> >
> >     * {igt@perf_pmu@frequency@gt0} (NEW):
> >
> >          * {shard-rkl}: NOTRUN -> [5]SKIP +1 similar issue
>

Yup, because gem_list_engines() had a bug. I have sent a patch:

https://patchwork.freedesktop.org/series/118001/

Failure can be seen here (for reviewers for the above patch):

https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-rkl-1/igt@perf_pmu@frequency@gt0.html

> With this IGT series - https://patchwork.freedesktop.org/series/117406/, we
> do not have igt@perf_pmu@frequency test anymore. It is replaced by
> igt@perf_pmu@frequency@gt0 for all single tile platforms. For non-MTL
> platforms, gem_engine_to_gt_map() should just return 0.
>
> >
> >     * {igt@perf_pmu@rc6-all-gts} (NEW):
> >
> >          * {shard-dg1}: NOTRUN -> [6]SKIP +1 similar issue
> >
> >          * {shard-tglu}: NOTRUN -> [7]SKIP +2 similar issues
>
> These are expected to skip.

Also, Umesh not sure if we need to run premerge CI on your latest rev:

https://patchwork.freedesktop.org/series/117913/

It seems to have got stuck and maybe you need to say 'test again'.

Thanks.
--
Ashutosh

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [igt-dev] ✗ Fi.CI.IGT: failure for PMU: multi-tile support (rev4)
  2023-05-19  8:39     ` Dixit, Ashutosh
@ 2023-05-19 15:55       ` Umesh Nerlige Ramappa
  0 siblings, 0 replies; 24+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-19 15:55 UTC (permalink / raw)
  To: Dixit, Ashutosh; +Cc: igt-dev

On Fri, May 19, 2023 at 01:39:34AM -0700, Dixit, Ashutosh wrote:
>On Thu, 18 May 2023 23:44:03 -0700, Umesh Nerlige Ramappa wrote:
>>
>
>Hi Umesh,
>
>>
>> One of the SKIPs below is not expected,
>>
>> On Fri, May 19, 2023 at 12:13:01AM +0000, Patchwork wrote:
>> >   Patch Details
>> >
>> >   Series:  PMU: multi-tile support (rev4)
>> >   URL:     [1]https://patchwork.freedesktop.org/series/117406/
>> >   State:   failure
>> >   Details: [2]https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html
>> >
>> >         CI Bug Log - changes from CI_DRM_13160_full -> IGTPW_8990_full
>> >
>> > Summary
>> >
>> >   FAILURE
>> >
>> >   Serious unknown changes coming with IGTPW_8990_full absolutely need to be
>> >   verified manually.
>> >
>> >   If you think the reported changes have nothing to do with the changes
>> >   introduced in IGTPW_8990_full, please notify your bug team to allow them
>> >   to document this new failure mode, which will reduce false positives in
>> >   CI.
>> >
>> >   External URL:
>> >   https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/index.html
>> >
>> > Participating hosts (7 -> 7)
>> >
>> >   No changes in participating hosts
>> >
>> > Possible new issues
>> >
>> >   Here are the unknown changes that may have been introduced in
>> >   IGTPW_8990_full:
>> >
>> >  IGT changes
>> >
>> >    Possible regressions
>> >
>> >     * igt@gem_ctx_isolation@preservation-s3@vcs0:
>> >
>> >          * shard-apl: [3]PASS -> [4]ABORT
>> >
>> >     * {igt@perf_pmu@frequency@gt0} (NEW):
>> >
>> >          * {shard-rkl}: NOTRUN -> [5]SKIP +1 similar issue
>>
>
>Yup, because gem_list_engines() had a bug. I have sent a patch:
>
>https://patchwork.freedesktop.org/series/118001/
>
>Failure can be seen here (for reviewers for the above patch):
>
>https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8990/shard-rkl-1/igt@perf_pmu@frequency@gt0.html
>
>> With this IGT series - https://patchwork.freedesktop.org/series/117406/, we
>> do not have igt@perf_pmu@frequency test anymore. It is replaced by
>> igt@perf_pmu@frequency@gt0 for all single tile platforms. For non-MTL
>> platforms, gem_engine_to_gt_map() should just return 0.
>>
>> >
>> >     * {igt@perf_pmu@rc6-all-gts} (NEW):
>> >
>> >          * {shard-dg1}: NOTRUN -> [6]SKIP +1 similar issue
>> >
>> >          * {shard-tglu}: NOTRUN -> [7]SKIP +2 similar issues
>>
>> These are expected to skip.
>
>Also, Umesh not sure if we need to run premerge CI on your latest rev:
>
>https://patchwork.freedesktop.org/series/117913/
>
>It seems to have got stuck and maybe you need to say 'test again'.

Yes, it's stuck. I reposted the IGT (with your patch above) and Kernel 
series for a CI rerun. Hopefully this should do it.

Thanks,
Umesh
>
>Thanks.
>--
>Ashutosh

^ permalink raw reply	[flat|nested] 24+ messages in thread

end of thread, other threads:[~2023-05-19 15:56 UTC | newest]

Thread overview: 24+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-05-17 21:25 [igt-dev] [PATCH i-g-t v2 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 01/15] perf_pmu: Support multi-tile in rc6 subtest Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 02/15] perf_pmu: Two new rc6 subtests Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 03/15] perf_pmu: Support multi-tile in frequency subtest Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 04/15] perf_pmu: Quiesce GPU if measuring idle busyness without spinner Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 05/15] perf_pmu: Use correct pmu config for multi-tile Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 06/15] intel_gpu_top: Add an array of freq and rc6 counters Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 07/15] intel_gpu_top: Determine number of tiles Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 08/15] intel_gpu_top: Capture freq and rc6 counters from each gt Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 09/15] intel_gpu_top: Switch pmu_counter to use aggregated values Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 10/15] intel_gpu_top: Add definitions for gt-specific items and groups Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 11/15] intel_gpu_top: Bump up size of groups to accomodate multi-gt Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 12/15] intel_gpu_top: Increase visibility for class_view Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 13/15] intel_gpu_top: Show gt specific values if requested Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 14/15] intel_gpu_top: Reduce one level of indent Umesh Nerlige Ramappa
2023-05-17 21:25 ` [igt-dev] [PATCH i-g-t v2 15/15] intel_gpu_top: Add gt specific values to header in interactive mode Umesh Nerlige Ramappa
2023-05-17 22:15 ` [igt-dev] ✗ Fi.CI.BAT: failure for PMU: multi-tile support (rev4) Patchwork
2023-05-18 12:04   ` Kamil Konieczny
2023-05-18 12:20     ` Yedireswarapu, SaiX Nandan
2023-05-18 12:19 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2023-05-19  0:13 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
2023-05-19  6:44   ` Umesh Nerlige Ramappa
2023-05-19  8:39     ` Dixit, Ashutosh
2023-05-19 15:55       ` Umesh Nerlige Ramappa

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