* [igt-dev] [PATCH i-g-t 0/2] Add copy basic test to exercise blt commands
@ 2023-08-18 5:19 sai.gowtham.ch
0 siblings, 0 replies; 12+ messages in thread
From: sai.gowtham.ch @ 2023-08-18 5:19 UTC (permalink / raw)
To: igt-dev, sai.gowtham.ch
From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Add copy basic test to exercise copy commands like mem-copy and mem-set.
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Sai Gowtham Ch (2):
lib/intel_reg: Add copy commands in the lib
tests/xe/xe_copy_basic: Add copy basic test to exercise blt commands
lib/intel_mocs.h | 2 +
lib/intel_reg.h | 4 +
tests/meson.build | 1 +
tests/xe/xe_copy_basic.c | 262 +++++++++++++++++++++++++++++++++++++++
4 files changed, 269 insertions(+)
create mode 100644 tests/xe/xe_copy_basic.c
--
2.39.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] Add copy basic test to exercise blt commands
@ 2023-10-03 7:33 sai.gowtham.ch
0 siblings, 0 replies; 12+ messages in thread
From: sai.gowtham.ch @ 2023-10-03 7:33 UTC (permalink / raw)
To: igt-dev, karolina.stolarek, zbigniew.kempczynski, sai.gowtham.ch
From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Add copy basic test which exercies mem-se and mem-copy commands, this
patch series involves in following changes:
1. Add copy basic test to exercise blt commands.
2. Add wrappers for batch preparation and submit exec.
3. Add copy commands MEM_SET_CMD and MEM_COPY_CMD in the lib.
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Sai Gowtham Ch (2):
lib/intel_blt: Add wrappers to prepare batch buffers and submit exec
intel/xe_copy_basic: Add copy basic test to exercise blt commands
lib/intel_blt.c | 195 +++++++++++++++++++++++++++++++++
lib/intel_blt.h | 39 +++++++
lib/intel_reg.h | 4 +
tests/intel/xe_copy_basic.c | 208 ++++++++++++++++++++++++++++++++++++
tests/meson.build | 1 +
5 files changed, 447 insertions(+)
create mode 100644 tests/intel/xe_copy_basic.c
--
2.39.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] Add copy basic test to exercise blt commands
@ 2023-10-13 10:37 sai.gowtham.ch
2023-10-13 10:37 ` [igt-dev] [PATCH i-g-t 1/2] lib/intel_blt: Add wrappers to prepare batch buffers and submit exec sai.gowtham.ch
` (4 more replies)
0 siblings, 5 replies; 12+ messages in thread
From: sai.gowtham.ch @ 2023-10-13 10:37 UTC (permalink / raw)
To: igt-dev, zbigniew.kempczynski, karolina.stolarek, sai.gowtham.ch
From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Add copy basic test which exercies mem-se and mem-copy commands, this
patch series involves in following changes:
1. Add copy basic test to exercise blt commands.
2. Add wrappers for batch preparation and submit exec.
3. Add copy commands MEM_SET_CMD and MEM_COPY_CMD in the lib.
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Sai Gowtham Ch (2):
lib/intel_blt: Add wrappers to prepare batch buffers and submit exec
intel/xe_copy_basic: Add copy basic test to exercise blt commands
lib/intel_blt.c | 199 ++++++++++++++++++++++++++++++++++++
lib/intel_blt.h | 39 +++++++
lib/intel_reg.h | 4 +
tests/intel/xe_copy_basic.c | 195 +++++++++++++++++++++++++++++++++++
tests/meson.build | 1 +
5 files changed, 438 insertions(+)
create mode 100644 tests/intel/xe_copy_basic.c
--
2.39.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [igt-dev] [PATCH i-g-t 1/2] lib/intel_blt: Add wrappers to prepare batch buffers and submit exec
2023-10-13 10:37 [igt-dev] [PATCH i-g-t 0/2] Add copy basic test to exercise blt commands sai.gowtham.ch
@ 2023-10-13 10:37 ` sai.gowtham.ch
2023-10-16 8:54 ` Zbigniew Kempczyński
2023-10-13 10:37 ` [igt-dev] [PATCH i-g-t 2/2] intel/xe_copy_basic: Add copy basic test to exercise blt commands sai.gowtham.ch
` (3 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: sai.gowtham.ch @ 2023-10-13 10:37 UTC (permalink / raw)
To: igt-dev, zbigniew.kempczynski, karolina.stolarek, sai.gowtham.ch
From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Adding wrapper for mem-set and mem-copy instructions to prepare
batch buffers and submit exec, (blt_mem_copy, blt_mem_set,
emit_blt_mem_copy, emit_blt_set_mem)
Cc: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
---
lib/intel_blt.c | 199 ++++++++++++++++++++++++++++++++++++++++++++++++
lib/intel_blt.h | 39 ++++++++++
lib/intel_reg.h | 4 +
3 files changed, 242 insertions(+)
diff --git a/lib/intel_blt.c b/lib/intel_blt.c
index a76c7a404..4e7357b6f 100644
--- a/lib/intel_blt.c
+++ b/lib/intel_blt.c
@@ -13,12 +13,14 @@
#include "igt.h"
#include "igt_syncobj.h"
#include "intel_blt.h"
+#include "intel_mocs.h"
#include "xe/xe_ioctl.h"
#include "xe/xe_query.h"
#include "xe/xe_util.h"
#define BITRANGE(start, end) (end - start + 1)
#define GET_CMDS_INFO(__fd) intel_get_cmds_info(intel_get_drm_devid(__fd))
+#define MEM_COPY_MOCS_SHIFT 25
/* Blitter tiling definitions sanity checks */
static_assert(T_LINEAR == I915_TILING_NONE, "Linear definitions have to match");
@@ -1577,6 +1579,186 @@ int blt_fast_copy(int fd,
return ret;
}
+/**
+ * blt_mem_init:
+ * @fd: drm fd
+ * @mem: structure for initialization
+ *
+ * Function is zeroing @mem and sets fd and driver fields (INTEL_DRIVER_I915 or
+ * INTEL_DRIVER_XE).
+ */
+void blt_mem_init(int fd, struct blt_mem_data *mem)
+{
+ memset(mem, 0, sizeof(*mem));
+
+ mem->fd = fd;
+ mem->driver = get_intel_driver(fd);
+}
+
+static void emit_blt_mem_copy(int fd, uint64_t ahnd, const struct blt_mem_data *mem)
+{
+ uint64_t dst_offset, src_offset, alignment;
+ int i;
+ uint32_t *batch;
+ uint32_t optype;
+
+ alignment = get_default_alignment(fd, mem->driver);
+ src_offset = get_offset(ahnd, mem->src.handle, mem->src.size, alignment);
+ dst_offset = get_offset(ahnd, mem->dst.handle, mem->dst.size, alignment);
+
+ batch = bo_map(fd, mem->bb.handle, mem->bb.size, mem->driver);
+ optype = mem->src.type == M_MATRIX ? 1 << 17 : 0;
+
+ i = 0;
+ batch[i++] = MEM_COPY_CMD | (1 << 19) | optype;
+ batch[i++] = mem->src.width - 1;
+ batch[i++] = mem->src.height - 1;
+ batch[i++] = mem->src.pitch - 1;
+ batch[i++] = mem->dst.pitch - 1;
+ batch[i++] = src_offset;
+ batch[i++] = src_offset << 32;
+ batch[i++] = dst_offset;
+ batch[i++] = dst_offset << 32;
+ batch[i++] = mem->src.mocs << MEM_COPY_MOCS_SHIFT | mem->dst.mocs;
+ batch[i++] = MI_BATCH_BUFFER_END;
+
+ munmap(batch, mem->bb.size);
+}
+
+/**
+ * blt_mem_copy:
+ * @fd: drm fd
+ * @ctx: intel_ctx_t context
+ * @e: blitter engine for @ctx
+ * @ahnd: allocator handle
+ * @blt: blitter data for mem-copy.
+ *
+ * Function does mem blit between @src and @dst described in @blt object.
+ *
+ * Returns:
+ * execbuffer status.
+ */
+int blt_mem_copy(int fd, const intel_ctx_t *ctx,
+ const struct intel_execution_engine2 *e,
+ uint64_t ahnd,
+ const struct blt_mem_data *mem)
+{
+ struct drm_i915_gem_execbuffer2 execbuf = {};
+ struct drm_i915_gem_exec_object2 obj[3] = {};
+ uint64_t dst_offset, src_offset, bb_offset, alignment;
+ int ret;
+
+ alignment = get_default_alignment(fd, mem->driver);
+ src_offset = get_offset(ahnd, mem->src.handle, mem->src.size, alignment);
+ dst_offset = get_offset(ahnd, mem->dst.handle, mem->dst.size, alignment);
+ bb_offset = get_offset(ahnd, mem->bb.handle, mem->bb.size, alignment);
+
+ emit_blt_mem_copy(fd, ahnd, mem);
+
+ if (mem->driver == INTEL_DRIVER_XE) {
+ intel_ctx_xe_exec(ctx, ahnd, CANONICAL(bb_offset));
+ } else {
+ obj[0].offset = CANONICAL(dst_offset);
+ obj[1].offset = CANONICAL(src_offset);
+ obj[2].offset = CANONICAL(bb_offset);
+ obj[0].handle = mem->dst.handle;
+ obj[1].handle = mem->src.handle;
+ obj[2].handle = mem->bb.handle;
+ obj[0].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE |
+ EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+ obj[1].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+ obj[2].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+ execbuf.buffer_count = 3;
+ execbuf.buffers_ptr = to_user_pointer(obj);
+ execbuf.rsvd1 = ctx ? ctx->id : 0;
+ execbuf.flags = e ? e->flags : I915_EXEC_BLT;
+ ret = __gem_execbuf(fd, &execbuf);
+ put_offset(ahnd, mem->dst.handle);
+ put_offset(ahnd, mem->src.handle);
+ put_offset(ahnd, mem->bb.handle);
+ }
+
+ return ret;
+}
+
+static void emit_blt_mem_set(int fd, uint64_t ahnd, const struct blt_mem_data *mem,
+ uint8_t fill_data)
+{
+ uint64_t dst_offset, alignment;
+ int b;
+ uint32_t *batch;
+ uint32_t value;
+
+ alignment = get_default_alignment(fd, mem->driver);
+ dst_offset = get_offset(ahnd, mem->dst.handle, mem->dst.size, alignment);
+
+ batch = bo_map(fd, mem->bb.handle, mem->bb.size, mem->driver);
+ value = (uint32_t)fill_data << 24;
+
+ b = 0;
+ batch[b++] = MEM_SET_CMD;
+ batch[b++] = mem->dst.width - 1;
+ batch[b++] = mem->dst.height - 1;
+ batch[b++] = mem->dst.pitch - 1;
+ batch[b++] = dst_offset;
+ batch[b++] = dst_offset << 32;
+ batch[b++] = value | mem->dst.mocs;
+ batch[b++] = MI_BATCH_BUFFER_END;
+
+ munmap(batch, mem->bb.size);
+}
+/**
+ * blt_mem_set:
+ * @fd: drm fd
+ * @ctx: intel_ctx_t context
+ * @e: blitter engine for @ctx
+ * @ahnd: allocator handle
+ * @blt: blitter data for mem-set.
+ *
+ * Function does mem set blit in described @blt object.
+ *
+ * Returns:
+ * execbuffer status.
+ */
+int blt_mem_set(int fd, const intel_ctx_t *ctx,
+ const struct intel_execution_engine2 *e,
+ uint64_t ahnd,
+ const struct blt_mem_data *mem,
+ uint8_t fill_data)
+{
+ struct drm_i915_gem_execbuffer2 execbuf = {};
+ struct drm_i915_gem_exec_object2 obj[2] = {};
+ uint64_t dst_offset, bb_offset, alignment;
+ int ret;
+
+ alignment = get_default_alignment(fd, mem->driver);
+ dst_offset = get_offset(ahnd, mem->dst.handle, mem->dst.size, alignment);
+ bb_offset = get_offset(ahnd, mem->bb.handle, mem->bb.size, alignment);
+
+ emit_blt_mem_set(fd, ahnd, mem, fill_data);
+
+ if (mem->driver == INTEL_DRIVER_XE) {
+ intel_ctx_xe_exec(ctx, ahnd, CANONICAL(bb_offset));
+ } else {
+ obj[0].offset = CANONICAL(dst_offset);
+ obj[1].offset = CANONICAL(bb_offset);
+ obj[0].handle = mem->dst.handle;
+ obj[1].handle = mem->bb.handle;
+ obj[0].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE |
+ EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+ obj[1].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+ execbuf.buffer_count = 2;
+ execbuf.buffers_ptr = to_user_pointer(obj);
+ execbuf.rsvd1 = ctx ? ctx->id : 0;
+ execbuf.flags = e ? e->flags : I915_EXEC_BLT;
+ ret = __gem_execbuf(fd, &execbuf);
+ put_offset(ahnd, mem->dst.handle);
+ put_offset(ahnd, mem->bb.handle);
+ }
+
+ return ret;
+}
+
void blt_set_geom(struct blt_copy_object *obj, uint32_t pitch,
int16_t x1, int16_t y1, int16_t x2, int16_t y2,
uint16_t x_offset, uint16_t y_offset)
@@ -1659,6 +1841,23 @@ void blt_set_object(struct blt_copy_object *obj,
obj->compression_type = compression_type;
}
+void blt_set_mem_object(struct blt_mem_object *obj,
+ uint32_t handle, uint64_t size, uint32_t pitch,
+ uint32_t width, uint32_t height, uint32_t region,
+ uint8_t mocs, enum blt_memop_type type,
+ enum blt_compression compression)
+{
+ obj->handle = handle;
+ obj->region = region;
+ obj->size = size;
+ obj->mocs = mocs;
+ obj->type = type;
+ obj->compression = compression;
+ obj->width = width;
+ obj->height = height;
+ obj->pitch = pitch;
+}
+
void blt_set_object_ext(struct blt_block_copy_object_ext *obj,
uint8_t compression_format,
uint16_t surface_width, uint16_t surface_height,
diff --git a/lib/intel_blt.h b/lib/intel_blt.h
index 7b4271620..d6f40680d 100644
--- a/lib/intel_blt.h
+++ b/lib/intel_blt.h
@@ -93,6 +93,19 @@ struct blt_copy_object {
uint32_t plane_offset;
};
+struct blt_mem_object {
+ uint32_t handle;
+ uint32_t region;
+ uint64_t size;
+ uint8_t mocs;
+ enum blt_memop_type type;
+ enum blt_compression compression;
+ uint32_t width;
+ uint32_t height;
+ uint32_t pitch;
+ uint32_t *ptr;
+};
+
struct blt_copy_batch {
uint32_t handle;
uint32_t region;
@@ -112,6 +125,14 @@ struct blt_copy_data {
bool print_bb;
};
+struct blt_mem_data {
+ int fd;
+ enum intel_driver driver;
+ struct blt_mem_object src;
+ struct blt_mem_object dst;
+ struct blt_copy_batch bb;
+};
+
enum blt_surface_type {
SURFACE_TYPE_1D,
SURFACE_TYPE_2D,
@@ -231,6 +252,17 @@ int blt_fast_copy(int fd,
uint64_t ahnd,
const struct blt_copy_data *blt);
+void blt_mem_init(int fd, struct blt_mem_data *mem);
+
+int blt_mem_copy(int fd, const intel_ctx_t *ctx,
+ const struct intel_execution_engine2 *e,
+ uint64_t ahnd,
+ const struct blt_mem_data *mem);
+
+int blt_mem_set(int fd, const intel_ctx_t *ctx,
+ const struct intel_execution_engine2 *e, uint64_t ahnd,
+ const struct blt_mem_data *mem, uint8_t fill_data);
+
void blt_set_geom(struct blt_copy_object *obj, uint32_t pitch,
int16_t x1, int16_t y1, int16_t x2, int16_t y2,
uint16_t x_offset, uint16_t y_offset);
@@ -250,6 +282,13 @@ void blt_set_object(struct blt_copy_object *obj,
uint8_t mocs_index, enum blt_tiling_type tiling,
enum blt_compression compression,
enum blt_compression_type compression_type);
+
+void blt_set_mem_object(struct blt_mem_object *obj,
+ uint32_t handle, uint64_t size, uint32_t pitch,
+ uint32_t width, uint32_t height, uint32_t region,
+ uint8_t mocs, enum blt_memop_type type,
+ enum blt_compression compression);
+
void blt_set_object_ext(struct blt_block_copy_object_ext *obj,
uint8_t compression_format,
uint16_t surface_width, uint16_t surface_height,
diff --git a/lib/intel_reg.h b/lib/intel_reg.h
index ea463376b..a8190d683 100644
--- a/lib/intel_reg.h
+++ b/lib/intel_reg.h
@@ -2588,6 +2588,10 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define XY_FAST_COPY_COLOR_DEPTH_64 (4 << 24)
#define XY_FAST_COPY_COLOR_DEPTH_128 (5 << 24)
+/* RAW memory commands */
+#define MEM_COPY_CMD ((0x2 << 29)|(0x5a << 22)|0x8)
+#define MEM_SET_CMD ((0x2 << 29)|(0x5b << 22)|0x5)
+
#define CTXT_NO_RESTORE (1)
#define CTXT_PALETTE_SAVE_DISABLE (1<<3)
#define CTXT_PALETTE_RESTORE_DISABLE (1<<2)
--
2.39.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] intel/xe_copy_basic: Add copy basic test to exercise blt commands
2023-10-13 10:37 [igt-dev] [PATCH i-g-t 0/2] Add copy basic test to exercise blt commands sai.gowtham.ch
2023-10-13 10:37 ` [igt-dev] [PATCH i-g-t 1/2] lib/intel_blt: Add wrappers to prepare batch buffers and submit exec sai.gowtham.ch
@ 2023-10-13 10:37 ` sai.gowtham.ch
2023-10-16 9:14 ` Zbigniew Kempczyński
2023-10-13 14:06 ` [igt-dev] ✓ Fi.CI.BAT: success for Add copy basic test to exercise blt commands (rev6) Patchwork
` (2 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: sai.gowtham.ch @ 2023-10-13 10:37 UTC (permalink / raw)
To: igt-dev, zbigniew.kempczynski, karolina.stolarek, sai.gowtham.ch
From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Add copy basic test to exercise copy commands like mem-copy and mem-set.
Cc: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
---
tests/intel/xe_copy_basic.c | 195 ++++++++++++++++++++++++++++++++++++
tests/meson.build | 1 +
2 files changed, 196 insertions(+)
create mode 100644 tests/intel/xe_copy_basic.c
diff --git a/tests/intel/xe_copy_basic.c b/tests/intel/xe_copy_basic.c
new file mode 100644
index 000000000..83b5ce123
--- /dev/null
+++ b/tests/intel/xe_copy_basic.c
@@ -0,0 +1,195 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ *
+ * Authors:
+ * Sai Gowtham Ch <sai.gowtham.ch@intel.com>
+ */
+
+#include "igt.h"
+#include "lib/igt_syncobj.h"
+#include "intel_blt.h"
+#include "lib/intel_cmds_info.h"
+#include "lib/intel_mocs.h"
+#include "lib/intel_reg.h"
+#include "xe/xe_ioctl.h"
+#include "xe/xe_query.h"
+#include "xe/xe_util.h"
+
+#define MEM_FILL 0x8b
+
+/**
+ * TEST: Test to validate copy commands on xe
+ * Category: Software building block
+ * Sub-category: Copy
+ * Functionality: blitter
+ */
+
+/**
+ * SUBTEST: mem-copy-%s
+ * Description: Test validates MEM_COPY command, it takes various
+ * parameters needed for the filling batch buffer for MEM_COPY command
+ * with size %arg[1].
+ * Test category: functionality test
+ *
+ * arg[1]:
+ * @0x369: 0x369
+ * @0x3fff: 0x3fff
+ * @0xfd: 0xfd
+ * @0xfffe: 0xfffe
+ */
+static void
+mem_copy(int fd, uint32_t src_handle, uint32_t dst_handle,
+ const intel_ctx_t *ctx, uint32_t size, uint32_t width,
+ uint32_t height, uint32_t region)
+{
+ struct blt_mem_data mem = {};
+ uint64_t bb_size = xe_get_default_alignment(fd);
+ uint64_t ahnd = intel_allocator_open_full(fd, ctx->vm, 0, 0,
+ INTEL_ALLOCATOR_SIMPLE,
+ ALLOC_STRATEGY_LOW_TO_HIGH, 0);
+ uint32_t bb;
+ int result;
+ uint8_t src_mocs = intel_get_uc_mocs_index(fd);
+ uint8_t dst_mocs = src_mocs;
+
+ bb = xe_bo_create_flags(fd, 0, bb_size, region);
+
+ blt_mem_init(fd, &mem);
+ blt_set_mem_object(&mem.src, src_handle, size, 0, width, height,
+ region, src_mocs, M_LINEAR, COMPRESSION_DISABLED);
+ blt_set_mem_object(&mem.dst, dst_handle, size, 0, width, height,
+ region, dst_mocs, M_LINEAR, COMPRESSION_DISABLED);
+ mem.src.ptr = xe_bo_map(fd, src_handle, size);
+ mem.dst.ptr = xe_bo_map(fd, dst_handle, size);
+
+ blt_set_batch(&mem.bb, bb, bb_size, region);
+ igt_assert(mem.src.width == mem.dst.width);
+
+ blt_mem_copy(fd, ctx, NULL, ahnd, &mem);
+ result = memcmp(mem.src.ptr, mem.dst.ptr, mem.src.size);
+ igt_assert_f(!result, "source and destination differ\n");
+
+ intel_allocator_bind(ahnd, 0, 0);
+ munmap(mem.src.ptr, size);
+ munmap(mem.dst.ptr, size);
+ gem_close(fd, bb);
+ put_ahnd(ahnd);
+}
+
+/**
+ * SUBTEST: mem-set-%s
+ * Description: Test validates MEM_SET command with size %arg[1].
+ * Test category: functionality test
+ *
+ * arg[1]:
+ *
+ * @0x369: 0x369
+ * @0x3fff: 0x3fff
+ * @0xfd: 0xfd
+ * @0xfffe: 0xfffe
+ */
+static void mem_set(int fd, uint32_t dst_handle, const intel_ctx_t *ctx,
+ uint32_t size, uint32_t width, uint32_t height,
+ uint8_t fill_data, uint32_t region)
+{
+ struct blt_mem_data mem = {};
+ uint64_t bb_size = xe_get_default_alignment(fd);
+ uint64_t ahnd = intel_allocator_open_full(fd, ctx->vm, 0, 0,
+ INTEL_ALLOCATOR_SIMPLE,
+ ALLOC_STRATEGY_LOW_TO_HIGH, 0);
+ uint32_t bb;
+ uint8_t *result;
+ uint8_t dst_mocs = intel_get_uc_mocs_index(fd);
+
+ bb = xe_bo_create_flags(fd, 0, bb_size, region);
+ blt_mem_init(fd, &mem);
+ blt_set_mem_object(&mem.dst, dst_handle, size, 0, width, height, region,
+ dst_mocs, M_LINEAR, COMPRESSION_DISABLED);
+ mem.dst.ptr = xe_bo_map(fd, dst_handle, size);
+ blt_set_batch(&mem.bb, bb, bb_size, region);
+ blt_mem_set(fd, ctx, NULL, ahnd, &mem, fill_data);
+
+ result = (uint8_t *)mem.dst.ptr;
+
+ igt_assert(result[0] == fill_data);
+ igt_assert(result[width - 1] == fill_data);
+ igt_assert(result[width] != fill_data);
+
+ intel_allocator_bind(ahnd, 0, 0);
+ munmap(mem.dst.ptr, size);
+ gem_close(fd, bb);
+ put_ahnd(ahnd);
+}
+
+static void copy_test(int fd, uint32_t size, enum blt_cmd_type cmd, uint32_t region)
+{
+ struct drm_xe_engine_class_instance inst = {
+ .engine_class = DRM_XE_ENGINE_CLASS_COPY,
+ };
+ uint32_t src_handle, dst_handle, vm, exec_queue, src_size, dst_size;
+ uint32_t bo_size = ALIGN(size + xe_cs_prefetch_size(fd), xe_get_default_alignment(fd));
+ const intel_ctx_t *ctx;
+
+ src_handle = xe_bo_create_flags(fd, 0, bo_size, region);
+ dst_handle = xe_bo_create_flags(fd, 0, bo_size, region);
+ vm = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
+ exec_queue = xe_exec_queue_create(fd, vm, &inst, 0);
+ ctx = intel_ctx_xe(fd, vm, exec_queue, 0, 0, 0);
+
+ src_size = bo_size;
+ dst_size = bo_size;
+
+ if (cmd == MEM_COPY) {
+ mem_copy(fd, src_handle, dst_handle, ctx, src_size, size,
+ 1, region);
+ } else if (cmd == MEM_SET) {
+ mem_set(fd, dst_handle, ctx, dst_size, size, 1, MEM_FILL,
+ region);
+ }
+
+ gem_close(fd, src_handle);
+ gem_close(fd, dst_handle);
+ xe_exec_queue_destroy(fd, exec_queue);
+ xe_vm_destroy(fd, vm);
+}
+
+igt_main
+{
+ int fd;
+ struct igt_collection *set, *regions;
+ uint32_t region;
+ uint64_t size[] = {0xFD, 0x369, 0x3FFF, 0xfffe};
+
+ igt_fixture {
+ fd = drm_open_driver(DRIVER_XE);
+ xe_device_get(fd);
+ set = xe_get_memory_region_set(fd,
+ XE_MEM_REGION_CLASS_SYSMEM,
+ XE_MEM_REGION_CLASS_VRAM);
+ }
+
+ for (int i = 0; i < ARRAY_SIZE(size); i++) {
+ igt_subtest_f("mem-copy-0x%lx", size[i]) {
+ igt_require(blt_has_mem_copy(fd));
+ for_each_variation_r(regions, 1, set) {
+ region = igt_collection_get_value(regions, 0);
+ copy_test(fd, size[i], MEM_COPY, region);
+ }
+ }
+ }
+
+ for (int i = 0; i < ARRAY_SIZE(size); i++) {
+ igt_subtest_f("mem-set-0x%lx", size[i]) {
+ igt_require(blt_has_mem_set(fd));
+ for_each_variation_r(regions, 1, set) {
+ region = igt_collection_get_value(regions, 0);
+ copy_test(fd, size[i], MEM_SET, region);
+ }
+ }
+ }
+
+ igt_fixture {
+ drm_close_driver(fd);
+ }
+}
diff --git a/tests/meson.build b/tests/meson.build
index 2c2e1ca9a..5b19994f7 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -275,6 +275,7 @@ intel_xe_progs = [
'xe_ccs',
'xe_create',
'xe_compute',
+ 'xe_copy_basic',
'xe_dma_buf_sync',
'xe_debugfs',
'xe_drm_fdinfo',
--
2.39.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Add copy basic test to exercise blt commands (rev6)
2023-10-13 10:37 [igt-dev] [PATCH i-g-t 0/2] Add copy basic test to exercise blt commands sai.gowtham.ch
2023-10-13 10:37 ` [igt-dev] [PATCH i-g-t 1/2] lib/intel_blt: Add wrappers to prepare batch buffers and submit exec sai.gowtham.ch
2023-10-13 10:37 ` [igt-dev] [PATCH i-g-t 2/2] intel/xe_copy_basic: Add copy basic test to exercise blt commands sai.gowtham.ch
@ 2023-10-13 14:06 ` Patchwork
2023-10-13 14:44 ` [igt-dev] ✓ CI.xeBAT: " Patchwork
2023-10-14 16:05 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2023-10-13 14:06 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 13104 bytes --]
== Series Details ==
Series: Add copy basic test to exercise blt commands (rev6)
URL : https://patchwork.freedesktop.org/series/122615/
State : success
== Summary ==
CI Bug Log - changes from IGT_7536 -> IGTPW_9998
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/index.html
Participating hosts (38 -> 40)
------------------------------
Additional (3): fi-kbl-soraka bat-dg2-8 bat-dg2-9
Missing (1): fi-snb-2520m
Known issues
------------
Here are the changes found in IGTPW_9998 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613]) +3 other tests skip
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@random-engines:
- fi-bsw-n3050: NOTRUN -> [SKIP][3] ([fdo#109271]) +18 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/fi-bsw-n3050/igt@gem_lmem_swapping@random-engines.html
* igt@gem_mmap@basic:
- bat-dg2-9: NOTRUN -> [SKIP][4] ([i915#4083])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@gem_mmap@basic.html
- bat-dg2-8: NOTRUN -> [SKIP][5] ([i915#4083])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@gem_mmap@basic.html
* igt@gem_mmap_gtt@basic:
- bat-dg2-9: NOTRUN -> [SKIP][6] ([i915#4077]) +2 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@gem_mmap_gtt@basic.html
- bat-dg2-8: NOTRUN -> [SKIP][7] ([i915#4077]) +2 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@gem_mmap_gtt@basic.html
* igt@gem_render_tiled_blits@basic:
- bat-dg2-9: NOTRUN -> [SKIP][8] ([i915#4079]) +1 other test skip
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@gem_render_tiled_blits@basic.html
* igt@gem_tiled_pread_basic:
- bat-dg2-8: NOTRUN -> [SKIP][9] ([i915#4079]) +1 other test skip
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rps@basic-api:
- bat-dg2-9: NOTRUN -> [SKIP][10] ([i915#6621])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@i915_pm_rps@basic-api.html
- bat-dg2-8: NOTRUN -> [SKIP][11] ([i915#6621])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@i915_pm_rps@basic-api.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][12] ([i915#1886])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-dg2-8: NOTRUN -> [SKIP][13] ([i915#6645])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-dg2-9: NOTRUN -> [SKIP][14] ([i915#5190])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-dg2-8: NOTRUN -> [SKIP][15] ([i915#5190])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg2-9: NOTRUN -> [SKIP][16] ([i915#4215] / [i915#5190])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@kms_addfb_basic@basic-y-tiled-legacy.html
- bat-dg2-8: NOTRUN -> [SKIP][17] ([i915#4215] / [i915#5190])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@framebuffer-vs-set-tiling:
- bat-dg2-9: NOTRUN -> [SKIP][18] ([i915#4212]) +6 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html
- bat-dg2-8: NOTRUN -> [SKIP][19] ([i915#4212]) +6 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html
* igt@kms_addfb_basic@tile-pitch-mismatch:
- bat-dg2-9: NOTRUN -> [SKIP][20] ([i915#4212] / [i915#5608])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@kms_addfb_basic@tile-pitch-mismatch.html
- bat-dg2-8: NOTRUN -> [SKIP][21] ([i915#4212] / [i915#5608])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@kms_addfb_basic@tile-pitch-mismatch.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-dg2-9: NOTRUN -> [SKIP][22] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
- bat-dg2-8: NOTRUN -> [SKIP][23] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][24] ([fdo#109271]) +9 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/fi-kbl-soraka/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-dg2-9: NOTRUN -> [SKIP][25] ([fdo#109285])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@kms_force_connector_basic@force-load-detect.html
- bat-dg2-8: NOTRUN -> [SKIP][26] ([fdo#109285])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-dg2-9: NOTRUN -> [SKIP][27] ([i915#5274])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@kms_force_connector_basic@prune-stale-modes.html
- bat-dg2-8: NOTRUN -> [SKIP][28] ([i915#5274])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][29] -> [FAIL][30] ([IGT#3])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/fi-kbl-guc/igt@kms_hdmi_inject@inject-audio.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/fi-kbl-guc/igt@kms_hdmi_inject@inject-audio.html
- fi-bsw-n3050: NOTRUN -> [FAIL][31] ([IGT#3])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/fi-bsw-n3050/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_psr@cursor_plane_move:
- bat-dg2-8: NOTRUN -> [SKIP][32] ([i915#1072]) +3 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@kms_psr@cursor_plane_move.html
* igt@kms_psr@sprite_plane_onoff:
- bat-dg2-9: NOTRUN -> [SKIP][33] ([i915#1072]) +3 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@kms_psr@sprite_plane_onoff.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-dg2-9: NOTRUN -> [SKIP][34] ([i915#3555] / [i915#4098])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@kms_setmode@basic-clone-single-crtc.html
- bat-dg2-8: NOTRUN -> [SKIP][35] ([i915#3555] / [i915#4098])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-dg2-9: NOTRUN -> [SKIP][36] ([i915#3708])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@prime_vgem@basic-fence-flip.html
- bat-dg2-8: NOTRUN -> [SKIP][37] ([i915#3708])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-mmap:
- bat-dg2-8: NOTRUN -> [SKIP][38] ([i915#3708] / [i915#4077]) +1 other test skip
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@prime_vgem@basic-fence-mmap.html
- bat-dg2-9: NOTRUN -> [SKIP][39] ([i915#3708] / [i915#4077]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-write:
- bat-dg2-9: NOTRUN -> [SKIP][40] ([i915#3291] / [i915#3708]) +2 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-9/igt@prime_vgem@basic-write.html
- bat-dg2-8: NOTRUN -> [SKIP][41] ([i915#3291] / [i915#3708]) +2 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-8/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* igt@kms_chamelium_edid@hdmi-edid-read:
- {bat-dg2-13}: [DMESG-WARN][42] ([i915#7952]) -> [PASS][43]
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/bat-dg2-13/igt@kms_chamelium_edid@hdmi-edid-read.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-dg2-13/igt@kms_chamelium_edid@hdmi-edid-read.html
* igt@kms_flip@basic-flip-vs-modeset@a-dp1:
- bat-adlp-9: [FAIL][44] -> [PASS][45]
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/bat-adlp-9/igt@kms_flip@basic-flip-vs-modeset@a-dp1.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-adlp-9/igt@kms_flip@basic-flip-vs-modeset@a-dp1.html
* igt@kms_flip@basic-flip-vs-modeset@c-dp1:
- bat-adlp-9: [FAIL][46] ([i915#6121]) -> [PASS][47] +2 other tests pass
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/bat-adlp-9/igt@kms_flip@basic-flip-vs-modeset@c-dp1.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/bat-adlp-9/igt@kms_flip@basic-flip-vs-modeset@c-dp1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5608]: https://gitlab.freedesktop.org/drm/intel/issues/5608
[i915#6121]: https://gitlab.freedesktop.org/drm/intel/issues/6121
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#7952]: https://gitlab.freedesktop.org/drm/intel/issues/7952
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7536 -> IGTPW_9998
CI-20190529: 20190529
CI_DRM_13752: 6e58c5478b3011e16f563b812da45ce47853bb6c @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9998: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/index.html
IGT_7536: fdd51d526a9a7cb875cfad2641e90a72af392d98 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Testlist changes
----------------
+igt@xe_copy_basic@mem-copy-0x3fff
+igt@xe_copy_basic@mem-copy-0x369
+igt@xe_copy_basic@mem-copy-0xfd
+igt@xe_copy_basic@mem-copy-0xfffe
+igt@xe_copy_basic@mem-set-0x3fff
+igt@xe_copy_basic@mem-set-0x369
+igt@xe_copy_basic@mem-set-0xfd
+igt@xe_copy_basic@mem-set-0xfffe
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/index.html
[-- Attachment #2: Type: text/html, Size: 16906 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* [igt-dev] ✓ CI.xeBAT: success for Add copy basic test to exercise blt commands (rev6)
2023-10-13 10:37 [igt-dev] [PATCH i-g-t 0/2] Add copy basic test to exercise blt commands sai.gowtham.ch
` (2 preceding siblings ...)
2023-10-13 14:06 ` [igt-dev] ✓ Fi.CI.BAT: success for Add copy basic test to exercise blt commands (rev6) Patchwork
@ 2023-10-13 14:44 ` Patchwork
2023-10-14 16:05 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2023-10-13 14:44 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 2145 bytes --]
== Series Details ==
Series: Add copy basic test to exercise blt commands (rev6)
URL : https://patchwork.freedesktop.org/series/122615/
State : success
== Summary ==
CI Bug Log - changes from XEIGT_7536_BAT -> XEIGTPW_9998_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in XEIGTPW_9998_BAT that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
- bat-adlp-7: [FAIL][1] ([Intel XE#480]) -> [PASS][2] +1 other test pass
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7536/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_9998/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
* igt@xe_exec_reset@virtual-close-fd-no-exec:
- bat-pvc-2: [DMESG-WARN][3] ([Intel XE#696]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7536/bat-pvc-2/igt@xe_exec_reset@virtual-close-fd-no-exec.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_9998/bat-pvc-2/igt@xe_exec_reset@virtual-close-fd-no-exec.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#480]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/480
[Intel XE#524]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/524
[Intel XE#696]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/696
Build changes
-------------
* IGT: IGT_7536 -> IGTPW_9998
IGTPW_9998: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/index.html
IGT_7536: fdd51d526a9a7cb875cfad2641e90a72af392d98 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-433-037b6c8b23818fa71223e996c68a4f55f2d91338: 037b6c8b23818fa71223e996c68a4f55f2d91338
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_9998/index.html
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for Add copy basic test to exercise blt commands (rev6)
2023-10-13 10:37 [igt-dev] [PATCH i-g-t 0/2] Add copy basic test to exercise blt commands sai.gowtham.ch
` (3 preceding siblings ...)
2023-10-13 14:44 ` [igt-dev] ✓ CI.xeBAT: " Patchwork
@ 2023-10-14 16:05 ` Patchwork
4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2023-10-14 16:05 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 88995 bytes --]
== Series Details ==
Series: Add copy basic test to exercise blt commands (rev6)
URL : https://patchwork.freedesktop.org/series/122615/
State : success
== Summary ==
CI Bug Log - changes from IGT_7536_full -> IGTPW_9998_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/index.html
Participating hosts (10 -> 9)
------------------------------
Missing (1): shard-rkl0
New tests
---------
New tests have been introduced between IGT_7536_full and IGTPW_9998_full:
### New IGT tests (120) ###
* igt@kms_atomic_interruptible@legacy-cursor@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_atomic_interruptible@legacy-setmode@pipe-a-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-linear-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-linear-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-linear-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-x-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-x-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-x-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-rc-ccs-cc-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-rc-ccs-cc-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-rc-ccs-cc-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-rc-ccs-cc-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-rc-ccs-cc-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-rc-ccs-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-rc-ccs-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-rc-ccs-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-rc-ccs-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-rc-ccs-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-3-y-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-linear-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-linear-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-linear-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-x-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-x-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-x-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-rc-ccs-cc-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-rc-ccs-cc-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-rc-ccs-cc-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-rc-ccs-cc-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-rc-ccs-cc-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-rc-ccs-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-rc-ccs-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-rc-ccs-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-rc-ccs-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-rc-ccs-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-3-y-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-linear-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-linear-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-linear-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-x-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-x-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-x-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-rc-ccs-cc-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-rc-ccs-cc-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-rc-ccs-cc-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-rc-ccs-cc-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-rc-ccs-cc-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-rc-ccs-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-rc-ccs-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-rc-ccs-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-rc-ccs-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-rc-ccs-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-3-y-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-linear-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-linear-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-linear-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-x-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-x-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-x-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-rc-ccs-cc-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-rc-ccs-cc-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-rc-ccs-cc-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-rc-ccs-cc-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-rc-ccs-cc-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-rc-ccs-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-rc-ccs-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-rc-ccs-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-rc-ccs-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-rc-ccs-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-to-y-rc-ccs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-3-y-to-y-rc-ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@bad-hsync-end@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@bad-hsync-end@pipe-b-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@bad-hsync-end@pipe-c-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@bad-hsync-end@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@bad-hsync-start@pipe-a-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@bad-hsync-start@pipe-b-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@bad-hsync-start@pipe-c-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@bad-hsync-start@pipe-d-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@bad-vsync-end@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@bad-vsync-end@pipe-b-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@bad-vsync-end@pipe-c-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@bad-vsync-end@pipe-d-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@int-max-clock@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@int-max-clock@pipe-b-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@int-max-clock@pipe-c-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@int-max-clock@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@uint-max-clock@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@uint-max-clock@pipe-b-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@uint-max-clock@pipe-c-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@uint-max-clock@pipe-d-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@zero-hdisplay@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@zero-hdisplay@pipe-b-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@zero-hdisplay@pipe-c-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_invalid_mode@zero-hdisplay@pipe-d-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_sequence@get-forked-busy@pipe-a-hdmi-a-3:
- Statuses : 2 pass(s)
- Exec time: [0.0] s
* igt@kms_sequence@get-forked-busy@pipe-b-hdmi-a-3:
- Statuses : 2 pass(s)
- Exec time: [0.0] s
* igt@kms_sequence@get-forked-busy@pipe-c-hdmi-a-3:
- Statuses : 2 pass(s)
- Exec time: [0.0] s
* igt@kms_sequence@get-forked-busy@pipe-d-hdmi-a-3:
- Statuses : 2 pass(s)
- Exec time: [0.0] s
* igt@kms_sequence@queue-busy@pipe-a-vga-1:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_sequence@queue-busy@pipe-b-vga-1:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_sequence@queue-idle@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_sequence@queue-idle@pipe-b-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_sequence@queue-idle@pipe-c-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_sequence@queue-idle@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in IGTPW_9998_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@blit-reloc-keep-cache:
- shard-dg2: NOTRUN -> [SKIP][1] ([i915#8411])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@api_intel_bb@blit-reloc-keep-cache.html
- shard-dg1: NOTRUN -> [SKIP][2] ([i915#8411])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-15/igt@api_intel_bb@blit-reloc-keep-cache.html
* igt@device_reset@unbind-cold-reset-rebind:
- shard-mtlp: NOTRUN -> [SKIP][3] ([i915#7701])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-4/igt@device_reset@unbind-cold-reset-rebind.html
* igt@drm_fdinfo@busy@ccs0:
- shard-dg2: NOTRUN -> [SKIP][4] ([i915#8414]) +9 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-1/igt@drm_fdinfo@busy@ccs0.html
* igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- shard-rkl: [PASS][5] -> [FAIL][6] ([i915#7742])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-rkl-2/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-2/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
* igt@drm_fdinfo@virtual-busy-all:
- shard-dg1: NOTRUN -> [SKIP][7] ([i915#8414])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-13/igt@drm_fdinfo@virtual-busy-all.html
* igt@drm_fdinfo@virtual-busy-hang-all:
- shard-mtlp: NOTRUN -> [SKIP][8] ([i915#8414]) +6 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-3/igt@drm_fdinfo@virtual-busy-hang-all.html
* igt@gem_busy@semaphore:
- shard-dg2: NOTRUN -> [SKIP][9] ([i915#3936])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-3/igt@gem_busy@semaphore.html
* igt@gem_ccs@ctrl-surf-copy-new-ctx:
- shard-rkl: NOTRUN -> [SKIP][10] ([i915#4098] / [i915#9323])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-2/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
- shard-dg1: NOTRUN -> [SKIP][11] ([i915#9323])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-14/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-rkl: [PASS][12] -> [FAIL][13] ([i915#6268])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-rkl-7/igt@gem_ctx_exec@basic-nohangcheck.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-2/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_ctx_persistence@hang:
- shard-dg2: NOTRUN -> [SKIP][14] ([i915#8555])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@gem_ctx_persistence@hang.html
* igt@gem_ctx_sseu@invalid-args:
- shard-mtlp: NOTRUN -> [SKIP][15] ([i915#280])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-2/igt@gem_ctx_sseu@invalid-args.html
* igt@gem_ctx_sseu@mmap-args:
- shard-dg2: NOTRUN -> [SKIP][16] ([i915#280])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-3/igt@gem_ctx_sseu@mmap-args.html
* igt@gem_eio@kms:
- shard-dg1: NOTRUN -> [FAIL][17] ([i915#5784])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-14/igt@gem_eio@kms.html
* igt@gem_eio@reset-stress:
- shard-dg2: [PASS][18] -> [FAIL][19] ([i915#5784])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-dg2-11/igt@gem_eio@reset-stress.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-3/igt@gem_eio@reset-stress.html
* igt@gem_exec_balancer@bonded-dual:
- shard-mtlp: NOTRUN -> [SKIP][20] ([i915#4771])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-8/igt@gem_exec_balancer@bonded-dual.html
* igt@gem_exec_balancer@bonded-false-hang:
- shard-mtlp: NOTRUN -> [SKIP][21] ([i915#4812])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-1/igt@gem_exec_balancer@bonded-false-hang.html
* igt@gem_exec_balancer@bonded-sync:
- shard-dg2: NOTRUN -> [SKIP][22] ([i915#4771])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@gem_exec_balancer@bonded-sync.html
* igt@gem_exec_balancer@parallel-balancer:
- shard-rkl: NOTRUN -> [SKIP][23] ([i915#4525])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-1/igt@gem_exec_balancer@parallel-balancer.html
* igt@gem_exec_balancer@sliced:
- shard-dg2: NOTRUN -> [SKIP][24] ([i915#4812]) +1 other test skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@gem_exec_balancer@sliced.html
* igt@gem_exec_fair@basic-pace:
- shard-dg1: NOTRUN -> [SKIP][25] ([i915#3539])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-13/igt@gem_exec_fair@basic-pace.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-rkl: [PASS][26] -> [FAIL][27] ([i915#2842])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-rkl-4/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-4/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fence@parallel@vcs0:
- shard-mtlp: [PASS][28] -> [FAIL][29] ([i915#8758])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-2/igt@gem_exec_fence@parallel@vcs0.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-4/igt@gem_exec_fence@parallel@vcs0.html
* igt@gem_exec_fence@parallel@vcs1:
- shard-mtlp: [PASS][30] -> [DMESG-WARN][31] ([i915#8962]) +1 other test dmesg-warn
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-2/igt@gem_exec_fence@parallel@vcs1.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-4/igt@gem_exec_fence@parallel@vcs1.html
* igt@gem_exec_fence@parallel@vecs0:
- shard-mtlp: [PASS][32] -> [FAIL][33] ([i915#8957]) +1 other test fail
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-2/igt@gem_exec_fence@parallel@vecs0.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-4/igt@gem_exec_fence@parallel@vecs0.html
* igt@gem_exec_flush@basic-uc-prw-default:
- shard-dg2: NOTRUN -> [SKIP][34] ([i915#3539]) +1 other test skip
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@gem_exec_flush@basic-uc-prw-default.html
* igt@gem_exec_flush@basic-wb-pro-default:
- shard-dg2: NOTRUN -> [SKIP][35] ([i915#3539] / [i915#4852])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-6/igt@gem_exec_flush@basic-wb-pro-default.html
* igt@gem_exec_gttfill@multigpu-basic:
- shard-mtlp: NOTRUN -> [SKIP][36] ([i915#7697])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-3/igt@gem_exec_gttfill@multigpu-basic.html
* igt@gem_exec_params@rsvd2-dirt:
- shard-mtlp: NOTRUN -> [SKIP][37] ([i915#5107])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-6/igt@gem_exec_params@rsvd2-dirt.html
* igt@gem_exec_reloc@basic-gtt-cpu-noreloc:
- shard-mtlp: NOTRUN -> [SKIP][38] ([i915#3281]) +4 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-7/igt@gem_exec_reloc@basic-gtt-cpu-noreloc.html
* igt@gem_exec_reloc@basic-gtt-read:
- shard-dg2: NOTRUN -> [SKIP][39] ([i915#3281]) +18 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@gem_exec_reloc@basic-gtt-read.html
* igt@gem_exec_reloc@basic-wc:
- shard-rkl: NOTRUN -> [SKIP][40] ([i915#3281]) +1 other test skip
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-6/igt@gem_exec_reloc@basic-wc.html
- shard-dg1: NOTRUN -> [SKIP][41] ([i915#3281]) +3 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-12/igt@gem_exec_reloc@basic-wc.html
* igt@gem_exec_schedule@noreorder-corked@ccs0:
- shard-mtlp: [PASS][42] -> [DMESG-FAIL][43] ([i915#8962]) +2 other tests dmesg-fail
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-3/igt@gem_exec_schedule@noreorder-corked@ccs0.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-4/igt@gem_exec_schedule@noreorder-corked@ccs0.html
* igt@gem_exec_schedule@preempt-queue:
- shard-dg2: NOTRUN -> [SKIP][44] ([i915#4537] / [i915#4812])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@gem_exec_schedule@preempt-queue.html
* igt@gem_exec_suspend@basic-s4-devices@lmem0:
- shard-dg2: [PASS][45] -> [ABORT][46] ([i915#7975] / [i915#8213])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-dg2-11/igt@gem_exec_suspend@basic-s4-devices@lmem0.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-1/igt@gem_exec_suspend@basic-s4-devices@lmem0.html
* igt@gem_exec_suspend@basic-s4-devices@smem:
- shard-rkl: NOTRUN -> [ABORT][47] ([i915#7975] / [i915#8213])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-7/igt@gem_exec_suspend@basic-s4-devices@smem.html
* igt@gem_fenced_exec_thrash@too-many-fences:
- shard-mtlp: NOTRUN -> [SKIP][48] ([i915#4860])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-4/igt@gem_fenced_exec_thrash@too-many-fences.html
* igt@gem_lmem_swapping@parallel-multi:
- shard-mtlp: NOTRUN -> [SKIP][49] ([i915#4613])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-2/igt@gem_lmem_swapping@parallel-multi.html
* igt@gem_lmem_swapping@parallel-random-engines:
- shard-glk: NOTRUN -> [SKIP][50] ([fdo#109271] / [i915#4613])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-glk1/igt@gem_lmem_swapping@parallel-random-engines.html
- shard-rkl: NOTRUN -> [SKIP][51] ([i915#4613])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-1/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_media_fill@media-fill:
- shard-mtlp: NOTRUN -> [SKIP][52] ([i915#8289])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-6/igt@gem_media_fill@media-fill.html
* igt@gem_mmap_gtt@basic-read-write:
- shard-dg2: NOTRUN -> [SKIP][53] ([i915#4077]) +7 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@gem_mmap_gtt@basic-read-write.html
* igt@gem_mmap_gtt@basic-small-copy-odd:
- shard-dg1: NOTRUN -> [SKIP][54] ([i915#4077])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-18/igt@gem_mmap_gtt@basic-small-copy-odd.html
* igt@gem_mmap_gtt@big-bo-tiledy:
- shard-mtlp: NOTRUN -> [SKIP][55] ([i915#4077]) +6 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-6/igt@gem_mmap_gtt@big-bo-tiledy.html
* igt@gem_mmap_wc@close:
- shard-mtlp: NOTRUN -> [SKIP][56] ([i915#4083]) +4 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-6/igt@gem_mmap_wc@close.html
* igt@gem_mmap_wc@coherency:
- shard-dg2: NOTRUN -> [SKIP][57] ([i915#4083]) +7 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@gem_mmap_wc@coherency.html
- shard-dg1: NOTRUN -> [SKIP][58] ([i915#4083]) +2 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-15/igt@gem_mmap_wc@coherency.html
* igt@gem_partial_pwrite_pread@reads-uncached:
- shard-dg2: NOTRUN -> [SKIP][59] ([i915#3282]) +2 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-6/igt@gem_partial_pwrite_pread@reads-uncached.html
* igt@gem_partial_pwrite_pread@write:
- shard-rkl: NOTRUN -> [SKIP][60] ([i915#3282]) +1 other test skip
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-2/igt@gem_partial_pwrite_pread@write.html
* igt@gem_pread@exhaustion:
- shard-mtlp: NOTRUN -> [SKIP][61] ([i915#3282]) +2 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-3/igt@gem_pread@exhaustion.html
* igt@gem_pxp@create-valid-protected-context:
- shard-rkl: NOTRUN -> [SKIP][62] ([i915#4270])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-7/igt@gem_pxp@create-valid-protected-context.html
- shard-dg1: NOTRUN -> [SKIP][63] ([i915#4270]) +1 other test skip
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-14/igt@gem_pxp@create-valid-protected-context.html
* igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
- shard-mtlp: NOTRUN -> [SKIP][64] ([i915#4270])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-1/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html
* igt@gem_pxp@reject-modify-context-protection-off-1:
- shard-dg2: NOTRUN -> [SKIP][65] ([i915#4270]) +3 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@gem_pxp@reject-modify-context-protection-off-1.html
* igt@gem_pxp@reject-modify-context-protection-off-3:
- shard-tglu: NOTRUN -> [SKIP][66] ([i915#4270])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-tglu-9/igt@gem_pxp@reject-modify-context-protection-off-3.html
* igt@gem_readwrite@beyond-eob:
- shard-dg1: NOTRUN -> [SKIP][67] ([i915#3282])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-14/igt@gem_readwrite@beyond-eob.html
* igt@gem_render_copy@yf-tiled-ccs-to-yf-tiled:
- shard-mtlp: NOTRUN -> [SKIP][68] ([i915#8428]) +2 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-5/igt@gem_render_copy@yf-tiled-ccs-to-yf-tiled.html
* igt@gem_set_tiling_vs_blt@untiled-to-tiled:
- shard-dg2: NOTRUN -> [SKIP][69] ([i915#4079]) +1 other test skip
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-3/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html
* igt@gem_unfence_active_buffers:
- shard-dg2: NOTRUN -> [SKIP][70] ([i915#4879])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-6/igt@gem_unfence_active_buffers.html
* igt@gem_userptr_blits@coherency-unsync:
- shard-dg2: NOTRUN -> [SKIP][71] ([i915#3297]) +2 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-3/igt@gem_userptr_blits@coherency-unsync.html
* igt@gem_userptr_blits@create-destroy-unsync:
- shard-rkl: NOTRUN -> [SKIP][72] ([i915#3297])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-4/igt@gem_userptr_blits@create-destroy-unsync.html
* igt@gem_userptr_blits@map-fixed-invalidate:
- shard-dg1: NOTRUN -> [SKIP][73] ([i915#3297] / [i915#4880])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-17/igt@gem_userptr_blits@map-fixed-invalidate.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
- shard-dg2: NOTRUN -> [SKIP][74] ([i915#3297] / [i915#4880])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
* igt@gem_userptr_blits@readonly-pwrite-unsync:
- shard-mtlp: NOTRUN -> [SKIP][75] ([i915#3297]) +1 other test skip
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-5/igt@gem_userptr_blits@readonly-pwrite-unsync.html
* igt@gem_userptr_blits@vma-merge:
- shard-mtlp: NOTRUN -> [FAIL][76] ([i915#3318])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-1/igt@gem_userptr_blits@vma-merge.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-snb: NOTRUN -> [DMESG-WARN][77] ([i915#8841])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-snb5/igt@gem_workarounds@suspend-resume-fd.html
* igt@gen7_exec_parse@basic-offset:
- shard-glk: NOTRUN -> [SKIP][78] ([fdo#109271]) +51 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-glk1/igt@gen7_exec_parse@basic-offset.html
- shard-rkl: NOTRUN -> [SKIP][79] ([fdo#109289])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-4/igt@gen7_exec_parse@basic-offset.html
- shard-tglu: NOTRUN -> [SKIP][80] ([fdo#109289])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-tglu-3/igt@gen7_exec_parse@basic-offset.html
* igt@gen7_exec_parse@basic-rejected:
- shard-dg2: NOTRUN -> [SKIP][81] ([fdo#109289]) +5 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-1/igt@gen7_exec_parse@basic-rejected.html
* igt@gen7_exec_parse@chained-batch:
- shard-dg1: NOTRUN -> [SKIP][82] ([fdo#109289])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-16/igt@gen7_exec_parse@chained-batch.html
* igt@gen7_exec_parse@cmd-crossing-page:
- shard-mtlp: NOTRUN -> [SKIP][83] ([fdo#109289]) +2 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-8/igt@gen7_exec_parse@cmd-crossing-page.html
* igt@gen9_exec_parse@bb-chained:
- shard-rkl: NOTRUN -> [SKIP][84] ([i915#2527])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-2/igt@gen9_exec_parse@bb-chained.html
- shard-tglu: NOTRUN -> [SKIP][85] ([i915#2527] / [i915#2856])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-tglu-9/igt@gen9_exec_parse@bb-chained.html
* igt@gen9_exec_parse@bb-start-far:
- shard-mtlp: NOTRUN -> [SKIP][86] ([i915#2856])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-5/igt@gen9_exec_parse@bb-start-far.html
* igt@gen9_exec_parse@cmd-crossing-page:
- shard-dg1: NOTRUN -> [SKIP][87] ([i915#2527])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-19/igt@gen9_exec_parse@cmd-crossing-page.html
* igt@gen9_exec_parse@shadow-peek:
- shard-dg2: NOTRUN -> [SKIP][88] ([i915#2856]) +4 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@gen9_exec_parse@shadow-peek.html
* igt@i915_hangman@detector@vcs0:
- shard-mtlp: [PASS][89] -> [FAIL][90] ([i915#8456]) +2 other tests fail
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-1/igt@i915_hangman@detector@vcs0.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-5/igt@i915_hangman@detector@vcs0.html
* igt@i915_pm_freq_mult@media-freq@gt0:
- shard-rkl: NOTRUN -> [SKIP][91] ([i915#6590])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-6/igt@i915_pm_freq_mult@media-freq@gt0.html
* igt@i915_query@query-topology-coherent-slice-mask:
- shard-dg2: NOTRUN -> [SKIP][92] ([i915#6188])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-3/igt@i915_query@query-topology-coherent-slice-mask.html
* igt@i915_selftest@live@requests:
- shard-mtlp: [PASS][93] -> [ABORT][94] ([i915#9414]) +1 other test abort
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-5/igt@i915_selftest@live@requests.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-5/igt@i915_selftest@live@requests.html
* igt@i915_selftest@mock@memory_region:
- shard-mtlp: NOTRUN -> [DMESG-WARN][95] ([i915#9311])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-1/igt@i915_selftest@mock@memory_region.html
* igt@i915_suspend@basic-s3-without-i915:
- shard-rkl: [PASS][96] -> [FAIL][97] ([fdo#103375])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-rkl-4/igt@i915_suspend@basic-s3-without-i915.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-6/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_addfb_basic@basic-x-tiled-legacy:
- shard-dg2: NOTRUN -> [SKIP][98] ([i915#4212]) +3 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@kms_addfb_basic@basic-x-tiled-legacy.html
- shard-dg1: NOTRUN -> [SKIP][99] ([i915#4212])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-13/igt@kms_addfb_basic@basic-x-tiled-legacy.html
* igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
- shard-rkl: NOTRUN -> [SKIP][100] ([i915#3826])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-1/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
* igt@kms_async_flips@crc@pipe-b-hdmi-a-3:
- shard-dg1: NOTRUN -> [FAIL][101] ([i915#8247]) +3 other tests fail
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-13/igt@kms_async_flips@crc@pipe-b-hdmi-a-3.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-mtlp: NOTRUN -> [SKIP][102] ([i915#404])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-8/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-dg2: NOTRUN -> [SKIP][103] ([i915#1769] / [i915#3555])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
- shard-dg1: NOTRUN -> [SKIP][104] ([i915#1769] / [i915#3555])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-19/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-0:
- shard-dg1: NOTRUN -> [SKIP][105] ([i915#4538] / [i915#5286])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-18/igt@kms_big_fb@4-tiled-16bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-270:
- shard-tglu: NOTRUN -> [SKIP][106] ([fdo#111615] / [i915#5286])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-tglu-5/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-90:
- shard-rkl: NOTRUN -> [SKIP][107] ([i915#5286])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-1/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-snb: NOTRUN -> [SKIP][108] ([fdo#109271]) +77 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-snb7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
- shard-mtlp: [PASS][109] -> [FAIL][110] ([i915#5138])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-mtlp: NOTRUN -> [FAIL][111] ([i915#5138])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][112] ([fdo#111614] / [i915#3638]) +1 other test skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-6/igt@kms_big_fb@linear-8bpp-rotate-270.html
- shard-tglu: NOTRUN -> [SKIP][113] ([fdo#111614])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-tglu-5/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-270:
- shard-dg2: NOTRUN -> [SKIP][114] ([fdo#111614]) +5 other tests skip
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-3/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-270:
- shard-mtlp: NOTRUN -> [SKIP][115] ([fdo#111614]) +2 other tests skip
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-7/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-270:
- shard-dg1: NOTRUN -> [SKIP][116] ([i915#3638])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-16/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-tglu: [PASS][117] -> [FAIL][118] ([i915#3743]) +1 other test fail
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-tglu-6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-tglu-9/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-dg2: NOTRUN -> [SKIP][119] ([i915#5190]) +19 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
- shard-rkl: NOTRUN -> [SKIP][120] ([fdo#110723]) +1 other test skip
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-1/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html
- shard-dg1: NOTRUN -> [SKIP][121] ([i915#4538]) +1 other test skip
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-13/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-rkl: NOTRUN -> [SKIP][122] ([fdo#111615])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-6/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-mtlp: NOTRUN -> [SKIP][123] ([fdo#111615]) +5 other tests skip
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-1/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-dg2: NOTRUN -> [SKIP][124] ([i915#4538] / [i915#5190]) +6 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_joiner@2x-modeset:
- shard-dg2: NOTRUN -> [SKIP][125] ([i915#2705])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-1/igt@kms_big_joiner@2x-modeset.html
* igt@kms_cdclk@mode-transition@pipe-b-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][126] ([i915#7213] / [i915#9010]) +3 other tests skip
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-1/igt@kms_cdclk@mode-transition@pipe-b-edp-1.html
* igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-2:
- shard-dg2: NOTRUN -> [SKIP][127] ([i915#4087]) +3 other tests skip
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-2.html
* igt@kms_chamelium_color@ctm-blue-to-red:
- shard-dg2: NOTRUN -> [SKIP][128] ([fdo#111827]) +1 other test skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@kms_chamelium_color@ctm-blue-to-red.html
* igt@kms_chamelium_color@ctm-limited-range:
- shard-mtlp: NOTRUN -> [SKIP][129] ([fdo#111827]) +1 other test skip
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-4/igt@kms_chamelium_color@ctm-limited-range.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- shard-dg2: NOTRUN -> [SKIP][130] ([i915#7828]) +7 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-1/igt@kms_chamelium_frames@hdmi-crc-fast.html
- shard-rkl: NOTRUN -> [SKIP][131] ([i915#7828]) +2 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-4/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_chamelium_frames@hdmi-frame-dump:
- shard-dg1: NOTRUN -> [SKIP][132] ([i915#7828]) +4 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-13/igt@kms_chamelium_frames@hdmi-frame-dump.html
* igt@kms_chamelium_hpd@hdmi-hpd:
- shard-mtlp: NOTRUN -> [SKIP][133] ([i915#7828]) +6 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-2/igt@kms_chamelium_hpd@hdmi-hpd.html
* igt@kms_content_protection@atomic:
- shard-dg2: NOTRUN -> [SKIP][134] ([i915#7118]) +1 other test skip
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-1/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-mtlp: NOTRUN -> [SKIP][135] ([i915#3299])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-1/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@uevent@pipe-a-dp-4:
- shard-dg2: NOTRUN -> [FAIL][136] ([i915#1339])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@kms_content_protection@uevent@pipe-a-dp-4.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-dg1: NOTRUN -> [SKIP][137] ([i915#3359])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-17/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-dg2: NOTRUN -> [SKIP][138] ([i915#3359])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-6/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-mtlp: NOTRUN -> [SKIP][139] ([i915#3359])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-6/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
- shard-mtlp: NOTRUN -> [SKIP][140] ([i915#3546]) +2 other tests skip
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-4/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
- shard-rkl: NOTRUN -> [SKIP][141] ([fdo#111825]) +3 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-4/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
- shard-dg2: NOTRUN -> [SKIP][142] ([fdo#109274] / [i915#5354]) +4 other tests skip
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-mtlp: NOTRUN -> [SKIP][143] ([fdo#111767] / [i915#3546])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-7/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-glk: [PASS][144] -> [FAIL][145] ([i915#2346])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
- shard-apl: [PASS][146] -> [FAIL][147] ([i915#2346])
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-apl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-dg2: NOTRUN -> [SKIP][148] ([i915#4103] / [i915#4213])
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_dirtyfb@dirtyfb-ioctl@fbc-hdmi-a-1:
- shard-dg1: NOTRUN -> [SKIP][149] ([i915#9227])
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-19/igt@kms_dirtyfb@dirtyfb-ioctl@fbc-hdmi-a-1.html
* igt@kms_dirtyfb@dirtyfb-ioctl@psr-hdmi-a-1:
- shard-dg1: NOTRUN -> [SKIP][150] ([i915#9226] / [i915#9261]) +1 other test skip
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-19/igt@kms_dirtyfb@dirtyfb-ioctl@psr-hdmi-a-1.html
* igt@kms_display_modes@mst-extended-mode-negative:
- shard-dg2: NOTRUN -> [SKIP][151] ([i915#8588])
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@kms_display_modes@mst-extended-mode-negative.html
* igt@kms_draw_crc@draw-method-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][152] ([i915#3555] / [i915#8812])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-8/igt@kms_draw_crc@draw-method-mmap-gtt.html
* igt@kms_dsc@dsc-basic:
- shard-rkl: NOTRUN -> [SKIP][153] ([i915#3555] / [i915#3840])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-1/igt@kms_dsc@dsc-basic.html
* igt@kms_dsc@dsc-with-output-formats:
- shard-dg2: NOTRUN -> [SKIP][154] ([i915#3555] / [i915#3840]) +1 other test skip
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@kms_dsc@dsc-with-output-formats.html
* igt@kms_fence_pin_leak:
- shard-dg2: NOTRUN -> [SKIP][155] ([i915#4881]) +1 other test skip
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-6/igt@kms_fence_pin_leak.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank:
- shard-mtlp: NOTRUN -> [SKIP][156] ([i915#3637]) +4 other tests skip
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-2/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html
* igt@kms_flip@2x-flip-vs-blocking-wf-vblank:
- shard-dg2: NOTRUN -> [SKIP][157] ([fdo#109274] / [fdo#111767])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-3/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-snb: NOTRUN -> [SKIP][158] ([fdo#109271] / [fdo#111767])
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-snb5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][159] -> [FAIL][160] ([i915#79])
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-flip-vs-fences:
- shard-mtlp: NOTRUN -> [SKIP][161] ([i915#8381])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-7/igt@kms_flip@2x-flip-vs-fences.html
* igt@kms_flip@2x-flip-vs-fences-interruptible:
- shard-dg1: NOTRUN -> [SKIP][162] ([i915#8381])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-17/igt@kms_flip@2x-flip-vs-fences-interruptible.html
* igt@kms_flip@2x-modeset-vs-vblank-race:
- shard-dg2: NOTRUN -> [SKIP][163] ([fdo#109274]) +6 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@kms_flip@2x-modeset-vs-vblank-race.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][164] ([i915#2672])
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][165] ([i915#2672] / [i915#3555])
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][166] ([i915#3555] / [i915#8810])
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-3/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][167] ([i915#2672]) +1 other test skip
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-valid-mode.html
* igt@kms_force_connector_basic@force-load-detect:
- shard-dg2: NOTRUN -> [SKIP][168] ([fdo#109285])
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-3/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
- shard-dg2: NOTRUN -> [SKIP][169] ([i915#5354]) +28 other tests skip
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-plflip-blt:
- shard-tglu: NOTRUN -> [SKIP][170] ([fdo#109280]) +1 other test skip
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-tglu-9/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-dg2: NOTRUN -> [SKIP][171] ([i915#8708]) +22 other tests skip
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
- shard-dg1: NOTRUN -> [SKIP][172] ([i915#8708]) +6 other tests skip
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][173] ([i915#8708]) +4 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-dg1: NOTRUN -> [SKIP][174] ([i915#3458]) +4 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-15/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
- shard-dg2: NOTRUN -> [SKIP][175] ([i915#3458]) +23 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-render:
- shard-dg1: NOTRUN -> [SKIP][176] ([fdo#111825]) +12 other tests skip
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-18/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-move:
- shard-rkl: NOTRUN -> [SKIP][177] ([fdo#111825] / [i915#1825]) +11 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render:
- shard-mtlp: NOTRUN -> [SKIP][178] ([i915#1825]) +11 other tests skip
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-suspend:
- shard-rkl: NOTRUN -> [SKIP][179] ([i915#3023]) +8 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-suspend.html
* igt@kms_hdr@bpc-switch:
- shard-dg1: NOTRUN -> [SKIP][180] ([i915#3555] / [i915#8228])
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-19/igt@kms_hdr@bpc-switch.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-rkl: NOTRUN -> [SKIP][181] ([i915#3555] / [i915#8228]) +1 other test skip
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-7/igt@kms_hdr@invalid-metadata-sizes.html
- shard-tglu: NOTRUN -> [SKIP][182] ([i915#3555] / [i915#8228])
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-tglu-6/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_hdr@static-toggle-dpms:
- shard-mtlp: NOTRUN -> [SKIP][183] ([i915#3555] / [i915#8228])
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-3/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_hdr@static-toggle-suspend:
- shard-dg2: NOTRUN -> [SKIP][184] ([i915#3555] / [i915#8228]) +1 other test skip
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_panel_fitting@legacy:
- shard-dg2: NOTRUN -> [SKIP][185] ([i915#6301])
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@kms_panel_fitting@legacy.html
* igt@kms_plane_lowres@tiling-y:
- shard-dg2: NOTRUN -> [SKIP][186] ([i915#8821])
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-3/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_lowres@tiling-yf:
- shard-rkl: NOTRUN -> [SKIP][187] ([i915#3555]) +2 other tests skip
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-2/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_multiple@tiling-yf:
- shard-mtlp: NOTRUN -> [SKIP][188] ([i915#3555] / [i915#8806])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-7/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][189] ([i915#5176] / [i915#9423]) +3 other tests skip
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-13/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-3.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][190] ([i915#5176] / [i915#9423]) +1 other test skip
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-2/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b-hdmi-a-2.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][191] ([i915#5235]) +5 other tests skip
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-1/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b-hdmi-a-2.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b-dp-4:
- shard-dg2: NOTRUN -> [SKIP][192] ([i915#5235]) +19 other tests skip
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b-dp-4.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-1:
- shard-dg1: NOTRUN -> [SKIP][193] ([i915#5235]) +15 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-19/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-1.html
* igt@kms_prime@basic-modeset-hybrid:
- shard-apl: NOTRUN -> [SKIP][194] ([fdo#109271]) +4 other tests skip
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-apl2/igt@kms_prime@basic-modeset-hybrid.html
- shard-mtlp: NOTRUN -> [SKIP][195] ([i915#6524])
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-4/igt@kms_prime@basic-modeset-hybrid.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf:
- shard-mtlp: NOTRUN -> [SKIP][196] ([i915#2920])
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-7/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
- shard-apl: NOTRUN -> [SKIP][197] ([fdo#109271] / [i915#658])
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-apl7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb:
- shard-dg2: NOTRUN -> [SKIP][198] ([i915#658]) +2 other tests skip
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-11/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html
- shard-rkl: NOTRUN -> [SKIP][199] ([i915#658])
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html
- shard-dg1: NOTRUN -> [SKIP][200] ([i915#658])
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-13/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-dg1: NOTRUN -> [SKIP][201] ([fdo#111068] / [i915#658])
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-14/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@cursor_mmap_cpu:
- shard-rkl: NOTRUN -> [SKIP][202] ([i915#1072]) +1 other test skip
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-4/igt@kms_psr@cursor_mmap_cpu.html
- shard-tglu: NOTRUN -> [SKIP][203] ([fdo#110189]) +1 other test skip
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-tglu-2/igt@kms_psr@cursor_mmap_cpu.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-dg2: NOTRUN -> [SKIP][204] ([i915#1072]) +8 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_psr@psr2_sprite_plane_onoff:
- shard-dg1: NOTRUN -> [SKIP][205] ([i915#1072] / [i915#4078])
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-12/igt@kms_psr@psr2_sprite_plane_onoff.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-dg2: NOTRUN -> [SKIP][206] ([i915#5461] / [i915#658])
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-1/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-dg2: NOTRUN -> [SKIP][207] ([i915#4235]) +2 other tests skip
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-6/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-rkl: [PASS][208] -> [INCOMPLETE][209] ([i915#8875])
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-rkl-2/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-6/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
- shard-dg2: NOTRUN -> [SKIP][210] ([i915#4235] / [i915#5190])
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
* igt@kms_rotation_crc@sprite-rotation-90:
- shard-mtlp: NOTRUN -> [SKIP][211] ([i915#4235])
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-4/igt@kms_rotation_crc@sprite-rotation-90.html
* igt@kms_setmode@invalid-clone-single-crtc-stealing:
- shard-mtlp: NOTRUN -> [SKIP][212] ([i915#3555] / [i915#8809])
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-6/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
* igt@kms_sysfs_edid_timing:
- shard-dg2: [PASS][213] -> [FAIL][214] ([IGT#2])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-dg2-11/igt@kms_sysfs_edid_timing.html
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@kms_sysfs_edid_timing.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1:
- shard-snb: NOTRUN -> [FAIL][215] ([i915#9196])
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-snb1/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
* igt@kms_vblank@pipe-d-wait-busy:
- shard-rkl: NOTRUN -> [SKIP][216] ([i915#4070] / [i915#533] / [i915#6768])
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-7/igt@kms_vblank@pipe-d-wait-busy.html
* igt@kms_vrr@flip-basic:
- shard-dg2: NOTRUN -> [SKIP][217] ([i915#3555]) +8 other tests skip
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-1/igt@kms_vrr@flip-basic.html
- shard-dg1: NOTRUN -> [SKIP][218] ([i915#3555])
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-15/igt@kms_vrr@flip-basic.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-dg2: NOTRUN -> [SKIP][219] ([i915#2437])
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-1/igt@kms_writeback@writeback-invalid-parameters.html
* igt@perf@global-sseu-config-invalid:
- shard-dg2: NOTRUN -> [SKIP][220] ([i915#7387])
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@perf@global-sseu-config-invalid.html
* igt@perf_pmu@busy-double-start@rcs0:
- shard-mtlp: [PASS][221] -> [FAIL][222] ([i915#4349])
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-7/igt@perf_pmu@busy-double-start@rcs0.html
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-5/igt@perf_pmu@busy-double-start@rcs0.html
* igt@perf_pmu@cpu-hotplug:
- shard-mtlp: NOTRUN -> [SKIP][223] ([i915#8850])
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-3/igt@perf_pmu@cpu-hotplug.html
* igt@perf_pmu@event-wait@rcs0:
- shard-dg2: NOTRUN -> [SKIP][224] ([fdo#112283])
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-3/igt@perf_pmu@event-wait@rcs0.html
* igt@perf_pmu@module-unload:
- shard-snb: [PASS][225] -> [INCOMPLETE][226] ([i915#9473])
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-snb1/igt@perf_pmu@module-unload.html
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-snb1/igt@perf_pmu@module-unload.html
* igt@perf_pmu@rc6-all-gts:
- shard-dg2: NOTRUN -> [SKIP][227] ([i915#5608] / [i915#8516])
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-1/igt@perf_pmu@rc6-all-gts.html
* igt@prime_udl:
- shard-mtlp: NOTRUN -> [SKIP][228] ([fdo#109291])
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-7/igt@prime_udl.html
* igt@prime_vgem@fence-flip-hang:
- shard-dg1: NOTRUN -> [SKIP][229] ([i915#3708])
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-16/igt@prime_vgem@fence-flip-hang.html
* igt@v3d/v3d_create_bo@create-bo-4096:
- shard-rkl: NOTRUN -> [SKIP][230] ([fdo#109315]) +2 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-4/igt@v3d/v3d_create_bo@create-bo-4096.html
* igt@v3d/v3d_perfmon@create-perfmon-exceed:
- shard-dg2: NOTRUN -> [SKIP][231] ([i915#2575]) +12 other tests skip
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@v3d/v3d_perfmon@create-perfmon-exceed.html
* igt@v3d/v3d_submit_cl@bad-flag:
- shard-mtlp: NOTRUN -> [SKIP][232] ([i915#2575]) +4 other tests skip
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-8/igt@v3d/v3d_submit_cl@bad-flag.html
* igt@v3d/v3d_submit_csd@multi-and-single-sync:
- shard-dg1: NOTRUN -> [SKIP][233] ([i915#2575]) +1 other test skip
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-13/igt@v3d/v3d_submit_csd@multi-and-single-sync.html
* igt@vc4/vc4_dmabuf_poll@poll-read-waits-until-write-done:
- shard-dg1: NOTRUN -> [SKIP][234] ([i915#7711]) +1 other test skip
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-12/igt@vc4/vc4_dmabuf_poll@poll-read-waits-until-write-done.html
* igt@vc4/vc4_mmap@mmap-bo:
- shard-rkl: NOTRUN -> [SKIP][235] ([i915#7711]) +1 other test skip
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-1/igt@vc4/vc4_mmap@mmap-bo.html
* igt@vc4/vc4_perfmon@create-perfmon-exceed:
- shard-mtlp: NOTRUN -> [SKIP][236] ([i915#7711]) +4 other tests skip
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-3/igt@vc4/vc4_perfmon@create-perfmon-exceed.html
* igt@vc4/vc4_perfmon@destroy-valid-perfmon:
- shard-dg2: NOTRUN -> [SKIP][237] ([i915#7711]) +9 other tests skip
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@vc4/vc4_perfmon@destroy-valid-perfmon.html
#### Possible fixes ####
* igt@device_reset@unbind-reset-rebind:
- shard-dg2: [ABORT][238] ([i915#5507] / [i915#8260]) -> [PASS][239]
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-dg2-3/igt@device_reset@unbind-reset-rebind.html
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-2/igt@device_reset@unbind-reset-rebind.html
* igt@gem_ctx_persistence@engines-hostile@vecs0:
- shard-mtlp: [ABORT][240] ([i915#9414]) -> [PASS][241] +1 other test pass
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-4/igt@gem_ctx_persistence@engines-hostile@vecs0.html
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-1/igt@gem_ctx_persistence@engines-hostile@vecs0.html
* igt@gem_ctx_persistence@legacy-engines-hostile@vebox:
- shard-mtlp: [FAIL][242] ([i915#2410]) -> [PASS][243] +2 other tests pass
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-2/igt@gem_ctx_persistence@legacy-engines-hostile@vebox.html
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-8/igt@gem_ctx_persistence@legacy-engines-hostile@vebox.html
* igt@gem_eio@hibernate:
- shard-dg1: [ABORT][244] ([i915#7975] / [i915#8213]) -> [PASS][245]
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-dg1-14/igt@gem_eio@hibernate.html
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-18/igt@gem_eio@hibernate.html
* igt@gem_exec_capture@pi@vcs0:
- shard-mtlp: [FAIL][246] ([i915#4475]) -> [PASS][247]
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-7/igt@gem_exec_capture@pi@vcs0.html
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-6/igt@gem_exec_capture@pi@vcs0.html
* igt@gem_exec_fence@nb-await@bcs0:
- shard-mtlp: [ABORT][248] ([i915#9262]) -> [PASS][249]
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-4/igt@gem_exec_fence@nb-await@bcs0.html
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-5/igt@gem_exec_fence@nb-await@bcs0.html
* igt@gem_exec_suspend@basic-s4-devices@smem:
- shard-tglu: [ABORT][250] ([i915#7975] / [i915#8213]) -> [PASS][251]
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-tglu-10/igt@gem_exec_suspend@basic-s4-devices@smem.html
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-tglu-5/igt@gem_exec_suspend@basic-s4-devices@smem.html
* igt@gem_userptr_blits@nohangcheck:
- shard-mtlp: [FAIL][252] ([i915#9353]) -> [PASS][253]
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-6/igt@gem_userptr_blits@nohangcheck.html
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-7/igt@gem_userptr_blits@nohangcheck.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [INCOMPLETE][254] ([i915#5566]) -> [PASS][255]
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-glk2/igt@gen9_exec_parse@allowed-single.html
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-glk1/igt@gen9_exec_parse@allowed-single.html
* igt@i915_hangman@gt-engine-hang@vcs0:
- shard-mtlp: [FAIL][256] ([i915#7069]) -> [PASS][257] +1 other test pass
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-8/igt@i915_hangman@gt-engine-hang@vcs0.html
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-1/igt@i915_hangman@gt-engine-hang@vcs0.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-apl: [DMESG-FAIL][258] ([i915#5334]) -> [PASS][259]
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-apl2/igt@i915_selftest@live@gt_heartbeat.html
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-apl3/igt@i915_selftest@live@gt_heartbeat.html
* {igt@kms_ccs@pipe-b-crc-primary-basic-4-tiled-dg2-mc-ccs}:
- shard-dg2: [FAIL][260] -> [PASS][261]
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-dg2-11/igt@kms_ccs@pipe-b-crc-primary-basic-4-tiled-dg2-mc-ccs.html
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg2-3/igt@kms_ccs@pipe-b-crc-primary-basic-4-tiled-dg2-mc-ccs.html
* {igt@kms_pm_rpm@dpms-lpsp}:
- shard-dg1: [SKIP][262] ([i915#9519]) -> [PASS][263]
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-dg1-12/igt@kms_pm_rpm@dpms-lpsp.html
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-19/igt@kms_pm_rpm@dpms-lpsp.html
* {igt@kms_pm_rpm@modeset-non-lpsp}:
- shard-rkl: [SKIP][264] ([i915#9519]) -> [PASS][265]
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-rkl-7/igt@kms_pm_rpm@modeset-non-lpsp.html
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-2/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@perf_pmu@busy-double-start@bcs0:
- shard-mtlp: [FAIL][266] ([i915#4349]) -> [PASS][267]
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-mtlp-7/igt@perf_pmu@busy-double-start@bcs0.html
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-mtlp-5/igt@perf_pmu@busy-double-start@bcs0.html
* igt@perf_pmu@busy-idle-check-all@vecs0:
- shard-dg1: [FAIL][268] ([i915#4349]) -> [PASS][269] +2 other tests pass
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-dg1-15/igt@perf_pmu@busy-idle-check-all@vecs0.html
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-17/igt@perf_pmu@busy-idle-check-all@vecs0.html
#### Warnings ####
* igt@device_reset@unbind-reset-rebind:
- shard-dg1: [INCOMPLETE][270] ([i915#1982] / [i915#9408]) -> [INCOMPLETE][271] ([i915#9408])
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-dg1-15/igt@device_reset@unbind-reset-rebind.html
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-dg1-14/igt@device_reset@unbind-reset-rebind.html
* igt@i915_pm_rc6_residency@rc6-idle@rcs0:
- shard-tglu: [FAIL][272] ([i915#2681] / [i915#3591]) -> [WARN][273] ([i915#2681]) +1 other test warn
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-tglu-7/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-tglu-9/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
* igt@kms_cursor_crc@cursor-suspend@pipe-b-vga-1:
- shard-snb: [DMESG-WARN][274] ([i915#8841]) -> [DMESG-WARN][275] ([i915#5090] / [i915#8841])
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-snb5/igt@kms_cursor_crc@cursor-suspend@pipe-b-vga-1.html
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-snb2/igt@kms_cursor_crc@cursor-suspend@pipe-b-vga-1.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-rkl: [SKIP][276] ([i915#3955]) -> [SKIP][277] ([fdo#110189] / [i915#3955]) +1 other test skip
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-rkl-6/igt@kms_fbcon_fbt@psr-suspend.html
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-2/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-rkl: [SKIP][278] ([i915#4070] / [i915#4816]) -> [SKIP][279] ([i915#4816])
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7536/shard-rkl-1/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/shard-rkl-7/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109293]: https://bugs.freedesktop.org/show_bug.cgi?id=109293
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1339]: https://gitlab.freedesktop.org/drm/intel/issues/1339
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2410]: https://gitlab.freedesktop.org/drm/intel/issues/2410
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
[i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4475]: https://gitlab.freedesktop.org/drm/intel/issues/4475
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4537]: https://gitlab.freedesktop.org/drm/intel/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4879]: https://gitlab.freedesktop.org/drm/intel/issues/4879
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
[i915#5090]: https://gitlab.freedesktop.org/drm/intel/issues/5090
[i915#5107]: https://gitlab.freedesktop.org/drm/intel/issues/5107
[i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
[i915#5507]: https://gitlab.freedesktop.org/drm/intel/issues/5507
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5608]: https://gitlab.freedesktop.org/drm/intel/issues/5608
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6188]: https://gitlab.freedesktop.org/drm/intel/issues/6188
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#7069]: https://gitlab.freedesktop.org/drm/intel/issues/7069
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7213]: https://gitlab.freedesktop.org/drm/intel/issues/7213
[i915#7387]: https://gitlab.freedesktop.org/drm/intel/issues/7387
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8247]: https://gitlab.freedesktop.org/drm/intel/issues/8247
[i915#8260]: https://gitlab.freedesktop.org/drm/intel/issues/8260
[i915#8289]: https://gitlab.freedesktop.org/drm/intel/issues/8289
[i915#8381]: https://gitlab.freedesktop.org/drm/intel/issues/8381
[i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
[i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
[i915#8428]: https://gitlab.freedesktop.org/drm/intel/issues/8428
[i915#8456]: https://gitlab.freedesktop.org/drm/intel/issues/8456
[i915#8516]: https://gitlab.freedesktop.org/drm/intel/issues/8516
[i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
[i915#8588]: https://gitlab.freedesktop.org/drm/intel/issues/8588
[i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
[i915#8758]: https://gitlab.freedesktop.org/drm/intel/issues/8758
[i915#8806]: https://gitlab.freedesktop.org/drm/intel/issues/8806
[i915#8809]: https://gitlab.freedesktop.org/drm/intel/issues/8809
[i915#8810]: https://gitlab.freedesktop.org/drm/intel/issues/8810
[i915#8812]: https://gitlab.freedesktop.org/drm/intel/issues/8812
[i915#8821]: https://gitlab.freedesktop.org/drm/intel/issues/8821
[i915#8841]: https://gitlab.freedesktop.org/drm/intel/issues/8841
[i915#8850]: https://gitlab.freedesktop.org/drm/intel/issues/8850
[i915#8875]: https://gitlab.freedesktop.org/drm/intel/issues/8875
[i915#8957]: https://gitlab.freedesktop.org/drm/intel/issues/8957
[i915#8962]: https://gitlab.freedesktop.org/drm/intel/issues/8962
[i915#9010]: https://gitlab.freedesktop.org/drm/intel/issues/9010
[i915#9067]: https://gitlab.freedesktop.org/drm/intel/issues/9067
[i915#9196]: https://gitlab.freedesktop.org/drm/intel/issues/9196
[i915#9226]: https://gitlab.freedesktop.org/drm/intel/issues/9226
[i915#9227]: https://gitlab.freedesktop.org/drm/intel/issues/9227
[i915#9261]: https://gitlab.freedesktop.org/drm/intel/issues/9261
[i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262
[i915#9311]: https://gitlab.freedesktop.org/drm/intel/issues/9311
[i915#9323]: https://gitlab.freedesktop.org/drm/intel/issues/9323
[i915#9353]: https://gitlab.freedesktop.org/drm/intel/issues/9353
[i915#9408]: https://gitlab.freedesktop.org/drm/intel/issues/9408
[i915#9412]: https://gitlab.freedesktop.org/drm/intel/issues/9412
[i915#9414]: https://gitlab.freedesktop.org/drm/intel/issues/9414
[i915#9423]: https://gitlab.freedesktop.org/drm/intel/issues/9423
[i915#9424]: https://gitlab.freedesktop.org/drm/intel/issues/9424
[i915#9433]: https://gitlab.freedesktop.org/drm/intel/issues/9433
[i915#9473]: https://gitlab.freedesktop.org/drm/intel/issues/9473
[i915#9519]: https://gitlab.freedesktop.org/drm/intel/issues/9519
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7536 -> IGTPW_9998
CI-20190529: 20190529
CI_DRM_13752: 6e58c5478b3011e16f563b812da45ce47853bb6c @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9998: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/index.html
IGT_7536: fdd51d526a9a7cb875cfad2641e90a72af392d98 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9998/index.html
[-- Attachment #2: Type: text/html, Size: 107658 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/2] lib/intel_blt: Add wrappers to prepare batch buffers and submit exec
2023-10-13 10:37 ` [igt-dev] [PATCH i-g-t 1/2] lib/intel_blt: Add wrappers to prepare batch buffers and submit exec sai.gowtham.ch
@ 2023-10-16 8:54 ` Zbigniew Kempczyński
2023-10-16 17:44 ` Ch, Sai Gowtham
0 siblings, 1 reply; 12+ messages in thread
From: Zbigniew Kempczyński @ 2023-10-16 8:54 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Fri, Oct 13, 2023 at 04:07:27PM +0530, sai.gowtham.ch@intel.com wrote:
> From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
>
> Adding wrapper for mem-set and mem-copy instructions to prepare
> batch buffers and submit exec, (blt_mem_copy, blt_mem_set,
> emit_blt_mem_copy, emit_blt_set_mem)
>
> Cc: Karolina Stolarek <karolina.stolarek@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
> ---
> lib/intel_blt.c | 199 ++++++++++++++++++++++++++++++++++++++++++++++++
> lib/intel_blt.h | 39 ++++++++++
> lib/intel_reg.h | 4 +
> 3 files changed, 242 insertions(+)
>
> diff --git a/lib/intel_blt.c b/lib/intel_blt.c
> index a76c7a404..4e7357b6f 100644
> --- a/lib/intel_blt.c
> +++ b/lib/intel_blt.c
> @@ -13,12 +13,14 @@
> #include "igt.h"
> #include "igt_syncobj.h"
> #include "intel_blt.h"
> +#include "intel_mocs.h"
> #include "xe/xe_ioctl.h"
> #include "xe/xe_query.h"
> #include "xe/xe_util.h"
>
> #define BITRANGE(start, end) (end - start + 1)
> #define GET_CMDS_INFO(__fd) intel_get_cmds_info(intel_get_drm_devid(__fd))
> +#define MEM_COPY_MOCS_SHIFT 25
>
> /* Blitter tiling definitions sanity checks */
> static_assert(T_LINEAR == I915_TILING_NONE, "Linear definitions have to match");
> @@ -1577,6 +1579,186 @@ int blt_fast_copy(int fd,
> return ret;
> }
>
> +/**
> + * blt_mem_init:
> + * @fd: drm fd
> + * @mem: structure for initialization
> + *
> + * Function is zeroing @mem and sets fd and driver fields (INTEL_DRIVER_I915 or
> + * INTEL_DRIVER_XE).
> + */
> +void blt_mem_init(int fd, struct blt_mem_data *mem)
> +{
> + memset(mem, 0, sizeof(*mem));
> +
> + mem->fd = fd;
> + mem->driver = get_intel_driver(fd);
> +}
> +
> +static void emit_blt_mem_copy(int fd, uint64_t ahnd, const struct blt_mem_data *mem)
> +{
> + uint64_t dst_offset, src_offset, alignment;
> + int i;
> + uint32_t *batch;
> + uint32_t optype;
> +
> + alignment = get_default_alignment(fd, mem->driver);
> + src_offset = get_offset(ahnd, mem->src.handle, mem->src.size, alignment);
> + dst_offset = get_offset(ahnd, mem->dst.handle, mem->dst.size, alignment);
> +
> + batch = bo_map(fd, mem->bb.handle, mem->bb.size, mem->driver);
> + optype = mem->src.type == M_MATRIX ? 1 << 17 : 0;
> +
> + i = 0;
> + batch[i++] = MEM_COPY_CMD | (1 << 19) | optype;
> + batch[i++] = mem->src.width - 1;
> + batch[i++] = mem->src.height - 1;
> + batch[i++] = mem->src.pitch - 1;
> + batch[i++] = mem->dst.pitch - 1;
> + batch[i++] = src_offset;
> + batch[i++] = src_offset << 32;
> + batch[i++] = dst_offset;
> + batch[i++] = dst_offset << 32;
> + batch[i++] = mem->src.mocs << MEM_COPY_MOCS_SHIFT | mem->dst.mocs;
> + batch[i++] = MI_BATCH_BUFFER_END;
> +
> + munmap(batch, mem->bb.size);
> +}
> +
> +/**
> + * blt_mem_copy:
> + * @fd: drm fd
> + * @ctx: intel_ctx_t context
> + * @e: blitter engine for @ctx
> + * @ahnd: allocator handle
> + * @blt: blitter data for mem-copy.
> + *
> + * Function does mem blit between @src and @dst described in @blt object.
> + *
> + * Returns:
> + * execbuffer status.
> + */
> +int blt_mem_copy(int fd, const intel_ctx_t *ctx,
> + const struct intel_execution_engine2 *e,
> + uint64_t ahnd,
> + const struct blt_mem_data *mem)
> +{
> + struct drm_i915_gem_execbuffer2 execbuf = {};
> + struct drm_i915_gem_exec_object2 obj[3] = {};
> + uint64_t dst_offset, src_offset, bb_offset, alignment;
> + int ret;
> +
> + alignment = get_default_alignment(fd, mem->driver);
> + src_offset = get_offset(ahnd, mem->src.handle, mem->src.size, alignment);
> + dst_offset = get_offset(ahnd, mem->dst.handle, mem->dst.size, alignment);
> + bb_offset = get_offset(ahnd, mem->bb.handle, mem->bb.size, alignment);
> +
> + emit_blt_mem_copy(fd, ahnd, mem);
> +
> + if (mem->driver == INTEL_DRIVER_XE) {
> + intel_ctx_xe_exec(ctx, ahnd, CANONICAL(bb_offset));
> + } else {
> + obj[0].offset = CANONICAL(dst_offset);
> + obj[1].offset = CANONICAL(src_offset);
> + obj[2].offset = CANONICAL(bb_offset);
> + obj[0].handle = mem->dst.handle;
> + obj[1].handle = mem->src.handle;
> + obj[2].handle = mem->bb.handle;
> + obj[0].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE |
> + EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
> + obj[1].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
> + obj[2].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
> + execbuf.buffer_count = 3;
> + execbuf.buffers_ptr = to_user_pointer(obj);
> + execbuf.rsvd1 = ctx ? ctx->id : 0;
> + execbuf.flags = e ? e->flags : I915_EXEC_BLT;
> + ret = __gem_execbuf(fd, &execbuf);
> + put_offset(ahnd, mem->dst.handle);
> + put_offset(ahnd, mem->src.handle);
> + put_offset(ahnd, mem->bb.handle);
> + }
> +
> + return ret;
> +}
> +
> +static void emit_blt_mem_set(int fd, uint64_t ahnd, const struct blt_mem_data *mem,
> + uint8_t fill_data)
> +{
> + uint64_t dst_offset, alignment;
> + int b;
> + uint32_t *batch;
> + uint32_t value;
> +
> + alignment = get_default_alignment(fd, mem->driver);
> + dst_offset = get_offset(ahnd, mem->dst.handle, mem->dst.size, alignment);
> +
> + batch = bo_map(fd, mem->bb.handle, mem->bb.size, mem->driver);
> + value = (uint32_t)fill_data << 24;
> +
> + b = 0;
> + batch[b++] = MEM_SET_CMD;
> + batch[b++] = mem->dst.width - 1;
> + batch[b++] = mem->dst.height - 1;
> + batch[b++] = mem->dst.pitch - 1;
> + batch[b++] = dst_offset;
> + batch[b++] = dst_offset << 32;
> + batch[b++] = value | mem->dst.mocs;
> + batch[b++] = MI_BATCH_BUFFER_END;
> +
> + munmap(batch, mem->bb.size);
> +}
> +/**
> + * blt_mem_set:
> + * @fd: drm fd
> + * @ctx: intel_ctx_t context
> + * @e: blitter engine for @ctx
> + * @ahnd: allocator handle
> + * @blt: blitter data for mem-set.
> + *
> + * Function does mem set blit in described @blt object.
> + *
> + * Returns:
> + * execbuffer status.
> + */
> +int blt_mem_set(int fd, const intel_ctx_t *ctx,
> + const struct intel_execution_engine2 *e,
> + uint64_t ahnd,
> + const struct blt_mem_data *mem,
> + uint8_t fill_data)
> +{
> + struct drm_i915_gem_execbuffer2 execbuf = {};
> + struct drm_i915_gem_exec_object2 obj[2] = {};
> + uint64_t dst_offset, bb_offset, alignment;
> + int ret;
> +
> + alignment = get_default_alignment(fd, mem->driver);
> + dst_offset = get_offset(ahnd, mem->dst.handle, mem->dst.size, alignment);
> + bb_offset = get_offset(ahnd, mem->bb.handle, mem->bb.size, alignment);
> +
> + emit_blt_mem_set(fd, ahnd, mem, fill_data);
> +
> + if (mem->driver == INTEL_DRIVER_XE) {
> + intel_ctx_xe_exec(ctx, ahnd, CANONICAL(bb_offset));
> + } else {
> + obj[0].offset = CANONICAL(dst_offset);
> + obj[1].offset = CANONICAL(bb_offset);
> + obj[0].handle = mem->dst.handle;
> + obj[1].handle = mem->bb.handle;
> + obj[0].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE |
> + EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
> + obj[1].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
> + execbuf.buffer_count = 2;
> + execbuf.buffers_ptr = to_user_pointer(obj);
> + execbuf.rsvd1 = ctx ? ctx->id : 0;
> + execbuf.flags = e ? e->flags : I915_EXEC_BLT;
> + ret = __gem_execbuf(fd, &execbuf);
> + put_offset(ahnd, mem->dst.handle);
> + put_offset(ahnd, mem->bb.handle);
> + }
> +
> + return ret;
> +}
> +
> void blt_set_geom(struct blt_copy_object *obj, uint32_t pitch,
> int16_t x1, int16_t y1, int16_t x2, int16_t y2,
> uint16_t x_offset, uint16_t y_offset)
> @@ -1659,6 +1841,23 @@ void blt_set_object(struct blt_copy_object *obj,
> obj->compression_type = compression_type;
> }
>
> +void blt_set_mem_object(struct blt_mem_object *obj,
> + uint32_t handle, uint64_t size, uint32_t pitch,
> + uint32_t width, uint32_t height, uint32_t region,
> + uint8_t mocs, enum blt_memop_type type,
> + enum blt_compression compression)
> +{
> + obj->handle = handle;
> + obj->region = region;
> + obj->size = size;
> + obj->mocs = mocs;
> + obj->type = type;
> + obj->compression = compression;
> + obj->width = width;
> + obj->height = height;
> + obj->pitch = pitch;
> +}
> +
> void blt_set_object_ext(struct blt_block_copy_object_ext *obj,
> uint8_t compression_format,
> uint16_t surface_width, uint16_t surface_height,
> diff --git a/lib/intel_blt.h b/lib/intel_blt.h
> index 7b4271620..d6f40680d 100644
> --- a/lib/intel_blt.h
> +++ b/lib/intel_blt.h
> @@ -93,6 +93,19 @@ struct blt_copy_object {
> uint32_t plane_offset;
> };
>
> +struct blt_mem_object {
> + uint32_t handle;
> + uint32_t region;
> + uint64_t size;
> + uint8_t mocs;
Rename to mocs_index (see gen12_block_copy_data) for consistency.
Rest looks ok. BTW looking at mem-copy I see M_MATRIX is supported
for pvc so you should update intel_cmds_info.c either.
What about printing instruction debug similar to dump_bb_fast_cmd?
(print_bb = true?).
With above nits addressed:
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
--
Zbigniew
> + enum blt_memop_type type;
> + enum blt_compression compression;
> + uint32_t width;
> + uint32_t height;
> + uint32_t pitch;
> + uint32_t *ptr;
> +};
> +
> struct blt_copy_batch {
> uint32_t handle;
> uint32_t region;
> @@ -112,6 +125,14 @@ struct blt_copy_data {
> bool print_bb;
> };
>
> +struct blt_mem_data {
> + int fd;
> + enum intel_driver driver;
> + struct blt_mem_object src;
> + struct blt_mem_object dst;
> + struct blt_copy_batch bb;
> +};
> +
> enum blt_surface_type {
> SURFACE_TYPE_1D,
> SURFACE_TYPE_2D,
> @@ -231,6 +252,17 @@ int blt_fast_copy(int fd,
> uint64_t ahnd,
> const struct blt_copy_data *blt);
>
> +void blt_mem_init(int fd, struct blt_mem_data *mem);
> +
> +int blt_mem_copy(int fd, const intel_ctx_t *ctx,
> + const struct intel_execution_engine2 *e,
> + uint64_t ahnd,
> + const struct blt_mem_data *mem);
> +
> +int blt_mem_set(int fd, const intel_ctx_t *ctx,
> + const struct intel_execution_engine2 *e, uint64_t ahnd,
> + const struct blt_mem_data *mem, uint8_t fill_data);
> +
> void blt_set_geom(struct blt_copy_object *obj, uint32_t pitch,
> int16_t x1, int16_t y1, int16_t x2, int16_t y2,
> uint16_t x_offset, uint16_t y_offset);
> @@ -250,6 +282,13 @@ void blt_set_object(struct blt_copy_object *obj,
> uint8_t mocs_index, enum blt_tiling_type tiling,
> enum blt_compression compression,
> enum blt_compression_type compression_type);
> +
> +void blt_set_mem_object(struct blt_mem_object *obj,
> + uint32_t handle, uint64_t size, uint32_t pitch,
> + uint32_t width, uint32_t height, uint32_t region,
> + uint8_t mocs, enum blt_memop_type type,
> + enum blt_compression compression);
> +
> void blt_set_object_ext(struct blt_block_copy_object_ext *obj,
> uint8_t compression_format,
> uint16_t surface_width, uint16_t surface_height,
> diff --git a/lib/intel_reg.h b/lib/intel_reg.h
> index ea463376b..a8190d683 100644
> --- a/lib/intel_reg.h
> +++ b/lib/intel_reg.h
> @@ -2588,6 +2588,10 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> #define XY_FAST_COPY_COLOR_DEPTH_64 (4 << 24)
> #define XY_FAST_COPY_COLOR_DEPTH_128 (5 << 24)
>
> +/* RAW memory commands */
> +#define MEM_COPY_CMD ((0x2 << 29)|(0x5a << 22)|0x8)
> +#define MEM_SET_CMD ((0x2 << 29)|(0x5b << 22)|0x5)
> +
> #define CTXT_NO_RESTORE (1)
> #define CTXT_PALETTE_SAVE_DISABLE (1<<3)
> #define CTXT_PALETTE_RESTORE_DISABLE (1<<2)
> --
> 2.39.1
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] intel/xe_copy_basic: Add copy basic test to exercise blt commands
2023-10-13 10:37 ` [igt-dev] [PATCH i-g-t 2/2] intel/xe_copy_basic: Add copy basic test to exercise blt commands sai.gowtham.ch
@ 2023-10-16 9:14 ` Zbigniew Kempczyński
2023-10-16 17:41 ` Ch, Sai Gowtham
0 siblings, 1 reply; 12+ messages in thread
From: Zbigniew Kempczyński @ 2023-10-16 9:14 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Fri, Oct 13, 2023 at 04:07:28PM +0530, sai.gowtham.ch@intel.com wrote:
> From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
>
> Add copy basic test to exercise copy commands like mem-copy and mem-set.
>
> Cc: Karolina Stolarek <karolina.stolarek@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
> ---
> tests/intel/xe_copy_basic.c | 195 ++++++++++++++++++++++++++++++++++++
> tests/meson.build | 1 +
> 2 files changed, 196 insertions(+)
> create mode 100644 tests/intel/xe_copy_basic.c
>
> diff --git a/tests/intel/xe_copy_basic.c b/tests/intel/xe_copy_basic.c
> new file mode 100644
> index 000000000..83b5ce123
> --- /dev/null
> +++ b/tests/intel/xe_copy_basic.c
> @@ -0,0 +1,195 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2023 Intel Corporation
> + *
> + * Authors:
> + * Sai Gowtham Ch <sai.gowtham.ch@intel.com>
> + */
> +
> +#include "igt.h"
> +#include "lib/igt_syncobj.h"
> +#include "intel_blt.h"
> +#include "lib/intel_cmds_info.h"
> +#include "lib/intel_mocs.h"
> +#include "lib/intel_reg.h"
> +#include "xe/xe_ioctl.h"
> +#include "xe/xe_query.h"
> +#include "xe/xe_util.h"
> +
> +#define MEM_FILL 0x8b
> +
> +/**
> + * TEST: Test to validate copy commands on xe
> + * Category: Software building block
> + * Sub-category: Copy
> + * Functionality: blitter
> + */
> +
> +/**
> + * SUBTEST: mem-copy-%s
> + * Description: Test validates MEM_COPY command, it takes various
> + * parameters needed for the filling batch buffer for MEM_COPY command
> + * with size %arg[1].
> + * Test category: functionality test
> + *
> + * arg[1]:
> + * @0x369: 0x369
> + * @0x3fff: 0x3fff
> + * @0xfd: 0xfd
> + * @0xfffe: 0xfffe
> + */
> +static void
> +mem_copy(int fd, uint32_t src_handle, uint32_t dst_handle,
> + const intel_ctx_t *ctx, uint32_t size, uint32_t width,
> + uint32_t height, uint32_t region)
Invalid indentation.
> +{
> + struct blt_mem_data mem = {};
> + uint64_t bb_size = xe_get_default_alignment(fd);
> + uint64_t ahnd = intel_allocator_open_full(fd, ctx->vm, 0, 0,
> + INTEL_ALLOCATOR_SIMPLE,
> + ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> + uint32_t bb;
> + int result;
> + uint8_t src_mocs = intel_get_uc_mocs_index(fd);
> + uint8_t dst_mocs = src_mocs;
> +
> + bb = xe_bo_create_flags(fd, 0, bb_size, region);
> +
> + blt_mem_init(fd, &mem);
> + blt_set_mem_object(&mem.src, src_handle, size, 0, width, height,
> + region, src_mocs, M_LINEAR, COMPRESSION_DISABLED);
> + blt_set_mem_object(&mem.dst, dst_handle, size, 0, width, height,
> + region, dst_mocs, M_LINEAR, COMPRESSION_DISABLED);
> + mem.src.ptr = xe_bo_map(fd, src_handle, size);
> + mem.dst.ptr = xe_bo_map(fd, dst_handle, size);
> +
> + blt_set_batch(&mem.bb, bb, bb_size, region);
> + igt_assert(mem.src.width == mem.dst.width);
> +
> + blt_mem_copy(fd, ctx, NULL, ahnd, &mem);
> + result = memcmp(mem.src.ptr, mem.dst.ptr, mem.src.size);
> + igt_assert_f(!result, "source and destination differ\n");
> +
> + intel_allocator_bind(ahnd, 0, 0);
> + munmap(mem.src.ptr, size);
> + munmap(mem.dst.ptr, size);
> + gem_close(fd, bb);
> + put_ahnd(ahnd);
> +}
> +
> +/**
> + * SUBTEST: mem-set-%s
> + * Description: Test validates MEM_SET command with size %arg[1].
> + * Test category: functionality test
> + *
> + * arg[1]:
> + *
> + * @0x369: 0x369
> + * @0x3fff: 0x3fff
> + * @0xfd: 0xfd
> + * @0xfffe: 0xfffe
> + */
> +static void mem_set(int fd, uint32_t dst_handle, const intel_ctx_t *ctx,
> + uint32_t size, uint32_t width, uint32_t height,
> + uint8_t fill_data, uint32_t region)
> +{
> + struct blt_mem_data mem = {};
> + uint64_t bb_size = xe_get_default_alignment(fd);
> + uint64_t ahnd = intel_allocator_open_full(fd, ctx->vm, 0, 0,
> + INTEL_ALLOCATOR_SIMPLE,
> + ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> + uint32_t bb;
> + uint8_t *result;
> + uint8_t dst_mocs = intel_get_uc_mocs_index(fd);
> +
> + bb = xe_bo_create_flags(fd, 0, bb_size, region);
> + blt_mem_init(fd, &mem);
> + blt_set_mem_object(&mem.dst, dst_handle, size, 0, width, height, region,
> + dst_mocs, M_LINEAR, COMPRESSION_DISABLED);
> + mem.dst.ptr = xe_bo_map(fd, dst_handle, size);
> + blt_set_batch(&mem.bb, bb, bb_size, region);
> + blt_mem_set(fd, ctx, NULL, ahnd, &mem, fill_data);
> +
> + result = (uint8_t *)mem.dst.ptr;
> +
> + igt_assert(result[0] == fill_data);
> + igt_assert(result[width - 1] == fill_data);
> + igt_assert(result[width] != fill_data);
Nice. That I was asking about.
> +
> + intel_allocator_bind(ahnd, 0, 0);
> + munmap(mem.dst.ptr, size);
> + gem_close(fd, bb);
> + put_ahnd(ahnd);
> +}
> +
> +static void copy_test(int fd, uint32_t size, enum blt_cmd_type cmd, uint32_t region)
> +{
> + struct drm_xe_engine_class_instance inst = {
> + .engine_class = DRM_XE_ENGINE_CLASS_COPY,
> + };
> + uint32_t src_handle, dst_handle, vm, exec_queue, src_size, dst_size;
> + uint32_t bo_size = ALIGN(size + xe_cs_prefetch_size(fd), xe_get_default_alignment(fd));
What that prefetch size is for? This is not bb.
> + const intel_ctx_t *ctx;
> +
> + src_handle = xe_bo_create_flags(fd, 0, bo_size, region);
> + dst_handle = xe_bo_create_flags(fd, 0, bo_size, region);
> + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
> + exec_queue = xe_exec_queue_create(fd, vm, &inst, 0);
> + ctx = intel_ctx_xe(fd, vm, exec_queue, 0, 0, 0);
> +
> + src_size = bo_size;
> + dst_size = bo_size;
> +
> + if (cmd == MEM_COPY) {
> + mem_copy(fd, src_handle, dst_handle, ctx, src_size, size,
> + 1, region);
> + } else if (cmd == MEM_SET) {
> + mem_set(fd, dst_handle, ctx, dst_size, size, 1, MEM_FILL,
> + region);
> + }
Curly braces are not needed here.
> +
> + gem_close(fd, src_handle);
> + gem_close(fd, dst_handle);
> + xe_exec_queue_destroy(fd, exec_queue);
> + xe_vm_destroy(fd, vm);
free(ctx) here. Likely we should add intel_ctx_xe_destroy() as this
structure is opaque, but you don't need to do this in this series.
> +}
> +
> +igt_main
> +{
> + int fd;
> + uint32_t region;
> + uint64_t size[] = {0xFD, 0x369, 0x3FFF, 0xfffe};
Use consistent lower/uppercase.
> +
> + igt_fixture {
> + fd = drm_open_driver(DRIVER_XE);
> + xe_device_get(fd);
> + set = xe_get_memory_region_set(fd,
> + XE_MEM_REGION_CLASS_SYSMEM,
> + XE_MEM_REGION_CLASS_VRAM);
> + }
> +
> + for (int i = 0; i < ARRAY_SIZE(size); i++) {
> + igt_subtest_f("mem-copy-0x%lx", size[i]) {
Please rename to "mem-copy-linear-...".
> + igt_require(blt_has_mem_copy(fd));
> + for_each_variation_r(regions, 1, set) {
> + region = igt_collection_get_value(regions, 0);
> + copy_test(fd, size[i], MEM_COPY, region);
> + }
> + }
> + }
> +
> + for (int i = 0; i < ARRAY_SIZE(size); i++) {
> + igt_subtest_f("mem-set-0x%lx", size[i]) {
Same here.
> + igt_require(blt_has_mem_set(fd));
> + for_each_variation_r(regions, 1, set) {
> + region = igt_collection_get_value(regions, 0);
> + copy_test(fd, size[i], MEM_SET, region);
> + }
> + }
> + }
This is almost ready, but respin with above fixes to ML.
Do you plan add matrix copy/set?
--
Zbigniew
> +
> + igt_fixture {
> + drm_close_driver(fd);
> + }
> +}
> diff --git a/tests/meson.build b/tests/meson.build
> index 2c2e1ca9a..5b19994f7 100644
> --- a/tests/meson.build
> +++ b/tests/meson.build
> @@ -275,6 +275,7 @@ intel_xe_progs = [
> 'xe_ccs',
> 'xe_create',
> 'xe_compute',
> + 'xe_copy_basic',
> 'xe_dma_buf_sync',
> 'xe_debugfs',
> 'xe_drm_fdinfo',
> --
> 2.39.1
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] intel/xe_copy_basic: Add copy basic test to exercise blt commands
2023-10-16 9:14 ` Zbigniew Kempczyński
@ 2023-10-16 17:41 ` Ch, Sai Gowtham
0 siblings, 0 replies; 12+ messages in thread
From: Ch, Sai Gowtham @ 2023-10-16 17:41 UTC (permalink / raw)
To: Kempczynski, Zbigniew; +Cc: igt-dev@lists.freedesktop.org
>-----Original Message-----
>From: Kempczynski, Zbigniew <zbigniew.kempczynski@intel.com>
>Sent: Monday, October 16, 2023 2:45 PM
>To: Ch, Sai Gowtham <sai.gowtham.ch@intel.com>
>Cc: igt-dev@lists.freedesktop.org; Stolarek, Karolina
><karolina.stolarek@intel.com>
>Subject: Re: [PATCH i-g-t 2/2] intel/xe_copy_basic: Add copy basic test to
>exercise blt commands
>
>On Fri, Oct 13, 2023 at 04:07:28PM +0530, sai.gowtham.ch@intel.com wrote:
>> From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
>>
>> Add copy basic test to exercise copy commands like mem-copy and mem-set.
>>
>> Cc: Karolina Stolarek <karolina.stolarek@intel.com>
>> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
>> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
>> ---
>> tests/intel/xe_copy_basic.c | 195
>++++++++++++++++++++++++++++++++++++
>> tests/meson.build | 1 +
>> 2 files changed, 196 insertions(+)
>> create mode 100644 tests/intel/xe_copy_basic.c
>>
>> diff --git a/tests/intel/xe_copy_basic.c b/tests/intel/xe_copy_basic.c
>> new file mode 100644 index 000000000..83b5ce123
>> --- /dev/null
>> +++ b/tests/intel/xe_copy_basic.c
>> @@ -0,0 +1,195 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2023 Intel Corporation
>> + *
>> + * Authors:
>> + * Sai Gowtham Ch <sai.gowtham.ch@intel.com>
>> + */
>> +
>> +#include "igt.h"
>> +#include "lib/igt_syncobj.h"
>> +#include "intel_blt.h"
>> +#include "lib/intel_cmds_info.h"
>> +#include "lib/intel_mocs.h"
>> +#include "lib/intel_reg.h"
>> +#include "xe/xe_ioctl.h"
>> +#include "xe/xe_query.h"
>> +#include "xe/xe_util.h"
>> +
>> +#define MEM_FILL 0x8b
>> +
>> +/**
>> + * TEST: Test to validate copy commands on xe
>> + * Category: Software building block
>> + * Sub-category: Copy
>> + * Functionality: blitter
>> + */
>> +
>> +/**
>> + * SUBTEST: mem-copy-%s
>> + * Description: Test validates MEM_COPY command, it takes various
>> + * parameters needed for the filling batch buffer for MEM_COPY
>command
>> + * with size %arg[1].
>> + * Test category: functionality test
>> + *
>> + * arg[1]:
>> + * @0x369: 0x369
>> + * @0x3fff: 0x3fff
>> + * @0xfd: 0xfd
>> + * @0xfffe: 0xfffe
>> + */
>> +static void
>> +mem_copy(int fd, uint32_t src_handle, uint32_t dst_handle,
>> + const intel_ctx_t *ctx, uint32_t size, uint32_t width,
>> + uint32_t height, uint32_t region)
>
>Invalid indentation.
>
>> +{
>> + struct blt_mem_data mem = {};
>> + uint64_t bb_size = xe_get_default_alignment(fd);
>> + uint64_t ahnd = intel_allocator_open_full(fd, ctx->vm, 0, 0,
>> + INTEL_ALLOCATOR_SIMPLE,
>> +
>ALLOC_STRATEGY_LOW_TO_HIGH, 0);
>> + uint32_t bb;
>> + int result;
>> + uint8_t src_mocs = intel_get_uc_mocs_index(fd);
>> + uint8_t dst_mocs = src_mocs;
>> +
>> + bb = xe_bo_create_flags(fd, 0, bb_size, region);
>> +
>> + blt_mem_init(fd, &mem);
>> + blt_set_mem_object(&mem.src, src_handle, size, 0, width, height,
>> + region, src_mocs, M_LINEAR,
>COMPRESSION_DISABLED);
>> + blt_set_mem_object(&mem.dst, dst_handle, size, 0, width, height,
>> + region, dst_mocs, M_LINEAR,
>COMPRESSION_DISABLED);
>> + mem.src.ptr = xe_bo_map(fd, src_handle, size);
>> + mem.dst.ptr = xe_bo_map(fd, dst_handle, size);
>> +
>> + blt_set_batch(&mem.bb, bb, bb_size, region);
>> + igt_assert(mem.src.width == mem.dst.width);
>> +
>> + blt_mem_copy(fd, ctx, NULL, ahnd, &mem);
>> + result = memcmp(mem.src.ptr, mem.dst.ptr, mem.src.size);
>> + igt_assert_f(!result, "source and destination differ\n");
>> +
>> + intel_allocator_bind(ahnd, 0, 0);
>> + munmap(mem.src.ptr, size);
>> + munmap(mem.dst.ptr, size);
>> + gem_close(fd, bb);
>> + put_ahnd(ahnd);
>> +}
>> +
>> +/**
>> + * SUBTEST: mem-set-%s
>> + * Description: Test validates MEM_SET command with size %arg[1].
>> + * Test category: functionality test
>> + *
>> + * arg[1]:
>> + *
>> + * @0x369: 0x369
>> + * @0x3fff: 0x3fff
>> + * @0xfd: 0xfd
>> + * @0xfffe: 0xfffe
>> + */
>> +static void mem_set(int fd, uint32_t dst_handle, const intel_ctx_t *ctx,
>> + uint32_t size, uint32_t width, uint32_t height,
>> + uint8_t fill_data, uint32_t region) {
>> + struct blt_mem_data mem = {};
>> + uint64_t bb_size = xe_get_default_alignment(fd);
>> + uint64_t ahnd = intel_allocator_open_full(fd, ctx->vm, 0, 0,
>> + INTEL_ALLOCATOR_SIMPLE,
>> +
>ALLOC_STRATEGY_LOW_TO_HIGH, 0);
>> + uint32_t bb;
>> + uint8_t *result;
>> + uint8_t dst_mocs = intel_get_uc_mocs_index(fd);
>> +
>> + bb = xe_bo_create_flags(fd, 0, bb_size, region);
>> + blt_mem_init(fd, &mem);
>> + blt_set_mem_object(&mem.dst, dst_handle, size, 0, width, height,
>region,
>> + dst_mocs, M_LINEAR, COMPRESSION_DISABLED);
>> + mem.dst.ptr = xe_bo_map(fd, dst_handle, size);
>> + blt_set_batch(&mem.bb, bb, bb_size, region);
>> + blt_mem_set(fd, ctx, NULL, ahnd, &mem, fill_data);
>> +
>> + result = (uint8_t *)mem.dst.ptr;
>> +
>> + igt_assert(result[0] == fill_data);
>> + igt_assert(result[width - 1] == fill_data);
>> + igt_assert(result[width] != fill_data);
>
>Nice. That I was asking about.
>
>> +
>> + intel_allocator_bind(ahnd, 0, 0);
>> + munmap(mem.dst.ptr, size);
>> + gem_close(fd, bb);
>> + put_ahnd(ahnd);
>> +}
>> +
>> +static void copy_test(int fd, uint32_t size, enum blt_cmd_type cmd,
>> +uint32_t region) {
>> + struct drm_xe_engine_class_instance inst = {
>> + .engine_class = DRM_XE_ENGINE_CLASS_COPY,
>> + };
>> + uint32_t src_handle, dst_handle, vm, exec_queue, src_size, dst_size;
>> + uint32_t bo_size = ALIGN(size + xe_cs_prefetch_size(fd),
>> +xe_get_default_alignment(fd));
>
>What that prefetch size is for? This is not bb.
>
>> + const intel_ctx_t *ctx;
>> +
>> + src_handle = xe_bo_create_flags(fd, 0, bo_size, region);
>> + dst_handle = xe_bo_create_flags(fd, 0, bo_size, region);
>> + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
>> + exec_queue = xe_exec_queue_create(fd, vm, &inst, 0);
>> + ctx = intel_ctx_xe(fd, vm, exec_queue, 0, 0, 0);
>> +
>> + src_size = bo_size;
>> + dst_size = bo_size;
>> +
>> + if (cmd == MEM_COPY) {
>> + mem_copy(fd, src_handle, dst_handle, ctx, src_size, size,
>> + 1, region);
>> + } else if (cmd == MEM_SET) {
>> + mem_set(fd, dst_handle, ctx, dst_size, size, 1, MEM_FILL,
>> + region);
>> + }
>
>Curly braces are not needed here.
>
>> +
>> + gem_close(fd, src_handle);
>> + gem_close(fd, dst_handle);
>> + xe_exec_queue_destroy(fd, exec_queue);
>> + xe_vm_destroy(fd, vm);
>
>free(ctx) here. Likely we should add intel_ctx_xe_destroy() as this structure is
>opaque, but you don't need to do this in this series.
>
>> +}
>> +
>> +igt_main
>> +{
>> + int fd;
>> + uint32_t region;
>> + uint64_t size[] = {0xFD, 0x369, 0x3FFF, 0xfffe};
>
>Use consistent lower/uppercase.
>
>> +
>> + igt_fixture {
>> + fd = drm_open_driver(DRIVER_XE);
>> + xe_device_get(fd);
>> + set = xe_get_memory_region_set(fd,
>> +
>XE_MEM_REGION_CLASS_SYSMEM,
>> + XE_MEM_REGION_CLASS_VRAM);
>> + }
>> +
>> + for (int i = 0; i < ARRAY_SIZE(size); i++) {
>> + igt_subtest_f("mem-copy-0x%lx", size[i]) {
>
>Please rename to "mem-copy-linear-...".
>> + igt_require(blt_has_mem_copy(fd));
>> + for_each_variation_r(regions, 1, set) {
>> + region = igt_collection_get_value(regions, 0);
>> + copy_test(fd, size[i], MEM_COPY, region);
>> + }
>> + }
>> + }
>> +
>> + for (int i = 0; i < ARRAY_SIZE(size); i++) {
>> + igt_subtest_f("mem-set-0x%lx", size[i]) {
>
>Same here.
>
>> + igt_require(blt_has_mem_set(fd));
>> + for_each_variation_r(regions, 1, set) {
>> + region = igt_collection_get_value(regions, 0);
>> + copy_test(fd, size[i], MEM_SET, region);
>> + }
>> + }
>> + }
>
>This is almost ready, but respin with above fixes to ML.
>Do you plan add matrix copy/set?
>
Matrix with copy/set is planned as an enhancement.
Re-sending the patch with above fixes.
---
Sai Gowtham Ch
>--
>Zbigniew
>
>> +
>> + igt_fixture {
>> + drm_close_driver(fd);
>> + }
>> +}
>> diff --git a/tests/meson.build b/tests/meson.build index
>> 2c2e1ca9a..5b19994f7 100644
>> --- a/tests/meson.build
>> +++ b/tests/meson.build
>> @@ -275,6 +275,7 @@ intel_xe_progs = [
>> 'xe_ccs',
>> 'xe_create',
>> 'xe_compute',
>> + 'xe_copy_basic',
>> 'xe_dma_buf_sync',
>> 'xe_debugfs',
>> 'xe_drm_fdinfo',
>> --
>> 2.39.1
>>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/2] lib/intel_blt: Add wrappers to prepare batch buffers and submit exec
2023-10-16 8:54 ` Zbigniew Kempczyński
@ 2023-10-16 17:44 ` Ch, Sai Gowtham
0 siblings, 0 replies; 12+ messages in thread
From: Ch, Sai Gowtham @ 2023-10-16 17:44 UTC (permalink / raw)
To: Kempczynski, Zbigniew; +Cc: igt-dev@lists.freedesktop.org
>-----Original Message-----
>From: Kempczynski, Zbigniew <zbigniew.kempczynski@intel.com>
>Sent: Monday, October 16, 2023 2:25 PM
>To: Ch, Sai Gowtham <sai.gowtham.ch@intel.com>
>Cc: igt-dev@lists.freedesktop.org; Stolarek, Karolina
><karolina.stolarek@intel.com>
>Subject: Re: [PATCH i-g-t 1/2] lib/intel_blt: Add wrappers to prepare batch
>buffers and submit exec
>
>On Fri, Oct 13, 2023 at 04:07:27PM +0530, sai.gowtham.ch@intel.com wrote:
>> From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
>>
>> Adding wrapper for mem-set and mem-copy instructions to prepare batch
>> buffers and submit exec, (blt_mem_copy, blt_mem_set,
>> emit_blt_mem_copy, emit_blt_set_mem)
>>
>> Cc: Karolina Stolarek <karolina.stolarek@intel.com>
>> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
>> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
>> ---
>> lib/intel_blt.c | 199
>> ++++++++++++++++++++++++++++++++++++++++++++++++
>> lib/intel_blt.h | 39 ++++++++++
>> lib/intel_reg.h | 4 +
>> 3 files changed, 242 insertions(+)
>>
>> diff --git a/lib/intel_blt.c b/lib/intel_blt.c index
>> a76c7a404..4e7357b6f 100644
>> --- a/lib/intel_blt.c
>> +++ b/lib/intel_blt.c
>> @@ -13,12 +13,14 @@
>> #include "igt.h"
>> #include "igt_syncobj.h"
>> #include "intel_blt.h"
>> +#include "intel_mocs.h"
>> #include "xe/xe_ioctl.h"
>> #include "xe/xe_query.h"
>> #include "xe/xe_util.h"
>>
>> #define BITRANGE(start, end) (end - start + 1) #define
>> GET_CMDS_INFO(__fd) intel_get_cmds_info(intel_get_drm_devid(__fd))
>> +#define MEM_COPY_MOCS_SHIFT 25
>>
>> /* Blitter tiling definitions sanity checks */
>> static_assert(T_LINEAR == I915_TILING_NONE, "Linear definitions have
>> to match"); @@ -1577,6 +1579,186 @@ int blt_fast_copy(int fd,
>> return ret;
>> }
>>
>> +/**
>> + * blt_mem_init:
>> + * @fd: drm fd
>> + * @mem: structure for initialization
>> + *
>> + * Function is zeroing @mem and sets fd and driver fields
>> +(INTEL_DRIVER_I915 or
>> + * INTEL_DRIVER_XE).
>> + */
>> +void blt_mem_init(int fd, struct blt_mem_data *mem) {
>> + memset(mem, 0, sizeof(*mem));
>> +
>> + mem->fd = fd;
>> + mem->driver = get_intel_driver(fd);
>> +}
>> +
>> +static void emit_blt_mem_copy(int fd, uint64_t ahnd, const struct
>> +blt_mem_data *mem) {
>> + uint64_t dst_offset, src_offset, alignment;
>> + int i;
>> + uint32_t *batch;
>> + uint32_t optype;
>> +
>> + alignment = get_default_alignment(fd, mem->driver);
>> + src_offset = get_offset(ahnd, mem->src.handle, mem->src.size,
>alignment);
>> + dst_offset = get_offset(ahnd, mem->dst.handle, mem->dst.size,
>> +alignment);
>> +
>> + batch = bo_map(fd, mem->bb.handle, mem->bb.size, mem->driver);
>> + optype = mem->src.type == M_MATRIX ? 1 << 17 : 0;
>> +
>> + i = 0;
>> + batch[i++] = MEM_COPY_CMD | (1 << 19) | optype;
>> + batch[i++] = mem->src.width - 1;
>> + batch[i++] = mem->src.height - 1;
>> + batch[i++] = mem->src.pitch - 1;
>> + batch[i++] = mem->dst.pitch - 1;
>> + batch[i++] = src_offset;
>> + batch[i++] = src_offset << 32;
>> + batch[i++] = dst_offset;
>> + batch[i++] = dst_offset << 32;
>> + batch[i++] = mem->src.mocs << MEM_COPY_MOCS_SHIFT | mem-
>>dst.mocs;
>> + batch[i++] = MI_BATCH_BUFFER_END;
>> +
>> + munmap(batch, mem->bb.size);
>> +}
>> +
>> +/**
>> + * blt_mem_copy:
>> + * @fd: drm fd
>> + * @ctx: intel_ctx_t context
>> + * @e: blitter engine for @ctx
>> + * @ahnd: allocator handle
>> + * @blt: blitter data for mem-copy.
>> + *
>> + * Function does mem blit between @src and @dst described in @blt
>object.
>> + *
>> + * Returns:
>> + * execbuffer status.
>> + */
>> +int blt_mem_copy(int fd, const intel_ctx_t *ctx,
>> + const struct intel_execution_engine2 *e,
>> + uint64_t ahnd,
>> + const struct blt_mem_data *mem)
>> +{
>> + struct drm_i915_gem_execbuffer2 execbuf = {};
>> + struct drm_i915_gem_exec_object2 obj[3] = {};
>> + uint64_t dst_offset, src_offset, bb_offset, alignment;
>> + int ret;
>> +
>> + alignment = get_default_alignment(fd, mem->driver);
>> + src_offset = get_offset(ahnd, mem->src.handle, mem->src.size,
>alignment);
>> + dst_offset = get_offset(ahnd, mem->dst.handle, mem->dst.size,
>alignment);
>> + bb_offset = get_offset(ahnd, mem->bb.handle, mem->bb.size,
>> +alignment);
>> +
>> + emit_blt_mem_copy(fd, ahnd, mem);
>> +
>> + if (mem->driver == INTEL_DRIVER_XE) {
>> + intel_ctx_xe_exec(ctx, ahnd, CANONICAL(bb_offset));
>> + } else {
>> + obj[0].offset = CANONICAL(dst_offset);
>> + obj[1].offset = CANONICAL(src_offset);
>> + obj[2].offset = CANONICAL(bb_offset);
>> + obj[0].handle = mem->dst.handle;
>> + obj[1].handle = mem->src.handle;
>> + obj[2].handle = mem->bb.handle;
>> + obj[0].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE |
>> + EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
>> + obj[1].flags = EXEC_OBJECT_PINNED |
>EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
>> + obj[2].flags = EXEC_OBJECT_PINNED |
>EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
>> + execbuf.buffer_count = 3;
>> + execbuf.buffers_ptr = to_user_pointer(obj);
>> + execbuf.rsvd1 = ctx ? ctx->id : 0;
>> + execbuf.flags = e ? e->flags : I915_EXEC_BLT;
>> + ret = __gem_execbuf(fd, &execbuf);
>> + put_offset(ahnd, mem->dst.handle);
>> + put_offset(ahnd, mem->src.handle);
>> + put_offset(ahnd, mem->bb.handle);
>> + }
>> +
>> + return ret;
>> +}
>> +
>> +static void emit_blt_mem_set(int fd, uint64_t ahnd, const struct
>blt_mem_data *mem,
>> + uint8_t fill_data)
>> +{
>> + uint64_t dst_offset, alignment;
>> + int b;
>> + uint32_t *batch;
>> + uint32_t value;
>> +
>> + alignment = get_default_alignment(fd, mem->driver);
>> + dst_offset = get_offset(ahnd, mem->dst.handle, mem->dst.size,
>> +alignment);
>> +
>> + batch = bo_map(fd, mem->bb.handle, mem->bb.size, mem->driver);
>> + value = (uint32_t)fill_data << 24;
>> +
>> + b = 0;
>> + batch[b++] = MEM_SET_CMD;
>> + batch[b++] = mem->dst.width - 1;
>> + batch[b++] = mem->dst.height - 1;
>> + batch[b++] = mem->dst.pitch - 1;
>> + batch[b++] = dst_offset;
>> + batch[b++] = dst_offset << 32;
>> + batch[b++] = value | mem->dst.mocs;
>> + batch[b++] = MI_BATCH_BUFFER_END;
>> +
>> + munmap(batch, mem->bb.size);
>> +}
>> +/**
>> + * blt_mem_set:
>> + * @fd: drm fd
>> + * @ctx: intel_ctx_t context
>> + * @e: blitter engine for @ctx
>> + * @ahnd: allocator handle
>> + * @blt: blitter data for mem-set.
>> + *
>> + * Function does mem set blit in described @blt object.
>> + *
>> + * Returns:
>> + * execbuffer status.
>> + */
>> +int blt_mem_set(int fd, const intel_ctx_t *ctx,
>> + const struct intel_execution_engine2 *e,
>> + uint64_t ahnd,
>> + const struct blt_mem_data *mem,
>> + uint8_t fill_data)
>> +{
>> + struct drm_i915_gem_execbuffer2 execbuf = {};
>> + struct drm_i915_gem_exec_object2 obj[2] = {};
>> + uint64_t dst_offset, bb_offset, alignment;
>> + int ret;
>> +
>> + alignment = get_default_alignment(fd, mem->driver);
>> + dst_offset = get_offset(ahnd, mem->dst.handle, mem->dst.size,
>alignment);
>> + bb_offset = get_offset(ahnd, mem->bb.handle, mem->bb.size,
>> +alignment);
>> +
>> + emit_blt_mem_set(fd, ahnd, mem, fill_data);
>> +
>> + if (mem->driver == INTEL_DRIVER_XE) {
>> + intel_ctx_xe_exec(ctx, ahnd, CANONICAL(bb_offset));
>> + } else {
>> + obj[0].offset = CANONICAL(dst_offset);
>> + obj[1].offset = CANONICAL(bb_offset);
>> + obj[0].handle = mem->dst.handle;
>> + obj[1].handle = mem->bb.handle;
>> + obj[0].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE |
>> +
>EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
>> + obj[1].flags = EXEC_OBJECT_PINNED |
>EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
>> + execbuf.buffer_count = 2;
>> + execbuf.buffers_ptr = to_user_pointer(obj);
>> + execbuf.rsvd1 = ctx ? ctx->id : 0;
>> + execbuf.flags = e ? e->flags : I915_EXEC_BLT;
>> + ret = __gem_execbuf(fd, &execbuf);
>> + put_offset(ahnd, mem->dst.handle);
>> + put_offset(ahnd, mem->bb.handle);
>> + }
>> +
>> + return ret;
>> +}
>> +
>> void blt_set_geom(struct blt_copy_object *obj, uint32_t pitch,
>> int16_t x1, int16_t y1, int16_t x2, int16_t y2,
>> uint16_t x_offset, uint16_t y_offset) @@ -1659,6 +1841,23
>@@ void
>> blt_set_object(struct blt_copy_object *obj,
>> obj->compression_type = compression_type; }
>>
>> +void blt_set_mem_object(struct blt_mem_object *obj,
>> + uint32_t handle, uint64_t size, uint32_t pitch,
>> + uint32_t width, uint32_t height, uint32_t region,
>> + uint8_t mocs, enum blt_memop_type type,
>> + enum blt_compression compression)
>> +{
>> + obj->handle = handle;
>> + obj->region = region;
>> + obj->size = size;
>> + obj->mocs = mocs;
>> + obj->type = type;
>> + obj->compression = compression;
>> + obj->width = width;
>> + obj->height = height;
>> + obj->pitch = pitch;
>> +}
>> +
>> void blt_set_object_ext(struct blt_block_copy_object_ext *obj,
>> uint8_t compression_format,
>> uint16_t surface_width, uint16_t surface_height, diff --
>git
>> a/lib/intel_blt.h b/lib/intel_blt.h index 7b4271620..d6f40680d 100644
>> --- a/lib/intel_blt.h
>> +++ b/lib/intel_blt.h
>> @@ -93,6 +93,19 @@ struct blt_copy_object {
>> uint32_t plane_offset;
>> };
>>
>> +struct blt_mem_object {
>> + uint32_t handle;
>> + uint32_t region;
>> + uint64_t size;
>> + uint8_t mocs;
>
>Rename to mocs_index (see gen12_block_copy_data) for consistency.
>
>Rest looks ok. BTW looking at mem-copy I see M_MATRIX is supported for pvc
>so you should update intel_cmds_info.c either.
Missed it, good observation. Adding M_MATRIX.
>
>What about printing instruction debug similar to dump_bb_fast_cmd?
>(print_bb = true?).
I feel this can be added as enhancement later, after merging this series.
Will be merging this series with above fixes.
Thanks,
Gowtham
>
>With above nits addressed:
>
>Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
>
>--
>Zbigniew
>
>> + enum blt_memop_type type;
>> + enum blt_compression compression;
>> + uint32_t width;
>> + uint32_t height;
>> + uint32_t pitch;
>> + uint32_t *ptr;
>> +};
>> +
>> struct blt_copy_batch {
>> uint32_t handle;
>> uint32_t region;
>> @@ -112,6 +125,14 @@ struct blt_copy_data {
>> bool print_bb;
>> };
>>
>> +struct blt_mem_data {
>> + int fd;
>> + enum intel_driver driver;
>> + struct blt_mem_object src;
>> + struct blt_mem_object dst;
>> + struct blt_copy_batch bb;
>> +};
>> +
>> enum blt_surface_type {
>> SURFACE_TYPE_1D,
>> SURFACE_TYPE_2D,
>> @@ -231,6 +252,17 @@ int blt_fast_copy(int fd,
>> uint64_t ahnd,
>> const struct blt_copy_data *blt);
>>
>> +void blt_mem_init(int fd, struct blt_mem_data *mem);
>> +
>> +int blt_mem_copy(int fd, const intel_ctx_t *ctx,
>> + const struct intel_execution_engine2 *e,
>> + uint64_t ahnd,
>> + const struct blt_mem_data *mem);
>> +
>> +int blt_mem_set(int fd, const intel_ctx_t *ctx,
>> + const struct intel_execution_engine2 *e, uint64_t
>ahnd,
>> + const struct blt_mem_data *mem, uint8_t fill_data);
>> +
>> void blt_set_geom(struct blt_copy_object *obj, uint32_t pitch,
>> int16_t x1, int16_t y1, int16_t x2, int16_t y2,
>> uint16_t x_offset, uint16_t y_offset); @@ -250,6 +282,13 @@
>void
>> blt_set_object(struct blt_copy_object *obj,
>> uint8_t mocs_index, enum blt_tiling_type tiling,
>> enum blt_compression compression,
>> enum blt_compression_type compression_type);
>> +
>> +void blt_set_mem_object(struct blt_mem_object *obj,
>> + uint32_t handle, uint64_t size, uint32_t pitch,
>> + uint32_t width, uint32_t height, uint32_t region,
>> + uint8_t mocs, enum blt_memop_type type,
>> + enum blt_compression compression);
>> +
>> void blt_set_object_ext(struct blt_block_copy_object_ext *obj,
>> uint8_t compression_format,
>> uint16_t surface_width, uint16_t surface_height, diff --
>git
>> a/lib/intel_reg.h b/lib/intel_reg.h index ea463376b..a8190d683 100644
>> --- a/lib/intel_reg.h
>> +++ b/lib/intel_reg.h
>> @@ -2588,6 +2588,10 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN
>THE SOFTWARE.
>> #define XY_FAST_COPY_COLOR_DEPTH_64 (4 << 24)
>> #define XY_FAST_COPY_COLOR_DEPTH_128 (5 << 24)
>>
>> +/* RAW memory commands */
>> +#define MEM_COPY_CMD ((0x2 << 29)|(0x5a << 22)|0x8)
>> +#define MEM_SET_CMD ((0x2 << 29)|(0x5b << 22)|0x5)
>> +
>> #define CTXT_NO_RESTORE (1)
>> #define CTXT_PALETTE_SAVE_DISABLE (1<<3)
>> #define CTXT_PALETTE_RESTORE_DISABLE (1<<2)
>> --
>> 2.39.1
>>
^ permalink raw reply [flat|nested] 12+ messages in thread
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2023-10-13 10:37 [igt-dev] [PATCH i-g-t 0/2] Add copy basic test to exercise blt commands sai.gowtham.ch
2023-10-13 10:37 ` [igt-dev] [PATCH i-g-t 1/2] lib/intel_blt: Add wrappers to prepare batch buffers and submit exec sai.gowtham.ch
2023-10-16 8:54 ` Zbigniew Kempczyński
2023-10-16 17:44 ` Ch, Sai Gowtham
2023-10-13 10:37 ` [igt-dev] [PATCH i-g-t 2/2] intel/xe_copy_basic: Add copy basic test to exercise blt commands sai.gowtham.ch
2023-10-16 9:14 ` Zbigniew Kempczyński
2023-10-16 17:41 ` Ch, Sai Gowtham
2023-10-13 14:06 ` [igt-dev] ✓ Fi.CI.BAT: success for Add copy basic test to exercise blt commands (rev6) Patchwork
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2023-10-14 16:05 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
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