* [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest
@ 2023-11-13 19:20 Marcin Bernatowicz
2023-11-20 17:51 ` Kamil Konieczny
0 siblings, 1 reply; 13+ messages in thread
From: Marcin Bernatowicz @ 2023-11-13 19:20 UTC (permalink / raw)
To: igt-dev; +Cc: adam.miszczak, jakub1.kolakowski
Validates the creation of significant Buffer Objects (BO) within VRAM,
accounting for 75% of the CPU-visible VRAM size.
The size of the created BO can be adjusted using command line parameters,
with '-S' representing BO size in MB,
and '-p' representing BO size as a percentage of the VRAM size.
Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
---
tests/intel/xe_create.c | 79 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 78 insertions(+), 1 deletion(-)
diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
index d99bd51cf..fc1b23823 100644
--- a/tests/intel/xe_create.c
+++ b/tests/intel/xe_create.c
@@ -18,6 +18,14 @@
#define PAGE_SIZE 0x1000
+static struct param {
+ int size_MB;
+ int vram_percent;
+} params = {
+ .size_MB = 0,
+ .vram_percent = 75,
+};
+
static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
uint32_t *handlep)
{
@@ -207,7 +215,72 @@ static void create_massive_size(int fd)
}
}
-igt_main
+/**
+ * SUBTEST: create-big-vram
+ * Functionality: BO creation
+ * Test category: functionality test
+ * Description: Validates the creation of substantial BO within VRAM
+ * (constituting 75% of the CPU-visible VRAM).
+ */
+static void create_big_vram(int fd)
+{
+ uint64_t bo_size, size, vram_size, alignment;
+ uint32_t bo_handle;
+ char *bo_ptr = NULL;
+ uint64_t vm = 0;
+ int gt;
+
+ igt_require(xe_has_vram(fd));
+ alignment = xe_get_default_alignment(fd);
+ vm = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_DEFAULT, 0);
+
+ xe_for_each_gt(fd, gt) {
+ vram_size = xe_visible_vram_size(fd, gt);
+ bo_size = params.size_MB ? params.size_MB * 1024UL * 1024UL
+ : ALIGN(vram_size * params.vram_percent / 100, alignment);
+ igt_debug("gt%u bo_size=%lu visible_vram_size=%lu\n", gt, bo_size, vram_size);
+
+ igt_assert_eq(0, __create_bo(fd, vm, bo_size, vram_memory(fd, gt), &bo_handle));
+ bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
+ size = bo_size - 1;
+ while (size > SZ_64K) {
+ igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
+ WRITE_ONCE(bo_ptr[size], 'A');
+ igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
+ size >>= 1;
+ }
+ igt_assert_eq(0, bo_ptr[0]);
+ munmap(bo_ptr, bo_size);
+ gem_close(fd, bo_handle);
+ }
+
+ xe_vm_destroy(fd, vm);
+}
+
+static int opt_handler(int opt, int opt_index, void *data)
+{
+ switch (opt) {
+ case 'S':
+ params.size_MB = atoi(optarg);
+ igt_debug("Size MB: %d\n", params.size_MB);
+ break;
+ case 'p':
+ params.vram_percent = atoi(optarg);
+ igt_debug("Percent of VRAM: %d\n", params.vram_percent);
+ break;
+ default:
+ return IGT_OPT_HANDLER_ERROR;
+ }
+
+ return IGT_OPT_HANDLER_SUCCESS;
+}
+
+const char *help_str =
+ " -S\tBO size in MB\n"
+ " -p\tPercent of VRAM for BO (default 75% of visible VRAM size)\n"
+ ;
+
+igt_main_args("S:p:", NULL, help_str, opt_handler, NULL)
{
int xe;
@@ -228,6 +301,10 @@ igt_main
create_massive_size(xe);
}
+ igt_subtest("create-big-vram") {
+ create_big_vram(xe);
+ }
+
igt_fixture
drm_close_driver(xe);
}
--
2.31.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest
2023-11-13 19:20 Marcin Bernatowicz
@ 2023-11-20 17:51 ` Kamil Konieczny
0 siblings, 0 replies; 13+ messages in thread
From: Kamil Konieczny @ 2023-11-20 17:51 UTC (permalink / raw)
To: igt-dev; +Cc: Marcin Bernatowicz, jakub1.kolakowski, adam.miszczak
Hi Marcin,
On 2023-11-13 at 20:20:56 +0100, Marcin Bernatowicz wrote:
> Validates the creation of significant Buffer Objects (BO) within VRAM,
> accounting for 75% of the CPU-visible VRAM size.
> The size of the created BO can be adjusted using command line parameters,
> with '-S' representing BO size in MB,
> and '-p' representing BO size as a percentage of the VRAM size.
>
> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
Please rebase and correct flag to DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT
(test changed and also there was xe drm-uapi update).
> ---
> tests/intel/xe_create.c | 79 ++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 78 insertions(+), 1 deletion(-)
>
> diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
> index d99bd51cf..fc1b23823 100644
> --- a/tests/intel/xe_create.c
> +++ b/tests/intel/xe_create.c
> @@ -18,6 +18,14 @@
>
> #define PAGE_SIZE 0x1000
>
> +static struct param {
> + int size_MB;
--- ^
unsigned
> + int vram_percent;
--- ^
unsigned
> +} params = {
> + .size_MB = 0,
> + .vram_percent = 75,
> +};
> +
> static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
> uint32_t *handlep)
> {
> @@ -207,7 +215,72 @@ static void create_massive_size(int fd)
> }
> }
>
> -igt_main
> +/**
> + * SUBTEST: create-big-vram
> + * Functionality: BO creation
> + * Test category: functionality test
> + * Description: Validates the creation of substantial BO within VRAM
> + * (constituting 75% of the CPU-visible VRAM).
> + */
> +static void create_big_vram(int fd)
> +{
> + uint64_t bo_size, size, vram_size, alignment;
> + uint32_t bo_handle;
> + char *bo_ptr = NULL;
> + uint64_t vm = 0;
> + int gt;
> +
> + igt_require(xe_has_vram(fd));
> + alignment = xe_get_default_alignment(fd);
> + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_DEFAULT, 0);
> +
> + xe_for_each_gt(fd, gt) {
> + vram_size = xe_visible_vram_size(fd, gt);
> + bo_size = params.size_MB ? params.size_MB * 1024UL * 1024UL
1024ULL
> + : ALIGN(vram_size * params.vram_percent / 100, alignment);
> + igt_debug("gt%u bo_size=%lu visible_vram_size=%lu\n", gt, bo_size, vram_size);
> +
> + igt_assert_eq(0, __create_bo(fd, vm, bo_size, vram_memory(fd, gt), &bo_handle));
> + bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
> + size = bo_size - 1;
> + while (size > SZ_64K) {
> + igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
> + WRITE_ONCE(bo_ptr[size], 'A');
> + igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
> + size >>= 1;
> + }
Add newline here.
Regards,
Kamil
> + igt_assert_eq(0, bo_ptr[0]);
> + munmap(bo_ptr, bo_size);
> + gem_close(fd, bo_handle);
> + }
> +
> + xe_vm_destroy(fd, vm);
> +}
> +
> +static int opt_handler(int opt, int opt_index, void *data)
> +{
> + switch (opt) {
> + case 'S':
> + params.size_MB = atoi(optarg);
> + igt_debug("Size MB: %d\n", params.size_MB);
> + break;
> + case 'p':
> + params.vram_percent = atoi(optarg);
> + igt_debug("Percent of VRAM: %d\n", params.vram_percent);
> + break;
> + default:
> + return IGT_OPT_HANDLER_ERROR;
> + }
> +
> + return IGT_OPT_HANDLER_SUCCESS;
> +}
> +
> +const char *help_str =
> + " -S\tBO size in MB\n"
> + " -p\tPercent of VRAM for BO (default 75% of visible VRAM size)\n"
> + ;
> +
> +igt_main_args("S:p:", NULL, help_str, opt_handler, NULL)
> {
> int xe;
>
> @@ -228,6 +301,10 @@ igt_main
> create_massive_size(xe);
> }
>
> + igt_subtest("create-big-vram") {
> + create_big_vram(xe);
> + }
> +
> igt_fixture
> drm_close_driver(xe);
> }
> --
> 2.31.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest
@ 2023-11-21 13:50 Marcin Bernatowicz
2023-11-21 13:56 ` Laguna, Lukasz
` (4 more replies)
0 siblings, 5 replies; 13+ messages in thread
From: Marcin Bernatowicz @ 2023-11-21 13:50 UTC (permalink / raw)
To: igt-dev; +Cc: jakub1.kolakowski
Validates the creation of significant Buffer Objects (BO) within VRAM,
accounting for 75% of the CPU-visible VRAM size.
The size of the created BO can be adjusted using command line parameters,
with '-S' representing BO size in MB,
and '-p' representing BO size as a percentage of the VRAM size.
v2: rebased, updated to uAPI changes (DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT),
after review corrections: 1024UL -> 1024ULL,
int -> unsigned int (Kamil)
Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
---
tests/intel/xe_create.c | 80 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
index f4633cfb3..3ff9bb750 100644
--- a/tests/intel/xe_create.c
+++ b/tests/intel/xe_create.c
@@ -18,6 +18,14 @@
#define PAGE_SIZE 0x1000
+static struct param {
+ unsigned int size_MB;
+ unsigned int vram_percent;
+} params = {
+ .size_MB = 0,
+ .vram_percent = 75,
+};
+
static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
uint32_t *handlep)
{
@@ -214,7 +222,73 @@ static void create_massive_size(int fd)
}
}
-igt_main
+/**
+ * SUBTEST: create-big-vram
+ * Functionality: BO creation
+ * Test category: functionality test
+ * Description: Validates the creation of substantial BO within VRAM
+ * (constituting 75% of the CPU-visible VRAM).
+ */
+static void create_big_vram(int fd)
+{
+ uint64_t bo_size, size, vram_size, alignment;
+ uint32_t bo_handle;
+ char *bo_ptr = NULL;
+ uint64_t vm = 0;
+ int gt;
+
+ igt_require(xe_has_vram(fd));
+ alignment = xe_get_default_alignment(fd);
+ vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
+
+ xe_for_each_gt(fd, gt) {
+ vram_size = xe_visible_vram_size(fd, gt);
+ bo_size = params.size_MB ? params.size_MB * 1024ULL * 1024ULL
+ : ALIGN(vram_size * params.vram_percent / 100, alignment);
+ igt_debug("gt%u bo_size=%lu visible_vram_size=%lu\n", gt, bo_size, vram_size);
+
+ igt_assert_eq(0, __create_bo(fd, vm, bo_size, vram_memory(fd, gt), &bo_handle));
+ bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
+ size = bo_size - 1;
+ while (size > SZ_64K) {
+ igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
+ WRITE_ONCE(bo_ptr[size], 'A');
+ igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
+ size >>= 1;
+ }
+
+ igt_assert_eq(0, bo_ptr[0]);
+ munmap(bo_ptr, bo_size);
+ gem_close(fd, bo_handle);
+ }
+
+ xe_vm_destroy(fd, vm);
+}
+
+static int opt_handler(int opt, int opt_index, void *data)
+{
+ switch (opt) {
+ case 'S':
+ params.size_MB = atoi(optarg);
+ igt_debug("Size MB: %d\n", params.size_MB);
+ break;
+ case 'p':
+ params.vram_percent = atoi(optarg);
+ igt_debug("Percent of VRAM: %d\n", params.vram_percent);
+ break;
+ default:
+ return IGT_OPT_HANDLER_ERROR;
+ }
+
+ return IGT_OPT_HANDLER_SUCCESS;
+}
+
+const char *help_str =
+ " -S\tBO size in MB\n"
+ " -p\tPercent of VRAM for BO (default 75% of visible VRAM size)\n"
+ ;
+
+igt_main_args("S:p:", NULL, help_str, opt_handler, NULL)
{
int xe;
@@ -254,6 +328,10 @@ igt_main
}
+ igt_subtest("create-big-vram") {
+ create_big_vram(xe);
+ }
+
igt_fixture
drm_close_driver(xe);
}
--
2.31.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest
2023-11-21 13:50 [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest Marcin Bernatowicz
@ 2023-11-21 13:56 ` Laguna, Lukasz
2023-11-21 15:08 ` [igt-dev] ✓ Fi.CI.BAT: success for xe_create: create-big-vram subtest (rev2) Patchwork
` (3 subsequent siblings)
4 siblings, 0 replies; 13+ messages in thread
From: Laguna, Lukasz @ 2023-11-21 13:56 UTC (permalink / raw)
To: Marcin Bernatowicz, igt-dev; +Cc: jakub1.kolakowski
[-- Attachment #1: Type: text/plain, Size: 3828 bytes --]
On 11/21/2023 14:50, Marcin Bernatowicz wrote:
> Validates the creation of significant Buffer Objects (BO) within VRAM,
> accounting for 75% of the CPU-visible VRAM size.
maybe create BO with CPU-*available *VRAM size (CPU-visible VRAM size -
used VRAM)?
> The size of the created BO can be adjusted using command line parameters,
> with '-S' representing BO size in MB,
> and '-p' representing BO size as a percentage of the VRAM size.
>
> v2: rebased, updated to uAPI changes (DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT),
> after review corrections: 1024UL -> 1024ULL,
> int -> unsigned int (Kamil)
>
> Signed-off-by: Marcin Bernatowicz<marcin.bernatowicz@intel.com>
> ---
> tests/intel/xe_create.c | 80 ++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 79 insertions(+), 1 deletion(-)
>
> diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
> index f4633cfb3..3ff9bb750 100644
> --- a/tests/intel/xe_create.c
> +++ b/tests/intel/xe_create.c
> @@ -18,6 +18,14 @@
>
> #define PAGE_SIZE 0x1000
>
> +static struct param {
> + unsigned int size_MB;
nit: size_mb?
> + unsigned int vram_percent;
> +} params = {
> + .size_MB = 0,
> + .vram_percent = 75,
> +};
> +
> static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
> uint32_t *handlep)
> {
> @@ -214,7 +222,73 @@ static void create_massive_size(int fd)
> }
> }
>
> -igt_main
> +/**
> + * SUBTEST: create-big-vram
> + * Functionality: BO creation
> + * Test category: functionality test
> + * Description: Validates the creation of substantial BO within VRAM
> + * (constituting 75% of the CPU-visible VRAM).
> + */
> +static void create_big_vram(int fd)
> +{
> + uint64_t bo_size, size, vram_size, alignment;
> + uint32_t bo_handle;
> + char *bo_ptr = NULL;
> + uint64_t vm = 0;
> + int gt;
> +
> + igt_require(xe_has_vram(fd));
> + alignment = xe_get_default_alignment(fd);
> + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
> +
> + xe_for_each_gt(fd, gt) {
> + vram_size = xe_visible_vram_size(fd, gt);
> + bo_size = params.size_MB ? params.size_MB * 1024ULL * 1024ULL
> + : ALIGN(vram_size * params.vram_percent / 100, alignment);
if you decide to don't use percentages you can use (xe_visible_vram_size
- mem_region.used) when params.size_MB is 0 here. In such case I'm not
sure if -p option is needed.
> + igt_debug("gt%u bo_size=%lu visible_vram_size=%lu\n", gt, bo_size, vram_size);
> +
> + igt_assert_eq(0, __create_bo(fd, vm, bo_size, vram_memory(fd, gt), &bo_handle));
nit: xe_bo_create_flags can be used instead
> + bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
> + size = bo_size - 1;
> + while (size > SZ_64K) {
> + igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
> + WRITE_ONCE(bo_ptr[size], 'A');
> + igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
> + size >>= 1;
> + }
> +
> + igt_assert_eq(0, bo_ptr[0]);
> + munmap(bo_ptr, bo_size);
> + gem_close(fd, bo_handle);
> + }
> +
> + xe_vm_destroy(fd, vm);
> +}
> +
> +static int opt_handler(int opt, int opt_index, void *data)
> +{
> + switch (opt) {
> + case 'S':
> + params.size_MB = atoi(optarg);
> + igt_debug("Size MB: %d\n", params.size_MB);
> + break;
> + case 'p':
> + params.vram_percent = atoi(optarg);
> + igt_debug("Percent of VRAM: %d\n", params.vram_percent);
> + break;
> + default:
> + return IGT_OPT_HANDLER_ERROR;
> + }
> +
> + return IGT_OPT_HANDLER_SUCCESS;
> +}
> +
> +const char *help_str =
> + " -S\tBO size in MB\n"
> + " -p\tPercent of VRAM for BO (default 75% of visible VRAM size)\n"
> + ;
> +
> +igt_main_args("S:p:", NULL, help_str, opt_handler, NULL)
> {
> int xe;
>
> @@ -254,6 +328,10 @@ igt_main
> }
>
>
> + igt_subtest("create-big-vram") {
> + create_big_vram(xe);
> + }
> +
> igt_fixture
> drm_close_driver(xe);
> }
[-- Attachment #2: Type: text/html, Size: 4766 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for xe_create: create-big-vram subtest (rev2)
2023-11-21 13:50 [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest Marcin Bernatowicz
2023-11-21 13:56 ` Laguna, Lukasz
@ 2023-11-21 15:08 ` Patchwork
2023-11-21 15:42 ` [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest Matthew Auld
` (2 subsequent siblings)
4 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2023-11-21 15:08 UTC (permalink / raw)
To: Marcin Bernatowicz; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 11756 bytes --]
== Series Details ==
Series: xe_create: create-big-vram subtest (rev2)
URL : https://patchwork.freedesktop.org/series/126347/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13905 -> IGTPW_10232
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/index.html
Participating hosts (27 -> 32)
------------------------------
Additional (6): bat-kbl-2 bat-dg2-9 fi-pnv-d510 bat-dg2-14 bat-dg2-13 bat-dg2-11
Missing (1): fi-snb-2520m
Known issues
------------
Here are the changes found in IGTPW_10232 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@info:
- bat-kbl-2: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1849])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-kbl-2/igt@fbdev@info.html
* igt@gem_exec_suspend@basic-s0@smem:
- bat-dg2-9: NOTRUN -> [INCOMPLETE][2] ([i915#8797] / [i915#9275])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@gem_exec_suspend@basic-s0@smem.html
* igt@gem_lmem_swapping@basic:
- fi-pnv-d510: NOTRUN -> [SKIP][3] ([fdo#109271]) +25 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/fi-pnv-d510/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2: NOTRUN -> [SKIP][4] ([fdo#109271]) +20 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-kbl-2/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_mmap@basic:
- bat-dg2-9: NOTRUN -> [SKIP][5] ([i915#4083])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@gem_mmap@basic.html
- bat-dg2-11: NOTRUN -> [SKIP][6] ([i915#4083])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@gem_mmap@basic.html
* igt@gem_mmap_gtt@basic:
- bat-dg2-9: NOTRUN -> [SKIP][7] ([i915#4077]) +2 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@gem_mmap_gtt@basic.html
* igt@gem_render_tiled_blits@basic:
- bat-dg2-9: NOTRUN -> [SKIP][8] ([i915#4079]) +1 other test skip
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@gem_render_tiled_blits@basic.html
* igt@gem_tiled_fence_blits@basic:
- bat-dg2-11: NOTRUN -> [SKIP][9] ([i915#4077]) +2 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@gem_tiled_fence_blits@basic.html
* igt@gem_tiled_pread_basic:
- bat-dg2-11: NOTRUN -> [SKIP][10] ([i915#4079]) +1 other test skip
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rps@basic-api:
- bat-dg2-9: NOTRUN -> [SKIP][11] ([i915#6621])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@i915_pm_rps@basic-api.html
- bat-dg2-11: NOTRUN -> [SKIP][12] ([i915#6621])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@i915_pm_rps@basic-api.html
* igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
- bat-dg2-11: NOTRUN -> [SKIP][13] ([i915#4212]) +6 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-dg2-9: NOTRUN -> [SKIP][14] ([i915#5190])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-dg2-11: NOTRUN -> [SKIP][15] ([i915#5190])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg2-9: NOTRUN -> [SKIP][16] ([i915#4215] / [i915#5190])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@kms_addfb_basic@basic-y-tiled-legacy.html
- bat-dg2-11: NOTRUN -> [SKIP][17] ([i915#4215] / [i915#5190])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@framebuffer-vs-set-tiling:
- bat-dg2-9: NOTRUN -> [SKIP][18] ([i915#4212]) +6 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html
* igt@kms_addfb_basic@tile-pitch-mismatch:
- bat-dg2-9: NOTRUN -> [SKIP][19] ([i915#4212] / [i915#5608])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@kms_addfb_basic@tile-pitch-mismatch.html
- bat-dg2-11: NOTRUN -> [SKIP][20] ([i915#4212] / [i915#5608])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@kms_addfb_basic@tile-pitch-mismatch.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- bat-dg2-11: NOTRUN -> [SKIP][21] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-dg2-9: NOTRUN -> [SKIP][22] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-dg2-11: NOTRUN -> [SKIP][23] ([i915#3555] / [i915#3840])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-dg2-9: NOTRUN -> [SKIP][24] ([fdo#109285])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@kms_force_connector_basic@force-load-detect.html
- bat-dg2-11: NOTRUN -> [SKIP][25] ([fdo#109285])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-dg2-9: NOTRUN -> [SKIP][26] ([i915#5274])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@kms_force_connector_basic@prune-stale-modes.html
- bat-dg2-11: NOTRUN -> [SKIP][27] ([i915#5274])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence:
- bat-kbl-2: NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#1845]) +14 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-kbl-2/igt@kms_pipe_crc_basic@read-crc-frame-sequence.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-dg2-9: NOTRUN -> [SKIP][29] ([i915#3555] / [i915#4098])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@kms_setmode@basic-clone-single-crtc.html
- bat-dg2-11: NOTRUN -> [SKIP][30] ([i915#3555] / [i915#4098])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-dg2-9: NOTRUN -> [SKIP][31] ([i915#3708])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@prime_vgem@basic-fence-flip.html
- bat-dg2-11: NOTRUN -> [SKIP][32] ([i915#3708])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-mmap:
- bat-dg2-11: NOTRUN -> [SKIP][33] ([i915#3708] / [i915#4077]) +1 other test skip
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@prime_vgem@basic-fence-mmap.html
- bat-dg2-9: NOTRUN -> [SKIP][34] ([i915#3708] / [i915#4077]) +1 other test skip
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-read:
- bat-dg2-11: NOTRUN -> [SKIP][35] ([i915#3291] / [i915#3708]) +2 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-11/igt@prime_vgem@basic-read.html
* igt@prime_vgem@basic-write:
- bat-dg2-9: NOTRUN -> [SKIP][36] ([i915#3291] / [i915#3708]) +2 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/bat-dg2-9/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* igt@i915_suspend@basic-s3-without-i915:
- fi-kbl-7567u: [INCOMPLETE][37] ([i915#4817]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/fi-kbl-7567u/igt@i915_suspend@basic-s3-without-i915.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/fi-kbl-7567u/igt@i915_suspend@basic-s3-without-i915.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/484
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4550]: https://gitlab.freedesktop.org/drm/intel/issues/4550
[i915#4817]: https://gitlab.freedesktop.org/drm/intel/issues/4817
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5608]: https://gitlab.freedesktop.org/drm/intel/issues/5608
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#8797]: https://gitlab.freedesktop.org/drm/intel/issues/8797
[i915#8981]: https://gitlab.freedesktop.org/drm/intel/issues/8981
[i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
[i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7595 -> IGTPW_10232
CI-20190529: 20190529
CI_DRM_13905: dbdb47c227dc21b7bf98ada039bf42aac4b58b8b @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_10232: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/index.html
IGT_7595: cfa00d99b1dfa0621ea552d1ed54907798da1a1a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Testlist changes
----------------
+igt@xe_create@create-big-vram
-igt@kms_frontbuffer_tracking@pipe-fbc-rte
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/index.html
[-- Attachment #2: Type: text/html, Size: 15027 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest
2023-11-21 13:50 [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest Marcin Bernatowicz
2023-11-21 13:56 ` Laguna, Lukasz
2023-11-21 15:08 ` [igt-dev] ✓ Fi.CI.BAT: success for xe_create: create-big-vram subtest (rev2) Patchwork
@ 2023-11-21 15:42 ` Matthew Auld
2023-11-22 10:26 ` Bernatowicz, Marcin
2023-11-21 16:31 ` [igt-dev] ✓ CI.xeBAT: success for xe_create: create-big-vram subtest (rev2) Patchwork
2023-11-22 9:28 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
4 siblings, 1 reply; 13+ messages in thread
From: Matthew Auld @ 2023-11-21 15:42 UTC (permalink / raw)
To: Marcin Bernatowicz; +Cc: igt-dev, jakub1.kolakowski
On Tue, 21 Nov 2023 at 13:50, Marcin Bernatowicz
<marcin.bernatowicz@intel.com> wrote:
>
> Validates the creation of significant Buffer Objects (BO) within VRAM,
> accounting for 75% of the CPU-visible VRAM size.
> The size of the created BO can be adjusted using command line parameters,
> with '-S' representing BO size in MB,
> and '-p' representing BO size as a percentage of the VRAM size.
>
> v2: rebased, updated to uAPI changes (DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT),
> after review corrections: 1024UL -> 1024ULL,
> int -> unsigned int (Kamil)
>
> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
> ---
> tests/intel/xe_create.c | 80 ++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 79 insertions(+), 1 deletion(-)
>
> diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
> index f4633cfb3..3ff9bb750 100644
> --- a/tests/intel/xe_create.c
> +++ b/tests/intel/xe_create.c
> @@ -18,6 +18,14 @@
>
> #define PAGE_SIZE 0x1000
>
> +static struct param {
> + unsigned int size_MB;
> + unsigned int vram_percent;
> +} params = {
> + .size_MB = 0,
> + .vram_percent = 75,
> +};
> +
> static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
> uint32_t *handlep)
> {
> @@ -214,7 +222,73 @@ static void create_massive_size(int fd)
> }
> }
>
> -igt_main
> +/**
> + * SUBTEST: create-big-vram
> + * Functionality: BO creation
> + * Test category: functionality test
> + * Description: Validates the creation of substantial BO within VRAM
> + * (constituting 75% of the CPU-visible VRAM).
> + */
> +static void create_big_vram(int fd)
> +{
> + uint64_t bo_size, size, vram_size, alignment;
> + uint32_t bo_handle;
> + char *bo_ptr = NULL;
> + uint64_t vm = 0;
> + int gt;
> +
> + igt_require(xe_has_vram(fd));
> + alignment = xe_get_default_alignment(fd);
> + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
> +
> + xe_for_each_gt(fd, gt) {
> + vram_size = xe_visible_vram_size(fd, gt);
> + bo_size = params.size_MB ? params.size_MB * 1024ULL * 1024ULL
> + : ALIGN(vram_size * params.vram_percent / 100, alignment);
> + igt_debug("gt%u bo_size=%lu visible_vram_size=%lu\n", gt, bo_size, vram_size);
> +
> + igt_assert_eq(0, __create_bo(fd, vm, bo_size, vram_memory(fd, gt), &bo_handle));
We should also ask the KMD to allocate the memory within the CPU
visible portion of VRAM (if applicable), otherwise we will likely
trigger SIGBUS below on small-bar systems. See visible_vram_memory().
> + bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
> + size = bo_size - 1;
> + while (size > SZ_64K) {
> + igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
> + WRITE_ONCE(bo_ptr[size], 'A');
> + igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
> + size >>= 1;
> + }
> +
> + igt_assert_eq(0, bo_ptr[0]);
> + munmap(bo_ptr, bo_size);
> + gem_close(fd, bo_handle);
> + }
> +
> + xe_vm_destroy(fd, vm);
> +}
> +
> +static int opt_handler(int opt, int opt_index, void *data)
> +{
> + switch (opt) {
> + case 'S':
> + params.size_MB = atoi(optarg);
> + igt_debug("Size MB: %d\n", params.size_MB);
> + break;
> + case 'p':
> + params.vram_percent = atoi(optarg);
> + igt_debug("Percent of VRAM: %d\n", params.vram_percent);
> + break;
> + default:
> + return IGT_OPT_HANDLER_ERROR;
> + }
> +
> + return IGT_OPT_HANDLER_SUCCESS;
> +}
> +
> +const char *help_str =
> + " -S\tBO size in MB\n"
> + " -p\tPercent of VRAM for BO (default 75% of visible VRAM size)\n"
> + ;
> +
> +igt_main_args("S:p:", NULL, help_str, opt_handler, NULL)
> {
> int xe;
>
> @@ -254,6 +328,10 @@ igt_main
> }
>
>
> + igt_subtest("create-big-vram") {
> + create_big_vram(xe);
> + }
> +
> igt_fixture
> drm_close_driver(xe);
> }
> --
> 2.31.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [igt-dev] ✓ CI.xeBAT: success for xe_create: create-big-vram subtest (rev2)
2023-11-21 13:50 [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest Marcin Bernatowicz
` (2 preceding siblings ...)
2023-11-21 15:42 ` [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest Matthew Auld
@ 2023-11-21 16:31 ` Patchwork
2023-11-22 9:28 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
4 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2023-11-21 16:31 UTC (permalink / raw)
To: Marcin Bernatowicz; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 8108 bytes --]
== Series Details ==
Series: xe_create: create-big-vram subtest (rev2)
URL : https://patchwork.freedesktop.org/series/126347/
State : success
== Summary ==
CI Bug Log - changes from XEIGT_7595_BAT -> XEIGTPW_10232_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in XEIGTPW_10232_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@unbind-rebind:
- bat-adlp-7: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#939])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-adlp-7/igt@core_hotunplug@unbind-rebind.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-adlp-7/igt@core_hotunplug@unbind-rebind.html
- bat-dg2-oem2: NOTRUN -> [DMESG-WARN][3] ([Intel XE#939])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-dg2-oem2/igt@core_hotunplug@unbind-rebind.html
* igt@kms_flip@basic-flip-vs-wf_vblank@c-dp3:
- bat-dg2-oem2: [PASS][4] -> [FAIL][5] ([Intel XE#480]) +1 other test fail
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-dg2-oem2/igt@kms_flip@basic-flip-vs-wf_vblank@c-dp3.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-dg2-oem2/igt@kms_flip@basic-flip-vs-wf_vblank@c-dp3.html
* igt@xe_exec_fault_mode@many-basic:
- bat-dg2-oem2: NOTRUN -> [SKIP][6] ([Intel XE#288]) +17 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-dg2-oem2/igt@xe_exec_fault_mode@many-basic.html
* igt@xe_guc_pc@freq_basic_api:
- bat-adlp-7: [PASS][7] -> [FAIL][8] ([Intel XE#935])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-adlp-7/igt@xe_guc_pc@freq_basic_api.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-adlp-7/igt@xe_guc_pc@freq_basic_api.html
- bat-pvc-2: [PASS][9] -> [FAIL][10] ([Intel XE#935])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-pvc-2/igt@xe_guc_pc@freq_basic_api.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-pvc-2/igt@xe_guc_pc@freq_basic_api.html
- bat-dg2-oem2: [PASS][11] -> [FAIL][12] ([Intel XE#935])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-dg2-oem2/igt@xe_guc_pc@freq_basic_api.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-dg2-oem2/igt@xe_guc_pc@freq_basic_api.html
- bat-atsm-2: [PASS][13] -> [FAIL][14] ([Intel XE#935])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-atsm-2/igt@xe_guc_pc@freq_basic_api.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-atsm-2/igt@xe_guc_pc@freq_basic_api.html
* igt@xe_guc_pc@freq_fixed_idle:
- bat-atsm-2: [PASS][15] -> [FAIL][16] ([Intel XE#940]) +1 other test fail
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-atsm-2/igt@xe_guc_pc@freq_fixed_idle.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-atsm-2/igt@xe_guc_pc@freq_fixed_idle.html
- bat-dg2-oem2: [PASS][17] -> [FAIL][18] ([Intel XE#940]) +1 other test fail
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-dg2-oem2/igt@xe_guc_pc@freq_fixed_idle.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-dg2-oem2/igt@xe_guc_pc@freq_fixed_idle.html
* igt@xe_guc_pc@freq_range_idle:
- bat-adlp-7: [PASS][19] -> [FAIL][20] ([Intel XE#940]) +1 other test fail
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-adlp-7/igt@xe_guc_pc@freq_range_idle.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-adlp-7/igt@xe_guc_pc@freq_range_idle.html
#### Possible fixes ####
* igt@kms_cursor_legacy@basic-flip-before-cursor-legacy:
- bat-adlp-7: [FAIL][21] ([i915#2346]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-adlp-7/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-adlp-7/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
* igt@kms_pipe_crc_basic@hang-read-crc:
- bat-dg2-oem2: [INCOMPLETE][23] ([Intel XE#749]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-dg2-oem2/igt@kms_pipe_crc_basic@hang-read-crc.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-dg2-oem2/igt@kms_pipe_crc_basic@hang-read-crc.html
* igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-dp-3:
- bat-dg2-oem2: [INCOMPLETE][25] ([Intel XE#545]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-dg2-oem2/igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-dp-3.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-dg2-oem2/igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-dp-3.html
* {igt@xe_create@create-execqueues-noleak}:
- bat-adlp-7: [FAIL][27] ([Intel XE#524]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-adlp-7/igt@xe_create@create-execqueues-noleak.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-adlp-7/igt@xe_create@create-execqueues-noleak.html
#### Warnings ####
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12:
- bat-dg2-oem2: [TIMEOUT][29] ([Intel XE#430] / [Intel XE#530]) -> [FAIL][30] ([Intel XE#400] / [Intel XE#616])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-dg2-oem2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-dg2-oem2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-d-dp-3:
- bat-dg2-oem2: [TIMEOUT][31] ([Intel XE#530]) -> [FAIL][32] ([Intel XE#400] / [Intel XE#616])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7595/bat-dg2-oem2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-d-dp-3.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/bat-dg2-oem2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-d-dp-3.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#400]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/400
[Intel XE#430]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/430
[Intel XE#480]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/480
[Intel XE#524]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/524
[Intel XE#530]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/530
[Intel XE#545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/545
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#749]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/749
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/935
[Intel XE#939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/939
[Intel XE#940]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/940
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
Build changes
-------------
* IGT: IGT_7595 -> IGTPW_10232
* Linux: xe-505-b25aa17bffa88c86fec716e40bdb3848eea17b23 -> xe-513-c9574aef8b5eb68398936c2c14fe4a54fa4e5849
IGTPW_10232: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/index.html
IGT_7595: cfa00d99b1dfa0621ea552d1ed54907798da1a1a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-505-b25aa17bffa88c86fec716e40bdb3848eea17b23: b25aa17bffa88c86fec716e40bdb3848eea17b23
xe-513-c9574aef8b5eb68398936c2c14fe4a54fa4e5849: c9574aef8b5eb68398936c2c14fe4a54fa4e5849
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10232/index.html
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^ permalink raw reply [flat|nested] 13+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for xe_create: create-big-vram subtest (rev2)
2023-11-21 13:50 [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest Marcin Bernatowicz
` (3 preceding siblings ...)
2023-11-21 16:31 ` [igt-dev] ✓ CI.xeBAT: success for xe_create: create-big-vram subtest (rev2) Patchwork
@ 2023-11-22 9:28 ` Patchwork
4 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2023-11-22 9:28 UTC (permalink / raw)
To: Marcin Bernatowicz; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 73464 bytes --]
== Series Details ==
Series: xe_create: create-big-vram subtest (rev2)
URL : https://patchwork.freedesktop.org/series/126347/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13905_full -> IGTPW_10232_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_10232_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_10232_full, please notify your bug team (lgci.bug.filing@intel.com) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/index.html
Participating hosts (12 -> 9)
------------------------------
Missing (3): shard-mtlp0 shard-rkl shard-tglu0
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_10232_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip@flip-vs-fences@b-hdmi-a1:
- shard-snb: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-snb1/igt@kms_flip@flip-vs-fences@b-hdmi-a1.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-snb1/igt@kms_flip@flip-vs-fences@b-hdmi-a1.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-4}:
- shard-dg1: NOTRUN -> [SKIP][3] +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-15/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-4.html
* {igt@kms_dirtyfb@psr-dirtyfb-ioctl}:
- shard-dg2: NOTRUN -> [SKIP][4]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-3/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
New tests
---------
New tests have been introduced between CI_DRM_13905_full and IGTPW_10232_full:
### New IGT tests (1) ###
* igt@kms_cursor_crc@cursor-offscreen-256x256@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in IGTPW_10232_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@render-ccs:
- shard-dg2: NOTRUN -> [FAIL][5] ([i915#6122])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@api_intel_bb@render-ccs.html
* igt@device_reset@cold-reset-bound:
- shard-mtlp: NOTRUN -> [SKIP][6] ([i915#7701])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-2/igt@device_reset@cold-reset-bound.html
* igt@drm_fdinfo@busy-idle@bcs0:
- shard-dg2: NOTRUN -> [SKIP][7] ([i915#8414]) +20 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@drm_fdinfo@busy-idle@bcs0.html
* igt@drm_fdinfo@virtual-busy-all:
- shard-dg1: NOTRUN -> [SKIP][8] ([i915#8414])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-16/igt@drm_fdinfo@virtual-busy-all.html
- shard-mtlp: NOTRUN -> [SKIP][9] ([i915#8414])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-2/igt@drm_fdinfo@virtual-busy-all.html
* igt@gem_basic@multigpu-create-close:
- shard-mtlp: NOTRUN -> [SKIP][10] ([i915#7697])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-8/igt@gem_basic@multigpu-create-close.html
* igt@gem_ccs@ctrl-surf-copy-new-ctx:
- shard-dg1: NOTRUN -> [SKIP][11] ([i915#9323])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-18/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
- shard-mtlp: NOTRUN -> [SKIP][12] ([i915#9323])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-8/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
* igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0:
- shard-dg2: NOTRUN -> [INCOMPLETE][13] ([i915#7297])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-10/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html
* igt@gem_close_race@multigpu-basic-process:
- shard-dg2: NOTRUN -> [SKIP][14] ([i915#7697])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@gem_close_race@multigpu-basic-process.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-mtlp: NOTRUN -> [SKIP][15] ([i915#6335])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-7/igt@gem_create@create-ext-cpu-access-big.html
- shard-dg2: [PASS][16] -> [INCOMPLETE][17] ([i915#9364])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-dg2-10/igt@gem_create@create-ext-cpu-access-big.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@gem_create@create-ext-cpu-access-big.html
* igt@gem_ctx_exec@basic-norecovery:
- shard-mtlp: [PASS][18] -> [ABORT][19] ([i915#9262])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-mtlp-7/igt@gem_ctx_exec@basic-norecovery.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-2/igt@gem_ctx_exec@basic-norecovery.html
* igt@gem_ctx_persistence@heartbeat-hostile:
- shard-dg2: NOTRUN -> [SKIP][20] ([i915#8555]) +2 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@gem_ctx_persistence@heartbeat-hostile.html
* igt@gem_ctx_persistence@legacy-engines-hostile-preempt:
- shard-snb: NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#1099]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-snb1/igt@gem_ctx_persistence@legacy-engines-hostile-preempt.html
* igt@gem_eio@hibernate:
- shard-dg2: NOTRUN -> [ABORT][22] ([i915#7975] / [i915#8213])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@gem_eio@hibernate.html
* igt@gem_eio@in-flight-internal-10ms:
- shard-mtlp: [PASS][23] -> [ABORT][24] ([i915#9414]) +1 other test abort
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-mtlp-7/igt@gem_eio@in-flight-internal-10ms.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-4/igt@gem_eio@in-flight-internal-10ms.html
* igt@gem_eio@kms:
- shard-dg1: [PASS][25] -> [FAIL][26] ([i915#5784])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-dg1-18/igt@gem_eio@kms.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-17/igt@gem_eio@kms.html
* igt@gem_exec_balancer@bonded-false-hang:
- shard-dg2: NOTRUN -> [SKIP][27] ([i915#4812]) +2 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@gem_exec_balancer@bonded-false-hang.html
* igt@gem_exec_balancer@parallel-ordering:
- shard-tglu: NOTRUN -> [FAIL][28] ([i915#6117])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-9/igt@gem_exec_balancer@parallel-ordering.html
* igt@gem_exec_capture@capture-recoverable:
- shard-tglu: NOTRUN -> [SKIP][29] ([i915#6344])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-2/igt@gem_exec_capture@capture-recoverable.html
* igt@gem_exec_capture@many-4k-zero:
- shard-dg2: NOTRUN -> [FAIL][30] ([i915#9606])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@gem_exec_capture@many-4k-zero.html
* igt@gem_exec_fair@basic-throttle:
- shard-dg2: NOTRUN -> [SKIP][31] ([i915#3539])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-3/igt@gem_exec_fair@basic-throttle.html
* igt@gem_exec_fence@concurrent:
- shard-mtlp: NOTRUN -> [SKIP][32] ([i915#4812])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-5/igt@gem_exec_fence@concurrent.html
* igt@gem_exec_flush@basic-uc-set-default:
- shard-dg1: NOTRUN -> [SKIP][33] ([i915#3539])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-15/igt@gem_exec_flush@basic-uc-set-default.html
* igt@gem_exec_flush@basic-wb-prw-default:
- shard-dg2: NOTRUN -> [SKIP][34] ([i915#3539] / [i915#4852]) +4 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@gem_exec_flush@basic-wb-prw-default.html
* igt@gem_exec_flush@basic-wb-rw-before-default:
- shard-dg1: NOTRUN -> [SKIP][35] ([i915#3539] / [i915#4852])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-14/igt@gem_exec_flush@basic-wb-rw-before-default.html
* igt@gem_exec_params@rsvd2-dirt:
- shard-dg2: NOTRUN -> [SKIP][36] ([fdo#109283] / [i915#5107])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-3/igt@gem_exec_params@rsvd2-dirt.html
* igt@gem_exec_reloc@basic-gtt-wc:
- shard-dg1: NOTRUN -> [SKIP][37] ([i915#3281]) +3 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-15/igt@gem_exec_reloc@basic-gtt-wc.html
* igt@gem_exec_reloc@basic-write-read-active:
- shard-dg2: NOTRUN -> [SKIP][38] ([i915#3281]) +9 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-3/igt@gem_exec_reloc@basic-write-read-active.html
* igt@gem_exec_reloc@basic-write-wc:
- shard-mtlp: NOTRUN -> [SKIP][39] ([i915#3281]) +3 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-6/igt@gem_exec_reloc@basic-write-wc.html
* igt@gem_exec_schedule@preempt-queue-contexts-chain:
- shard-dg2: NOTRUN -> [SKIP][40] ([i915#4537] / [i915#4812]) +2 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@gem_exec_schedule@preempt-queue-contexts-chain.html
* igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible:
- shard-dg2: NOTRUN -> [SKIP][41] ([i915#4860]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible.html
* igt@gem_lmem_swapping@heavy-verify-multi:
- shard-mtlp: NOTRUN -> [SKIP][42] ([i915#4613]) +2 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-4/igt@gem_lmem_swapping@heavy-verify-multi.html
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-tglu: NOTRUN -> [SKIP][43] ([i915#4613]) +1 other test skip
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-3/igt@gem_lmem_swapping@heavy-verify-random.html
* igt@gem_lmem_swapping@smem-oom:
- shard-glk: NOTRUN -> [SKIP][44] ([fdo#109271] / [i915#4613])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-glk2/igt@gem_lmem_swapping@smem-oom.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- shard-dg1: [PASS][45] -> [DMESG-WARN][46] ([i915#4936] / [i915#5493])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-dg1-16/igt@gem_lmem_swapping@smem-oom@lmem0.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-19/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@gem_lmem_swapping@verify-random-ccs@lmem0:
- shard-dg1: NOTRUN -> [SKIP][47] ([i915#4565]) +1 other test skip
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-19/igt@gem_lmem_swapping@verify-random-ccs@lmem0.html
* igt@gem_media_fill@media-fill:
- shard-dg2: NOTRUN -> [SKIP][48] ([i915#8289])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@gem_media_fill@media-fill.html
* igt@gem_mmap_gtt@cpuset-medium-copy-xy:
- shard-dg1: NOTRUN -> [SKIP][49] ([i915#4077]) +3 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-18/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html
* igt@gem_mmap_offset@clear@smem0:
- shard-mtlp: [PASS][50] -> [INCOMPLETE][51] ([i915#5493])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-mtlp-7/igt@gem_mmap_offset@clear@smem0.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-7/igt@gem_mmap_offset@clear@smem0.html
* igt@gem_mmap_wc@bad-offset:
- shard-dg1: NOTRUN -> [SKIP][52] ([i915#4083])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-14/igt@gem_mmap_wc@bad-offset.html
* igt@gem_mmap_wc@write-gtt-read-wc:
- shard-mtlp: NOTRUN -> [SKIP][53] ([i915#4083])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-7/igt@gem_mmap_wc@write-gtt-read-wc.html
* igt@gem_mmap_wc@write-wc-read-gtt:
- shard-dg2: NOTRUN -> [SKIP][54] ([i915#4083]) +6 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@gem_mmap_wc@write-wc-read-gtt.html
* igt@gem_partial_pwrite_pread@writes-after-reads:
- shard-dg1: NOTRUN -> [SKIP][55] ([i915#3282]) +1 other test skip
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-16/igt@gem_partial_pwrite_pread@writes-after-reads.html
* igt@gem_partial_pwrite_pread@writes-after-reads-display:
- shard-dg2: NOTRUN -> [SKIP][56] ([i915#3282]) +6 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@gem_partial_pwrite_pread@writes-after-reads-display.html
* igt@gem_pxp@regular-baseline-src-copy-readible:
- shard-dg2: NOTRUN -> [SKIP][57] ([i915#4270]) +4 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@gem_pxp@regular-baseline-src-copy-readible.html
* igt@gem_pxp@reject-modify-context-protection-off-3:
- shard-tglu: NOTRUN -> [SKIP][58] ([i915#4270]) +2 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-10/igt@gem_pxp@reject-modify-context-protection-off-3.html
* igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
- shard-dg1: NOTRUN -> [SKIP][59] ([i915#4270]) +1 other test skip
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-19/igt@gem_pxp@verify-pxp-key-change-after-suspend-resume.html
* igt@gem_pxp@verify-pxp-stale-buf-optout-execution:
- shard-mtlp: NOTRUN -> [SKIP][60] ([i915#4270]) +3 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-6/igt@gem_pxp@verify-pxp-stale-buf-optout-execution.html
* igt@gem_render_copy@yf-tiled-to-vebox-y-tiled:
- shard-mtlp: NOTRUN -> [SKIP][61] ([i915#8428]) +1 other test skip
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-6/igt@gem_render_copy@yf-tiled-to-vebox-y-tiled.html
* igt@gem_render_tiled_blits@basic:
- shard-dg1: NOTRUN -> [SKIP][62] ([i915#4079]) +2 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-19/igt@gem_render_tiled_blits@basic.html
* igt@gem_softpin@evict-snoop:
- shard-dg1: NOTRUN -> [SKIP][63] ([i915#4885])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-15/igt@gem_softpin@evict-snoop.html
- shard-mtlp: NOTRUN -> [SKIP][64] ([i915#4885])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-4/igt@gem_softpin@evict-snoop.html
- shard-dg2: NOTRUN -> [SKIP][65] ([i915#4885])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@gem_softpin@evict-snoop.html
* igt@gem_tiled_blits@basic:
- shard-dg2: NOTRUN -> [SKIP][66] ([i915#4077]) +17 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@gem_tiled_blits@basic.html
* igt@gem_tiled_pread_basic:
- shard-mtlp: NOTRUN -> [SKIP][67] ([i915#4079])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-7/igt@gem_tiled_pread_basic.html
* igt@gem_tiled_pread_pwrite:
- shard-dg2: NOTRUN -> [SKIP][68] ([i915#4079]) +1 other test skip
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-3/igt@gem_tiled_pread_pwrite.html
* igt@gem_userptr_blits@coherency-unsync:
- shard-tglu: NOTRUN -> [SKIP][69] ([i915#3297]) +1 other test skip
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-7/igt@gem_userptr_blits@coherency-unsync.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-dg2: NOTRUN -> [SKIP][70] ([i915#3297]) +4 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-3/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_userptr_blits@forbidden-operations:
- shard-mtlp: NOTRUN -> [SKIP][71] ([i915#3282])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-2/igt@gem_userptr_blits@forbidden-operations.html
* igt@gem_userptr_blits@map-fixed-invalidate-busy:
- shard-mtlp: NOTRUN -> [SKIP][72] ([i915#3297]) +1 other test skip
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-2/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap:
- shard-dg2: NOTRUN -> [SKIP][73] ([i915#3297] / [i915#4880])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-10/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html
- shard-dg1: NOTRUN -> [SKIP][74] ([i915#3297] / [i915#4880])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-15/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html
* igt@gem_userptr_blits@vma-merge:
- shard-dg2: NOTRUN -> [FAIL][75] ([i915#3318])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@gem_userptr_blits@vma-merge.html
* igt@gen7_exec_parse@chained-batch:
- shard-dg2: NOTRUN -> [SKIP][76] ([fdo#109289]) +5 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@gen7_exec_parse@chained-batch.html
* igt@gen9_exec_parse@allowed-all:
- shard-dg2: NOTRUN -> [SKIP][77] ([i915#2856]) +3 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-3/igt@gen9_exec_parse@allowed-all.html
* igt@gen9_exec_parse@allowed-single:
- shard-mtlp: NOTRUN -> [SKIP][78] ([i915#2856]) +1 other test skip
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-5/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@cmd-crossing-page:
- shard-tglu: NOTRUN -> [SKIP][79] ([i915#2527] / [i915#2856]) +2 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-3/igt@gen9_exec_parse@cmd-crossing-page.html
* igt@gen9_exec_parse@valid-registers:
- shard-dg1: NOTRUN -> [SKIP][80] ([i915#2527]) +1 other test skip
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-19/igt@gen9_exec_parse@valid-registers.html
* igt@i915_module_load@resize-bar:
- shard-mtlp: NOTRUN -> [SKIP][81] ([i915#6412])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-7/igt@i915_module_load@resize-bar.html
* igt@i915_pipe_stress@stress-xrgb8888-ytiled:
- shard-dg2: NOTRUN -> [SKIP][82] ([i915#7091])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@i915_pipe_stress@stress-xrgb8888-ytiled.html
* igt@i915_pm_freq_mult@media-freq@gt0:
- shard-dg1: NOTRUN -> [SKIP][83] ([i915#6590])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-16/igt@i915_pm_freq_mult@media-freq@gt0.html
* igt@i915_pm_freq_mult@media-freq@gt1:
- shard-mtlp: NOTRUN -> [SKIP][84] ([i915#6590]) +1 other test skip
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-7/igt@i915_pm_freq_mult@media-freq@gt1.html
* igt@i915_pm_rps@min-max-config-idle:
- shard-dg2: NOTRUN -> [SKIP][85] ([i915#6621])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@i915_pm_rps@min-max-config-idle.html
* igt@i915_pm_rps@thresholds-idle-park@gt0:
- shard-dg2: NOTRUN -> [SKIP][86] ([i915#8925])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@i915_pm_rps@thresholds-idle-park@gt0.html
* igt@i915_query@query-topology-coherent-slice-mask:
- shard-dg2: NOTRUN -> [SKIP][87] ([i915#6188])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@i915_query@query-topology-coherent-slice-mask.html
* igt@i915_query@query-topology-known-pci-ids:
- shard-dg1: NOTRUN -> [SKIP][88] ([fdo#109303])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-18/igt@i915_query@query-topology-known-pci-ids.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-mtlp: NOTRUN -> [SKIP][89] ([i915#4077]) +4 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-4/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_addfb_basic@basic-x-tiled-legacy:
- shard-dg2: NOTRUN -> [SKIP][90] ([i915#4212])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@kms_addfb_basic@basic-x-tiled-legacy.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- shard-dg2: NOTRUN -> [SKIP][91] ([i915#4215] / [i915#5190])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@kms_addfb_basic@basic-y-tiled-legacy.html
- shard-dg1: NOTRUN -> [SKIP][92] ([i915#4215])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-18/igt@kms_addfb_basic@basic-y-tiled-legacy.html
- shard-mtlp: NOTRUN -> [SKIP][93] ([i915#4212])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-8/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@bo-too-small-due-to-tiling:
- shard-dg1: NOTRUN -> [SKIP][94] ([i915#4212]) +1 other test skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-19/igt@kms_addfb_basic@bo-too-small-due-to-tiling.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-1:
- shard-glk: [PASS][95] -> [FAIL][96] ([i915#2521])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-glk9/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-1.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-glk3/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-1.html
* igt@kms_async_flips@crc@pipe-b-hdmi-a-3:
- shard-dg1: NOTRUN -> [FAIL][97] ([i915#8247]) +3 other tests fail
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-13/igt@kms_async_flips@crc@pipe-b-hdmi-a-3.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-glk: NOTRUN -> [SKIP][98] ([fdo#109271] / [i915#1769])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-glk9/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-tglu: NOTRUN -> [SKIP][99] ([fdo#111615] / [i915#5286]) +2 other tests skip
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-10/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-dg1: NOTRUN -> [SKIP][100] ([i915#4538] / [i915#5286])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-17/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_big_fb@linear-16bpp-rotate-270:
- shard-tglu: NOTRUN -> [SKIP][101] ([fdo#111614]) +1 other test skip
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-9/igt@kms_big_fb@linear-16bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-270:
- shard-dg2: NOTRUN -> [SKIP][102] ([fdo#111614]) +5 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
- shard-dg1: NOTRUN -> [SKIP][103] ([i915#3638]) +2 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-18/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
- shard-mtlp: NOTRUN -> [SKIP][104] ([fdo#111614]) +2 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-8/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-tglu: [PASS][105] -> [FAIL][106] ([i915#3743]) +2 other tests fail
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-tglu-3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-8/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-180:
- shard-dg2: NOTRUN -> [SKIP][107] ([i915#5190]) +19 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-10/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- shard-mtlp: NOTRUN -> [SKIP][108] ([i915#6187])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-7/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-180:
- shard-dg1: NOTRUN -> [SKIP][109] ([i915#4538]) +3 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-15/igt@kms_big_fb@yf-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][110] ([i915#4538] / [i915#5190]) +7 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-3/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
- shard-tglu: NOTRUN -> [SKIP][111] ([fdo#111615])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-7/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-mtlp: NOTRUN -> [SKIP][112] ([fdo#111615]) +4 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_joiner@invalid-modeset:
- shard-tglu: NOTRUN -> [SKIP][113] ([i915#2705])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-7/igt@kms_big_joiner@invalid-modeset.html
* igt@kms_cdclk@mode-transition:
- shard-tglu: NOTRUN -> [SKIP][114] ([i915#3742])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-3/igt@kms_cdclk@mode-transition.html
* igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][115] ([i915#4087] / [i915#7213]) +4 other tests skip
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-3/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3.html
* igt@kms_cdclk@plane-scaling@pipe-b-dp-4:
- shard-dg2: NOTRUN -> [SKIP][116] ([i915#4087]) +3 other tests skip
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@kms_cdclk@plane-scaling@pipe-b-dp-4.html
* igt@kms_chamelium_color@degamma:
- shard-dg2: NOTRUN -> [SKIP][117] ([fdo#111827]) +3 other tests skip
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@kms_chamelium_color@degamma.html
- shard-dg1: NOTRUN -> [SKIP][118] ([fdo#111827])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-15/igt@kms_chamelium_color@degamma.html
- shard-mtlp: NOTRUN -> [SKIP][119] ([fdo#111827]) +1 other test skip
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-4/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_color@gamma:
- shard-tglu: NOTRUN -> [SKIP][120] ([fdo#111827])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-2/igt@kms_chamelium_color@gamma.html
* igt@kms_chamelium_edid@dp-edid-change-during-suspend:
- shard-dg1: NOTRUN -> [SKIP][121] ([i915#7828]) +3 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-13/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html
* igt@kms_chamelium_edid@dp-mode-timings:
- shard-dg2: NOTRUN -> [SKIP][122] ([i915#7828]) +8 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-10/igt@kms_chamelium_edid@dp-mode-timings.html
* igt@kms_chamelium_frames@dp-crc-single:
- shard-mtlp: NOTRUN -> [SKIP][123] ([i915#7828]) +4 other tests skip
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-4/igt@kms_chamelium_frames@dp-crc-single.html
* igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
- shard-tglu: NOTRUN -> [SKIP][124] ([i915#7828]) +3 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-6/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html
* igt@kms_content_protection@atomic-dpms:
- shard-dg2: NOTRUN -> [SKIP][125] ([i915#7118]) +1 other test skip
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@kms_content_protection@atomic-dpms.html
- shard-tglu: NOTRUN -> [SKIP][126] ([i915#6944] / [i915#7116] / [i915#7118])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-9/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-mtlp: NOTRUN -> [SKIP][127] ([i915#3299])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-7/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-dg2: NOTRUN -> [SKIP][128] ([i915#3299])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-tglu: NOTRUN -> [SKIP][129] ([i915#3116] / [i915#3299])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-3/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_content_protection@lic@pipe-a-dp-4:
- shard-dg2: NOTRUN -> [TIMEOUT][130] ([i915#7173])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@kms_content_protection@lic@pipe-a-dp-4.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-dg2: NOTRUN -> [SKIP][131] ([i915#3359]) +2 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x32:
- shard-dg2: NOTRUN -> [SKIP][132] ([i915#3555]) +4 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x170:
- shard-tglu: NOTRUN -> [SKIP][133] ([i915#3359]) +1 other test skip
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-7/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-mtlp: NOTRUN -> [SKIP][134] ([i915#3555] / [i915#8814])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-4/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
- shard-mtlp: NOTRUN -> [SKIP][135] ([i915#3546])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-8/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- shard-dg1: NOTRUN -> [SKIP][136] ([i915#4103] / [i915#4213]) +1 other test skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-13/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
- shard-tglu: NOTRUN -> [SKIP][137] ([fdo#109274]) +3 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-9/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
- shard-dg2: NOTRUN -> [SKIP][138] ([fdo#109274] / [i915#5354]) +8 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-glk: [PASS][139] -> [FAIL][140] ([i915#2346])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_cursor_legacy@forked-bo@all-pipes:
- shard-mtlp: [PASS][141] -> [DMESG-WARN][142] ([i915#2017])
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-mtlp-6/igt@kms_cursor_legacy@forked-bo@all-pipes.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-4/igt@kms_cursor_legacy@forked-bo@all-pipes.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-mtlp: NOTRUN -> [SKIP][143] ([i915#4213])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-dg2: NOTRUN -> [SKIP][144] ([i915#4103] / [i915#4213])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_display_modes@mst-extended-mode-negative:
- shard-dg2: NOTRUN -> [SKIP][145] ([i915#8588])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@kms_display_modes@mst-extended-mode-negative.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][146] ([i915#3804])
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-3/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
* igt@kms_dsc@dsc-with-bpc:
- shard-dg2: NOTRUN -> [SKIP][147] ([i915#3555] / [i915#3840])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_flip@2x-dpms-vs-vblank-race:
- shard-mtlp: NOTRUN -> [SKIP][148] ([i915#3637])
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-4/igt@kms_flip@2x-dpms-vs-vblank-race.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-mtlp: NOTRUN -> [SKIP][149] ([fdo#111767] / [i915#3637]) +1 other test skip
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
- shard-dg2: NOTRUN -> [SKIP][150] ([fdo#109274] / [fdo#111767])
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
- shard-dg1: NOTRUN -> [SKIP][151] ([fdo#111767] / [fdo#111825])
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-18/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@2x-flip-vs-rmfb-interruptible:
- shard-snb: NOTRUN -> [SKIP][152] ([fdo#109271] / [fdo#111767])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-snb4/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
- shard-tglu: NOTRUN -> [SKIP][153] ([fdo#109274] / [fdo#111767] / [i915#3637])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-8/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
* igt@kms_flip@2x-modeset-vs-vblank-race:
- shard-dg2: NOTRUN -> [SKIP][154] ([fdo#109274]) +7 other tests skip
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@kms_flip@2x-modeset-vs-vblank-race.html
* igt@kms_flip@2x-wf_vblank-ts-check:
- shard-tglu: NOTRUN -> [SKIP][155] ([fdo#109274] / [i915#3637]) +1 other test skip
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-7/igt@kms_flip@2x-wf_vblank-ts-check.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][156] ([i915#8810])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode:
- shard-dg1: NOTRUN -> [SKIP][157] ([i915#2587] / [i915#2672])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-16/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][158] ([i915#2672]) +4 other tests skip
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode:
- shard-tglu: NOTRUN -> [SKIP][159] ([i915#2587] / [i915#2672]) +2 other tests skip
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][160] ([i915#3555] / [i915#8810]) +1 other test skip
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][161] ([i915#2672] / [i915#3555])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-default-mode.html
* igt@kms_force_connector_basic@force-load-detect:
- shard-dg2: NOTRUN -> [SKIP][162] ([fdo#109285])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt:
- shard-dg2: [PASS][163] -> [FAIL][164] ([i915#6880])
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt.html
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-pwrite:
- shard-mtlp: NOTRUN -> [SKIP][165] ([i915#1825]) +21 other tests skip
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
- shard-dg1: NOTRUN -> [SKIP][166] ([fdo#111825]) +18 other tests skip
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-16/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
- shard-dg2: NOTRUN -> [SKIP][167] ([i915#5354]) +40 other tests skip
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-plflip-blt:
- shard-tglu: NOTRUN -> [SKIP][168] ([fdo#109280]) +15 other tests skip
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-9/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-dg2: NOTRUN -> [SKIP][169] ([i915#3458]) +23 other tests skip
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
- shard-dg1: NOTRUN -> [SKIP][170] ([i915#3458]) +5 other tests skip
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-17/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-dg2: NOTRUN -> [SKIP][171] ([i915#8708]) +16 other tests skip
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
- shard-dg1: NOTRUN -> [SKIP][172] ([i915#8708]) +5 other tests skip
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-16/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-dg2: NOTRUN -> [SKIP][173] ([i915#5460])
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][174] ([i915#8708]) +2 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-4/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-shrfb-scaledprimary:
- shard-tglu: NOTRUN -> [SKIP][175] ([fdo#110189]) +11 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-9/igt@kms_frontbuffer_tracking@psr-shrfb-scaledprimary.html
* igt@kms_getfb@getfb-reject-ccs:
- shard-dg2: NOTRUN -> [SKIP][176] ([i915#6118])
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@kms_getfb@getfb-reject-ccs.html
* igt@kms_hdr@static-swap:
- shard-dg2: NOTRUN -> [SKIP][177] ([i915#3555] / [i915#8228]) +1 other test skip
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@kms_hdr@static-swap.html
* igt@kms_hdr@static-toggle-suspend:
- shard-dg1: NOTRUN -> [SKIP][178] ([i915#3555] / [i915#8228])
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-13/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-dg2: NOTRUN -> [SKIP][179] ([i915#6301])
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes:
- shard-dg1: NOTRUN -> [SKIP][180] ([fdo#109289])
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-16/igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes.html
- shard-mtlp: NOTRUN -> [SKIP][181] ([fdo#109289])
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-8/igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes.html
* igt@kms_plane_lowres@tiling-yf:
- shard-tglu: NOTRUN -> [SKIP][182] ([i915#3555]) +3 other tests skip
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-7/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_multiple@tiling-yf:
- shard-dg1: NOTRUN -> [SKIP][183] ([i915#3555]) +3 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-13/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@invalid-num-scalers:
- shard-snb: NOTRUN -> [SKIP][184] ([fdo#109271]) +23 other tests skip
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-snb2/igt@kms_plane_scaling@invalid-num-scalers.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][185] ([i915#5235]) +3 other tests skip
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-6/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-hdmi-a-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-d-hdmi-a-2:
- shard-dg2: NOTRUN -> [SKIP][186] ([i915#5235]) +19 other tests skip
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-d-hdmi-a-2.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-c-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][187] ([i915#5235]) +5 other tests skip
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-c-edp-1.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-d-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][188] ([i915#3555] / [i915#5235]) +1 other test skip
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-d-edp-1.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][189] ([i915#5235]) +11 other tests skip
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-16/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4.html
* igt@kms_prime@basic-crc-hybrid:
- shard-dg2: NOTRUN -> [SKIP][190] ([i915#6524] / [i915#6805])
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@kms_prime@basic-crc-hybrid.html
* igt@kms_prime@basic-modeset-hybrid:
- shard-dg1: NOTRUN -> [SKIP][191] ([i915#6524])
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-16/igt@kms_prime@basic-modeset-hybrid.html
- shard-mtlp: NOTRUN -> [SKIP][192] ([i915#6524])
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-2/igt@kms_prime@basic-modeset-hybrid.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf:
- shard-dg1: NOTRUN -> [SKIP][193] ([i915#9683])
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-13/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-dg2: NOTRUN -> [SKIP][194] ([i915#9683]) +1 other test skip
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-3/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area:
- shard-tglu: NOTRUN -> [SKIP][195] ([fdo#111068] / [i915#9683])
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-8/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html
* igt@kms_psr@psr2_cursor_mmap_cpu:
- shard-dg2: NOTRUN -> [SKIP][196] ([i915#9681]) +2 other tests skip
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@kms_psr@psr2_cursor_mmap_cpu.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-dg1: NOTRUN -> [SKIP][197] ([i915#9673]) +2 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-15/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_psr@psr2_sprite_render:
- shard-tglu: NOTRUN -> [SKIP][198] ([i915#9673])
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-9/igt@kms_psr@psr2_sprite_render.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-dg2: NOTRUN -> [SKIP][199] ([i915#9685])
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
- shard-dg2: NOTRUN -> [SKIP][200] ([i915#4235] / [i915#5190])
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
* igt@kms_rotation_crc@sprite-rotation-90:
- shard-dg2: NOTRUN -> [SKIP][201] ([i915#4235]) +3 other tests skip
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@kms_rotation_crc@sprite-rotation-90.html
* igt@kms_setmode@clone-exclusive-crtc:
- shard-dg2: NOTRUN -> [SKIP][202] ([i915#3555] / [i915#4098]) +1 other test skip
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-6/igt@kms_setmode@clone-exclusive-crtc.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1:
- shard-mtlp: [PASS][203] -> [FAIL][204] ([i915#9196])
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-mtlp-5/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-5/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-dg2: NOTRUN -> [SKIP][205] ([i915#2437])
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@kms_writeback@writeback-pixel-formats.html
* igt@perf@global-sseu-config:
- shard-mtlp: NOTRUN -> [SKIP][206] ([i915#7387])
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-2/igt@perf@global-sseu-config.html
* igt@perf@non-zero-reason@0-rcs0:
- shard-dg2: [PASS][207] -> [FAIL][208] ([i915#3089])
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-dg2-6/igt@perf@non-zero-reason@0-rcs0.html
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@perf@non-zero-reason@0-rcs0.html
* igt@perf@unprivileged-single-ctx-counters:
- shard-tglu: NOTRUN -> [SKIP][209] ([fdo#109289])
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-9/igt@perf@unprivileged-single-ctx-counters.html
* igt@perf_pmu@cpu-hotplug:
- shard-dg1: NOTRUN -> [SKIP][210] ([i915#8850])
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-15/igt@perf_pmu@cpu-hotplug.html
* igt@perf_pmu@frequency@gt0:
- shard-dg2: NOTRUN -> [FAIL][211] ([i915#6806])
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-10/igt@perf_pmu@frequency@gt0.html
- shard-dg1: NOTRUN -> [FAIL][212] ([i915#6806])
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-15/igt@perf_pmu@frequency@gt0.html
* igt@perf_pmu@module-unload:
- shard-snb: [PASS][213] -> [INCOMPLETE][214] ([i915#9615])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-snb2/igt@perf_pmu@module-unload.html
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-snb5/igt@perf_pmu@module-unload.html
* igt@prime_udl:
- shard-dg2: NOTRUN -> [SKIP][215] ([fdo#109291])
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@prime_udl.html
* igt@prime_vgem@basic-write:
- shard-dg1: NOTRUN -> [SKIP][216] ([i915#3708])
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-15/igt@prime_vgem@basic-write.html
* igt@prime_vgem@fence-read-hang:
- shard-mtlp: NOTRUN -> [SKIP][217] ([i915#3708])
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-2/igt@prime_vgem@fence-read-hang.html
* igt@v3d/v3d_perfmon@get-values-valid-perfmon:
- shard-dg1: NOTRUN -> [SKIP][218] ([i915#2575]) +2 other tests skip
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-18/igt@v3d/v3d_perfmon@get-values-valid-perfmon.html
* igt@v3d/v3d_submit_cl@bad-perfmon:
- shard-tglu: NOTRUN -> [SKIP][219] ([fdo#109315] / [i915#2575]) +5 other tests skip
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-10/igt@v3d/v3d_submit_cl@bad-perfmon.html
* igt@v3d/v3d_submit_csd@single-out-sync:
- shard-dg2: NOTRUN -> [SKIP][220] ([i915#2575]) +16 other tests skip
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@v3d/v3d_submit_csd@single-out-sync.html
* igt@v3d/v3d_wait_bo@used-bo:
- shard-mtlp: NOTRUN -> [SKIP][221] ([i915#2575]) +6 other tests skip
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-4/igt@v3d/v3d_wait_bo@used-bo.html
* igt@vc4/vc4_dmabuf_poll@poll-read-waits-until-write-done:
- shard-tglu: NOTRUN -> [SKIP][222] ([i915#2575]) +3 other tests skip
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-3/igt@vc4/vc4_dmabuf_poll@poll-read-waits-until-write-done.html
* igt@vc4/vc4_purgeable_bo@mark-unpurgeable-purged:
- shard-dg1: NOTRUN -> [SKIP][223] ([i915#7711]) +3 other tests skip
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-13/igt@vc4/vc4_purgeable_bo@mark-unpurgeable-purged.html
- shard-mtlp: NOTRUN -> [SKIP][224] ([i915#7711]) +3 other tests skip
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-7/igt@vc4/vc4_purgeable_bo@mark-unpurgeable-purged.html
* igt@vc4/vc4_tiling@set-bad-flags:
- shard-glk: NOTRUN -> [SKIP][225] ([fdo#109271]) +37 other tests skip
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-glk8/igt@vc4/vc4_tiling@set-bad-flags.html
* igt@vc4/vc4_wait_seqno@bad-seqno-1ns:
- shard-dg2: NOTRUN -> [SKIP][226] ([i915#7711]) +10 other tests skip
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-10/igt@vc4/vc4_wait_seqno@bad-seqno-1ns.html
#### Possible fixes ####
* igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0:
- shard-dg2: [INCOMPLETE][227] ([i915#7297]) -> [PASS][228]
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-dg2-6/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0.html
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-10/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0.html
* igt@gem_eio@reset-stress:
- shard-dg1: [FAIL][229] ([i915#5784]) -> [PASS][230]
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-dg1-15/igt@gem_eio@reset-stress.html
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-13/igt@gem_eio@reset-stress.html
* igt@gem_eio@unwedge-stress:
- shard-dg2: [FAIL][231] ([i915#5784]) -> [PASS][232]
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-dg2-11/igt@gem_eio@unwedge-stress.html
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-11/igt@gem_eio@unwedge-stress.html
* igt@gem_eio@wait-wedge-immediate:
- shard-mtlp: [ABORT][233] ([i915#9262]) -> [PASS][234]
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-mtlp-2/igt@gem_eio@wait-wedge-immediate.html
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-2/igt@gem_eio@wait-wedge-immediate.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-glk: [FAIL][235] ([i915#2842]) -> [PASS][236]
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-glk9/igt@gem_exec_fair@basic-none-share@rcs0.html
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-glk3/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- shard-dg2: [DMESG-WARN][237] ([i915#4936] / [i915#5493]) -> [PASS][238]
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-dg2-2/igt@gem_lmem_swapping@smem-oom@lmem0.html
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@i915_module_load@reload-no-display:
- shard-snb: [INCOMPLETE][239] -> [PASS][240]
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-snb4/igt@i915_module_load@reload-no-display.html
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-snb4/igt@i915_module_load@reload-no-display.html
* {igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0}:
- shard-dg1: [FAIL][241] ([i915#3591]) -> [PASS][242]
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-dg1-14/igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0.html
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-13/igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-mtlp: [FAIL][243] ([i915#5138]) -> [PASS][244] +1 other test pass
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-tglu: [FAIL][245] ([i915#3743]) -> [PASS][246] +3 other tests pass
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-tglu-9/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-7/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-glk: [FAIL][247] ([i915#2346]) -> [PASS][248]
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt:
- shard-dg2: [FAIL][249] ([i915#6880]) -> [PASS][250]
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-dg2-3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1:
- shard-tglu: [FAIL][251] ([i915#8292]) -> [PASS][252]
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-tglu-7/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-10/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html
* {igt@kms_pm_rpm@dpms-mode-unset-lpsp}:
- shard-dg1: [SKIP][253] ([i915#9519]) -> [PASS][254]
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-dg1-16/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg1-19/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* {igt@kms_pm_rpm@modeset-lpsp-stress}:
- shard-dg2: [SKIP][255] ([i915#9519]) -> [PASS][256]
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-dg2-2/igt@kms_pm_rpm@modeset-lpsp-stress.html
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-10/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-1:
- shard-tglu: [FAIL][257] ([i915#9196]) -> [PASS][258] +1 other test pass
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-tglu-7/igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-1.html
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-tglu-7/igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-1.html
* igt@perf_pmu@busy-double-start@bcs0:
- shard-mtlp: [FAIL][259] ([i915#4349]) -> [PASS][260] +1 other test pass
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-mtlp-2/igt@perf_pmu@busy-double-start@bcs0.html
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-6/igt@perf_pmu@busy-double-start@bcs0.html
* igt@sw_sync@timeline_closed:
- shard-mtlp: [DMESG-WARN][261] ([i915#2017] / [i915#9157]) -> [PASS][262]
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-mtlp-7/igt@sw_sync@timeline_closed.html
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-mtlp-1/igt@sw_sync@timeline_closed.html
#### Warnings ####
* igt@kms_content_protection@type1:
- shard-dg2: [SKIP][263] ([i915#7118] / [i915#7162]) -> [SKIP][264] ([i915#7118])
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13905/shard-dg2-11/igt@kms_content_protection@type1.html
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/shard-dg2-2/igt@kms_content_protection@type1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109293]: https://bugs.freedesktop.org/show_bug.cgi?id=109293
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#2017]: https://gitlab.freedesktop.org/drm/intel/issues/2017
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3089]: https://gitlab.freedesktop.org/drm/intel/issues/3089
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
[i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4537]: https://gitlab.freedesktop.org/drm/intel/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#4936]: https://gitlab.freedesktop.org/drm/intel/issues/4936
[i915#5107]: https://gitlab.freedesktop.org/drm/intel/issues/5107
[i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5460]: https://gitlab.freedesktop.org/drm/intel/issues/5460
[i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
[i915#6118]: https://gitlab.freedesktop.org/drm/intel/issues/6118
[i915#6122]: https://gitlab.freedesktop.org/drm/intel/issues/6122
[i915#6187]: https://gitlab.freedesktop.org/drm/intel/issues/6187
[i915#6188]: https://gitlab.freedesktop.org/drm/intel/issues/6188
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/intel/issues/6344
[i915#6412]: https://gitlab.freedesktop.org/drm/intel/issues/6412
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6805]: https://gitlab.freedesktop.org/drm/intel/issues/6805
[i915#6806]: https://gitlab.freedesktop.org/drm/intel/issues/6806
[i915#6880]: https://gitlab.freedesktop.org/drm/intel/issues/6880
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#7091]: https://gitlab.freedesktop.org/drm/intel/issues/7091
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7162]: https://gitlab.freedesktop.org/drm/intel/issues/7162
[i915#7173]: https://gitlab.freedesktop.org/drm/intel/issues/7173
[i915#7213]: https://gitlab.freedesktop.org/drm/intel/issues/7213
[i915#7297]: https://gitlab.freedesktop.org/drm/intel/issues/7297
[i915#7387]: https://gitlab.freedesktop.org/drm/intel/issues/7387
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8247]: https://gitlab.freedesktop.org/drm/intel/issues/8247
[i915#8289]: https://gitlab.freedesktop.org/drm/intel/issues/8289
[i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
[i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
[i915#8428]: https://gitlab.freedesktop.org/drm/intel/issues/8428
[i915#8430]: https://gitlab.freedesktop.org/drm/intel/issues/8430
[i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
[i915#8588]: https://gitlab.freedesktop.org/drm/intel/issues/8588
[i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
[i915#8810]: https://gitlab.freedesktop.org/drm/intel/issues/8810
[i915#8814]: https://gitlab.freedesktop.org/drm/intel/issues/8814
[i915#8850]: https://gitlab.freedesktop.org/drm/intel/issues/8850
[i915#8925]: https://gitlab.freedesktop.org/drm/intel/issues/8925
[i915#9053]: https://gitlab.freedesktop.org/drm/intel/issues/9053
[i915#9157]: https://gitlab.freedesktop.org/drm/intel/issues/9157
[i915#9196]: https://gitlab.freedesktop.org/drm/intel/issues/9196
[i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262
[i915#9310]: https://gitlab.freedesktop.org/drm/intel/issues/9310
[i915#9323]: https://gitlab.freedesktop.org/drm/intel/issues/9323
[i915#9337]: https://gitlab.freedesktop.org/drm/intel/issues/9337
[i915#9340]: https://gitlab.freedesktop.org/drm/intel/issues/9340
[i915#9364]: https://gitlab.freedesktop.org/drm/intel/issues/9364
[i915#9412]: https://gitlab.freedesktop.org/drm/intel/issues/9412
[i915#9414]: https://gitlab.freedesktop.org/drm/intel/issues/9414
[i915#9423]: https://gitlab.freedesktop.org/drm/intel/issues/9423
[i915#9424]: https://gitlab.freedesktop.org/drm/intel/issues/9424
[i915#9433]: https://gitlab.freedesktop.org/drm/intel/issues/9433
[i915#9519]: https://gitlab.freedesktop.org/drm/intel/issues/9519
[i915#9606]: https://gitlab.freedesktop.org/drm/intel/issues/9606
[i915#9615]: https://gitlab.freedesktop.org/drm/intel/issues/9615
[i915#9653]: https://gitlab.freedesktop.org/drm/intel/issues/9653
[i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673
[i915#9681]: https://gitlab.freedesktop.org/drm/intel/issues/9681
[i915#9683]: https://gitlab.freedesktop.org/drm/intel/issues/9683
[i915#9685]: https://gitlab.freedesktop.org/drm/intel/issues/9685
[i915#9688]: https://gitlab.freedesktop.org/drm/intel/issues/9688
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7595 -> IGTPW_10232
* Piglit: piglit_4509 -> None
CI-20190529: 20190529
CI_DRM_13905: dbdb47c227dc21b7bf98ada039bf42aac4b58b8b @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_10232: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/index.html
IGT_7595: cfa00d99b1dfa0621ea552d1ed54907798da1a1a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10232/index.html
[-- Attachment #2: Type: text/html, Size: 87639 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest
@ 2023-11-22 10:19 Marcin Bernatowicz
2023-11-22 11:04 ` Laguna, Lukasz
2023-11-22 16:16 ` Kamil Konieczny
0 siblings, 2 replies; 13+ messages in thread
From: Marcin Bernatowicz @ 2023-11-22 10:19 UTC (permalink / raw)
To: igt-dev; +Cc: matthew.auld, jakub1.kolakowski
Validates the creation of significant Buffer Object (BO) within VRAM,
considering the entire available CPU-visible VRAM size.
The size of the created BO can be adjusted using
'-S' command line parameter, representing BO size in MB.
v2: rebased, updated to uAPI changes (DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT),
after review corrections: 1024UL -> 1024ULL,
int -> unsigned int (Kamil)
v3: provided a flag to allocate the memory within the CPU-visible
portion of VRAM (Matt)
__create_bo replaced with xe_bo_create_flags (Lukasz)
removed the percent command line parameter (Lukasz)
renamed size_MB to size_mb (Lukasz)
added helper function to query available CPU-visible VRAM size,
renamed 'xe_vram_available' to 'xe_available_vram_size' for
consistency with other function names
Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
---
lib/xe/xe_query.c | 57 ++++++++++++++++++++++-------
lib/xe/xe_query.h | 3 +-
tests/intel/xe_create.c | 75 +++++++++++++++++++++++++++++++++++++-
tests/intel/xe_evict_ccs.c | 2 +-
4 files changed, 120 insertions(+), 17 deletions(-)
diff --git a/lib/xe/xe_query.c b/lib/xe/xe_query.c
index afd443be3..de3296062 100644
--- a/lib/xe/xe_query.c
+++ b/lib/xe/xe_query.c
@@ -629,20 +629,20 @@ uint64_t xe_visible_vram_size(int fd, int gt)
return visible_size;
}
-/**
- * xe_vram_available:
- * @fd: xe device fd
- * @gt: gt
- *
- * Returns available vram of xe device @fd and @gt.
- */
-uint64_t xe_vram_available(int fd, int gt)
+
+struct __available_vram {
+ uint64_t total_available;
+ uint64_t cpu_visible_available;
+};
+
+static void __xe_available_vram_size_snapshot(int fd, int gt, struct __available_vram *avail_vram)
{
struct xe_device *xe_dev;
int region_idx;
struct drm_xe_query_mem_region *mem_region;
struct drm_xe_query_mem_regions *mem_regions;
+ igt_assert(avail_vram);
xe_dev = find_in_cache(fd);
igt_assert(xe_dev);
@@ -650,19 +650,48 @@ uint64_t xe_vram_available(int fd, int gt)
mem_region = &xe_dev->mem_regions->regions[region_idx];
if (XE_IS_CLASS_VRAM(mem_region)) {
- uint64_t available_vram;
-
mem_regions = xe_query_mem_regions_new(fd);
pthread_mutex_lock(&cache.cache_mutex);
mem_region->used = mem_regions->regions[region_idx].used;
- available_vram = mem_region->total_size - mem_region->used;
+ mem_region->cpu_visible_used = mem_regions->regions[region_idx].cpu_visible_used;
+ avail_vram->total_available = mem_region->total_size - mem_region->used;
+ avail_vram->cpu_visible_available =
+ mem_region->cpu_visible_size - mem_region->cpu_visible_used;
pthread_mutex_unlock(&cache.cache_mutex);
free(mem_regions);
-
- return available_vram;
}
+}
- return 0;
+/**
+ * xe_available_vram_size:
+ * @fd: xe device fd
+ * @gt: gt
+ *
+ * Returns size of available vram of xe device @fd and @gt.
+ */
+uint64_t xe_available_vram_size(int fd, int gt)
+{
+ struct __available_vram available_vram = {};
+
+ __xe_available_vram_size_snapshot(fd, gt, &available_vram);
+
+ return available_vram.total_available;
+}
+
+/**
+ * xe_visible_available_vram_size:
+ * @fd: xe device fd
+ * @gt: gt
+ *
+ * Returns size of visible available vram of xe device @fd and @gt.
+ */
+uint64_t xe_visible_available_vram_size(int fd, int gt)
+{
+ struct __available_vram available_vram = {};
+
+ __xe_available_vram_size_snapshot(fd, gt, &available_vram);
+
+ return available_vram.cpu_visible_available;
}
/**
diff --git a/lib/xe/xe_query.h b/lib/xe/xe_query.h
index 38e9aa440..503d60b44 100644
--- a/lib/xe/xe_query.h
+++ b/lib/xe/xe_query.h
@@ -92,7 +92,8 @@ unsigned int xe_number_hw_engines(int fd);
bool xe_has_vram(int fd);
uint64_t xe_vram_size(int fd, int gt);
uint64_t xe_visible_vram_size(int fd, int gt);
-uint64_t xe_vram_available(int fd, int gt);
+uint64_t xe_available_vram_size(int fd, int gt);
+uint64_t xe_visible_available_vram_size(int fd, int gt);
uint32_t xe_get_default_alignment(int fd);
uint32_t xe_va_bits(int fd);
uint16_t xe_dev_id(int fd);
diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
index f4633cfb3..082e9b440 100644
--- a/tests/intel/xe_create.c
+++ b/tests/intel/xe_create.c
@@ -18,6 +18,12 @@
#define PAGE_SIZE 0x1000
+static struct param {
+ unsigned int size_mb;
+} params = {
+ .size_mb = 0,
+};
+
static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
uint32_t *handlep)
{
@@ -214,7 +220,70 @@ static void create_massive_size(int fd)
}
}
-igt_main
+/**
+ * SUBTEST: create-big-vram
+ * Functionality: BO creation
+ * Test category: functionality test
+ * Description: Verifies the creation of substantial BO within VRAM,
+ * constituting all available CPU-visible VRAM.
+ */
+static void create_big_vram(int fd)
+{
+ uint64_t bo_size, size, visible_avail_size, alignment;
+ uint32_t bo_handle;
+ char *bo_ptr = NULL;
+ uint64_t vm = 0;
+ int gt;
+
+ igt_require(xe_has_vram(fd));
+ alignment = xe_get_default_alignment(fd);
+ vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
+
+ xe_for_each_gt(fd, gt) {
+ visible_avail_size = xe_visible_available_vram_size(fd, gt);
+ bo_size = params.size_mb ? params.size_mb * 1024ULL * 1024ULL
+ : ALIGN_DOWN(visible_avail_size, alignment);
+ igt_debug("gt%u bo_size=%lu visible_available_vram_size=%lu\n",
+ gt, bo_size, visible_avail_size);
+
+ bo_handle = xe_bo_create_flags(fd, vm, bo_size, visible_vram_memory(fd, gt));
+ bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
+
+ size = bo_size - 1;
+ while (size > SZ_64K) {
+ igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
+ WRITE_ONCE(bo_ptr[size], 'A');
+ igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
+ size >>= 1;
+ }
+ igt_assert_eq(0, bo_ptr[0]);
+
+ munmap(bo_ptr, bo_size);
+ gem_close(fd, bo_handle);
+ }
+
+ xe_vm_destroy(fd, vm);
+}
+
+static int opt_handler(int opt, int opt_index, void *data)
+{
+ switch (opt) {
+ case 'S':
+ params.size_mb = atoi(optarg);
+ igt_debug("Size MB: %d\n", params.size_mb);
+ break;
+ default:
+ return IGT_OPT_HANDLER_ERROR;
+ }
+
+ return IGT_OPT_HANDLER_SUCCESS;
+}
+
+const char *help_str =
+ " -S\tBO size in MB\n"
+ ;
+
+igt_main_args("S:", NULL, help_str, opt_handler, NULL)
{
int xe;
@@ -254,6 +323,10 @@ igt_main
}
+ igt_subtest("create-big-vram") {
+ create_big_vram(xe);
+ }
+
igt_fixture
drm_close_driver(xe);
}
diff --git a/tests/intel/xe_evict_ccs.c b/tests/intel/xe_evict_ccs.c
index d7244f620..b04c20935 100644
--- a/tests/intel/xe_evict_ccs.c
+++ b/tests/intel/xe_evict_ccs.c
@@ -325,7 +325,7 @@ static void set_config(int fd, uint32_t flags, const struct param *param,
config->param = param;
config->flags = flags;
config->free_mb = xe_visible_vram_size(fd, 0) / SZ_1M;
- config->total_mb = xe_vram_available(fd, 0) / SZ_1M;
+ config->total_mb = xe_available_vram_size(fd, 0) / SZ_1M;
config->test_mb = min_t(int, config->free_mb * config->param->vram_percent / 100,
config->total_mb * config->param->vram_percent / 100);
--
2.31.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest
2023-11-21 15:42 ` [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest Matthew Auld
@ 2023-11-22 10:26 ` Bernatowicz, Marcin
0 siblings, 0 replies; 13+ messages in thread
From: Bernatowicz, Marcin @ 2023-11-22 10:26 UTC (permalink / raw)
To: Matthew Auld, Marcin Bernatowicz; +Cc: igt-dev, jakub1.kolakowski
On 11/21/2023 4:42 PM, Matthew Auld wrote:
> On Tue, 21 Nov 2023 at 13:50, Marcin Bernatowicz
> <marcin.bernatowicz@intel.com> wrote:
>>
>> Validates the creation of significant Buffer Objects (BO) within VRAM,
>> accounting for 75% of the CPU-visible VRAM size.
>> The size of the created BO can be adjusted using command line parameters,
>> with '-S' representing BO size in MB,
>> and '-p' representing BO size as a percentage of the VRAM size.
>>
>> v2: rebased, updated to uAPI changes (DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT),
>> after review corrections: 1024UL -> 1024ULL,
>> int -> unsigned int (Kamil)
>>
>> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
>> ---
>> tests/intel/xe_create.c | 80 ++++++++++++++++++++++++++++++++++++++++-
>> 1 file changed, 79 insertions(+), 1 deletion(-)
>>
>> diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
>> index f4633cfb3..3ff9bb750 100644
>> --- a/tests/intel/xe_create.c
>> +++ b/tests/intel/xe_create.c
>> @@ -18,6 +18,14 @@
>>
>> #define PAGE_SIZE 0x1000
>>
>> +static struct param {
>> + unsigned int size_MB;
>> + unsigned int vram_percent;
>> +} params = {
>> + .size_MB = 0,
>> + .vram_percent = 75,
>> +};
>> +
>> static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
>> uint32_t *handlep)
>> {
>> @@ -214,7 +222,73 @@ static void create_massive_size(int fd)
>> }
>> }
>>
>> -igt_main
>> +/**
>> + * SUBTEST: create-big-vram
>> + * Functionality: BO creation
>> + * Test category: functionality test
>> + * Description: Validates the creation of substantial BO within VRAM
>> + * (constituting 75% of the CPU-visible VRAM).
>> + */
>> +static void create_big_vram(int fd)
>> +{
>> + uint64_t bo_size, size, vram_size, alignment;
>> + uint32_t bo_handle;
>> + char *bo_ptr = NULL;
>> + uint64_t vm = 0;
>> + int gt;
>> +
>> + igt_require(xe_has_vram(fd));
>> + alignment = xe_get_default_alignment(fd);
>> + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
>> +
>> + xe_for_each_gt(fd, gt) {
>> + vram_size = xe_visible_vram_size(fd, gt);
>> + bo_size = params.size_MB ? params.size_MB * 1024ULL * 1024ULL
>> + : ALIGN(vram_size * params.vram_percent / 100, alignment);
>> + igt_debug("gt%u bo_size=%lu visible_vram_size=%lu\n", gt, bo_size, vram_size);
>> +
>> + igt_assert_eq(0, __create_bo(fd, vm, bo_size, vram_memory(fd, gt), &bo_handle));
>
> We should also ask the KMD to allocate the memory within the CPU
> visible portion of VRAM (if applicable), otherwise we will likely
> trigger SIGBUS below on small-bar systems. See visible_vram_memory().
True, updated and send v3.
Thanks for review,
marcin
>
>> + bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
>> + size = bo_size - 1;
>> + while (size > SZ_64K) {
>> + igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
>> + WRITE_ONCE(bo_ptr[size], 'A');
>> + igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
>> + size >>= 1;
>> + }
>> +
>> + igt_assert_eq(0, bo_ptr[0]);
>> + munmap(bo_ptr, bo_size);
>> + gem_close(fd, bo_handle);
>> + }
>> +
>> + xe_vm_destroy(fd, vm);
>> +}
>> +
>> +static int opt_handler(int opt, int opt_index, void *data)
>> +{
>> + switch (opt) {
>> + case 'S':
>> + params.size_MB = atoi(optarg);
>> + igt_debug("Size MB: %d\n", params.size_MB);
>> + break;
>> + case 'p':
>> + params.vram_percent = atoi(optarg);
>> + igt_debug("Percent of VRAM: %d\n", params.vram_percent);
>> + break;
>> + default:
>> + return IGT_OPT_HANDLER_ERROR;
>> + }
>> +
>> + return IGT_OPT_HANDLER_SUCCESS;
>> +}
>> +
>> +const char *help_str =
>> + " -S\tBO size in MB\n"
>> + " -p\tPercent of VRAM for BO (default 75% of visible VRAM size)\n"
>> + ;
>> +
>> +igt_main_args("S:p:", NULL, help_str, opt_handler, NULL)
>> {
>> int xe;
>>
>> @@ -254,6 +328,10 @@ igt_main
>> }
>>
>>
>> + igt_subtest("create-big-vram") {
>> + create_big_vram(xe);
>> + }
>> +
>> igt_fixture
>> drm_close_driver(xe);
>> }
>> --
>> 2.31.1
>>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest
2023-11-22 10:19 [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest Marcin Bernatowicz
@ 2023-11-22 11:04 ` Laguna, Lukasz
2023-11-22 16:16 ` Kamil Konieczny
1 sibling, 0 replies; 13+ messages in thread
From: Laguna, Lukasz @ 2023-11-22 11:04 UTC (permalink / raw)
To: Marcin Bernatowicz, igt-dev; +Cc: matthew.auld, jakub1.kolakowski
On 11/22/2023 11:19, Marcin Bernatowicz wrote:
> Validates the creation of significant Buffer Object (BO) within VRAM,
> considering the entire available CPU-visible VRAM size.
> The size of the created BO can be adjusted using
> '-S' command line parameter, representing BO size in MB.
>
> v2: rebased, updated to uAPI changes (DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT),
> after review corrections: 1024UL -> 1024ULL,
> int -> unsigned int (Kamil)
> v3: provided a flag to allocate the memory within the CPU-visible
> portion of VRAM (Matt)
> __create_bo replaced with xe_bo_create_flags (Lukasz)
> removed the percent command line parameter (Lukasz)
> renamed size_MB to size_mb (Lukasz)
> added helper function to query available CPU-visible VRAM size,
> renamed 'xe_vram_available' to 'xe_available_vram_size' for
> consistency with other function names
>
> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
> ---
> lib/xe/xe_query.c | 57 ++++++++++++++++++++++-------
> lib/xe/xe_query.h | 3 +-
> tests/intel/xe_create.c | 75 +++++++++++++++++++++++++++++++++++++-
> tests/intel/xe_evict_ccs.c | 2 +-
> 4 files changed, 120 insertions(+), 17 deletions(-)
>
> diff --git a/lib/xe/xe_query.c b/lib/xe/xe_query.c
> index afd443be3..de3296062 100644
> --- a/lib/xe/xe_query.c
> +++ b/lib/xe/xe_query.c
> @@ -629,20 +629,20 @@ uint64_t xe_visible_vram_size(int fd, int gt)
>
> return visible_size;
> }
> -/**
> - * xe_vram_available:
> - * @fd: xe device fd
> - * @gt: gt
> - *
> - * Returns available vram of xe device @fd and @gt.
> - */
> -uint64_t xe_vram_available(int fd, int gt)
> +
> +struct __available_vram {
> + uint64_t total_available;
> + uint64_t cpu_visible_available;
> +};
> +
> +static void __xe_available_vram_size_snapshot(int fd, int gt, struct __available_vram *avail_vram)
> {
> struct xe_device *xe_dev;
> int region_idx;
> struct drm_xe_query_mem_region *mem_region;
> struct drm_xe_query_mem_regions *mem_regions;
>
> + igt_assert(avail_vram);
> xe_dev = find_in_cache(fd);
> igt_assert(xe_dev);
>
> @@ -650,19 +650,48 @@ uint64_t xe_vram_available(int fd, int gt)
> mem_region = &xe_dev->mem_regions->regions[region_idx];
>
> if (XE_IS_CLASS_VRAM(mem_region)) {
> - uint64_t available_vram;
> -
> mem_regions = xe_query_mem_regions_new(fd);
> pthread_mutex_lock(&cache.cache_mutex);
> mem_region->used = mem_regions->regions[region_idx].used;
> - available_vram = mem_region->total_size - mem_region->used;
> + mem_region->cpu_visible_used = mem_regions->regions[region_idx].cpu_visible_used;
> + avail_vram->total_available = mem_region->total_size - mem_region->used;
> + avail_vram->cpu_visible_available =
> + mem_region->cpu_visible_size - mem_region->cpu_visible_used;
> pthread_mutex_unlock(&cache.cache_mutex);
> free(mem_regions);
> -
> - return available_vram;
> }
> +}
>
> - return 0;
> +/**
> + * xe_available_vram_size:
> + * @fd: xe device fd
> + * @gt: gt
> + *
> + * Returns size of available vram of xe device @fd and @gt.
> + */
> +uint64_t xe_available_vram_size(int fd, int gt)
> +{
> + struct __available_vram available_vram = {};
> +
> + __xe_available_vram_size_snapshot(fd, gt, &available_vram);
> +
> + return available_vram.total_available;
> +}
> +
> +/**
> + * xe_visible_available_vram_size:
> + * @fd: xe device fd
> + * @gt: gt
> + *
> + * Returns size of visible available vram of xe device @fd and @gt.
> + */
> +uint64_t xe_visible_available_vram_size(int fd, int gt)
> +{
> + struct __available_vram available_vram = {};
> +
> + __xe_available_vram_size_snapshot(fd, gt, &available_vram);
> +
> + return available_vram.cpu_visible_available;
> }
>
> /**
> diff --git a/lib/xe/xe_query.h b/lib/xe/xe_query.h
> index 38e9aa440..503d60b44 100644
> --- a/lib/xe/xe_query.h
> +++ b/lib/xe/xe_query.h
> @@ -92,7 +92,8 @@ unsigned int xe_number_hw_engines(int fd);
> bool xe_has_vram(int fd);
> uint64_t xe_vram_size(int fd, int gt);
> uint64_t xe_visible_vram_size(int fd, int gt);
> -uint64_t xe_vram_available(int fd, int gt);
> +uint64_t xe_available_vram_size(int fd, int gt);
> +uint64_t xe_visible_available_vram_size(int fd, int gt);
> uint32_t xe_get_default_alignment(int fd);
> uint32_t xe_va_bits(int fd);
> uint16_t xe_dev_id(int fd);
> diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
> index f4633cfb3..082e9b440 100644
> --- a/tests/intel/xe_create.c
> +++ b/tests/intel/xe_create.c
> @@ -18,6 +18,12 @@
>
> #define PAGE_SIZE 0x1000
>
> +static struct param {
> + unsigned int size_mb;
> +} params = {
> + .size_mb = 0,
> +};
> +
> static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
> uint32_t *handlep)
> {
> @@ -214,7 +220,70 @@ static void create_massive_size(int fd)
> }
> }
>
> -igt_main
> +/**
> + * SUBTEST: create-big-vram
> + * Functionality: BO creation
> + * Test category: functionality test
> + * Description: Verifies the creation of substantial BO within VRAM,
> + * constituting all available CPU-visible VRAM.
> + */
> +static void create_big_vram(int fd)
> +{
> + uint64_t bo_size, size, visible_avail_size, alignment;
> + uint32_t bo_handle;
> + char *bo_ptr = NULL;
> + uint64_t vm = 0;
> + int gt;
> +
> + igt_require(xe_has_vram(fd));
> + alignment = xe_get_default_alignment(fd);
> + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
> +
> + xe_for_each_gt(fd, gt) {
> + visible_avail_size = xe_visible_available_vram_size(fd, gt);
> + bo_size = params.size_mb ? params.size_mb * 1024ULL * 1024ULL
> + : ALIGN_DOWN(visible_avail_size, alignment);
> + igt_debug("gt%u bo_size=%lu visible_available_vram_size=%lu\n",
> + gt, bo_size, visible_avail_size);
> +
> + bo_handle = xe_bo_create_flags(fd, vm, bo_size, visible_vram_memory(fd, gt));
> + bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
> +
> + size = bo_size - 1;
> + while (size > SZ_64K) {
> + igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
> + WRITE_ONCE(bo_ptr[size], 'A');
> + igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
> + size >>= 1;
> + }
> + igt_assert_eq(0, bo_ptr[0]);
> +
> + munmap(bo_ptr, bo_size);
> + gem_close(fd, bo_handle);
> + }
> +
> + xe_vm_destroy(fd, vm);
> +}
> +
> +static int opt_handler(int opt, int opt_index, void *data)
> +{
> + switch (opt) {
> + case 'S':
> + params.size_mb = atoi(optarg);
> + igt_debug("Size MB: %d\n", params.size_mb);
> + break;
> + default:
> + return IGT_OPT_HANDLER_ERROR;
> + }
> +
> + return IGT_OPT_HANDLER_SUCCESS;
> +}
> +
> +const char *help_str =
> + " -S\tBO size in MB\n"
> + ;
> +
> +igt_main_args("S:", NULL, help_str, opt_handler, NULL)
> {
> int xe;
>
> @@ -254,6 +323,10 @@ igt_main
> }
>
>
> + igt_subtest("create-big-vram") {
> + create_big_vram(xe);
> + }
> +
> igt_fixture
> drm_close_driver(xe);
> }
> diff --git a/tests/intel/xe_evict_ccs.c b/tests/intel/xe_evict_ccs.c
> index d7244f620..b04c20935 100644
> --- a/tests/intel/xe_evict_ccs.c
> +++ b/tests/intel/xe_evict_ccs.c
> @@ -325,7 +325,7 @@ static void set_config(int fd, uint32_t flags, const struct param *param,
> config->param = param;
> config->flags = flags;
> config->free_mb = xe_visible_vram_size(fd, 0) / SZ_1M;
> - config->total_mb = xe_vram_available(fd, 0) / SZ_1M;
> + config->total_mb = xe_available_vram_size(fd, 0) / SZ_1M;
> config->test_mb = min_t(int, config->free_mb * config->param->vram_percent / 100,
> config->total_mb * config->param->vram_percent / 100);
>
Please split xe_query related changes (with xe_evict_ccs) and new
xe_create subtest into two seperate patches.
With that changed, LGTM:
Reviewed-by: Lukasz Laguna <lukasz.laguna@intel.com>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest
2023-11-22 10:19 [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest Marcin Bernatowicz
2023-11-22 11:04 ` Laguna, Lukasz
@ 2023-11-22 16:16 ` Kamil Konieczny
2023-11-23 10:24 ` Bernatowicz, Marcin
1 sibling, 1 reply; 13+ messages in thread
From: Kamil Konieczny @ 2023-11-22 16:16 UTC (permalink / raw)
To: igt-dev; +Cc: matthew.auld, Marcin Bernatowicz, jakub1.kolakowski
Hi Marcin,
On 2023-11-22 at 11:19:51 +0100, Marcin Bernatowicz wrote:
please add version info to your patches and also add tests/intel/
or lib/xe as prefix, for example instead of:
[PATCH i-g-t] xe_create: create-big-vram subtest
write:
[PATCH v3 i-g-t] tests/intel/xe_create: create-big-vram subtest
For lib change:
[PATCH v3 i-g-t] lib/xe/xe_query: describe here your change
> Validates the creation of significant Buffer Object (BO) within VRAM,
> considering the entire available CPU-visible VRAM size.
> The size of the created BO can be adjusted using
> '-S' command line parameter, representing BO size in MB.
>
> v2: rebased, updated to uAPI changes (DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT),
> after review corrections: 1024UL -> 1024ULL,
> int -> unsigned int (Kamil)
> v3: provided a flag to allocate the memory within the CPU-visible
> portion of VRAM (Matt)
> __create_bo replaced with xe_bo_create_flags (Lukasz)
> removed the percent command line parameter (Lukasz)
> renamed size_MB to size_mb (Lukasz)
> added helper function to query available CPU-visible VRAM size,
> renamed 'xe_vram_available' to 'xe_available_vram_size' for
> consistency with other function names
>
> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
> ---
> lib/xe/xe_query.c | 57 ++++++++++++++++++++++-------
> lib/xe/xe_query.h | 3 +-
Please split this into separate patch and send Cc to Francois Dugas,
he is currently changing xe uapi.
> tests/intel/xe_create.c | 75 +++++++++++++++++++++++++++++++++++++-
> tests/intel/xe_evict_ccs.c | 2 +-
> 4 files changed, 120 insertions(+), 17 deletions(-)
>
> diff --git a/lib/xe/xe_query.c b/lib/xe/xe_query.c
> index afd443be3..de3296062 100644
> --- a/lib/xe/xe_query.c
> +++ b/lib/xe/xe_query.c
> @@ -629,20 +629,20 @@ uint64_t xe_visible_vram_size(int fd, int gt)
>
> return visible_size;
> }
> -/**
> - * xe_vram_available:
> - * @fd: xe device fd
> - * @gt: gt
> - *
> - * Returns available vram of xe device @fd and @gt.
> - */
> -uint64_t xe_vram_available(int fd, int gt)
> +
> +struct __available_vram {
> + uint64_t total_available;
> + uint64_t cpu_visible_available;
> +};
> +
> +static void __xe_available_vram_size_snapshot(int fd, int gt, struct __available_vram *avail_vram)
> {
> struct xe_device *xe_dev;
> int region_idx;
> struct drm_xe_query_mem_region *mem_region;
> struct drm_xe_query_mem_regions *mem_regions;
>
> + igt_assert(avail_vram);
> xe_dev = find_in_cache(fd);
> igt_assert(xe_dev);
>
> @@ -650,19 +650,48 @@ uint64_t xe_vram_available(int fd, int gt)
> mem_region = &xe_dev->mem_regions->regions[region_idx];
>
> if (XE_IS_CLASS_VRAM(mem_region)) {
> - uint64_t available_vram;
> -
> mem_regions = xe_query_mem_regions_new(fd);
> pthread_mutex_lock(&cache.cache_mutex);
> mem_region->used = mem_regions->regions[region_idx].used;
> - available_vram = mem_region->total_size - mem_region->used;
> + mem_region->cpu_visible_used = mem_regions->regions[region_idx].cpu_visible_used;
> + avail_vram->total_available = mem_region->total_size - mem_region->used;
> + avail_vram->cpu_visible_available =
> + mem_region->cpu_visible_size - mem_region->cpu_visible_used;
> pthread_mutex_unlock(&cache.cache_mutex);
> free(mem_regions);
> -
> - return available_vram;
> }
> +}
>
> - return 0;
> +/**
> + * xe_available_vram_size:
> + * @fd: xe device fd
> + * @gt: gt
> + *
> + * Returns size of available vram of xe device @fd and @gt.
> + */
> +uint64_t xe_available_vram_size(int fd, int gt)
> +{
> + struct __available_vram available_vram = {};
> +
> + __xe_available_vram_size_snapshot(fd, gt, &available_vram);
> +
> + return available_vram.total_available;
> +}
> +
> +/**
> + * xe_visible_available_vram_size:
> + * @fd: xe device fd
> + * @gt: gt
> + *
> + * Returns size of visible available vram of xe device @fd and @gt.
> + */
> +uint64_t xe_visible_available_vram_size(int fd, int gt)
> +{
> + struct __available_vram available_vram = {};
> +
> + __xe_available_vram_size_snapshot(fd, gt, &available_vram);
> +
> + return available_vram.cpu_visible_available;
> }
>
> /**
> diff --git a/lib/xe/xe_query.h b/lib/xe/xe_query.h
> index 38e9aa440..503d60b44 100644
> --- a/lib/xe/xe_query.h
> +++ b/lib/xe/xe_query.h
> @@ -92,7 +92,8 @@ unsigned int xe_number_hw_engines(int fd);
> bool xe_has_vram(int fd);
> uint64_t xe_vram_size(int fd, int gt);
> uint64_t xe_visible_vram_size(int fd, int gt);
> -uint64_t xe_vram_available(int fd, int gt);
> +uint64_t xe_available_vram_size(int fd, int gt);
> +uint64_t xe_visible_available_vram_size(int fd, int gt);
> uint32_t xe_get_default_alignment(int fd);
> uint32_t xe_va_bits(int fd);
> uint16_t xe_dev_id(int fd);
> diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
> index f4633cfb3..082e9b440 100644
> --- a/tests/intel/xe_create.c
> +++ b/tests/intel/xe_create.c
> @@ -18,6 +18,12 @@
>
> #define PAGE_SIZE 0x1000
>
> +static struct param {
> + unsigned int size_mb;
> +} params = {
> + .size_mb = 0,
> +};
> +
> static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
> uint32_t *handlep)
> {
> @@ -214,7 +220,70 @@ static void create_massive_size(int fd)
> }
> }
>
> -igt_main
> +/**
> + * SUBTEST: create-big-vram
> + * Functionality: BO creation
> + * Test category: functionality test
> + * Description: Verifies the creation of substantial BO within VRAM,
> + * constituting all available CPU-visible VRAM.
> + */
> +static void create_big_vram(int fd)
> +{
> + uint64_t bo_size, size, visible_avail_size, alignment;
> + uint32_t bo_handle;
> + char *bo_ptr = NULL;
> + uint64_t vm = 0;
> + int gt;
> +
> + igt_require(xe_has_vram(fd));
> + alignment = xe_get_default_alignment(fd);
> + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
> +
> + xe_for_each_gt(fd, gt) {
> + visible_avail_size = xe_visible_available_vram_size(fd, gt);
> + bo_size = params.size_mb ? params.size_mb * 1024ULL * 1024ULL
> + : ALIGN_DOWN(visible_avail_size, alignment);
> + igt_debug("gt%u bo_size=%lu visible_available_vram_size=%lu\n",
> + gt, bo_size, visible_avail_size);
> +
> + bo_handle = xe_bo_create_flags(fd, vm, bo_size, visible_vram_memory(fd, gt));
> + bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
> +
> + size = bo_size - 1;
> + while (size > SZ_64K) {
> + igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
> + WRITE_ONCE(bo_ptr[size], 'A');
> + igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
> + size >>= 1;
> + }
> + igt_assert_eq(0, bo_ptr[0]);
> +
> + munmap(bo_ptr, bo_size);
> + gem_close(fd, bo_handle);
> + }
> +
> + xe_vm_destroy(fd, vm);
> +}
> +
> +static int opt_handler(int opt, int opt_index, void *data)
> +{
> + switch (opt) {
> + case 'S':
> + params.size_mb = atoi(optarg);
> + igt_debug("Size MB: %d\n", params.size_mb);
> + break;
> + default:
> + return IGT_OPT_HANDLER_ERROR;
> + }
> +
> + return IGT_OPT_HANDLER_SUCCESS;
> +}
> +
> +const char *help_str =
> + " -S\tBO size in MB\n"
Why not percentage? imho percentage is easier to use.
> + ;
> +
> +igt_main_args("S:", NULL, help_str, opt_handler, NULL)
> {
> int xe;
>
> @@ -254,6 +323,10 @@ igt_main
> }
>
>
Remove one empty line.
> + igt_subtest("create-big-vram") {
> + create_big_vram(xe);
> + }
> +
> igt_fixture
> drm_close_driver(xe);
> }
> diff --git a/tests/intel/xe_evict_ccs.c b/tests/intel/xe_evict_ccs.c
> index d7244f620..b04c20935 100644
> --- a/tests/intel/xe_evict_ccs.c
> +++ b/tests/intel/xe_evict_ccs.c
> @@ -325,7 +325,7 @@ static void set_config(int fd, uint32_t flags, const struct param *param,
> config->param = param;
> config->flags = flags;
> config->free_mb = xe_visible_vram_size(fd, 0) / SZ_1M;
> - config->total_mb = xe_vram_available(fd, 0) / SZ_1M;
> + config->total_mb = xe_available_vram_size(fd, 0) / SZ_1M;
This should go with lib change.
Regards,
Kamil
> config->test_mb = min_t(int, config->free_mb * config->param->vram_percent / 100,
> config->total_mb * config->param->vram_percent / 100);
>
> --
> 2.31.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest
2023-11-22 16:16 ` Kamil Konieczny
@ 2023-11-23 10:24 ` Bernatowicz, Marcin
0 siblings, 0 replies; 13+ messages in thread
From: Bernatowicz, Marcin @ 2023-11-23 10:24 UTC (permalink / raw)
To: Kamil Konieczny, igt-dev, Marcin Bernatowicz, matthew.auld,
zbigniew.kempczynski, lukasz.laguna, adam.miszczak,
jakub1.kolakowski
On 11/22/2023 5:16 PM, Kamil Konieczny wrote:
> Hi Marcin,
> On 2023-11-22 at 11:19:51 +0100, Marcin Bernatowicz wrote:
>
> please add version info to your patches and also add tests/intel/
> or lib/xe as prefix, for example instead of:
>
> [PATCH i-g-t] xe_create: create-big-vram subtest
>
> write:
>
> [PATCH v3 i-g-t] tests/intel/xe_create: create-big-vram subtest
>
> For lib change:
>
> [PATCH v3 i-g-t] lib/xe/xe_query: describe here your change
>
>> Validates the creation of significant Buffer Object (BO) within VRAM,
>> considering the entire available CPU-visible VRAM size.
>> The size of the created BO can be adjusted using
>> '-S' command line parameter, representing BO size in MB.
>>
>> v2: rebased, updated to uAPI changes (DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT),
>> after review corrections: 1024UL -> 1024ULL,
>> int -> unsigned int (Kamil)
>> v3: provided a flag to allocate the memory within the CPU-visible
>> portion of VRAM (Matt)
>> __create_bo replaced with xe_bo_create_flags (Lukasz)
>> removed the percent command line parameter (Lukasz)
>> renamed size_MB to size_mb (Lukasz)
>> added helper function to query available CPU-visible VRAM size,
>> renamed 'xe_vram_available' to 'xe_available_vram_size' for
>> consistency with other function names
>>
>> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
>> ---
>> lib/xe/xe_query.c | 57 ++++++++++++++++++++++-------
>> lib/xe/xe_query.h | 3 +-
>
> Please split this into separate patch and send Cc to Francois Dugas,
> he is currently changing xe uapi.
Just realized I touched more files and forgot to split patches :/
>
>> tests/intel/xe_create.c | 75 +++++++++++++++++++++++++++++++++++++-
>> tests/intel/xe_evict_ccs.c | 2 +-
>> 4 files changed, 120 insertions(+), 17 deletions(-)
>>
>> diff --git a/lib/xe/xe_query.c b/lib/xe/xe_query.c
>> index afd443be3..de3296062 100644
>> --- a/lib/xe/xe_query.c
>> +++ b/lib/xe/xe_query.c
>> @@ -629,20 +629,20 @@ uint64_t xe_visible_vram_size(int fd, int gt)
>>
>> return visible_size;
>> }
>> -/**
>> - * xe_vram_available:
>> - * @fd: xe device fd
>> - * @gt: gt
>> - *
>> - * Returns available vram of xe device @fd and @gt.
>> - */
>> -uint64_t xe_vram_available(int fd, int gt)
>> +
>> +struct __available_vram {
>> + uint64_t total_available;
>> + uint64_t cpu_visible_available;
>> +};
>> +
>> +static void __xe_available_vram_size_snapshot(int fd, int gt, struct __available_vram *avail_vram)
>> {
>> struct xe_device *xe_dev;
>> int region_idx;
>> struct drm_xe_query_mem_region *mem_region;
>> struct drm_xe_query_mem_regions *mem_regions;
>>
>> + igt_assert(avail_vram);
>> xe_dev = find_in_cache(fd);
>> igt_assert(xe_dev);
>>
>> @@ -650,19 +650,48 @@ uint64_t xe_vram_available(int fd, int gt)
>> mem_region = &xe_dev->mem_regions->regions[region_idx];
>>
>> if (XE_IS_CLASS_VRAM(mem_region)) {
>> - uint64_t available_vram;
>> -
>> mem_regions = xe_query_mem_regions_new(fd);
>> pthread_mutex_lock(&cache.cache_mutex);
>> mem_region->used = mem_regions->regions[region_idx].used;
>> - available_vram = mem_region->total_size - mem_region->used;
>> + mem_region->cpu_visible_used = mem_regions->regions[region_idx].cpu_visible_used;
>> + avail_vram->total_available = mem_region->total_size - mem_region->used;
>> + avail_vram->cpu_visible_available =
>> + mem_region->cpu_visible_size - mem_region->cpu_visible_used;
>> pthread_mutex_unlock(&cache.cache_mutex);
>> free(mem_regions);
>> -
>> - return available_vram;
>> }
>> +}
>>
>> - return 0;
>> +/**
>> + * xe_available_vram_size:
>> + * @fd: xe device fd
>> + * @gt: gt
>> + *
>> + * Returns size of available vram of xe device @fd and @gt.
>> + */
>> +uint64_t xe_available_vram_size(int fd, int gt)
>> +{
>> + struct __available_vram available_vram = {};
>> +
>> + __xe_available_vram_size_snapshot(fd, gt, &available_vram);
>> +
>> + return available_vram.total_available;
>> +}
>> +
>> +/**
>> + * xe_visible_available_vram_size:
>> + * @fd: xe device fd
>> + * @gt: gt
>> + *
>> + * Returns size of visible available vram of xe device @fd and @gt.
>> + */
>> +uint64_t xe_visible_available_vram_size(int fd, int gt)
>> +{
>> + struct __available_vram available_vram = {};
>> +
>> + __xe_available_vram_size_snapshot(fd, gt, &available_vram);
>> +
>> + return available_vram.cpu_visible_available;
>> }
>>
>> /**
>> diff --git a/lib/xe/xe_query.h b/lib/xe/xe_query.h
>> index 38e9aa440..503d60b44 100644
>> --- a/lib/xe/xe_query.h
>> +++ b/lib/xe/xe_query.h
>> @@ -92,7 +92,8 @@ unsigned int xe_number_hw_engines(int fd);
>> bool xe_has_vram(int fd);
>> uint64_t xe_vram_size(int fd, int gt);
>> uint64_t xe_visible_vram_size(int fd, int gt);
>> -uint64_t xe_vram_available(int fd, int gt);
>> +uint64_t xe_available_vram_size(int fd, int gt);
>> +uint64_t xe_visible_available_vram_size(int fd, int gt);
>> uint32_t xe_get_default_alignment(int fd);
>> uint32_t xe_va_bits(int fd);
>> uint16_t xe_dev_id(int fd);
>> diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
>> index f4633cfb3..082e9b440 100644
>> --- a/tests/intel/xe_create.c
>> +++ b/tests/intel/xe_create.c
>> @@ -18,6 +18,12 @@
>>
>> #define PAGE_SIZE 0x1000
>>
>> +static struct param {
>> + unsigned int size_mb;
>> +} params = {
>> + .size_mb = 0,
>> +};
>> +
>> static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
>> uint32_t *handlep)
>> {
>> @@ -214,7 +220,70 @@ static void create_massive_size(int fd)
>> }
>> }
>>
>> -igt_main
>> +/**
>> + * SUBTEST: create-big-vram
>> + * Functionality: BO creation
>> + * Test category: functionality test
>> + * Description: Verifies the creation of substantial BO within VRAM,
>> + * constituting all available CPU-visible VRAM.
>> + */
>> +static void create_big_vram(int fd)
>> +{
>> + uint64_t bo_size, size, visible_avail_size, alignment;
>> + uint32_t bo_handle;
>> + char *bo_ptr = NULL;
>> + uint64_t vm = 0;
>> + int gt;
>> +
>> + igt_require(xe_has_vram(fd));
>> + alignment = xe_get_default_alignment(fd);
>> + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
>> +
>> + xe_for_each_gt(fd, gt) {
>> + visible_avail_size = xe_visible_available_vram_size(fd, gt);
>> + bo_size = params.size_mb ? params.size_mb * 1024ULL * 1024ULL
>> + : ALIGN_DOWN(visible_avail_size, alignment);
>> + igt_debug("gt%u bo_size=%lu visible_available_vram_size=%lu\n",
>> + gt, bo_size, visible_avail_size);
>> +
>> + bo_handle = xe_bo_create_flags(fd, vm, bo_size, visible_vram_memory(fd, gt));
>> + bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
>> +
>> + size = bo_size - 1;
>> + while (size > SZ_64K) {
>> + igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
>> + WRITE_ONCE(bo_ptr[size], 'A');
>> + igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
>> + size >>= 1;
>> + }
>> + igt_assert_eq(0, bo_ptr[0]);
>> +
>> + munmap(bo_ptr, bo_size);
>> + gem_close(fd, bo_handle);
>> + }
>> +
>> + xe_vm_destroy(fd, vm);
>> +}
>> +
>> +static int opt_handler(int opt, int opt_index, void *data)
>> +{
>> + switch (opt) {
>> + case 'S':
>> + params.size_mb = atoi(optarg);
>> + igt_debug("Size MB: %d\n", params.size_mb);
>> + break;
>> + default:
>> + return IGT_OPT_HANDLER_ERROR;
>> + }
>> +
>> + return IGT_OPT_HANDLER_SUCCESS;
>> +}
>> +
>> +const char *help_str =
>> + " -S\tBO size in MB\n"
>
> Why not percentage? imho percentage is easier to use.
I can revert to the first version and keep both options. In some
scenarios, size is more beneficial, for example, when we want to verify
the provisioned LMEM value in SR-IOV.
>
>> + ;
>> +
>> +igt_main_args("S:", NULL, help_str, opt_handler, NULL)
>> {
>> int xe;
>>
>> @@ -254,6 +323,10 @@ igt_main
>> }
>>
>>
>
> Remove one empty line.
ok
>
>> + igt_subtest("create-big-vram") {
>> + create_big_vram(xe);
>> + }
>> +
>> igt_fixture
>> drm_close_driver(xe);
>> }
>> diff --git a/tests/intel/xe_evict_ccs.c b/tests/intel/xe_evict_ccs.c
>> index d7244f620..b04c20935 100644
>> --- a/tests/intel/xe_evict_ccs.c
>> +++ b/tests/intel/xe_evict_ccs.c
>> @@ -325,7 +325,7 @@ static void set_config(int fd, uint32_t flags, const struct param *param,
>> config->param = param;
>> config->flags = flags;
>> config->free_mb = xe_visible_vram_size(fd, 0) / SZ_1M;
>> - config->total_mb = xe_vram_available(fd, 0) / SZ_1M;
>> + config->total_mb = xe_available_vram_size(fd, 0) / SZ_1M;
>
> This should go with lib change.
ok
>
> Regards,
> Kamil
Thanks for review,
marcin
>
>> config->test_mb = min_t(int, config->free_mb * config->param->vram_percent / 100,
>> config->total_mb * config->param->vram_percent / 100);
>>
>> --
>> 2.31.1
>>
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2023-11-23 10:24 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
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2023-11-21 13:50 [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest Marcin Bernatowicz
2023-11-21 13:56 ` Laguna, Lukasz
2023-11-21 15:08 ` [igt-dev] ✓ Fi.CI.BAT: success for xe_create: create-big-vram subtest (rev2) Patchwork
2023-11-21 15:42 ` [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest Matthew Auld
2023-11-22 10:26 ` Bernatowicz, Marcin
2023-11-21 16:31 ` [igt-dev] ✓ CI.xeBAT: success for xe_create: create-big-vram subtest (rev2) Patchwork
2023-11-22 9:28 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
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2023-11-22 10:19 [igt-dev] [PATCH i-g-t] xe_create: create-big-vram subtest Marcin Bernatowicz
2023-11-22 11:04 ` Laguna, Lukasz
2023-11-22 16:16 ` Kamil Konieczny
2023-11-23 10:24 ` Bernatowicz, Marcin
2023-11-13 19:20 Marcin Bernatowicz
2023-11-20 17:51 ` Kamil Konieczny
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