* [igt-dev] [PATCH i-g-t 0/3] Extend compute square test to Xe2 platform
@ 2023-12-01 11:35 janga.rahul.kumar
2023-12-01 11:35 ` [igt-dev] [PATCH i-g-t 1/3] lib/intel_compute_square_kernels: Add xe2lpg compute sqaure kernel janga.rahul.kumar
` (5 more replies)
0 siblings, 6 replies; 11+ messages in thread
From: janga.rahul.kumar @ 2023-12-01 11:35 UTC (permalink / raw)
To: igt-dev, ramadevi.gandi, janga.rahul.kumar
From: Janga Rahul Kumar <janga.rahul.kumar@intel.com>
Extend compute sqaure test to run on LNL.
Janga Rahul Kumar (3):
lib/intel_compute_square_kernels: Add xe2lpg compute sqaure kernel
lib/intel_compute: Add XE2 compute implementation
tests/xe_compute: Update documentation regarding test requirements
lib/intel_compute.c | 212 +++++++++++++++++++++++++++++
lib/intel_compute_square_kernels.c | 36 +++++
tests/intel/xe_compute.c | 2 +-
3 files changed, 249 insertions(+), 1 deletion(-)
--
2.25.1
^ permalink raw reply [flat|nested] 11+ messages in thread* [igt-dev] [PATCH i-g-t 1/3] lib/intel_compute_square_kernels: Add xe2lpg compute sqaure kernel 2023-12-01 11:35 [igt-dev] [PATCH i-g-t 0/3] Extend compute square test to Xe2 platform janga.rahul.kumar @ 2023-12-01 11:35 ` janga.rahul.kumar 2023-12-04 7:58 ` Zbigniew Kempczyński 2023-12-01 11:35 ` [igt-dev] [PATCH i-g-t 2/3] lib/intel_compute: Add XE2 compute implementation janga.rahul.kumar ` (4 subsequent siblings) 5 siblings, 1 reply; 11+ messages in thread From: janga.rahul.kumar @ 2023-12-01 11:35 UTC (permalink / raw) To: igt-dev, ramadevi.gandi, janga.rahul.kumar From: Janga Rahul Kumar <janga.rahul.kumar@intel.com> Add xe2lpg compute sqaure kernel created using iga64. Signed-off-by: Janga Rahul Kumar <janga.rahul.kumar@intel.com> --- lib/intel_compute_square_kernels.c | 36 ++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/lib/intel_compute_square_kernels.c b/lib/intel_compute_square_kernels.c index 3d5b1ad47..682fdfcf6 100644 --- a/lib/intel_compute_square_kernels.c +++ b/lib/intel_compute_square_kernels.c @@ -183,6 +183,37 @@ static const unsigned char xehpc_kernel_square_bin[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }; +static const unsigned char xe2lpg_kernel_square_bin[] = { + 0x65, 0x00, 0x00, 0x80, 0x20, 0x82, 0x05, 0x7f, 0x04, 0x00, 0x00, 0x02, + 0xc0, 0xff, 0xff, 0xff, 0x40, 0x19, 0x00, 0x80, 0x20, 0x82, 0x05, 0x7f, + 0x04, 0x7f, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x31, 0x22, 0x03, 0x80, + 0x00, 0x00, 0x0c, 0x05, 0x8f, 0x7f, 0x00, 0xfa, 0x03, 0x00, 0x70, 0xf6, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x42, 0x01, 0x00, 0x00, 0x00, 0x00, 0x20, + 0x04, 0x00, 0x00, 0x00, 0x66, 0x09, 0x00, 0x80, 0x20, 0x82, 0x01, 0x80, + 0x00, 0x80, 0x00, 0x02, 0xc0, 0x04, 0x00, 0x40, 0x41, 0x22, 0x03, 0x80, + 0x60, 0x06, 0x01, 0x20, 0x54, 0x05, 0x00, 0x01, 0x14, 0x00, 0x00, 0x00, + 0x53, 0x80, 0x00, 0x80, 0x60, 0x06, 0x05, 0x02, 0x54, 0x05, 0x00, 0x06, + 0x14, 0x00, 0x00, 0x00, 0x52, 0x19, 0x14, 0x00, 0x60, 0x06, 0x04, 0x06, + 0x04, 0x02, 0x0e, 0x01, 0x04, 0x01, 0x04, 0x04, 0x70, 0x19, 0x14, 0x00, + 0x20, 0x02, 0x01, 0x00, 0x04, 0x06, 0x10, 0x52, 0x44, 0x05, 0x00, 0x00, + 0x2e, 0x00, 0x14, 0x14, 0x00, 0xc0, 0x00, 0x00, 0x98, 0x00, 0x00, 0x00, + 0x98, 0x00, 0x00, 0x00, 0x61, 0x00, 0x00, 0xb4, 0x14, 0x06, 0x10, 0x00, + 0x61, 0x00, 0x08, 0xb4, 0x16, 0x07, 0x10, 0x00, 0x69, 0x1a, 0x10, 0x00, + 0x70, 0x86, 0x05, 0x18, 0x04, 0x14, 0x20, 0x05, 0x02, 0x00, 0x02, 0x00, + 0x69, 0x1a, 0x10, 0x02, 0x70, 0x86, 0x05, 0x1a, 0x04, 0x16, 0x20, 0x05, + 0x02, 0x00, 0x02, 0x00, 0x40, 0x1a, 0x00, 0x38, 0x08, 0x18, 0x10, 0x05, + 0x40, 0x1a, 0x08, 0x38, 0x0a, 0x1a, 0x10, 0x05, 0x31, 0x23, 0x17, 0x00, + 0x00, 0x00, 0x14, 0x0c, 0x24, 0x08, 0x00, 0xfb, 0x00, 0x00, 0x00, 0x00, + 0x40, 0x00, 0x00, 0x38, 0x10, 0x18, 0x30, 0x05, 0x40, 0x00, 0x08, 0x38, + 0x12, 0x1a, 0x30, 0x05, 0x41, 0x83, 0x20, 0x20, 0x0e, 0x0c, 0x00, 0x0c, + 0x31, 0x24, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x10, 0x08, 0xfb, + 0x14, 0x0e, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x42, 0x01, 0x00, + 0x00, 0x00, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x2f, 0x00, 0x14, 0x00, + 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x61, 0x00, 0x10, 0x28, 0x7f, 0x00, 0x10, 0x00, 0x31, 0x20, 0x02, 0x80, + 0x04, 0x00, 0x00, 0x00, 0x0c, 0x7f, 0x20, 0x30, 0x00, 0x00, 0x00, 0x00 +}; + const struct intel_compute_kernels intel_compute_square_kernels[] = { { .ip_ver = IP_VER(12, 0), @@ -204,5 +235,10 @@ const struct intel_compute_kernels intel_compute_square_kernels[] = { .size = sizeof(xehpc_kernel_square_bin), .kernel = xehpc_kernel_square_bin, }, + { + .ip_ver = IP_VER(20, 04), + .size = sizeof(xe2lpg_kernel_square_bin), + .kernel = xe2lpg_kernel_square_bin, + }, {} }; -- 2.25.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/3] lib/intel_compute_square_kernels: Add xe2lpg compute sqaure kernel 2023-12-01 11:35 ` [igt-dev] [PATCH i-g-t 1/3] lib/intel_compute_square_kernels: Add xe2lpg compute sqaure kernel janga.rahul.kumar @ 2023-12-04 7:58 ` Zbigniew Kempczyński 0 siblings, 0 replies; 11+ messages in thread From: Zbigniew Kempczyński @ 2023-12-04 7:58 UTC (permalink / raw) To: janga.rahul.kumar; +Cc: igt-dev, ramadevi.gandi On Fri, Dec 01, 2023 at 05:05:05PM +0530, janga.rahul.kumar@intel.com wrote: > From: Janga Rahul Kumar <janga.rahul.kumar@intel.com> > > Add xe2lpg compute sqaure kernel created using iga64. > > Signed-off-by: Janga Rahul Kumar <janga.rahul.kumar@intel.com> > --- > lib/intel_compute_square_kernels.c | 36 ++++++++++++++++++++++++++++++ > 1 file changed, 36 insertions(+) > > diff --git a/lib/intel_compute_square_kernels.c b/lib/intel_compute_square_kernels.c > index 3d5b1ad47..682fdfcf6 100644 > --- a/lib/intel_compute_square_kernels.c > +++ b/lib/intel_compute_square_kernels.c > @@ -183,6 +183,37 @@ static const unsigned char xehpc_kernel_square_bin[] = { > 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > }; > > +static const unsigned char xe2lpg_kernel_square_bin[] = { > + 0x65, 0x00, 0x00, 0x80, 0x20, 0x82, 0x05, 0x7f, 0x04, 0x00, 0x00, 0x02, > + 0xc0, 0xff, 0xff, 0xff, 0x40, 0x19, 0x00, 0x80, 0x20, 0x82, 0x05, 0x7f, > + 0x04, 0x7f, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x31, 0x22, 0x03, 0x80, > + 0x00, 0x00, 0x0c, 0x05, 0x8f, 0x7f, 0x00, 0xfa, 0x03, 0x00, 0x70, 0xf6, > + 0x01, 0x00, 0x00, 0x00, 0x00, 0x42, 0x01, 0x00, 0x00, 0x00, 0x00, 0x20, > + 0x04, 0x00, 0x00, 0x00, 0x66, 0x09, 0x00, 0x80, 0x20, 0x82, 0x01, 0x80, > + 0x00, 0x80, 0x00, 0x02, 0xc0, 0x04, 0x00, 0x40, 0x41, 0x22, 0x03, 0x80, > + 0x60, 0x06, 0x01, 0x20, 0x54, 0x05, 0x00, 0x01, 0x14, 0x00, 0x00, 0x00, > + 0x53, 0x80, 0x00, 0x80, 0x60, 0x06, 0x05, 0x02, 0x54, 0x05, 0x00, 0x06, > + 0x14, 0x00, 0x00, 0x00, 0x52, 0x19, 0x14, 0x00, 0x60, 0x06, 0x04, 0x06, > + 0x04, 0x02, 0x0e, 0x01, 0x04, 0x01, 0x04, 0x04, 0x70, 0x19, 0x14, 0x00, > + 0x20, 0x02, 0x01, 0x00, 0x04, 0x06, 0x10, 0x52, 0x44, 0x05, 0x00, 0x00, > + 0x2e, 0x00, 0x14, 0x14, 0x00, 0xc0, 0x00, 0x00, 0x98, 0x00, 0x00, 0x00, > + 0x98, 0x00, 0x00, 0x00, 0x61, 0x00, 0x00, 0xb4, 0x14, 0x06, 0x10, 0x00, > + 0x61, 0x00, 0x08, 0xb4, 0x16, 0x07, 0x10, 0x00, 0x69, 0x1a, 0x10, 0x00, > + 0x70, 0x86, 0x05, 0x18, 0x04, 0x14, 0x20, 0x05, 0x02, 0x00, 0x02, 0x00, > + 0x69, 0x1a, 0x10, 0x02, 0x70, 0x86, 0x05, 0x1a, 0x04, 0x16, 0x20, 0x05, > + 0x02, 0x00, 0x02, 0x00, 0x40, 0x1a, 0x00, 0x38, 0x08, 0x18, 0x10, 0x05, > + 0x40, 0x1a, 0x08, 0x38, 0x0a, 0x1a, 0x10, 0x05, 0x31, 0x23, 0x17, 0x00, > + 0x00, 0x00, 0x14, 0x0c, 0x24, 0x08, 0x00, 0xfb, 0x00, 0x00, 0x00, 0x00, > + 0x40, 0x00, 0x00, 0x38, 0x10, 0x18, 0x30, 0x05, 0x40, 0x00, 0x08, 0x38, > + 0x12, 0x1a, 0x30, 0x05, 0x41, 0x83, 0x20, 0x20, 0x0e, 0x0c, 0x00, 0x0c, > + 0x31, 0x24, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x10, 0x08, 0xfb, > + 0x14, 0x0e, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x42, 0x01, 0x00, > + 0x00, 0x00, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x2f, 0x00, 0x14, 0x00, > + 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, > + 0x61, 0x00, 0x10, 0x28, 0x7f, 0x00, 0x10, 0x00, 0x31, 0x20, 0x02, 0x80, > + 0x04, 0x00, 0x00, 0x00, 0x0c, 0x7f, 0x20, 0x30, 0x00, 0x00, 0x00, 0x00 > +}; > + > const struct intel_compute_kernels intel_compute_square_kernels[] = { > { > .ip_ver = IP_VER(12, 0), > @@ -204,5 +235,10 @@ const struct intel_compute_kernels intel_compute_square_kernels[] = { > .size = sizeof(xehpc_kernel_square_bin), > .kernel = xehpc_kernel_square_bin, > }, > + { > + .ip_ver = IP_VER(20, 04), > + .size = sizeof(xe2lpg_kernel_square_bin), > + .kernel = xe2lpg_kernel_square_bin, > + }, > {} > }; > -- > 2.25.1 > LGTM: Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> -- Zbigniew ^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] [PATCH i-g-t 2/3] lib/intel_compute: Add XE2 compute implementation 2023-12-01 11:35 [igt-dev] [PATCH i-g-t 0/3] Extend compute square test to Xe2 platform janga.rahul.kumar 2023-12-01 11:35 ` [igt-dev] [PATCH i-g-t 1/3] lib/intel_compute_square_kernels: Add xe2lpg compute sqaure kernel janga.rahul.kumar @ 2023-12-01 11:35 ` janga.rahul.kumar 2023-12-04 8:07 ` Zbigniew Kempczyński 2023-12-01 11:35 ` [igt-dev] [PATCH i-g-t 3/3] tests/xe_compute: Update documentation regarding test requirements janga.rahul.kumar ` (3 subsequent siblings) 5 siblings, 1 reply; 11+ messages in thread From: janga.rahul.kumar @ 2023-12-01 11:35 UTC (permalink / raw) To: igt-dev, ramadevi.gandi, janga.rahul.kumar From: Janga Rahul Kumar <janga.rahul.kumar@intel.com> Add compute pipeline and walker instrcutions for xe2lpg. Signed-off-by: Janga Rahul Kumar <janga.rahul.kumar@intel.com> --- lib/intel_compute.c | 212 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 212 insertions(+) diff --git a/lib/intel_compute.c b/lib/intel_compute.c index dd921bf46..22480c920 100644 --- a/lib/intel_compute.c +++ b/lib/intel_compute.c @@ -41,6 +41,13 @@ #define XEHP_ADDR_INSTRUCTION_STATE_BASE 0x90000000UL #define XEHP_OFFSET_BINDING_TABLE 0x1000 +#define XE2_ADDR_GENERAL_STATE_BASE 0x80010000UL +#define XE2_ADDR_INSTRUCTION_STATE_BASE 0x800100000000 +#define XE2_ADDR_STATE_CONTEXT_DATA_BASE 0x7F567C800000 +#define XE2_ADDR_SURFACE_STATE_BASE 0x7F5652600000 +#define XE2_ADDR_DYNAMIC_STATE_BASE 0x7F56831C8000 +#define XE2_OFFSET_KERNEL 0xFFFEF000 + struct bo_dict_entry { uint64_t addr; uint32_t size; @@ -1137,6 +1144,206 @@ static void xehpc_compute_exec(int fd, const unsigned char *kernel, bo_execenv_destroy(&execenv); } +static void xe2lpg_compute_exec_compute(uint32_t *addr_bo_buffer_batch, + uint64_t addr_general_state_base, + uint64_t addr_surface_state_base, + uint64_t addr_dynamic_state_base, + uint64_t addr_instruction_state_base, + uint64_t addr_state_contect_data_base, + uint64_t offset_indirect_data_start, + uint64_t kernel_start_pointer) +{ + int b = 0; + + igt_debug("general state base: %lx\n", addr_general_state_base); + igt_debug("surface state base: %lx\n", addr_surface_state_base); + igt_debug("dynamic state base: %lx\n", addr_dynamic_state_base); + igt_debug("instruct base addr: %lx\n", addr_instruction_state_base); + igt_debug("bindless base addr: %lx\n", addr_surface_state_base); + igt_debug("state context data base addr: %lx\n", addr_state_contect_data_base); + igt_debug("offset indirect addr: %lx\n", offset_indirect_data_start); + igt_debug("kernel start pointer: %lx\n", kernel_start_pointer); + + addr_bo_buffer_batch[b++] = GEN7_PIPELINE_SELECT | GEN9_PIPELINE_SELECTION_MASK | + PIPELINE_SELECT_GPGPU; + + addr_bo_buffer_batch[b++] = XEHP_STATE_COMPUTE_MODE | 0x1; + addr_bo_buffer_batch[b++] = 0xE0004000; + addr_bo_buffer_batch[b++] = 0x00000000; + +#define XE2_STATE_CONTEXT_DATA_BASE_ADDRESS ((3 << 29) | (0 << 27) | (1 << 24) | (11 << 16) | (1 << 0)) + addr_bo_buffer_batch[b++] = XE2_STATE_CONTEXT_DATA_BASE_ADDRESS; + // Split into low and high 32 bits + addr_bo_buffer_batch[b++] = addr_state_contect_data_base & 0xFFFFFFFF; // Mask the low 32 bits ; + addr_bo_buffer_batch[b++] = (addr_state_contect_data_base >> 32) & 0xFFFFFFFF; + + addr_bo_buffer_batch[b++] = XEHP_CFE_STATE | 0x4; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x03808800; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = STATE_BASE_ADDRESS | 0x14; + addr_bo_buffer_batch[b++] = (addr_general_state_base & 0xffffffff) | 0x21; + addr_bo_buffer_batch[b++] = addr_general_state_base >> 32; + addr_bo_buffer_batch[b++] = 0x0002C000; + addr_bo_buffer_batch[b++] = (addr_surface_state_base & 0xffffffff) | 0x21; + addr_bo_buffer_batch[b++] = addr_surface_state_base >> 32; + addr_bo_buffer_batch[b++] = (addr_dynamic_state_base & 0xffffffff) | 0x21; + addr_bo_buffer_batch[b++] = addr_dynamic_state_base >> 32; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = (addr_instruction_state_base & 0xffffffff) | 0x21; + addr_bo_buffer_batch[b++] = addr_instruction_state_base >> 32; + addr_bo_buffer_batch[b++] = 0xfffff001; + addr_bo_buffer_batch[b++] = 0x00010001; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0xfffff001; + addr_bo_buffer_batch[b++] = (addr_surface_state_base & 0xffffffff) | 0x21; + addr_bo_buffer_batch[b++] = addr_surface_state_base >> 32; + addr_bo_buffer_batch[b++] = 0x00007fbe; + addr_bo_buffer_batch[b++] = 0x00000021; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + + addr_bo_buffer_batch[b++] = GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC | 2; + addr_bo_buffer_batch[b++] = (addr_surface_state_base & 0xffffffff) | 0x2; + addr_bo_buffer_batch[b++] = addr_surface_state_base >> 32; + addr_bo_buffer_batch[b++] = 0x001ff000; + + addr_bo_buffer_batch[b++] = XEHP_COMPUTE_WALKER | 0x26; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000040; + addr_bo_buffer_batch[b++] = offset_indirect_data_start; + addr_bo_buffer_batch[b++] = 0xbe040000; + addr_bo_buffer_batch[b++] = 0xffffffff; + addr_bo_buffer_batch[b++] = 0x000003ff; + addr_bo_buffer_batch[b++] = 0x00000002; + addr_bo_buffer_batch[b++] = 0x00000001; + addr_bo_buffer_batch[b++] = 0x00000001; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + + addr_bo_buffer_batch[b++] = kernel_start_pointer; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x0c000020; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00001047; + addr_bo_buffer_batch[b++] = ADDR_BATCH; + addr_bo_buffer_batch[b++] = ADDR_BATCH >> 32; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000400; + addr_bo_buffer_batch[b++] = 0x00000001; + addr_bo_buffer_batch[b++] = 0x00000001; + addr_bo_buffer_batch[b++] = 0x00000000; + addr_bo_buffer_batch[b++] = 0x00000000; + + addr_bo_buffer_batch[b++] = MI_BATCH_BUFFER_END; +} + +/** + * xe2lpg_compute_exec - run a pipeline compatible with XE2 + * + * @fd: file descriptor of the opened DRM device + * @kernel: GPU Kernel binary to be executed + * @size: size of @kernel. + */ +static void xe2lpg_compute_exec(int fd, const unsigned char *kernel, + unsigned int size) +{ +#define XE2_BO_DICT_ENTRIES 10 + struct bo_dict_entry bo_dict[XE2_BO_DICT_ENTRIES] = { + { .addr = XE2_ADDR_INSTRUCTION_STATE_BASE + XE2_OFFSET_KERNEL, + .name = "instr state base"}, + { .addr = XE2_ADDR_DYNAMIC_STATE_BASE, + .size = 0x100000, + .name = "dynamic state base"}, + { .addr = XE2_ADDR_SURFACE_STATE_BASE, + .size = 0x1000, + .name = "surface state base"}, + { .addr = XE2_ADDR_GENERAL_STATE_BASE + OFFSET_INDIRECT_DATA_START, + .size = 0x1000, + .name = "indirect object base"}, + { .addr = ADDR_INPUT, .size = SIZE_BUFFER_INPUT, + .name = "addr input"}, + { .addr = ADDR_OUTPUT, .size = SIZE_BUFFER_OUTPUT, + .name = "addr output" }, + { .addr = XE2_ADDR_GENERAL_STATE_BASE, .size = 0x100000, + .name = "general state base" }, + { .addr = XE2_ADDR_SURFACE_STATE_BASE + XEHP_OFFSET_BINDING_TABLE, + .size = 0x1000, + .name = "binding table" }, + { .addr = ADDR_BATCH, + .size = SIZE_BATCH, + .name = "batch" }, + { .addr = XE2_ADDR_STATE_CONTEXT_DATA_BASE, + .size = 0x10000, + .name = "state context data base"}, + }; + + struct bo_execenv execenv; + float *dinput; + + bo_execenv_create(fd, &execenv); + + /* Sets Kernel size */ + bo_dict[0].size = ALIGN(size, 0x1000); + + bo_execenv_bind(&execenv, bo_dict, XE2_BO_DICT_ENTRIES); + + memcpy(bo_dict[0].data, kernel, size); + create_dynamic_state(bo_dict[1].data, XE2_OFFSET_KERNEL); + xehp_create_surface_state(bo_dict[2].data, ADDR_INPUT, ADDR_OUTPUT); + xehp_create_indirect_data(bo_dict[3].data, ADDR_INPUT, ADDR_OUTPUT); + xehp_create_surface_state(bo_dict[7].data, ADDR_INPUT, ADDR_OUTPUT); + + dinput = (float *)bo_dict[4].data; + srand(time(NULL)); + + for (int i = 0; i < SIZE_DATA; i++) + ((float *)dinput)[i] = rand() / (float)RAND_MAX; + + xe2lpg_compute_exec_compute(bo_dict[8].data, + XE2_ADDR_GENERAL_STATE_BASE, + XE2_ADDR_SURFACE_STATE_BASE, + XE2_ADDR_DYNAMIC_STATE_BASE, + XE2_ADDR_INSTRUCTION_STATE_BASE, + XE2_ADDR_STATE_CONTEXT_DATA_BASE, + OFFSET_INDIRECT_DATA_START, + XE2_OFFSET_KERNEL); + + bo_execenv_exec(&execenv, ADDR_BATCH); + + for (int i = 0; i < SIZE_DATA; i++) { + float f1, f2; + + f1 = ((float *) bo_dict[5].data)[i]; + f2 = ((float *) bo_dict[4].data)[i]; + + if (f1 != f2 * f2) + igt_debug("[%4d] f1: %f != %f\n", i, f1, f2 * f2); + igt_assert(f1 == f2 * f2); + } + + bo_execenv_unbind(&execenv, bo_dict, XEHPC_BO_DICT_ENTRIES); + bo_execenv_destroy(&execenv); +} + /* * Compatibility flags. * @@ -1175,6 +1382,11 @@ static const struct { .compute_exec = xehpc_compute_exec, .compat = COMPAT_DRIVER_XE, }, + { + .ip_ver = IP_VER(20, 04), + .compute_exec = xe2lpg_compute_exec, + .compat = COMPAT_DRIVER_XE, + }, }; bool run_intel_compute_kernel(int fd) -- 2.25.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/3] lib/intel_compute: Add XE2 compute implementation 2023-12-01 11:35 ` [igt-dev] [PATCH i-g-t 2/3] lib/intel_compute: Add XE2 compute implementation janga.rahul.kumar @ 2023-12-04 8:07 ` Zbigniew Kempczyński 2023-12-04 12:25 ` Kumar, Janga Rahul 0 siblings, 1 reply; 11+ messages in thread From: Zbigniew Kempczyński @ 2023-12-04 8:07 UTC (permalink / raw) To: janga.rahul.kumar; +Cc: igt-dev, ramadevi.gandi On Fri, Dec 01, 2023 at 05:05:06PM +0530, janga.rahul.kumar@intel.com wrote: > From: Janga Rahul Kumar <janga.rahul.kumar@intel.com> > > Add compute pipeline and walker instrcutions for xe2lpg. > > Signed-off-by: Janga Rahul Kumar <janga.rahul.kumar@intel.com> > --- > lib/intel_compute.c | 212 ++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 212 insertions(+) > > diff --git a/lib/intel_compute.c b/lib/intel_compute.c > index dd921bf46..22480c920 100644 > --- a/lib/intel_compute.c > +++ b/lib/intel_compute.c > @@ -41,6 +41,13 @@ > #define XEHP_ADDR_INSTRUCTION_STATE_BASE 0x90000000UL > #define XEHP_OFFSET_BINDING_TABLE 0x1000 > > +#define XE2_ADDR_GENERAL_STATE_BASE 0x80010000UL > +#define XE2_ADDR_INSTRUCTION_STATE_BASE 0x800100000000 > +#define XE2_ADDR_STATE_CONTEXT_DATA_BASE 0x7F567C800000 > +#define XE2_ADDR_SURFACE_STATE_BASE 0x7F5652600000 > +#define XE2_ADDR_DYNAMIC_STATE_BASE 0x7F56831C8000 > +#define XE2_OFFSET_KERNEL 0xFFFEF000 I think instead of introducing new definitions for each platform we should reuse previous definitions as long as it is possible. I've checked and below definitions are fine for XE2 either: #define ADDR_GENERAL_STATE_BASE 0x80000000UL #define ADDR_INSTRUCTION_STATE_BASE 0x90000000UL #define OFFSET_BINDING_TABLE 0x1000 #define XE2_ADDR_STATE_CONTEXT_DATA_BASE 0x900000UL May you introduce as first patch such definition rename commit and use those addresses in xe2 compute? -- Zbigniew > + > struct bo_dict_entry { > uint64_t addr; > uint32_t size; > @@ -1137,6 +1144,206 @@ static void xehpc_compute_exec(int fd, const unsigned char *kernel, > bo_execenv_destroy(&execenv); > } > > +static void xe2lpg_compute_exec_compute(uint32_t *addr_bo_buffer_batch, > + uint64_t addr_general_state_base, > + uint64_t addr_surface_state_base, > + uint64_t addr_dynamic_state_base, > + uint64_t addr_instruction_state_base, > + uint64_t addr_state_contect_data_base, > + uint64_t offset_indirect_data_start, > + uint64_t kernel_start_pointer) > +{ > + int b = 0; > + > + igt_debug("general state base: %lx\n", addr_general_state_base); > + igt_debug("surface state base: %lx\n", addr_surface_state_base); > + igt_debug("dynamic state base: %lx\n", addr_dynamic_state_base); > + igt_debug("instruct base addr: %lx\n", addr_instruction_state_base); > + igt_debug("bindless base addr: %lx\n", addr_surface_state_base); > + igt_debug("state context data base addr: %lx\n", addr_state_contect_data_base); > + igt_debug("offset indirect addr: %lx\n", offset_indirect_data_start); > + igt_debug("kernel start pointer: %lx\n", kernel_start_pointer); > + > + addr_bo_buffer_batch[b++] = GEN7_PIPELINE_SELECT | GEN9_PIPELINE_SELECTION_MASK | > + PIPELINE_SELECT_GPGPU; > + > + addr_bo_buffer_batch[b++] = XEHP_STATE_COMPUTE_MODE | 0x1; > + addr_bo_buffer_batch[b++] = 0xE0004000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + > +#define XE2_STATE_CONTEXT_DATA_BASE_ADDRESS ((3 << 29) | (0 << 27) | (1 << 24) | (11 << 16) | (1 << 0)) > + addr_bo_buffer_batch[b++] = XE2_STATE_CONTEXT_DATA_BASE_ADDRESS; > + // Split into low and high 32 bits > + addr_bo_buffer_batch[b++] = addr_state_contect_data_base & 0xFFFFFFFF; // Mask the low 32 bits ; > + addr_bo_buffer_batch[b++] = (addr_state_contect_data_base >> 32) & 0xFFFFFFFF; > + > + addr_bo_buffer_batch[b++] = XEHP_CFE_STATE | 0x4; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x03808800; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = STATE_BASE_ADDRESS | 0x14; > + addr_bo_buffer_batch[b++] = (addr_general_state_base & 0xffffffff) | 0x21; > + addr_bo_buffer_batch[b++] = addr_general_state_base >> 32; > + addr_bo_buffer_batch[b++] = 0x0002C000; > + addr_bo_buffer_batch[b++] = (addr_surface_state_base & 0xffffffff) | 0x21; > + addr_bo_buffer_batch[b++] = addr_surface_state_base >> 32; > + addr_bo_buffer_batch[b++] = (addr_dynamic_state_base & 0xffffffff) | 0x21; > + addr_bo_buffer_batch[b++] = addr_dynamic_state_base >> 32; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = (addr_instruction_state_base & 0xffffffff) | 0x21; > + addr_bo_buffer_batch[b++] = addr_instruction_state_base >> 32; > + addr_bo_buffer_batch[b++] = 0xfffff001; > + addr_bo_buffer_batch[b++] = 0x00010001; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0xfffff001; > + addr_bo_buffer_batch[b++] = (addr_surface_state_base & 0xffffffff) | 0x21; > + addr_bo_buffer_batch[b++] = addr_surface_state_base >> 32; > + addr_bo_buffer_batch[b++] = 0x00007fbe; > + addr_bo_buffer_batch[b++] = 0x00000021; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + > + addr_bo_buffer_batch[b++] = GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC | 2; > + addr_bo_buffer_batch[b++] = (addr_surface_state_base & 0xffffffff) | 0x2; > + addr_bo_buffer_batch[b++] = addr_surface_state_base >> 32; > + addr_bo_buffer_batch[b++] = 0x001ff000; > + > + addr_bo_buffer_batch[b++] = XEHP_COMPUTE_WALKER | 0x26; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000040; > + addr_bo_buffer_batch[b++] = offset_indirect_data_start; > + addr_bo_buffer_batch[b++] = 0xbe040000; > + addr_bo_buffer_batch[b++] = 0xffffffff; > + addr_bo_buffer_batch[b++] = 0x000003ff; > + addr_bo_buffer_batch[b++] = 0x00000002; > + addr_bo_buffer_batch[b++] = 0x00000001; > + addr_bo_buffer_batch[b++] = 0x00000001; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + > + addr_bo_buffer_batch[b++] = kernel_start_pointer; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x0c000020; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00001047; > + addr_bo_buffer_batch[b++] = ADDR_BATCH; > + addr_bo_buffer_batch[b++] = ADDR_BATCH >> 32; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000400; > + addr_bo_buffer_batch[b++] = 0x00000001; > + addr_bo_buffer_batch[b++] = 0x00000001; > + addr_bo_buffer_batch[b++] = 0x00000000; > + addr_bo_buffer_batch[b++] = 0x00000000; > + > + addr_bo_buffer_batch[b++] = MI_BATCH_BUFFER_END; > +} > + > +/** > + * xe2lpg_compute_exec - run a pipeline compatible with XE2 > + * > + * @fd: file descriptor of the opened DRM device > + * @kernel: GPU Kernel binary to be executed > + * @size: size of @kernel. > + */ > +static void xe2lpg_compute_exec(int fd, const unsigned char *kernel, > + unsigned int size) > +{ > +#define XE2_BO_DICT_ENTRIES 10 > + struct bo_dict_entry bo_dict[XE2_BO_DICT_ENTRIES] = { > + { .addr = XE2_ADDR_INSTRUCTION_STATE_BASE + XE2_OFFSET_KERNEL, > + .name = "instr state base"}, > + { .addr = XE2_ADDR_DYNAMIC_STATE_BASE, > + .size = 0x100000, > + .name = "dynamic state base"}, > + { .addr = XE2_ADDR_SURFACE_STATE_BASE, > + .size = 0x1000, > + .name = "surface state base"}, > + { .addr = XE2_ADDR_GENERAL_STATE_BASE + OFFSET_INDIRECT_DATA_START, > + .size = 0x1000, > + .name = "indirect object base"}, > + { .addr = ADDR_INPUT, .size = SIZE_BUFFER_INPUT, > + .name = "addr input"}, > + { .addr = ADDR_OUTPUT, .size = SIZE_BUFFER_OUTPUT, > + .name = "addr output" }, > + { .addr = XE2_ADDR_GENERAL_STATE_BASE, .size = 0x100000, > + .name = "general state base" }, > + { .addr = XE2_ADDR_SURFACE_STATE_BASE + XEHP_OFFSET_BINDING_TABLE, > + .size = 0x1000, > + .name = "binding table" }, > + { .addr = ADDR_BATCH, > + .size = SIZE_BATCH, > + .name = "batch" }, > + { .addr = XE2_ADDR_STATE_CONTEXT_DATA_BASE, > + .size = 0x10000, > + .name = "state context data base"}, > + }; > + > + struct bo_execenv execenv; > + float *dinput; > + > + bo_execenv_create(fd, &execenv); > + > + /* Sets Kernel size */ > + bo_dict[0].size = ALIGN(size, 0x1000); > + > + bo_execenv_bind(&execenv, bo_dict, XE2_BO_DICT_ENTRIES); > + > + memcpy(bo_dict[0].data, kernel, size); > + create_dynamic_state(bo_dict[1].data, XE2_OFFSET_KERNEL); > + xehp_create_surface_state(bo_dict[2].data, ADDR_INPUT, ADDR_OUTPUT); > + xehp_create_indirect_data(bo_dict[3].data, ADDR_INPUT, ADDR_OUTPUT); > + xehp_create_surface_state(bo_dict[7].data, ADDR_INPUT, ADDR_OUTPUT); > + > + dinput = (float *)bo_dict[4].data; > + srand(time(NULL)); > + > + for (int i = 0; i < SIZE_DATA; i++) > + ((float *)dinput)[i] = rand() / (float)RAND_MAX; > + > + xe2lpg_compute_exec_compute(bo_dict[8].data, > + XE2_ADDR_GENERAL_STATE_BASE, > + XE2_ADDR_SURFACE_STATE_BASE, > + XE2_ADDR_DYNAMIC_STATE_BASE, > + XE2_ADDR_INSTRUCTION_STATE_BASE, > + XE2_ADDR_STATE_CONTEXT_DATA_BASE, > + OFFSET_INDIRECT_DATA_START, > + XE2_OFFSET_KERNEL); > + > + bo_execenv_exec(&execenv, ADDR_BATCH); > + > + for (int i = 0; i < SIZE_DATA; i++) { > + float f1, f2; > + > + f1 = ((float *) bo_dict[5].data)[i]; > + f2 = ((float *) bo_dict[4].data)[i]; > + > + if (f1 != f2 * f2) > + igt_debug("[%4d] f1: %f != %f\n", i, f1, f2 * f2); > + igt_assert(f1 == f2 * f2); > + } > + > + bo_execenv_unbind(&execenv, bo_dict, XEHPC_BO_DICT_ENTRIES); > + bo_execenv_destroy(&execenv); > +} > + > /* > * Compatibility flags. > * > @@ -1175,6 +1382,11 @@ static const struct { > .compute_exec = xehpc_compute_exec, > .compat = COMPAT_DRIVER_XE, > }, > + { > + .ip_ver = IP_VER(20, 04), > + .compute_exec = xe2lpg_compute_exec, > + .compat = COMPAT_DRIVER_XE, > + }, > }; > > bool run_intel_compute_kernel(int fd) > -- > 2.25.1 > ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/3] lib/intel_compute: Add XE2 compute implementation 2023-12-04 8:07 ` Zbigniew Kempczyński @ 2023-12-04 12:25 ` Kumar, Janga Rahul 0 siblings, 0 replies; 11+ messages in thread From: Kumar, Janga Rahul @ 2023-12-04 12:25 UTC (permalink / raw) To: Kempczynski, Zbigniew; +Cc: igt-dev@lists.freedesktop.org, Gandi, Ramadevi > -----Original Message----- > From: Kempczynski, Zbigniew <zbigniew.kempczynski@intel.com> > Sent: Monday, December 4, 2023 1:37 PM > To: Kumar, Janga Rahul <janga.rahul.kumar@intel.com> > Cc: igt-dev@lists.freedesktop.org; Gandi, Ramadevi > <ramadevi.gandi@intel.com> > Subject: Re: [igt-dev] [PATCH i-g-t 2/3] lib/intel_compute: Add XE2 compute > implementation > > On Fri, Dec 01, 2023 at 05:05:06PM +0530, janga.rahul.kumar@intel.com wrote: > > From: Janga Rahul Kumar <janga.rahul.kumar@intel.com> > > > > Add compute pipeline and walker instrcutions for xe2lpg. > > > > Signed-off-by: Janga Rahul Kumar <janga.rahul.kumar@intel.com> > > --- > > lib/intel_compute.c | 212 > > ++++++++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 212 insertions(+) > > > > diff --git a/lib/intel_compute.c b/lib/intel_compute.c index > > dd921bf46..22480c920 100644 > > --- a/lib/intel_compute.c > > +++ b/lib/intel_compute.c > > @@ -41,6 +41,13 @@ > > #define XEHP_ADDR_INSTRUCTION_STATE_BASE 0x90000000UL > > #define XEHP_OFFSET_BINDING_TABLE 0x1000 > > > > +#define XE2_ADDR_GENERAL_STATE_BASE 0x80010000UL > > +#define XE2_ADDR_INSTRUCTION_STATE_BASE > 0x800100000000 > > +#define XE2_ADDR_STATE_CONTEXT_DATA_BASE 0x7F567C800000 > > +#define XE2_ADDR_SURFACE_STATE_BASE 0x7F5652600000 > > +#define XE2_ADDR_DYNAMIC_STATE_BASE 0x7F56831C8000 > > +#define XE2_OFFSET_KERNEL 0xFFFEF000 > > I think instead of introducing new definitions for each platform we should reuse > previous definitions as long as it is possible. > > I've checked and below definitions are fine for XE2 either: > > #define ADDR_GENERAL_STATE_BASE 0x80000000UL > #define ADDR_INSTRUCTION_STATE_BASE 0x90000000UL > #define OFFSET_BINDING_TABLE 0x1000 > #define XE2_ADDR_STATE_CONTEXT_DATA_BASE 0x900000UL > > May you introduce as first patch such definition rename commit and use those > addresses in xe2 compute? Thanks for the review, Sent v2 with the suggested changes. -Rahul > > -- > Zbigniew > > > + > > struct bo_dict_entry { > > uint64_t addr; > > uint32_t size; > > @@ -1137,6 +1144,206 @@ static void xehpc_compute_exec(int fd, const > unsigned char *kernel, > > bo_execenv_destroy(&execenv); > > } > > > > +static void xe2lpg_compute_exec_compute(uint32_t > *addr_bo_buffer_batch, > > + uint64_t addr_general_state_base, > > + uint64_t addr_surface_state_base, > > + uint64_t addr_dynamic_state_base, > > + uint64_t addr_instruction_state_base, > > + uint64_t > addr_state_contect_data_base, > > + uint64_t offset_indirect_data_start, > > + uint64_t kernel_start_pointer) > > +{ > > + int b = 0; > > + > > + igt_debug("general state base: %lx\n", addr_general_state_base); > > + igt_debug("surface state base: %lx\n", addr_surface_state_base); > > + igt_debug("dynamic state base: %lx\n", addr_dynamic_state_base); > > + igt_debug("instruct base addr: %lx\n", addr_instruction_state_base); > > + igt_debug("bindless base addr: %lx\n", addr_surface_state_base); > > + igt_debug("state context data base addr: %lx\n", > addr_state_contect_data_base); > > + igt_debug("offset indirect addr: %lx\n", offset_indirect_data_start); > > + igt_debug("kernel start pointer: %lx\n", kernel_start_pointer); > > + > > + addr_bo_buffer_batch[b++] = GEN7_PIPELINE_SELECT | > GEN9_PIPELINE_SELECTION_MASK | > > + PIPELINE_SELECT_GPGPU; > > + > > + addr_bo_buffer_batch[b++] = XEHP_STATE_COMPUTE_MODE | 0x1; > > + addr_bo_buffer_batch[b++] = 0xE0004000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + > > +#define XE2_STATE_CONTEXT_DATA_BASE_ADDRESS ((3 << 29) | (0 << 27) | > (1 << 24) | (11 << 16) | (1 << 0)) > > + addr_bo_buffer_batch[b++] = > XE2_STATE_CONTEXT_DATA_BASE_ADDRESS; > > + // Split into low and high 32 bits > > + addr_bo_buffer_batch[b++] = addr_state_contect_data_base & > 0xFFFFFFFF; // Mask the low 32 bits ; > > + addr_bo_buffer_batch[b++] = (addr_state_contect_data_base >> 32) & > > +0xFFFFFFFF; > > + > > + addr_bo_buffer_batch[b++] = XEHP_CFE_STATE | 0x4; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x03808800; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = STATE_BASE_ADDRESS | 0x14; > > + addr_bo_buffer_batch[b++] = (addr_general_state_base & 0xffffffff) | > 0x21; > > + addr_bo_buffer_batch[b++] = addr_general_state_base >> 32; > > + addr_bo_buffer_batch[b++] = 0x0002C000; > > + addr_bo_buffer_batch[b++] = (addr_surface_state_base & 0xffffffff) | > 0x21; > > + addr_bo_buffer_batch[b++] = addr_surface_state_base >> 32; > > + addr_bo_buffer_batch[b++] = (addr_dynamic_state_base & 0xffffffff) | > 0x21; > > + addr_bo_buffer_batch[b++] = addr_dynamic_state_base >> 32; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = (addr_instruction_state_base & 0xffffffff) > | 0x21; > > + addr_bo_buffer_batch[b++] = addr_instruction_state_base >> 32; > > + addr_bo_buffer_batch[b++] = 0xfffff001; > > + addr_bo_buffer_batch[b++] = 0x00010001; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0xfffff001; > > + addr_bo_buffer_batch[b++] = (addr_surface_state_base & 0xffffffff) | > 0x21; > > + addr_bo_buffer_batch[b++] = addr_surface_state_base >> 32; > > + addr_bo_buffer_batch[b++] = 0x00007fbe; > > + addr_bo_buffer_batch[b++] = 0x00000021; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + > > + addr_bo_buffer_batch[b++] = > GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC | 2; > > + addr_bo_buffer_batch[b++] = (addr_surface_state_base & 0xffffffff) | > 0x2; > > + addr_bo_buffer_batch[b++] = addr_surface_state_base >> 32; > > + addr_bo_buffer_batch[b++] = 0x001ff000; > > + > > + addr_bo_buffer_batch[b++] = XEHP_COMPUTE_WALKER | 0x26; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000040; > > + addr_bo_buffer_batch[b++] = offset_indirect_data_start; > > + addr_bo_buffer_batch[b++] = 0xbe040000; > > + addr_bo_buffer_batch[b++] = 0xffffffff; > > + addr_bo_buffer_batch[b++] = 0x000003ff; > > + addr_bo_buffer_batch[b++] = 0x00000002; > > + addr_bo_buffer_batch[b++] = 0x00000001; > > + addr_bo_buffer_batch[b++] = 0x00000001; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + > > + addr_bo_buffer_batch[b++] = kernel_start_pointer; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x0c000020; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00001047; > > + addr_bo_buffer_batch[b++] = ADDR_BATCH; > > + addr_bo_buffer_batch[b++] = ADDR_BATCH >> 32; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000400; > > + addr_bo_buffer_batch[b++] = 0x00000001; > > + addr_bo_buffer_batch[b++] = 0x00000001; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + addr_bo_buffer_batch[b++] = 0x00000000; > > + > > + addr_bo_buffer_batch[b++] = MI_BATCH_BUFFER_END; } > > + > > +/** > > + * xe2lpg_compute_exec - run a pipeline compatible with XE2 > > + * > > + * @fd: file descriptor of the opened DRM device > > + * @kernel: GPU Kernel binary to be executed > > + * @size: size of @kernel. > > + */ > > +static void xe2lpg_compute_exec(int fd, const unsigned char *kernel, > > + unsigned int size) > > +{ > > +#define XE2_BO_DICT_ENTRIES 10 > > + struct bo_dict_entry bo_dict[XE2_BO_DICT_ENTRIES] = { > > + { .addr = XE2_ADDR_INSTRUCTION_STATE_BASE + > XE2_OFFSET_KERNEL, > > + .name = "instr state base"}, > > + { .addr = XE2_ADDR_DYNAMIC_STATE_BASE, > > + .size = 0x100000, > > + .name = "dynamic state base"}, > > + { .addr = XE2_ADDR_SURFACE_STATE_BASE, > > + .size = 0x1000, > > + .name = "surface state base"}, > > + { .addr = XE2_ADDR_GENERAL_STATE_BASE + > OFFSET_INDIRECT_DATA_START, > > + .size = 0x1000, > > + .name = "indirect object base"}, > > + { .addr = ADDR_INPUT, .size = SIZE_BUFFER_INPUT, > > + .name = "addr input"}, > > + { .addr = ADDR_OUTPUT, .size = SIZE_BUFFER_OUTPUT, > > + .name = "addr output" }, > > + { .addr = XE2_ADDR_GENERAL_STATE_BASE, .size = 0x100000, > > + .name = "general state base" }, > > + { .addr = XE2_ADDR_SURFACE_STATE_BASE + > XEHP_OFFSET_BINDING_TABLE, > > + .size = 0x1000, > > + .name = "binding table" }, > > + { .addr = ADDR_BATCH, > > + .size = SIZE_BATCH, > > + .name = "batch" }, > > + { .addr = XE2_ADDR_STATE_CONTEXT_DATA_BASE, > > + .size = 0x10000, > > + .name = "state context data base"}, > > + }; > > + > > + struct bo_execenv execenv; > > + float *dinput; > > + > > + bo_execenv_create(fd, &execenv); > > + > > + /* Sets Kernel size */ > > + bo_dict[0].size = ALIGN(size, 0x1000); > > + > > + bo_execenv_bind(&execenv, bo_dict, XE2_BO_DICT_ENTRIES); > > + > > + memcpy(bo_dict[0].data, kernel, size); > > + create_dynamic_state(bo_dict[1].data, XE2_OFFSET_KERNEL); > > + xehp_create_surface_state(bo_dict[2].data, ADDR_INPUT, > ADDR_OUTPUT); > > + xehp_create_indirect_data(bo_dict[3].data, ADDR_INPUT, > ADDR_OUTPUT); > > + xehp_create_surface_state(bo_dict[7].data, ADDR_INPUT, > ADDR_OUTPUT); > > + > > + dinput = (float *)bo_dict[4].data; > > + srand(time(NULL)); > > + > > + for (int i = 0; i < SIZE_DATA; i++) > > + ((float *)dinput)[i] = rand() / (float)RAND_MAX; > > + > > + xe2lpg_compute_exec_compute(bo_dict[8].data, > > + XE2_ADDR_GENERAL_STATE_BASE, > > + XE2_ADDR_SURFACE_STATE_BASE, > > + XE2_ADDR_DYNAMIC_STATE_BASE, > > + XE2_ADDR_INSTRUCTION_STATE_BASE, > > + XE2_ADDR_STATE_CONTEXT_DATA_BASE, > > + OFFSET_INDIRECT_DATA_START, > > + XE2_OFFSET_KERNEL); > > + > > + bo_execenv_exec(&execenv, ADDR_BATCH); > > + > > + for (int i = 0; i < SIZE_DATA; i++) { > > + float f1, f2; > > + > > + f1 = ((float *) bo_dict[5].data)[i]; > > + f2 = ((float *) bo_dict[4].data)[i]; > > + > > + if (f1 != f2 * f2) > > + igt_debug("[%4d] f1: %f != %f\n", i, f1, f2 * f2); > > + igt_assert(f1 == f2 * f2); > > + } > > + > > + bo_execenv_unbind(&execenv, bo_dict, XEHPC_BO_DICT_ENTRIES); > > + bo_execenv_destroy(&execenv); > > +} > > + > > /* > > * Compatibility flags. > > * > > @@ -1175,6 +1382,11 @@ static const struct { > > .compute_exec = xehpc_compute_exec, > > .compat = COMPAT_DRIVER_XE, > > }, > > + { > > + .ip_ver = IP_VER(20, 04), > > + .compute_exec = xe2lpg_compute_exec, > > + .compat = COMPAT_DRIVER_XE, > > + }, > > }; > > > > bool run_intel_compute_kernel(int fd) > > -- > > 2.25.1 > > ^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] [PATCH i-g-t 3/3] tests/xe_compute: Update documentation regarding test requirements 2023-12-01 11:35 [igt-dev] [PATCH i-g-t 0/3] Extend compute square test to Xe2 platform janga.rahul.kumar 2023-12-01 11:35 ` [igt-dev] [PATCH i-g-t 1/3] lib/intel_compute_square_kernels: Add xe2lpg compute sqaure kernel janga.rahul.kumar 2023-12-01 11:35 ` [igt-dev] [PATCH i-g-t 2/3] lib/intel_compute: Add XE2 compute implementation janga.rahul.kumar @ 2023-12-01 11:35 ` janga.rahul.kumar 2023-12-04 8:09 ` Zbigniew Kempczyński 2023-12-01 13:10 ` [igt-dev] ✓ Fi.CI.BAT: success for Extend compute square test to Xe2 platform Patchwork ` (2 subsequent siblings) 5 siblings, 1 reply; 11+ messages in thread From: janga.rahul.kumar @ 2023-12-01 11:35 UTC (permalink / raw) To: igt-dev, ramadevi.gandi, janga.rahul.kumar From: Janga Rahul Kumar <janga.rahul.kumar@intel.com> Test support for LNL is added. Update documentation to reflect those changes. Signed-off-by: Janga Rahul Kumar <janga.rahul.kumar@intel.com> --- tests/intel/xe_compute.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/intel/xe_compute.c b/tests/intel/xe_compute.c index 35ba8b346..1db72785b 100644 --- a/tests/intel/xe_compute.c +++ b/tests/intel/xe_compute.c @@ -18,7 +18,7 @@ /** * SUBTEST: compute-square - * GPU requirement: TGL, PVC + * GPU requirement: TGL, PVC, LNL * Description: * Run an openCL Kernel that returns output[i] = input[i] * input[i], * for an input dataset.. -- 2.25.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/3] tests/xe_compute: Update documentation regarding test requirements 2023-12-01 11:35 ` [igt-dev] [PATCH i-g-t 3/3] tests/xe_compute: Update documentation regarding test requirements janga.rahul.kumar @ 2023-12-04 8:09 ` Zbigniew Kempczyński 0 siblings, 0 replies; 11+ messages in thread From: Zbigniew Kempczyński @ 2023-12-04 8:09 UTC (permalink / raw) To: janga.rahul.kumar; +Cc: igt-dev, ramadevi.gandi On Fri, Dec 01, 2023 at 05:05:07PM +0530, janga.rahul.kumar@intel.com wrote: > From: Janga Rahul Kumar <janga.rahul.kumar@intel.com> > > Test support for LNL is added. Update documentation to > reflect those changes. > > Signed-off-by: Janga Rahul Kumar <janga.rahul.kumar@intel.com> > --- > tests/intel/xe_compute.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tests/intel/xe_compute.c b/tests/intel/xe_compute.c > index 35ba8b346..1db72785b 100644 > --- a/tests/intel/xe_compute.c > +++ b/tests/intel/xe_compute.c > @@ -18,7 +18,7 @@ > > /** > * SUBTEST: compute-square > - * GPU requirement: TGL, PVC > + * GPU requirement: TGL, PVC, LNL > * Description: > * Run an openCL Kernel that returns output[i] = input[i] * input[i], > * for an input dataset.. > -- > 2.25.1 > Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> -- Zbigniew ^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Extend compute square test to Xe2 platform 2023-12-01 11:35 [igt-dev] [PATCH i-g-t 0/3] Extend compute square test to Xe2 platform janga.rahul.kumar ` (2 preceding siblings ...) 2023-12-01 11:35 ` [igt-dev] [PATCH i-g-t 3/3] tests/xe_compute: Update documentation regarding test requirements janga.rahul.kumar @ 2023-12-01 13:10 ` Patchwork 2023-12-01 13:20 ` [igt-dev] ✓ CI.xeBAT: " Patchwork 2023-12-03 0:07 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork 5 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2023-12-01 13:10 UTC (permalink / raw) To: janga.rahul.kumar; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 2917 bytes --] == Series Details == Series: Extend compute square test to Xe2 platform URL : https://patchwork.freedesktop.org/series/127184/ State : success == Summary == CI Bug Log - changes from CI_DRM_13958 -> IGTPW_10317 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/index.html Participating hosts (40 -> 38) ------------------------------ Missing (2): bat-rpls-1 fi-snb-2520m Known issues ------------ Here are the changes found in IGTPW_10317 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_suspend@basic-s0@smem: - bat-dg2-9: [PASS][1] -> [INCOMPLETE][2] ([i915#9275]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/bat-dg2-9/igt@gem_exec_suspend@basic-s0@smem.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/bat-dg2-9/igt@gem_exec_suspend@basic-s0@smem.html * igt@i915_selftest@live@workarounds: - bat-dg2-11: [PASS][3] -> [DMESG-FAIL][4] ([i915#9500]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/bat-dg2-11/igt@i915_selftest@live@workarounds.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/bat-dg2-11/igt@i915_selftest@live@workarounds.html * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [PASS][5] -> [FAIL][6] ([IGT#3]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/fi-kbl-guc/igt@kms_hdmi_inject@inject-audio.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/fi-kbl-guc/igt@kms_hdmi_inject@inject-audio.html #### Possible fixes #### * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1: - fi-rkl-11600: [FAIL][7] ([fdo#103375]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/fi-rkl-11600/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/fi-rkl-11600/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1.html [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3 [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375 [i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275 [i915#9500]: https://gitlab.freedesktop.org/drm/intel/issues/9500 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_7613 -> IGTPW_10317 CI-20190529: 20190529 CI_DRM_13958: bc2cf1c63329e388b826fc83b93ba8d723556452 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_10317: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/index.html IGT_7613: 378017d8fa63defde11c0b4bc72025c64b70607d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Testlist changes ---------------- +++ 63 lines --- 139 lines == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/index.html [-- Attachment #2: Type: text/html, Size: 3602 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] ✓ CI.xeBAT: success for Extend compute square test to Xe2 platform 2023-12-01 11:35 [igt-dev] [PATCH i-g-t 0/3] Extend compute square test to Xe2 platform janga.rahul.kumar ` (3 preceding siblings ...) 2023-12-01 13:10 ` [igt-dev] ✓ Fi.CI.BAT: success for Extend compute square test to Xe2 platform Patchwork @ 2023-12-01 13:20 ` Patchwork 2023-12-03 0:07 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork 5 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2023-12-01 13:20 UTC (permalink / raw) To: janga.rahul.kumar; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 2431 bytes --] == Series Details == Series: Extend compute square test to Xe2 platform URL : https://patchwork.freedesktop.org/series/127184/ State : success == Summary == CI Bug Log - changes from XEIGT_7613_BAT -> XEIGTPW_10317_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (4 -> 4) ------------------------------ No changes in participating hosts Known issues ------------ Here are the changes found in XEIGTPW_10317_BAT that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_flip@basic-flip-vs-wf_vblank@c-dp3: - bat-dg2-oem2: [PASS][1] -> [FAIL][2] ([Intel XE#480]) [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7613/bat-dg2-oem2/igt@kms_flip@basic-flip-vs-wf_vblank@c-dp3.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10317/bat-dg2-oem2/igt@kms_flip@basic-flip-vs-wf_vblank@c-dp3.html * igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1: - bat-adlp-7: [PASS][3] -> [FAIL][4] ([Intel XE#480]) +1 other test fail [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7613/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10317/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html #### Possible fixes #### * igt@kms_flip@basic-flip-vs-wf_vblank@b-dp3: - bat-dg2-oem2: [FAIL][5] ([Intel XE#480]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7613/bat-dg2-oem2/igt@kms_flip@basic-flip-vs-wf_vblank@b-dp3.html [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10317/bat-dg2-oem2/igt@kms_flip@basic-flip-vs-wf_vblank@b-dp3.html [Intel XE#480]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/480 Build changes ------------- * IGT: IGT_7613 -> IGTPW_10317 * Linux: xe-542-84f2c2adec155170779f65ff63b4e80a51d22448 -> xe-544-a8b405ffc0326c79abf737389d99c290648f381d IGTPW_10317: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/index.html IGT_7613: 378017d8fa63defde11c0b4bc72025c64b70607d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-542-84f2c2adec155170779f65ff63b4e80a51d22448: 84f2c2adec155170779f65ff63b4e80a51d22448 xe-544-a8b405ffc0326c79abf737389d99c290648f381d: a8b405ffc0326c79abf737389d99c290648f381d == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10317/index.html [-- Attachment #2: Type: text/html, Size: 3214 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for Extend compute square test to Xe2 platform 2023-12-01 11:35 [igt-dev] [PATCH i-g-t 0/3] Extend compute square test to Xe2 platform janga.rahul.kumar ` (4 preceding siblings ...) 2023-12-01 13:20 ` [igt-dev] ✓ CI.xeBAT: " Patchwork @ 2023-12-03 0:07 ` Patchwork 5 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2023-12-03 0:07 UTC (permalink / raw) To: janga.rahul.kumar; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 61985 bytes --] == Series Details == Series: Extend compute square test to Xe2 platform URL : https://patchwork.freedesktop.org/series/127184/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13958_full -> IGTPW_10317_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_10317_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_10317_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/index.html Participating hosts (11 -> 11) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_10317_full: ### IGT changes ### #### Possible regressions #### * igt@kms_vblank@query-idle-hang@pipe-b-hdmi-a-1: - shard-snb: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-snb1/igt@kms_vblank@query-idle-hang@pipe-b-hdmi-a-1.html Known issues ------------ Here are the changes found in IGTPW_10317_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@api_intel_bb@blit-reloc-purge-cache: - shard-dg2: NOTRUN -> [SKIP][2] ([i915#8411]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@api_intel_bb@blit-reloc-purge-cache.html * igt@api_intel_bb@render-ccs: - shard-dg2: NOTRUN -> [FAIL][3] ([i915#6122]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@api_intel_bb@render-ccs.html * igt@device_reset@cold-reset-bound: - shard-dg2: NOTRUN -> [SKIP][4] ([i915#7701]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-2/igt@device_reset@cold-reset-bound.html * igt@drm_fdinfo@busy-hang@rcs0: - shard-mtlp: NOTRUN -> [SKIP][5] ([i915#8414]) +17 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-4/igt@drm_fdinfo@busy-hang@rcs0.html * igt@drm_fdinfo@most-busy-check-all@bcs0: - shard-dg2: NOTRUN -> [SKIP][6] ([i915#8414]) +19 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@drm_fdinfo@most-busy-check-all@bcs0.html * igt@gem_close_race@multigpu-basic-threads: - shard-mtlp: NOTRUN -> [SKIP][7] ([i915#7697]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-4/igt@gem_close_race@multigpu-basic-threads.html * igt@gem_create@create-ext-set-pat: - shard-dg2: NOTRUN -> [SKIP][8] ([i915#8562]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-2/igt@gem_create@create-ext-set-pat.html * igt@gem_ctx_exec@basic-nohangcheck: - shard-dg2: NOTRUN -> [TIMEOUT][9] ([i915#9435]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@gem_ctx_exec@basic-nohangcheck.html - shard-tglu: [PASS][10] -> [FAIL][11] ([i915#6268]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-tglu-4/igt@gem_ctx_exec@basic-nohangcheck.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-10/igt@gem_ctx_exec@basic-nohangcheck.html * igt@gem_ctx_persistence@heartbeat-many: - shard-dg2: NOTRUN -> [SKIP][12] ([i915#8555]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@gem_ctx_persistence@heartbeat-many.html * igt@gem_ctx_sseu@invalid-sseu: - shard-mtlp: NOTRUN -> [SKIP][13] ([i915#280]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-8/igt@gem_ctx_sseu@invalid-sseu.html * igt@gem_ctx_sseu@mmap-args: - shard-dg1: NOTRUN -> [SKIP][14] ([i915#280]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-15/igt@gem_ctx_sseu@mmap-args.html * igt@gem_exec_balancer@bonded-sync: - shard-dg2: NOTRUN -> [SKIP][15] ([i915#4771]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@gem_exec_balancer@bonded-sync.html * igt@gem_exec_balancer@invalid-bonds: - shard-dg1: NOTRUN -> [SKIP][16] ([i915#4036]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-18/igt@gem_exec_balancer@invalid-bonds.html * igt@gem_exec_balancer@sliced: - shard-dg2: NOTRUN -> [SKIP][17] ([i915#4812]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-2/igt@gem_exec_balancer@sliced.html * igt@gem_exec_capture@many-4k-incremental: - shard-tglu: NOTRUN -> [FAIL][18] ([i915#9606]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-2/igt@gem_exec_capture@many-4k-incremental.html * igt@gem_exec_capture@many-4k-zero: - shard-dg2: NOTRUN -> [FAIL][19] ([i915#9606]) +1 other test fail [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-1/igt@gem_exec_capture@many-4k-zero.html * igt@gem_exec_fair@basic-deadline: - shard-mtlp: NOTRUN -> [SKIP][20] ([i915#4473] / [i915#4771]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-5/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-tglu: [PASS][21] -> [FAIL][22] ([i915#2842]) +1 other test fail [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-tglu-3/igt@gem_exec_fair@basic-pace-solo@rcs0.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-10/igt@gem_exec_fair@basic-pace-solo@rcs0.html * igt@gem_exec_fair@basic-sync: - shard-dg1: NOTRUN -> [SKIP][23] ([i915#3539]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-15/igt@gem_exec_fair@basic-sync.html * igt@gem_exec_fair@basic-throttle: - shard-dg2: NOTRUN -> [SKIP][24] ([i915#3539]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-11/igt@gem_exec_fair@basic-throttle.html * igt@gem_exec_fence@submit67: - shard-mtlp: NOTRUN -> [SKIP][25] ([i915#4812]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-8/igt@gem_exec_fence@submit67.html * igt@gem_exec_flush@basic-uc-pro-default: - shard-dg2: NOTRUN -> [SKIP][26] ([i915#3539] / [i915#4852]) +4 other tests skip [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-1/igt@gem_exec_flush@basic-uc-pro-default.html * igt@gem_exec_flush@basic-wb-ro-before-default: - shard-dg1: NOTRUN -> [SKIP][27] ([i915#3539] / [i915#4852]) +1 other test skip [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-14/igt@gem_exec_flush@basic-wb-ro-before-default.html * igt@gem_exec_reloc@basic-gtt-cpu-active: - shard-dg2: NOTRUN -> [SKIP][28] ([i915#3281]) +9 other tests skip [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@gem_exec_reloc@basic-gtt-cpu-active.html * igt@gem_exec_reloc@basic-write-read-noreloc: - shard-dg1: NOTRUN -> [SKIP][29] ([i915#3281]) +7 other tests skip [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-15/igt@gem_exec_reloc@basic-write-read-noreloc.html * igt@gem_exec_reloc@basic-write-wc: - shard-mtlp: NOTRUN -> [SKIP][30] ([i915#3281]) +10 other tests skip [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-4/igt@gem_exec_reloc@basic-write-wc.html * igt@gem_exec_schedule@preempt-queue-chain: - shard-mtlp: NOTRUN -> [SKIP][31] ([i915#4537] / [i915#4812]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-3/igt@gem_exec_schedule@preempt-queue-chain.html - shard-dg2: NOTRUN -> [SKIP][32] ([i915#4537] / [i915#4812]) +1 other test skip [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-1/igt@gem_exec_schedule@preempt-queue-chain.html * igt@gem_fence_thrash@bo-copy: - shard-dg2: NOTRUN -> [SKIP][33] ([i915#4860]) +1 other test skip [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@gem_fence_thrash@bo-copy.html * igt@gem_fence_thrash@bo-write-verify-threaded-none: - shard-mtlp: NOTRUN -> [SKIP][34] ([i915#4860]) [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-8/igt@gem_fence_thrash@bo-write-verify-threaded-none.html * igt@gem_huc_copy@huc-copy: - shard-tglu: NOTRUN -> [SKIP][35] ([i915#2190]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-10/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@heavy-verify-random-ccs: - shard-tglu: NOTRUN -> [SKIP][36] ([i915#4613]) [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-7/igt@gem_lmem_swapping@heavy-verify-random-ccs.html * igt@gem_lmem_swapping@smem-oom: - shard-mtlp: NOTRUN -> [SKIP][37] ([i915#4613]) +2 other tests skip [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-2/igt@gem_lmem_swapping@smem-oom.html * igt@gem_media_fill@media-fill: - shard-dg2: NOTRUN -> [SKIP][38] ([i915#8289]) [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-1/igt@gem_media_fill@media-fill.html * igt@gem_mmap@bad-size: - shard-mtlp: NOTRUN -> [SKIP][39] ([i915#4083]) +3 other tests skip [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-5/igt@gem_mmap@bad-size.html * igt@gem_mmap_gtt@basic-write-cpu-read-gtt: - shard-mtlp: NOTRUN -> [SKIP][40] ([i915#4077]) +5 other tests skip [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-8/igt@gem_mmap_gtt@basic-write-cpu-read-gtt.html * igt@gem_mmap_gtt@medium-copy-xy: - shard-dg2: NOTRUN -> [SKIP][41] ([i915#4077]) +12 other tests skip [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-2/igt@gem_mmap_gtt@medium-copy-xy.html * igt@gem_mmap_wc@bad-object: - shard-dg1: NOTRUN -> [SKIP][42] ([i915#4083]) +1 other test skip [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-16/igt@gem_mmap_wc@bad-object.html * igt@gem_mmap_wc@copy: - shard-dg2: NOTRUN -> [SKIP][43] ([i915#4083]) +5 other tests skip [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@gem_mmap_wc@copy.html * igt@gem_partial_pwrite_pread@reads-uncached: - shard-dg2: NOTRUN -> [SKIP][44] ([i915#3282]) +8 other tests skip [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-6/igt@gem_partial_pwrite_pread@reads-uncached.html * igt@gem_pread@uncached: - shard-dg1: NOTRUN -> [SKIP][45] ([i915#3282]) [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-17/igt@gem_pread@uncached.html * igt@gem_pxp@display-protected-crc: - shard-dg1: NOTRUN -> [SKIP][46] ([i915#4270]) +1 other test skip [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-16/igt@gem_pxp@display-protected-crc.html * igt@gem_pxp@regular-baseline-src-copy-readible: - shard-dg2: NOTRUN -> [SKIP][47] ([i915#4270]) +5 other tests skip [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-7/igt@gem_pxp@regular-baseline-src-copy-readible.html * igt@gem_pxp@verify-pxp-execution-after-suspend-resume: - shard-tglu: NOTRUN -> [SKIP][48] ([i915#4270]) +2 other tests skip [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-7/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html - shard-mtlp: NOTRUN -> [SKIP][49] ([i915#4270]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-8/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html * igt@gem_readwrite@beyond-eob: - shard-mtlp: NOTRUN -> [SKIP][50] ([i915#3282]) +3 other tests skip [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-8/igt@gem_readwrite@beyond-eob.html * igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-ccs: - shard-mtlp: NOTRUN -> [SKIP][51] ([i915#8428]) +2 other tests skip [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-2/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-ccs.html * igt@gem_set_tiling_vs_blt@tiled-to-untiled: - shard-dg2: NOTRUN -> [SKIP][52] ([i915#4079]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html * igt@gem_softpin@evict-snoop-interruptible: - shard-tglu: NOTRUN -> [SKIP][53] ([fdo#109312]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-3/igt@gem_softpin@evict-snoop-interruptible.html - shard-mtlp: NOTRUN -> [SKIP][54] ([i915#4885]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-2/igt@gem_softpin@evict-snoop-interruptible.html * igt@gem_tiled_pread_basic: - shard-dg1: NOTRUN -> [SKIP][55] ([i915#4079]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-14/igt@gem_tiled_pread_basic.html * igt@gem_userptr_blits@access-control: - shard-mtlp: NOTRUN -> [SKIP][56] ([i915#3297]) +2 other tests skip [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-2/igt@gem_userptr_blits@access-control.html * igt@gem_userptr_blits@sd-probe: - shard-dg2: NOTRUN -> [SKIP][57] ([i915#3297] / [i915#4958]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-11/igt@gem_userptr_blits@sd-probe.html * igt@gem_userptr_blits@unsync-overlap: - shard-dg1: NOTRUN -> [SKIP][58] ([i915#3297]) [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-17/igt@gem_userptr_blits@unsync-overlap.html * igt@gem_userptr_blits@unsync-unmap: - shard-dg2: NOTRUN -> [SKIP][59] ([i915#3297]) [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-7/igt@gem_userptr_blits@unsync-unmap.html * igt@gem_userptr_blits@vma-merge: - shard-mtlp: NOTRUN -> [FAIL][60] ([i915#3318]) [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-7/igt@gem_userptr_blits@vma-merge.html * igt@gen9_exec_parse@allowed-all: - shard-dg1: NOTRUN -> [SKIP][61] ([i915#2527]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-16/igt@gen9_exec_parse@allowed-all.html * igt@gen9_exec_parse@allowed-single: - shard-mtlp: NOTRUN -> [SKIP][62] ([i915#2856]) +1 other test skip [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-5/igt@gen9_exec_parse@allowed-single.html * igt@gen9_exec_parse@bb-oversize: - shard-tglu: NOTRUN -> [SKIP][63] ([i915#2527] / [i915#2856]) +1 other test skip [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-10/igt@gen9_exec_parse@bb-oversize.html * igt@gen9_exec_parse@shadow-peek: - shard-dg2: NOTRUN -> [SKIP][64] ([i915#2856]) +3 other tests skip [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-11/igt@gen9_exec_parse@shadow-peek.html * igt@i915_module_load@load: - shard-mtlp: NOTRUN -> [SKIP][65] ([i915#6227]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-8/igt@i915_module_load@load.html * igt@i915_pm_freq_mult@media-freq@gt0: - shard-tglu: NOTRUN -> [SKIP][66] ([i915#6590]) [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-2/igt@i915_pm_freq_mult@media-freq@gt0.html * igt@i915_pm_rps@reset: - shard-mtlp: NOTRUN -> [FAIL][67] ([i915#8346]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-3/igt@i915_pm_rps@reset.html * igt@i915_pm_rps@thresholds-idle-park@gt0: - shard-dg2: NOTRUN -> [SKIP][68] ([i915#8925]) [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-6/igt@i915_pm_rps@thresholds-idle-park@gt0.html * igt@i915_query@query-topology-known-pci-ids: - shard-dg2: NOTRUN -> [SKIP][69] ([fdo#109303]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-2/igt@i915_query@query-topology-known-pci-ids.html * igt@i915_selftest@mock@memory_region: - shard-dg1: NOTRUN -> [DMESG-WARN][70] ([i915#9311]) [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-16/igt@i915_selftest@mock@memory_region.html * igt@i915_suspend@fence-restore-untiled: - shard-dg1: NOTRUN -> [SKIP][71] ([i915#4077]) +3 other tests skip [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-15/igt@i915_suspend@fence-restore-untiled.html * igt@kms_addfb_basic@bo-too-small-due-to-tiling: - shard-dg2: NOTRUN -> [SKIP][72] ([i915#4212]) [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-1/igt@kms_addfb_basic@bo-too-small-due-to-tiling.html * igt@kms_addfb_basic@invalid-smem-bo-on-discrete: - shard-mtlp: NOTRUN -> [SKIP][73] ([i915#3826]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-4/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html * igt@kms_async_flips@crc@pipe-a-hdmi-a-2: - shard-dg2: NOTRUN -> [FAIL][74] ([i915#8247]) +3 other tests fail [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-2/igt@kms_async_flips@crc@pipe-a-hdmi-a-2.html * igt@kms_async_flips@crc@pipe-d-hdmi-a-4: - shard-dg1: NOTRUN -> [FAIL][75] ([i915#8247]) +3 other tests fail [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-15/igt@kms_async_flips@crc@pipe-d-hdmi-a-4.html * igt@kms_big_fb@4-tiled-16bpp-rotate-90: - shard-tglu: NOTRUN -> [SKIP][76] ([fdo#111615] / [i915#5286]) +2 other tests skip [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-4/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip: - shard-dg1: NOTRUN -> [SKIP][77] ([i915#4538] / [i915#5286]) +1 other test skip [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-19/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip: - shard-mtlp: [PASS][78] -> [FAIL][79] ([i915#5138]) +1 other test fail [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_big_fb@linear-32bpp-rotate-90: - shard-mtlp: NOTRUN -> [SKIP][80] ([fdo#111614]) +3 other tests skip [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-7/igt@kms_big_fb@linear-32bpp-rotate-90.html * igt@kms_big_fb@x-tiled-16bpp-rotate-90: - shard-dg1: NOTRUN -> [SKIP][81] ([i915#3638]) [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-17/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html * igt@kms_big_fb@x-tiled-64bpp-rotate-90: - shard-dg2: NOTRUN -> [SKIP][82] ([fdo#111614]) +1 other test skip [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-1/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html * igt@kms_big_fb@y-tiled-64bpp-rotate-0: - shard-dg2: NOTRUN -> [SKIP][83] ([i915#5190]) +16 other tests skip [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html * igt@kms_big_fb@yf-tiled-8bpp-rotate-270: - shard-mtlp: NOTRUN -> [SKIP][84] ([fdo#111615]) +5 other tests skip [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-7/igt@kms_big_fb@yf-tiled-8bpp-rotate-270.html * igt@kms_big_fb@yf-tiled-addfb: - shard-dg1: NOTRUN -> [SKIP][85] ([fdo#111615]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-18/igt@kms_big_fb@yf-tiled-addfb.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip: - shard-tglu: NOTRUN -> [SKIP][86] ([fdo#111615]) +2 other tests skip [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-7/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0: - shard-dg1: NOTRUN -> [SKIP][87] ([i915#4538]) +2 other tests skip [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-18/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip: - shard-dg2: NOTRUN -> [SKIP][88] ([i915#4538] / [i915#5190]) +6 other tests skip [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html * igt@kms_big_joiner@basic: - shard-mtlp: NOTRUN -> [SKIP][89] ([i915#2705]) [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-5/igt@kms_big_joiner@basic.html * igt@kms_cdclk@mode-transition-all-outputs: - shard-mtlp: NOTRUN -> [SKIP][90] ([i915#7213]) [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-2/igt@kms_cdclk@mode-transition-all-outputs.html * igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3: - shard-dg2: NOTRUN -> [SKIP][91] ([i915#4087] / [i915#7213]) +3 other tests skip [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-6/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3.html * igt@kms_chamelium_audio@hdmi-audio-edid: - shard-tglu: NOTRUN -> [SKIP][92] ([i915#7828]) +3 other tests skip [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-5/igt@kms_chamelium_audio@hdmi-audio-edid.html * igt@kms_chamelium_color@ctm-0-25: - shard-dg2: NOTRUN -> [SKIP][93] ([fdo#111827]) [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-6/igt@kms_chamelium_color@ctm-0-25.html * igt@kms_chamelium_color@ctm-limited-range: - shard-mtlp: NOTRUN -> [SKIP][94] ([fdo#111827]) [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-7/igt@kms_chamelium_color@ctm-limited-range.html * igt@kms_chamelium_color@ctm-negative: - shard-dg1: NOTRUN -> [SKIP][95] ([fdo#111827]) [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-17/igt@kms_chamelium_color@ctm-negative.html * igt@kms_chamelium_color@degamma: - shard-tglu: NOTRUN -> [SKIP][96] ([fdo#111827]) [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-3/igt@kms_chamelium_color@degamma.html * igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k: - shard-dg2: NOTRUN -> [SKIP][97] ([i915#7828]) +11 other tests skip [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-2/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html * igt@kms_chamelium_frames@hdmi-aspect-ratio: - shard-mtlp: NOTRUN -> [SKIP][98] ([i915#7828]) +5 other tests skip [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-2/igt@kms_chamelium_frames@hdmi-aspect-ratio.html * igt@kms_chamelium_hpd@dp-hpd-storm-disable: - shard-dg1: NOTRUN -> [SKIP][99] ([i915#7828]) +5 other tests skip [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-19/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html * igt@kms_content_protection@dp-mst-lic-type-1: - shard-tglu: NOTRUN -> [SKIP][100] ([i915#3116] / [i915#3299]) [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-7/igt@kms_content_protection@dp-mst-lic-type-1.html * igt@kms_content_protection@dp-mst-type-1: - shard-dg2: NOTRUN -> [SKIP][101] ([i915#3299]) [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-7/igt@kms_content_protection@dp-mst-type-1.html * igt@kms_content_protection@lic: - shard-mtlp: NOTRUN -> [SKIP][102] ([i915#6944]) +1 other test skip [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-7/igt@kms_content_protection@lic.html * igt@kms_content_protection@srm: - shard-dg2: NOTRUN -> [SKIP][103] ([i915#7118]) +2 other tests skip [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-1/igt@kms_content_protection@srm.html * igt@kms_cursor_crc@cursor-onscreen-32x32: - shard-dg1: NOTRUN -> [SKIP][104] ([i915#3555]) +4 other tests skip [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-12/igt@kms_cursor_crc@cursor-onscreen-32x32.html * igt@kms_cursor_crc@cursor-onscreen-512x512: - shard-dg1: NOTRUN -> [SKIP][105] ([i915#3359]) [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-17/igt@kms_cursor_crc@cursor-onscreen-512x512.html * igt@kms_cursor_crc@cursor-rapid-movement-32x32: - shard-dg2: NOTRUN -> [SKIP][106] ([i915#3555]) +6 other tests skip [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-11/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html - shard-mtlp: NOTRUN -> [SKIP][107] ([i915#3555] / [i915#8814]) [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-8/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html * igt@kms_cursor_crc@cursor-sliding-512x512: - shard-dg2: NOTRUN -> [SKIP][108] ([i915#3359]) +1 other test skip [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-11/igt@kms_cursor_crc@cursor-sliding-512x512.html * igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy: - shard-tglu: NOTRUN -> [SKIP][109] ([fdo#109274]) +1 other test skip [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-5/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic: - shard-dg2: NOTRUN -> [SKIP][110] ([fdo#109274] / [fdo#111767] / [i915#5354]) [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-10/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size: - shard-mtlp: NOTRUN -> [SKIP][111] ([i915#4213]) [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html * igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size: - shard-dg2: NOTRUN -> [SKIP][112] ([fdo#109274] / [i915#5354]) +4 other tests skip [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-glk: [PASS][113] -> [FAIL][114] ([i915#2346]) [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size: - shard-dg2: NOTRUN -> [SKIP][115] ([i915#4103] / [i915#4213]) [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-10/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html - shard-tglu: NOTRUN -> [SKIP][116] ([i915#4103]) [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html * igt@kms_dsc@dsc-fractional-bpp: - shard-dg2: NOTRUN -> [SKIP][117] ([i915#3840] / [i915#9688]) [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-6/igt@kms_dsc@dsc-fractional-bpp.html * igt@kms_dsc@dsc-with-formats: - shard-mtlp: NOTRUN -> [SKIP][118] ([i915#3555] / [i915#3840] / [i915#4098]) [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-7/igt@kms_dsc@dsc-with-formats.html * igt@kms_flip@2x-flip-vs-absolute-wf_vblank: - shard-tglu: NOTRUN -> [SKIP][119] ([fdo#109274] / [i915#3637]) +3 other tests skip [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-2/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: - shard-dg2: NOTRUN -> [SKIP][120] ([fdo#109274] / [fdo#111767]) [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html * igt@kms_flip@2x-flip-vs-panning-vs-hang: - shard-dg2: NOTRUN -> [SKIP][121] ([fdo#109274]) +10 other tests skip [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-10/igt@kms_flip@2x-flip-vs-panning-vs-hang.html * igt@kms_flip@2x-modeset-vs-vblank-race: - shard-mtlp: NOTRUN -> [SKIP][122] ([i915#3637]) +1 other test skip [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-5/igt@kms_flip@2x-modeset-vs-vblank-race.html * igt@kms_flip@2x-nonexisting-fb: - shard-snb: NOTRUN -> [SKIP][123] ([fdo#109271]) +7 other tests skip [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-snb2/igt@kms_flip@2x-nonexisting-fb.html * igt@kms_flip@flip-vs-fences-interruptible: - shard-dg2: NOTRUN -> [SKIP][124] ([i915#8381]) [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-2/igt@kms_flip@flip-vs-fences-interruptible.html - shard-mtlp: NOTRUN -> [SKIP][125] ([i915#8381]) [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-8/igt@kms_flip@flip-vs-fences-interruptible.html * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode: - shard-dg2: NOTRUN -> [SKIP][126] ([i915#2672]) +5 other tests skip [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-valid-mode: - shard-dg1: NOTRUN -> [SKIP][127] ([i915#2587] / [i915#2672]) +1 other test skip [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-19/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode: - shard-mtlp: NOTRUN -> [SKIP][128] ([i915#2672]) +3 other tests skip [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode: - shard-tglu: NOTRUN -> [SKIP][129] ([i915#2587] / [i915#2672]) [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-default-mode: - shard-mtlp: NOTRUN -> [SKIP][130] ([i915#2672] / [i915#3555]) [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-default-mode.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt: - shard-dg2: NOTRUN -> [SKIP][131] ([i915#8708]) +20 other tests skip [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt: - shard-dg2: NOTRUN -> [SKIP][132] ([i915#5354]) +37 other tests skip [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render: - shard-tglu: NOTRUN -> [SKIP][133] ([fdo#109280]) +19 other tests skip [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-10/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu: - shard-dg2: [PASS][134] -> [FAIL][135] ([i915#6880]) [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu.html [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-10/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu.html * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt: - shard-dg1: NOTRUN -> [SKIP][136] ([i915#8708]) +11 other tests skip [136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-16/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu: - shard-dg2: NOTRUN -> [SKIP][137] ([i915#3458]) +17 other tests skip [137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move: - shard-dg1: NOTRUN -> [SKIP][138] ([i915#3458]) +6 other tests skip [138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render: - shard-dg1: NOTRUN -> [SKIP][139] ([fdo#111825]) +14 other tests skip [139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-19/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcpsr-tiling-4: - shard-dg1: NOTRUN -> [SKIP][140] ([i915#5439]) [140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-17/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt: - shard-tglu: NOTRUN -> [SKIP][141] ([fdo#110189]) +7 other tests skip [141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu: - shard-glk: NOTRUN -> [SKIP][142] ([fdo#109271]) +33 other tests skip [142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-glk6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt: - shard-mtlp: NOTRUN -> [SKIP][143] ([i915#8708]) +5 other tests skip [143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-cpu: - shard-mtlp: NOTRUN -> [SKIP][144] ([i915#1825]) +24 other tests skip [144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-cpu.html * igt@kms_hdmi_inject@inject-audio: - shard-tglu: [PASS][145] -> [SKIP][146] ([i915#433]) [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-tglu-2/igt@kms_hdmi_inject@inject-audio.html [146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-5/igt@kms_hdmi_inject@inject-audio.html * igt@kms_hdr@bpc-switch: - shard-dg1: NOTRUN -> [SKIP][147] ([i915#3555] / [i915#8228]) [147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-18/igt@kms_hdr@bpc-switch.html * igt@kms_hdr@invalid-metadata-sizes: - shard-mtlp: NOTRUN -> [SKIP][148] ([i915#3555] / [i915#8228]) [148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-2/igt@kms_hdr@invalid-metadata-sizes.html * igt@kms_hdr@static-swap: - shard-dg2: NOTRUN -> [SKIP][149] ([i915#3555] / [i915#8228]) +1 other test skip [149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-1/igt@kms_hdr@static-swap.html * igt@kms_panel_fitting@legacy: - shard-tglu: NOTRUN -> [SKIP][150] ([i915#6301]) [150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-8/igt@kms_panel_fitting@legacy.html * igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes: - shard-dg1: NOTRUN -> [SKIP][151] ([fdo#109289]) +1 other test skip [151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-19/igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes.html * igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c: - shard-mtlp: NOTRUN -> [SKIP][152] ([fdo#109289]) +3 other tests skip [152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-7/igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c.html * igt@kms_pipe_b_c_ivb@pipe-b-dpms-off-modeset-pipe-c: - shard-tglu: NOTRUN -> [SKIP][153] ([fdo#109289]) [153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-7/igt@kms_pipe_b_c_ivb@pipe-b-dpms-off-modeset-pipe-c.html * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1: - shard-tglu: [PASS][154] -> [FAIL][155] ([i915#8292]) [154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-tglu-2/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html [155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-4/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-3: - shard-dg1: NOTRUN -> [FAIL][156] ([i915#8292]) [156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-12/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-3.html * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-d-edp-1: - shard-mtlp: NOTRUN -> [SKIP][157] ([i915#3555] / [i915#5235]) +1 other test skip [157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-3/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-d-edp-1.html * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-d-hdmi-a-3: - shard-dg1: NOTRUN -> [SKIP][158] ([i915#5235]) +7 other tests skip [158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-12/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-d-hdmi-a-3.html * igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-d-hdmi-a-2: - shard-dg2: NOTRUN -> [SKIP][159] ([i915#5235]) +23 other tests skip [159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-d-hdmi-a-2.html * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-d-edp-1: - shard-mtlp: NOTRUN -> [SKIP][160] ([i915#5235]) +9 other tests skip [160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-3/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-d-edp-1.html * igt@kms_prime@basic-modeset-hybrid: - shard-dg1: NOTRUN -> [SKIP][161] ([i915#6524]) [161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-12/igt@kms_prime@basic-modeset-hybrid.html * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf: - shard-tglu: NOTRUN -> [SKIP][162] ([i915#9683]) [162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-10/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area: - shard-dg1: NOTRUN -> [SKIP][163] ([fdo#111068] / [i915#9683]) [163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-15/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb: - shard-dg2: NOTRUN -> [SKIP][164] ([i915#9683]) +3 other tests skip [164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html * igt@kms_psr2_su@page_flip-p010: - shard-mtlp: NOTRUN -> [SKIP][165] ([i915#4348]) [165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-2/igt@kms_psr2_su@page_flip-p010.html * igt@kms_psr@psr2_cursor_blt: - shard-tglu: NOTRUN -> [SKIP][166] ([i915#9673] / [i915#9732]) [166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-9/igt@kms_psr@psr2_cursor_blt.html * igt@kms_psr@psr2_cursor_mmap_gtt: - shard-dg2: NOTRUN -> [SKIP][167] ([i915#9673] / [i915#9732]) +1 other test skip [167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-10/igt@kms_psr@psr2_cursor_mmap_gtt.html * igt@kms_psr@psr2_cursor_render: - shard-dg1: NOTRUN -> [SKIP][168] ([i915#9673] / [i915#9732]) +1 other test skip [168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-15/igt@kms_psr@psr2_cursor_render.html * igt@kms_psr_stress_test@flip-primary-invalidate-overlay: - shard-dg2: NOTRUN -> [SKIP][169] ([i915#9685]) [169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html * igt@kms_psr_stress_test@invalidate-primary-flip-overlay: - shard-dg1: NOTRUN -> [SKIP][170] ([i915#9685]) [170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-19/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html * igt@kms_rotation_crc@primary-rotation-270: - shard-dg2: NOTRUN -> [SKIP][171] ([i915#4235]) +2 other tests skip [171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-11/igt@kms_rotation_crc@primary-rotation-270.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270: - shard-dg2: NOTRUN -> [SKIP][172] ([i915#4235] / [i915#5190]) +1 other test skip [172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html * igt@kms_scaling_modes@scaling-mode-full: - shard-tglu: NOTRUN -> [SKIP][173] ([i915#3555]) +3 other tests skip [173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-9/igt@kms_scaling_modes@scaling-mode-full.html * igt@kms_setmode@basic@pipe-a-vga-1: - shard-snb: NOTRUN -> [FAIL][174] ([i915#5465]) +1 other test fail [174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-snb7/igt@kms_setmode@basic@pipe-a-vga-1.html * igt@kms_writeback@writeback-check-output: - shard-tglu: NOTRUN -> [SKIP][175] ([i915#2437]) [175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-2/igt@kms_writeback@writeback-check-output.html - shard-mtlp: NOTRUN -> [SKIP][176] ([i915#2437]) [176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-4/igt@kms_writeback@writeback-check-output.html * igt@kms_writeback@writeback-pixel-formats: - shard-glk: NOTRUN -> [SKIP][177] ([fdo#109271] / [i915#2437]) [177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-glk9/igt@kms_writeback@writeback-pixel-formats.html - shard-dg1: NOTRUN -> [SKIP][178] ([i915#2437]) [178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-15/igt@kms_writeback@writeback-pixel-formats.html * igt@perf@mi-rpc: - shard-dg2: NOTRUN -> [SKIP][179] ([i915#2434]) [179]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-11/igt@perf@mi-rpc.html * igt@perf@per-context-mode-unprivileged: - shard-dg2: NOTRUN -> [SKIP][180] ([fdo#109289]) +4 other tests skip [180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-10/igt@perf@per-context-mode-unprivileged.html * igt@perf@unprivileged-single-ctx-counters: - shard-dg1: NOTRUN -> [SKIP][181] ([fdo#109289] / [i915#2433]) [181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-12/igt@perf@unprivileged-single-ctx-counters.html * igt@perf_pmu@event-wait@rcs0: - shard-dg2: NOTRUN -> [SKIP][182] ([fdo#112283]) [182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-5/igt@perf_pmu@event-wait@rcs0.html - shard-mtlp: NOTRUN -> [SKIP][183] ([i915#3555] / [i915#8807]) [183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-7/igt@perf_pmu@event-wait@rcs0.html * igt@perf_pmu@module-unload: - shard-dg2: NOTRUN -> [FAIL][184] ([i915#5793]) [184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-2/igt@perf_pmu@module-unload.html * igt@prime_udl: - shard-dg2: NOTRUN -> [SKIP][185] ([fdo#109291]) [185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-2/igt@prime_udl.html * igt@prime_vgem@basic-fence-mmap: - shard-dg2: NOTRUN -> [SKIP][186] ([i915#3708] / [i915#4077]) [186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-1/igt@prime_vgem@basic-fence-mmap.html * igt@prime_vgem@basic-fence-read: - shard-dg2: NOTRUN -> [SKIP][187] ([i915#3291] / [i915#3708]) [187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-10/igt@prime_vgem@basic-fence-read.html * igt@prime_vgem@basic-gtt: - shard-dg1: NOTRUN -> [SKIP][188] ([i915#3708] / [i915#4077]) [188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-15/igt@prime_vgem@basic-gtt.html * igt@tools_test@sysfs_l3_parity: - shard-dg1: NOTRUN -> [SKIP][189] ([fdo#109307] / [i915#4818]) [189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-14/igt@tools_test@sysfs_l3_parity.html * igt@v3d/v3d_perfmon@create-perfmon-invalid-counters: - shard-tglu: NOTRUN -> [SKIP][190] ([fdo#109315] / [i915#2575]) +3 other tests skip [190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-7/igt@v3d/v3d_perfmon@create-perfmon-invalid-counters.html * igt@v3d/v3d_submit_cl@single-out-sync: - shard-mtlp: NOTRUN -> [SKIP][191] ([i915#2575]) +7 other tests skip [191]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-7/igt@v3d/v3d_submit_cl@single-out-sync.html * igt@v3d/v3d_submit_csd@bad-perfmon: - shard-dg1: NOTRUN -> [SKIP][192] ([i915#2575]) +5 other tests skip [192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-15/igt@v3d/v3d_submit_csd@bad-perfmon.html * igt@v3d/v3d_submit_csd@job-perfmon: - shard-dg2: NOTRUN -> [SKIP][193] ([i915#2575]) +14 other tests skip [193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-6/igt@v3d/v3d_submit_csd@job-perfmon.html * igt@vc4/vc4_purgeable_bo@access-purged-bo-mem: - shard-mtlp: NOTRUN -> [SKIP][194] ([i915#7711]) +4 other tests skip [194]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-mtlp-3/igt@vc4/vc4_purgeable_bo@access-purged-bo-mem.html * igt@vc4/vc4_tiling@get-bad-handle: - shard-dg1: NOTRUN -> [SKIP][195] ([i915#7711]) +3 other tests skip [195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-18/igt@vc4/vc4_tiling@get-bad-handle.html * igt@vc4/vc4_tiling@get-bad-modifier: - shard-tglu: NOTRUN -> [SKIP][196] ([i915#2575]) +5 other tests skip [196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-4/igt@vc4/vc4_tiling@get-bad-modifier.html * igt@vc4/vc4_wait_seqno@bad-seqno-1ns: - shard-dg2: NOTRUN -> [SKIP][197] ([i915#7711]) +8 other tests skip [197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-11/igt@vc4/vc4_wait_seqno@bad-seqno-1ns.html #### Possible fixes #### * igt@gem_eio@unwedge-stress: - shard-dg1: [FAIL][198] ([i915#5784]) -> [PASS][199] [198]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-dg1-15/igt@gem_eio@unwedge-stress.html [199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-19/igt@gem_eio@unwedge-stress.html * igt@gem_lmem_swapping@smem-oom@lmem0: - shard-dg1: [TIMEOUT][200] ([i915#5493]) -> [PASS][201] [200]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-dg1-15/igt@gem_lmem_swapping@smem-oom@lmem0.html [201]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg1-12/igt@gem_lmem_swapping@smem-oom@lmem0.html * igt@i915_module_load@reload-with-fault-injection: - shard-tglu: [INCOMPLETE][202] ([i915#9200]) -> [PASS][203] [202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-tglu-9/igt@i915_module_load@reload-with-fault-injection.html [203]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-8/igt@i915_module_load@reload-with-fault-injection.html * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip: - shard-tglu: [FAIL][204] ([i915#3743]) -> [PASS][205] +1 other test pass [204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-tglu-9/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html [205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite: - shard-dg2: [FAIL][206] ([i915#6880]) -> [PASS][207] [206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-dg2-5/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html [207]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html * {igt@kms_pm_dc@dc6-dpms}: - shard-tglu: [FAIL][208] ([i915#9295]) -> [PASS][209] [208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-tglu-7/igt@kms_pm_dc@dc6-dpms.html [209]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-tglu-9/igt@kms_pm_dc@dc6-dpms.html * {igt@kms_pm_rpm@dpms-lpsp}: - shard-dg2: [SKIP][210] ([i915#9519]) -> [PASS][211] [210]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-dg2-5/igt@kms_pm_rpm@dpms-lpsp.html [211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-10/igt@kms_pm_rpm@dpms-lpsp.html #### Warnings #### * igt@kms_psr@psr2_dpms: - shard-dg2: [SKIP][212] ([i915#9673] / [i915#9732]) -> [SKIP][213] ([i915#9673] / [i915#9736]) +1 other test skip [212]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-dg2-7/igt@kms_psr@psr2_dpms.html [213]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-11/igt@kms_psr@psr2_dpms.html * igt@kms_psr@psr2_sprite_plane_move: - shard-dg2: [SKIP][214] ([i915#9673] / [i915#9736]) -> [SKIP][215] ([i915#9673] / [i915#9732]) +3 other tests skip [214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13958/shard-dg2-11/igt@kms_psr@psr2_sprite_plane_move.html [215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/shard-dg2-1/igt@kms_psr@psr2_sprite_plane_move.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291 [fdo#109293]: https://bugs.freedesktop.org/show_bug.cgi?id=109293 [fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303 [fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307 [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615 [fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283 [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346 [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433 [i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434 [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437 [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527 [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575 [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587 [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672 [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705 [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856 [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116 [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291 [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297 [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299 [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318 [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359 [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458 [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743 [i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826 [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840 [i915#4036]: https://gitlab.freedesktop.org/drm/intel/issues/4036 [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077 [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079 [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083 [i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087 [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212 [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213 [i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235 [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270 [i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433 [i915#4348]: https://gitlab.freedesktop.org/drm/intel/issues/4348 [i915#4473]: https://gitlab.freedesktop.org/drm/intel/issues/4473 [i915#4537]: https://gitlab.freedesktop.org/drm/intel/issues/4537 [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771 [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812 [i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818 [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852 [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860 [i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885 [i915#4958]: https://gitlab.freedesktop.org/drm/intel/issues/4958 [i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138 [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190 [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235 [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286 [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354 [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439 [i915#5465]: https://gitlab.freedesktop.org/drm/intel/issues/5465 [i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493 [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784 [i915#5793]: https://gitlab.freedesktop.org/drm/intel/issues/5793 [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095 [i915#6122]: https://gitlab.freedesktop.org/drm/intel/issues/6122 [i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227 [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268 [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301 [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524 [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 [i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590 [i915#6880]: https://gitlab.freedesktop.org/drm/intel/issues/6880 [i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944 [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118 [i915#7213]: https://gitlab.freedesktop.org/drm/intel/issues/7213 [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697 [i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701 [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711 [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828 [i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228 [i915#8247]: https://gitlab.freedesktop.org/drm/intel/issues/8247 [i915#8289]: https://gitlab.freedesktop.org/drm/intel/issues/8289 [i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292 [i915#8346]: https://gitlab.freedesktop.org/drm/intel/issues/8346 [i915#8381]: https://gitlab.freedesktop.org/drm/intel/issues/8381 [i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411 [i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414 [i915#8428]: https://gitlab.freedesktop.org/drm/intel/issues/8428 [i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555 [i915#8562]: https://gitlab.freedesktop.org/drm/intel/issues/8562 [i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708 [i915#8709]: https://gitlab.freedesktop.org/drm/intel/issues/8709 [i915#8807]: https://gitlab.freedesktop.org/drm/intel/issues/8807 [i915#8814]: https://gitlab.freedesktop.org/drm/intel/issues/8814 [i915#8925]: https://gitlab.freedesktop.org/drm/intel/issues/8925 [i915#9200]: https://gitlab.freedesktop.org/drm/intel/issues/9200 [i915#9295]: https://gitlab.freedesktop.org/drm/intel/issues/9295 [i915#9311]: https://gitlab.freedesktop.org/drm/intel/issues/9311 [i915#9337]: https://gitlab.freedesktop.org/drm/intel/issues/9337 [i915#9340]: https://gitlab.freedesktop.org/drm/intel/issues/9340 [i915#9423]: https://gitlab.freedesktop.org/drm/intel/issues/9423 [i915#9424]: https://gitlab.freedesktop.org/drm/intel/issues/9424 [i915#9433]: https://gitlab.freedesktop.org/drm/intel/issues/9433 [i915#9435]: https://gitlab.freedesktop.org/drm/intel/issues/9435 [i915#9519]: https://gitlab.freedesktop.org/drm/intel/issues/9519 [i915#9606]: https://gitlab.freedesktop.org/drm/intel/issues/9606 [i915#9653]: https://gitlab.freedesktop.org/drm/intel/issues/9653 [i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673 [i915#9683]: https://gitlab.freedesktop.org/drm/intel/issues/9683 [i915#9685]: https://gitlab.freedesktop.org/drm/intel/issues/9685 [i915#9688]: https://gitlab.freedesktop.org/drm/intel/issues/9688 [i915#9723]: https://gitlab.freedesktop.org/drm/intel/issues/9723 [i915#9732]: https://gitlab.freedesktop.org/drm/intel/issues/9732 [i915#9736]: https://gitlab.freedesktop.org/drm/intel/issues/9736 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_7613 -> IGTPW_10317 * Piglit: piglit_4509 -> None CI-20190529: 20190529 CI_DRM_13958: bc2cf1c63329e388b826fc83b93ba8d723556452 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_10317: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/index.html IGT_7613: 378017d8fa63defde11c0b4bc72025c64b70607d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10317/index.html [-- Attachment #2: Type: text/html, Size: 74855 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2023-12-04 12:25 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-12-01 11:35 [igt-dev] [PATCH i-g-t 0/3] Extend compute square test to Xe2 platform janga.rahul.kumar 2023-12-01 11:35 ` [igt-dev] [PATCH i-g-t 1/3] lib/intel_compute_square_kernels: Add xe2lpg compute sqaure kernel janga.rahul.kumar 2023-12-04 7:58 ` Zbigniew Kempczyński 2023-12-01 11:35 ` [igt-dev] [PATCH i-g-t 2/3] lib/intel_compute: Add XE2 compute implementation janga.rahul.kumar 2023-12-04 8:07 ` Zbigniew Kempczyński 2023-12-04 12:25 ` Kumar, Janga Rahul 2023-12-01 11:35 ` [igt-dev] [PATCH i-g-t 3/3] tests/xe_compute: Update documentation regarding test requirements janga.rahul.kumar 2023-12-04 8:09 ` Zbigniew Kempczyński 2023-12-01 13:10 ` [igt-dev] ✓ Fi.CI.BAT: success for Extend compute square test to Xe2 platform Patchwork 2023-12-01 13:20 ` [igt-dev] ✓ CI.xeBAT: " Patchwork 2023-12-03 0:07 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
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