* [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf
@ 2024-02-19 16:33 Kunal Joshi
2024-02-19 16:33 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi
` (5 more replies)
0 siblings, 6 replies; 17+ messages in thread
From: Kunal Joshi @ 2024-02-19 16:33 UTC (permalink / raw)
To: igt-dev; +Cc: Kunal Joshi
kmd series [1] adds supports for panel replay selective fetch,
modify lib and kms_psr2_sf to extend kms_psr2_sf tests to validate
panel replay selective fetch as well.
[1] https://patchwork.freedesktop.org/patch/575163/?series=128193&rev=3
Kunal Joshi (3):
lib/igt_psr: modify library to support multiple PSR/PR outputs
lib/igt_psr: add support for PR selective update
tests/intel/kms_psr2_sf: extend tests for panel replay sf
lib/igt_psr.c | 90 +++++++-----
lib/igt_psr.h | 14 +-
tests/intel/kms_dirtyfb.c | 4 +-
tests/intel/kms_fbcon_fbt.c | 4 +-
tests/intel/kms_frontbuffer_tracking.c | 4 +-
tests/intel/kms_pm_dc.c | 6 +-
tests/intel/kms_psr.c | 4 +-
tests/intel/kms_psr2_sf.c | 196 ++++++++++++++++++-------
tests/intel/kms_psr2_su.c | 2 +-
tests/intel/kms_psr_stress_test.c | 4 +-
tests/kms_async_flips.c | 4 +-
tests/kms_cursor_legacy.c | 4 +-
12 files changed, 215 insertions(+), 121 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 17+ messages in thread* [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs 2024-02-19 16:33 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi @ 2024-02-19 16:33 ` Kunal Joshi 2024-02-20 8:47 ` Hogander, Jouni 2024-02-19 16:33 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi ` (4 subsequent siblings) 5 siblings, 1 reply; 17+ messages in thread From: Kunal Joshi @ 2024-02-19 16:33 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy We can have multiple panels connected to the system so PSR information should be exposed per output. changes provide support for multiple PSR/PR to be tested simultaneously. v2: Use macro instead of function (Jouni) v3: keep psr_enable in igt_fixture (Jouni) Cc: Jouni Högander <jouni.hogander@intel.com> Cc: Animesh Manna <animesh.manna@intel.com> Cc: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> --- lib/igt_psr.c | 76 ++++++++++++++------------ lib/igt_psr.h | 14 ++--- tests/intel/kms_dirtyfb.c | 4 +- tests/intel/kms_fbcon_fbt.c | 4 +- tests/intel/kms_frontbuffer_tracking.c | 4 +- tests/intel/kms_pm_dc.c | 6 +- tests/intel/kms_psr.c | 4 +- tests/intel/kms_psr2_sf.c | 5 +- tests/intel/kms_psr2_su.c | 2 +- tests/intel/kms_psr_stress_test.c | 4 +- tests/kms_async_flips.c | 4 +- tests/kms_cursor_legacy.c | 4 +- 12 files changed, 66 insertions(+), 65 deletions(-) diff --git a/lib/igt_psr.c b/lib/igt_psr.c index ac214fcfc..cad8cce05 100644 --- a/lib/igt_psr.c +++ b/lib/igt_psr.c @@ -27,6 +27,10 @@ #include "igt_sysfs.h" #include <errno.h> +#define SET_DEBUGFS_PATH(output, path) \ + sprintf(path, "%s%s%s", output ? output->name : "", output ? "/" : "", \ + output ? "i915_psr_status" : "i915_edp_psr_status") + bool psr_disabled_check(int debugfs_fd) { char buf[PSR_STATUS_MAX_LEN]; @@ -37,11 +41,13 @@ bool psr_disabled_check(int debugfs_fd) return strstr(buf, "PSR mode: disabled\n"); } -bool psr2_selective_fetch_check(int debugfs_fd) +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output) { char buf[PSR_STATUS_MAX_LEN]; + char debugfs_file[128] = {0}; - igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf, + SET_DEBUGFS_PATH(output, debugfs_file); + igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); return strstr(buf, "PSR2 selective fetch: enabled"); @@ -54,11 +60,7 @@ static bool psr_active_check(int debugfs_fd, enum psr_mode mode, igt_output_t *o const char *state = (mode == PSR_MODE_1 || mode == PR_MODE) ? "SRDENT" : "DEEP_SLEEP"; int ret; - if (output) - sprintf(debugfs_file, "%s/i915_psr_status", output->name); - else - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); - + SET_DEBUGFS_PATH(output, debugfs_file); ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); if (ret < 0) { @@ -90,13 +92,18 @@ bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *outp return igt_wait(!psr_active_check(debugfs_fd, mode, output), 500, 10); } -static ssize_t psr_write(int debugfs_fd, const char *buf) +static ssize_t psr_write(int debugfs_fd, const char *buf, igt_output_t *output) { + /* + * FIXME: Currently we don't have separate psr_debug file for each output. + * so, we are using i915_edp_psr_debug file for all outputs. + * Later we need to add support for separate psr_debug file for each output. + */ return igt_sysfs_write(debugfs_fd, "i915_edp_psr_debug", buf, - strlen(buf)); + strlen(buf)); } -static int has_psr_debugfs(int debugfs_fd) +static int has_psr_debugfs(int debugfs_fd, igt_output_t *output) { int ret; @@ -105,7 +112,7 @@ static int has_psr_debugfs(int debugfs_fd) * Legacy mode will return OK here, debugfs api will return -EINVAL. * -ENODEV is returned when PSR is unavailable. */ - ret = psr_write(debugfs_fd, "0xf"); + ret = psr_write(debugfs_fd, "0xf", output); if (ret == -EINVAL) { errno = 0; return 0; @@ -113,7 +120,7 @@ static int has_psr_debugfs(int debugfs_fd) return ret; /* legacy debugfs api, we enabled irqs by writing, disable them. */ - psr_write(debugfs_fd, "0"); + psr_write(debugfs_fd, "0", output); return -EINVAL; } @@ -134,14 +141,14 @@ static int psr_restore_debugfs_fd = -1; static void restore_psr_debugfs(int sig) { - psr_write(psr_restore_debugfs_fd, "0"); + psr_write(psr_restore_debugfs_fd, "0", NULL); } -static bool psr_set(int device, int debugfs_fd, int mode) +static bool psr_set(int device, int debugfs_fd, int mode, igt_output_t *output) { int ret; - ret = has_psr_debugfs(debugfs_fd); + ret = has_psr_debugfs(debugfs_fd, output); if (ret == -ENODEV) { igt_skip("PSR not available\n"); return false; @@ -179,7 +186,7 @@ static bool psr_set(int device, int debugfs_fd, int mode) debug_val = "0x1"; } - ret = psr_write(debugfs_fd, debug_val); + ret = psr_write(debugfs_fd, debug_val, output); igt_require_f(ret > 0, "PSR2 SF feature not available\n"); } @@ -193,15 +200,15 @@ static bool psr_set(int device, int debugfs_fd, int mode) return ret; } -bool psr_enable(int device, int debugfs_fd, enum psr_mode mode) +bool psr_enable(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output) { - return psr_set(device, debugfs_fd, mode); + return psr_set(device, debugfs_fd, mode, output); } -bool psr_disable(int device, int debugfs_fd) +bool psr_disable(int device, int debugfs_fd, igt_output_t *output) { /* Any mode different than PSR_MODE_1/2 will disable PSR */ - return psr_set(device, debugfs_fd, -1); + return psr_set(device, debugfs_fd, -1, output); } bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output) @@ -211,11 +218,7 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output char buf[PSR_STATUS_MAX_LEN]; int ret; - if (output) - sprintf(debugfs_file, "%s/i915_psr_status", output->name); - else - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); - + SET_DEBUGFS_PATH(output, debugfs_file); ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); if (ret < 1) @@ -305,7 +308,7 @@ void psr_print_debugfs(int debugfs_fd) igt_info("%s", buf); } -bool i915_psr2_selective_fetch_check(int drm_fd) +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output) { int debugfs_fd; bool ret; @@ -314,7 +317,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) return false; debugfs_fd = igt_debugfs_dir(drm_fd); - ret = psr2_selective_fetch_check(debugfs_fd); + ret = psr2_selective_fetch_check(debugfs_fd, output); close(debugfs_fd); return ret; @@ -331,7 +334,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) * Returns: * True if PSR mode changed to PSR1, false otherwise. */ -bool i915_psr2_sel_fetch_to_psr1(int drm_fd) +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) { int debugfs_fd; bool ret = false; @@ -340,8 +343,8 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) return ret; debugfs_fd = igt_debugfs_dir(drm_fd); - if (psr2_selective_fetch_check(debugfs_fd)) { - psr_set(drm_fd, debugfs_fd, PSR_MODE_1); + if (psr2_selective_fetch_check(debugfs_fd, output)) { + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); ret = true; } @@ -355,12 +358,12 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) * Restore PSR2 selective fetch after tests were executed, this function should * only be called if i915_psr2_sel_fetch_to_psr1() returned true. */ -void i915_psr2_sel_fetch_restore(int drm_fd) +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) { int debugfs_fd; debugfs_fd = igt_debugfs_dir(drm_fd); - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH); + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); close(debugfs_fd); } @@ -369,16 +372,17 @@ void i915_psr2_sel_fetch_restore(int drm_fd) * * Return the current PSR mode. */ -enum psr_mode psr_get_mode(int debugfs_fd) +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output) { char buf[PSR_STATUS_MAX_LEN]; + char debugfs_file[128] = {0}; int ret; - - ret = igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf, + SET_DEBUGFS_PATH(output, debugfs_file); + ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); if (ret < 0) { - igt_info("Could not read i915_edp_psr_status: %s\n", + igt_info("Could not read psr status: %s\n", strerror(-ret)); return PSR_DISABLED; } diff --git a/lib/igt_psr.h b/lib/igt_psr.h index 82a4e8c5e..372bef2b2 100644 --- a/lib/igt_psr.h +++ b/lib/igt_psr.h @@ -46,21 +46,21 @@ enum fbc_mode { }; bool psr_disabled_check(int debugfs_fd); -bool psr2_selective_fetch_check(int debugfs_fd); +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output); bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); -bool psr_enable(int device, int debugfs_fd, enum psr_mode); -bool psr_disable(int device, int debugfs_fd); +bool psr_enable(int device, int debugfs_fd, enum psr_mode, igt_output_t *output); +bool psr_disable(int device, int debugfs_fd, igt_output_t *output); bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr2_wait_su(int debugfs_fd, uint16_t *num_su_blocks); void psr_print_debugfs(int debugfs_fd); -enum psr_mode psr_get_mode(int debugfs_fd); +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output); -bool i915_psr2_selective_fetch_check(int drm_fd); +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output); -bool i915_psr2_sel_fetch_to_psr1(int drm_fd); -void i915_psr2_sel_fetch_restore(int drm_fd); +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output); +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); #endif diff --git a/tests/intel/kms_dirtyfb.c b/tests/intel/kms_dirtyfb.c index 26b82e50a..c2411c824 100644 --- a/tests/intel/kms_dirtyfb.c +++ b/tests/intel/kms_dirtyfb.c @@ -127,7 +127,7 @@ static void enable_feature(data_t *data) intel_fbc_enable(data->drm_fd); break; case FEATURE_PSR: - psr_enable(data->drm_fd, data->debugfs_fd, PSR_MODE_1); + psr_enable(data->drm_fd, data->debugfs_fd, PSR_MODE_1, NULL); break; case FEATURE_DRRS: intel_drrs_enable(data->drm_fd, data->pipe); @@ -167,7 +167,7 @@ static void check_feature(data_t *data) static void disable_features(data_t *data) { intel_fbc_disable(data->drm_fd); - psr_disable(data->drm_fd, data->debugfs_fd); + psr_disable(data->drm_fd, data->debugfs_fd, NULL); intel_drrs_disable(data->drm_fd, data->pipe); } diff --git a/tests/intel/kms_fbcon_fbt.c b/tests/intel/kms_fbcon_fbt.c index 90484dccf..71e42f19c 100644 --- a/tests/intel/kms_fbcon_fbt.c +++ b/tests/intel/kms_fbcon_fbt.c @@ -277,7 +277,7 @@ static void disable_features(int device, int debugfs_fd) { igt_set_module_param_int(device, "enable_fbc", 0); if (psr_sink_support(device, debugfs_fd, PSR_MODE_1, NULL)) - psr_disable(device, debugfs_fd); + psr_disable(device, debugfs_fd, NULL); } static inline void fbc_modparam_enable(int device, int debugfs_fd) @@ -287,7 +287,7 @@ static inline void fbc_modparam_enable(int device, int debugfs_fd) static inline void psr_debugfs_enable(int device, int debugfs_fd) { - psr_enable(device, debugfs_fd, PSR_MODE_1); + psr_enable(device, debugfs_fd, PSR_MODE_1, NULL); } static void fbc_skips_on_fbcon(int debugfs_fd) diff --git a/tests/intel/kms_frontbuffer_tracking.c b/tests/intel/kms_frontbuffer_tracking.c index 912cca3f8..023843161 100644 --- a/tests/intel/kms_frontbuffer_tracking.c +++ b/tests/intel/kms_frontbuffer_tracking.c @@ -2234,7 +2234,7 @@ static bool disable_features(const struct test_mode *t) intel_fbc_disable(drm.fd); intel_drrs_disable(drm.fd, prim_mode_params.pipe); - return psr.can_test ? psr_disable(drm.fd, drm.debugfs) : false; + return psr.can_test ? psr_disable(drm.fd, drm.debugfs, NULL) : false; } static void *busy_thread_func(void *data) @@ -2867,7 +2867,7 @@ static bool enable_features_for_test(const struct test_mode *t) if (t->feature & FEATURE_FBC) intel_fbc_enable(drm.fd); if (t->feature & FEATURE_PSR) - ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1); + ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1, NULL); if (t->feature & FEATURE_DRRS) intel_drrs_enable(drm.fd, prim_mode_params.pipe); diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c index 0d5824e67..7deebf83d 100644 --- a/tests/intel/kms_pm_dc.c +++ b/tests/intel/kms_pm_dc.c @@ -362,7 +362,7 @@ static void require_dc_counter(int debugfs_fd, int dc_flag) static void setup_dc3co(data_t *data) { data->op_psr_mode = PSR_MODE_2; - psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode); + psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode, NULL); igt_require_f(psr_wait_entry(data->debugfs_fd, data->op_psr_mode, NULL), "PSR2 is not enabled\n"); } @@ -665,7 +665,7 @@ igt_main igt_require(psr_sink_support(data.drm_fd, data.debugfs_fd, PSR_MODE_1, NULL)); data.op_psr_mode = PSR_MODE_1; - psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode); + psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode, NULL); test_dc_state_psr(&data, CHECK_DC5); } @@ -675,7 +675,7 @@ igt_main igt_require(psr_sink_support(data.drm_fd, data.debugfs_fd, PSR_MODE_1, NULL)); data.op_psr_mode = PSR_MODE_1; - psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode); + psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode, NULL); igt_require_f(igt_pm_pc8_plus_residencies_enabled(data.msr_fd), "PC8+ residencies not supported\n"); if (intel_display_ver(data.devid) >= 14) diff --git a/tests/intel/kms_psr.c b/tests/intel/kms_psr.c index 521d4c708..3822b3081 100644 --- a/tests/intel/kms_psr.c +++ b/tests/intel/kms_psr.c @@ -519,7 +519,7 @@ static bool psr_enable_if_enabled(data_t *data) igt_skip("enable_psr modparam doesn't allow psr mode %d\n", data->op_psr_mode); - return psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode); + return psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode, data->output); } static inline void manual(const char *expected) @@ -658,6 +658,7 @@ static void test_cleanup(data_t *data) igt_remove_fb(data->drm_fd, &data->fb_green); igt_remove_fb(data->drm_fd, &data->fb_white); + psr_disable(data->drm_fd, data->debugfs_fd, data->output); } static void setup_test_plane(data_t *data, int test_plane) @@ -976,7 +977,6 @@ igt_main } igt_fixture { - psr_disable(data.drm_fd, data.debugfs_fd); close(data.debugfs_fd); buf_ops_destroy(data.bops); diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c index ecf9ad77f..0fb300161 100644 --- a/tests/intel/kms_psr2_sf.c +++ b/tests/intel/kms_psr2_sf.c @@ -1014,7 +1014,7 @@ igt_main /* Test if PSR2 can be enabled */ igt_require_f(psr_enable(data.drm_fd, - data.debugfs_fd, PSR_MODE_2_SEL_FETCH), + data.debugfs_fd, PSR_MODE_2_SEL_FETCH, NULL), "Error enabling PSR2\n"); data.damage_area_count = MAX_DAMAGE_AREAS; @@ -1026,9 +1026,6 @@ igt_main igt_info("Big framebuffer size %dx%d\n", data.big_fb_width, data.big_fb_height); - igt_require_f(psr2_selective_fetch_check(data.debugfs_fd), - "PSR2 selective fetch not enabled\n"); - for_each_pipe_with_valid_output(&data.display, data.pipe, data.output) { coexist_features[n_pipes] = 0; if (check_psr2_support(&data)) { diff --git a/tests/intel/kms_psr2_su.c b/tests/intel/kms_psr2_su.c index 936b5beb3..437ee36f6 100644 --- a/tests/intel/kms_psr2_su.c +++ b/tests/intel/kms_psr2_su.c @@ -338,7 +338,7 @@ igt_main /* Test if PSR2 can be enabled */ igt_require_f(psr_enable(data.drm_fd, - data.debugfs_fd, PSR_MODE_2), + data.debugfs_fd, PSR_MODE_2, NULL), "Error enabling PSR2\n"); data.op = FRONTBUFFER; data.format = DRM_FORMAT_XRGB8888; diff --git a/tests/intel/kms_psr_stress_test.c b/tests/intel/kms_psr_stress_test.c index 7aea8e8a5..bca3bd513 100644 --- a/tests/intel/kms_psr_stress_test.c +++ b/tests/intel/kms_psr_stress_test.c @@ -230,7 +230,7 @@ static void prepare(data_t *data) r = timerfd_settime(data->completed_timerfd, 0, &interval, NULL); igt_require_f(r != -1, "Error setting completed_timerfd\n"); - data->initial_state = psr_get_mode(data->debugfs_fd); + data->initial_state = psr_get_mode(data->debugfs_fd, NULL); igt_require(data->initial_state != PSR_DISABLED); igt_require(psr_wait_entry(data->debugfs_fd, data->initial_state, NULL)); } @@ -343,7 +343,7 @@ static void run(data_t *data) } /* Check if after all this stress the PSR is still in the same state */ - igt_assert(psr_get_mode(data->debugfs_fd) == data->initial_state); + igt_assert(psr_get_mode(data->debugfs_fd, NULL) == data->initial_state); } igt_main diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c index a0349fa03..2895168f7 100644 --- a/tests/kms_async_flips.c +++ b/tests/kms_async_flips.c @@ -391,7 +391,7 @@ static void test_cursor(data_t *data) * necessary, causing the async flip to fail because async flip is not * supported in cursor plane. */ - igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd), + igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd, NULL), "PSR2 sel fetch causes cursor to be added to primary plane " \ "pages flips and async flip is not supported in cursor\n"); @@ -704,7 +704,7 @@ igt_main * necessary, causing the async flip to fail because async flip is not * supported in cursor plane. */ - igt_skip_on_f(i915_psr2_selective_fetch_check(data.drm_fd), + igt_skip_on_f(i915_psr2_selective_fetch_check(data.drm_fd, NULL), "PSR2 sel fetch causes cursor to be added to primary plane " \ "pages flips and async flip is not supported in cursor\n"); diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c index 0017659d4..a430f735a 100644 --- a/tests/kms_cursor_legacy.c +++ b/tests/kms_cursor_legacy.c @@ -1849,7 +1849,7 @@ igt_main * page flip with cursor legacy APIS when Intel's PSR2 selective * fetch is enabled, so switching PSR1 for this whole test. */ - intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd); + intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); } igt_describe("Test checks how many cursor updates we can fit between vblanks " @@ -2074,7 +2074,7 @@ igt_main igt_fixture { if (intel_psr2_restore) - i915_psr2_sel_fetch_restore(display.drm_fd); + i915_psr2_sel_fetch_restore(display.drm_fd, NULL); igt_display_fini(&display); drm_close_driver(display.drm_fd); } -- 2.25.1 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs 2024-02-19 16:33 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi @ 2024-02-20 8:47 ` Hogander, Jouni 0 siblings, 0 replies; 17+ messages in thread From: Hogander, Jouni @ 2024-02-20 8:47 UTC (permalink / raw) To: Joshi, Kunal1, igt-dev@lists.freedesktop.org Cc: Murthy, Arun R, Manna, Animesh On Mon, 2024-02-19 at 22:03 +0530, Kunal Joshi wrote: > We can have multiple panels connected to the system so PSR > information > should be exposed per output. changes provide support for multiple > PSR/PR to be tested simultaneously. > > v2: Use macro instead of function (Jouni) > v3: keep psr_enable in igt_fixture (Jouni) > > Cc: Jouni Högander <jouni.hogander@intel.com> > Cc: Animesh Manna <animesh.manna@intel.com> > Cc: Arun R Murthy <arun.r.murthy@intel.com> > Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> > --- > lib/igt_psr.c | 76 ++++++++++++++---------- > -- > lib/igt_psr.h | 14 ++--- > tests/intel/kms_dirtyfb.c | 4 +- > tests/intel/kms_fbcon_fbt.c | 4 +- > tests/intel/kms_frontbuffer_tracking.c | 4 +- > tests/intel/kms_pm_dc.c | 6 +- > tests/intel/kms_psr.c | 4 +- > tests/intel/kms_psr2_sf.c | 5 +- > tests/intel/kms_psr2_su.c | 2 +- > tests/intel/kms_psr_stress_test.c | 4 +- > tests/kms_async_flips.c | 4 +- > tests/kms_cursor_legacy.c | 4 +- > 12 files changed, 66 insertions(+), 65 deletions(-) > > diff --git a/lib/igt_psr.c b/lib/igt_psr.c > index ac214fcfc..cad8cce05 100644 > --- a/lib/igt_psr.c > +++ b/lib/igt_psr.c > @@ -27,6 +27,10 @@ > #include "igt_sysfs.h" > #include <errno.h> > > +#define SET_DEBUGFS_PATH(output, path) \ > + sprintf(path, "%s%s%s", output ? output->name : "", output ? > "/" : "", \ > + output ? "i915_psr_status" : > "i915_edp_psr_status") > + > bool psr_disabled_check(int debugfs_fd) > { > char buf[PSR_STATUS_MAX_LEN]; > @@ -37,11 +41,13 @@ bool psr_disabled_check(int debugfs_fd) > return strstr(buf, "PSR mode: disabled\n"); > } > > -bool psr2_selective_fetch_check(int debugfs_fd) > +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t > *output) > { > char buf[PSR_STATUS_MAX_LEN]; > + char debugfs_file[128] = {0}; > > - igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", > buf, > + SET_DEBUGFS_PATH(output, debugfs_file); > + igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, > sizeof(buf)); > > return strstr(buf, "PSR2 selective fetch: enabled"); > @@ -54,11 +60,7 @@ static bool psr_active_check(int debugfs_fd, enum > psr_mode mode, igt_output_t *o > const char *state = (mode == PSR_MODE_1 || mode == PR_MODE) ? > "SRDENT" : "DEEP_SLEEP"; > int ret; > > - if (output) > - sprintf(debugfs_file, "%s/i915_psr_status", output- > >name); > - else > - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); > - > + SET_DEBUGFS_PATH(output, debugfs_file); > ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, > buf, sizeof(buf)); > if (ret < 0) { > @@ -90,13 +92,18 @@ bool psr_long_wait_update(int debugfs_fd, enum > psr_mode mode, igt_output_t *outp > return igt_wait(!psr_active_check(debugfs_fd, mode, output), > 500, 10); > } > > -static ssize_t psr_write(int debugfs_fd, const char *buf) > +static ssize_t psr_write(int debugfs_fd, const char *buf, > igt_output_t *output) > { > + /* > + * FIXME: Currently we don't have separate psr_debug file for > each output. > + * so, we are using i915_edp_psr_debug file for all outputs. > + * Later we need to add support for separate psr_debug file > for each output. > + */ > return igt_sysfs_write(debugfs_fd, "i915_edp_psr_debug", buf, > - strlen(buf)); > + strlen(buf)); > } > > -static int has_psr_debugfs(int debugfs_fd) > +static int has_psr_debugfs(int debugfs_fd, igt_output_t *output) > { > int ret; > > @@ -105,7 +112,7 @@ static int has_psr_debugfs(int debugfs_fd) > * Legacy mode will return OK here, debugfs api will return - > EINVAL. > * -ENODEV is returned when PSR is unavailable. > */ > - ret = psr_write(debugfs_fd, "0xf"); > + ret = psr_write(debugfs_fd, "0xf", output); > if (ret == -EINVAL) { > errno = 0; > return 0; > @@ -113,7 +120,7 @@ static int has_psr_debugfs(int debugfs_fd) > return ret; > > /* legacy debugfs api, we enabled irqs by writing, disable > them. */ > - psr_write(debugfs_fd, "0"); > + psr_write(debugfs_fd, "0", output); > return -EINVAL; > } > > @@ -134,14 +141,14 @@ static int psr_restore_debugfs_fd = -1; > > static void restore_psr_debugfs(int sig) > { > - psr_write(psr_restore_debugfs_fd, "0"); > + psr_write(psr_restore_debugfs_fd, "0", NULL); > } > > -static bool psr_set(int device, int debugfs_fd, int mode) > +static bool psr_set(int device, int debugfs_fd, int mode, > igt_output_t *output) > { > int ret; > > - ret = has_psr_debugfs(debugfs_fd); > + ret = has_psr_debugfs(debugfs_fd, output); > if (ret == -ENODEV) { > igt_skip("PSR not available\n"); > return false; > @@ -179,7 +186,7 @@ static bool psr_set(int device, int debugfs_fd, > int mode) > debug_val = "0x1"; > } > > - ret = psr_write(debugfs_fd, debug_val); > + ret = psr_write(debugfs_fd, debug_val, output); > igt_require_f(ret > 0, "PSR2 SF feature not > available\n"); > } > > @@ -193,15 +200,15 @@ static bool psr_set(int device, int debugfs_fd, > int mode) > return ret; > } > > -bool psr_enable(int device, int debugfs_fd, enum psr_mode mode) > +bool psr_enable(int device, int debugfs_fd, enum psr_mode mode, > igt_output_t *output) > { > - return psr_set(device, debugfs_fd, mode); > + return psr_set(device, debugfs_fd, mode, output); > } > > -bool psr_disable(int device, int debugfs_fd) > +bool psr_disable(int device, int debugfs_fd, igt_output_t *output) > { > /* Any mode different than PSR_MODE_1/2 will disable PSR */ > - return psr_set(device, debugfs_fd, -1); > + return psr_set(device, debugfs_fd, -1, output); > } > > bool psr_sink_support(int device, int debugfs_fd, enum psr_mode > mode, igt_output_t *output) > @@ -211,11 +218,7 @@ bool psr_sink_support(int device, int > debugfs_fd, enum psr_mode mode, igt_output > char buf[PSR_STATUS_MAX_LEN]; > int ret; > > - if (output) > - sprintf(debugfs_file, "%s/i915_psr_status", output- > >name); > - else > - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); > - > + SET_DEBUGFS_PATH(output, debugfs_file); > ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, > sizeof(buf)); > if (ret < 1) > @@ -305,7 +308,7 @@ void psr_print_debugfs(int debugfs_fd) > igt_info("%s", buf); > } > > -bool i915_psr2_selective_fetch_check(int drm_fd) > +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t > *output) > { > int debugfs_fd; > bool ret; > @@ -314,7 +317,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) > return false; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - ret = psr2_selective_fetch_check(debugfs_fd); > + ret = psr2_selective_fetch_check(debugfs_fd, output); > close(debugfs_fd); > > return ret; > @@ -331,7 +334,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) > * Returns: > * True if PSR mode changed to PSR1, false otherwise. > */ > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd) > +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) > { > int debugfs_fd; > bool ret = false; > @@ -340,8 +343,8 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) > return ret; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - if (psr2_selective_fetch_check(debugfs_fd)) { > - psr_set(drm_fd, debugfs_fd, PSR_MODE_1); > + if (psr2_selective_fetch_check(debugfs_fd, output)) { > + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); > ret = true; > } > > @@ -355,12 +358,12 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) > * Restore PSR2 selective fetch after tests were executed, this > function should > * only be called if i915_psr2_sel_fetch_to_psr1() returned true. > */ > -void i915_psr2_sel_fetch_restore(int drm_fd) > +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) > { > int debugfs_fd; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH); > + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); > close(debugfs_fd); > } > > @@ -369,16 +372,17 @@ void i915_psr2_sel_fetch_restore(int drm_fd) > * > * Return the current PSR mode. > */ > -enum psr_mode psr_get_mode(int debugfs_fd) > +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output) > { > char buf[PSR_STATUS_MAX_LEN]; > + char debugfs_file[128] = {0}; > int ret; > > - > - ret = igt_debugfs_simple_read(debugfs_fd, > "i915_edp_psr_status", buf, > + SET_DEBUGFS_PATH(output, debugfs_file); > + ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, > sizeof(buf)); > if (ret < 0) { > - igt_info("Could not read i915_edp_psr_status: %s\n", > + igt_info("Could not read psr status: %s\n", > strerror(-ret)); > return PSR_DISABLED; > } > diff --git a/lib/igt_psr.h b/lib/igt_psr.h > index 82a4e8c5e..372bef2b2 100644 > --- a/lib/igt_psr.h > +++ b/lib/igt_psr.h > @@ -46,21 +46,21 @@ enum fbc_mode { > }; > > bool psr_disabled_check(int debugfs_fd); > -bool psr2_selective_fetch_check(int debugfs_fd); > +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t > *output); > bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t > *output); > bool psr_wait_update(int debugfs_fd, enum psr_mode mode, > igt_output_t *output); > bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, > igt_output_t *output); > -bool psr_enable(int device, int debugfs_fd, enum psr_mode); > -bool psr_disable(int device, int debugfs_fd); > +bool psr_enable(int device, int debugfs_fd, enum psr_mode, > igt_output_t *output); > +bool psr_disable(int device, int debugfs_fd, igt_output_t *output); > bool psr_sink_support(int device, int debugfs_fd, enum psr_mode > mode, igt_output_t *output); > bool psr2_wait_su(int debugfs_fd, uint16_t *num_su_blocks); > void psr_print_debugfs(int debugfs_fd); > -enum psr_mode psr_get_mode(int debugfs_fd); > +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output); > > -bool i915_psr2_selective_fetch_check(int drm_fd); > +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t > *output); > > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd); > -void i915_psr2_sel_fetch_restore(int drm_fd); > +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output); > +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); > bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); > > #endif > diff --git a/tests/intel/kms_dirtyfb.c b/tests/intel/kms_dirtyfb.c > index 26b82e50a..c2411c824 100644 > --- a/tests/intel/kms_dirtyfb.c > +++ b/tests/intel/kms_dirtyfb.c > @@ -127,7 +127,7 @@ static void enable_feature(data_t *data) > intel_fbc_enable(data->drm_fd); > break; > case FEATURE_PSR: > - psr_enable(data->drm_fd, data->debugfs_fd, > PSR_MODE_1); > + psr_enable(data->drm_fd, data->debugfs_fd, > PSR_MODE_1, NULL); > break; > case FEATURE_DRRS: > intel_drrs_enable(data->drm_fd, data->pipe); > @@ -167,7 +167,7 @@ static void check_feature(data_t *data) > static void disable_features(data_t *data) > { > intel_fbc_disable(data->drm_fd); > - psr_disable(data->drm_fd, data->debugfs_fd); > + psr_disable(data->drm_fd, data->debugfs_fd, NULL); > intel_drrs_disable(data->drm_fd, data->pipe); > } > > diff --git a/tests/intel/kms_fbcon_fbt.c > b/tests/intel/kms_fbcon_fbt.c > index 90484dccf..71e42f19c 100644 > --- a/tests/intel/kms_fbcon_fbt.c > +++ b/tests/intel/kms_fbcon_fbt.c > @@ -277,7 +277,7 @@ static void disable_features(int device, int > debugfs_fd) > { > igt_set_module_param_int(device, "enable_fbc", 0); > if (psr_sink_support(device, debugfs_fd, PSR_MODE_1, NULL)) > - psr_disable(device, debugfs_fd); > + psr_disable(device, debugfs_fd, NULL); > } > > static inline void fbc_modparam_enable(int device, int debugfs_fd) > @@ -287,7 +287,7 @@ static inline void fbc_modparam_enable(int > device, int debugfs_fd) > > static inline void psr_debugfs_enable(int device, int debugfs_fd) > { > - psr_enable(device, debugfs_fd, PSR_MODE_1); > + psr_enable(device, debugfs_fd, PSR_MODE_1, NULL); > } > > static void fbc_skips_on_fbcon(int debugfs_fd) > diff --git a/tests/intel/kms_frontbuffer_tracking.c > b/tests/intel/kms_frontbuffer_tracking.c > index 912cca3f8..023843161 100644 > --- a/tests/intel/kms_frontbuffer_tracking.c > +++ b/tests/intel/kms_frontbuffer_tracking.c > @@ -2234,7 +2234,7 @@ static bool disable_features(const struct > test_mode *t) > intel_fbc_disable(drm.fd); > intel_drrs_disable(drm.fd, prim_mode_params.pipe); > > - return psr.can_test ? psr_disable(drm.fd, drm.debugfs) : > false; > + return psr.can_test ? psr_disable(drm.fd, drm.debugfs, NULL) > : false; > } > > static void *busy_thread_func(void *data) > @@ -2867,7 +2867,7 @@ static bool enable_features_for_test(const > struct test_mode *t) > if (t->feature & FEATURE_FBC) > intel_fbc_enable(drm.fd); > if (t->feature & FEATURE_PSR) > - ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1); > + ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1, > NULL); > if (t->feature & FEATURE_DRRS) > intel_drrs_enable(drm.fd, prim_mode_params.pipe); > > diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c > index 0d5824e67..7deebf83d 100644 > --- a/tests/intel/kms_pm_dc.c > +++ b/tests/intel/kms_pm_dc.c > @@ -362,7 +362,7 @@ static void require_dc_counter(int debugfs_fd, > int dc_flag) > static void setup_dc3co(data_t *data) > { > data->op_psr_mode = PSR_MODE_2; > - psr_enable(data->drm_fd, data->debugfs_fd, data- > >op_psr_mode); > + psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode, > NULL); > igt_require_f(psr_wait_entry(data->debugfs_fd, data- > >op_psr_mode, NULL), > "PSR2 is not enabled\n"); > } > @@ -665,7 +665,7 @@ igt_main > igt_require(psr_sink_support(data.drm_fd, > data.debugfs_fd, > PSR_MODE_1, NULL)); > data.op_psr_mode = PSR_MODE_1; > - psr_enable(data.drm_fd, data.debugfs_fd, > data.op_psr_mode); > + psr_enable(data.drm_fd, data.debugfs_fd, > data.op_psr_mode, NULL); > test_dc_state_psr(&data, CHECK_DC5); > } > > @@ -675,7 +675,7 @@ igt_main > igt_require(psr_sink_support(data.drm_fd, > data.debugfs_fd, > PSR_MODE_1, NULL)); > data.op_psr_mode = PSR_MODE_1; > - psr_enable(data.drm_fd, data.debugfs_fd, > data.op_psr_mode); > + psr_enable(data.drm_fd, data.debugfs_fd, > data.op_psr_mode, NULL); > igt_require_f(igt_pm_pc8_plus_residencies_enabled(dat > a.msr_fd), > "PC8+ residencies not supported\n"); > if (intel_display_ver(data.devid) >= 14) > diff --git a/tests/intel/kms_psr.c b/tests/intel/kms_psr.c > index 521d4c708..3822b3081 100644 > --- a/tests/intel/kms_psr.c > +++ b/tests/intel/kms_psr.c > @@ -519,7 +519,7 @@ static bool psr_enable_if_enabled(data_t *data) > igt_skip("enable_psr modparam doesn't allow psr mode > %d\n", > data->op_psr_mode); > > - return psr_enable(data->drm_fd, data->debugfs_fd, data- > >op_psr_mode); > + return psr_enable(data->drm_fd, data->debugfs_fd, data- > >op_psr_mode, data->output); > } > > static inline void manual(const char *expected) > @@ -658,6 +658,7 @@ static void test_cleanup(data_t *data) > > igt_remove_fb(data->drm_fd, &data->fb_green); > igt_remove_fb(data->drm_fd, &data->fb_white); > + psr_disable(data->drm_fd, data->debugfs_fd, data->output); > } > > static void setup_test_plane(data_t *data, int test_plane) > @@ -976,7 +977,6 @@ igt_main > } > > igt_fixture { > - psr_disable(data.drm_fd, data.debugfs_fd); > > close(data.debugfs_fd); > buf_ops_destroy(data.bops); > diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c > index ecf9ad77f..0fb300161 100644 > --- a/tests/intel/kms_psr2_sf.c > +++ b/tests/intel/kms_psr2_sf.c > @@ -1014,7 +1014,7 @@ igt_main > > /* Test if PSR2 can be enabled */ > igt_require_f(psr_enable(data.drm_fd, > - data.debugfs_fd, > PSR_MODE_2_SEL_FETCH), > + data.debugfs_fd, > PSR_MODE_2_SEL_FETCH, NULL), > "Error enabling PSR2\n"); > > data.damage_area_count = MAX_DAMAGE_AREAS; > @@ -1026,9 +1026,6 @@ igt_main > igt_info("Big framebuffer size %dx%d\n", > data.big_fb_width, data.big_fb_height); > > - > igt_require_f(psr2_selective_fetch_check(data.debugfs_f > d), > - "PSR2 selective fetch not enabled\n"); > - > for_each_pipe_with_valid_output(&data.display, > data.pipe, data.output) { > coexist_features[n_pipes] = 0; > if (check_psr2_support(&data)) { > diff --git a/tests/intel/kms_psr2_su.c b/tests/intel/kms_psr2_su.c > index 936b5beb3..437ee36f6 100644 > --- a/tests/intel/kms_psr2_su.c > +++ b/tests/intel/kms_psr2_su.c > @@ -338,7 +338,7 @@ igt_main > > /* Test if PSR2 can be enabled */ > igt_require_f(psr_enable(data.drm_fd, > - data.debugfs_fd, > PSR_MODE_2), > + data.debugfs_fd, PSR_MODE_2, > NULL), > "Error enabling PSR2\n"); > data.op = FRONTBUFFER; > data.format = DRM_FORMAT_XRGB8888; > diff --git a/tests/intel/kms_psr_stress_test.c > b/tests/intel/kms_psr_stress_test.c > index 7aea8e8a5..bca3bd513 100644 > --- a/tests/intel/kms_psr_stress_test.c > +++ b/tests/intel/kms_psr_stress_test.c > @@ -230,7 +230,7 @@ static void prepare(data_t *data) > r = timerfd_settime(data->completed_timerfd, 0, &interval, > NULL); > igt_require_f(r != -1, "Error setting completed_timerfd\n"); > > - data->initial_state = psr_get_mode(data->debugfs_fd); > + data->initial_state = psr_get_mode(data->debugfs_fd, NULL); > igt_require(data->initial_state != PSR_DISABLED); > igt_require(psr_wait_entry(data->debugfs_fd, data- > >initial_state, NULL)); > } > @@ -343,7 +343,7 @@ static void run(data_t *data) > } > > /* Check if after all this stress the PSR is still in the > same state */ > - igt_assert(psr_get_mode(data->debugfs_fd) == data- > >initial_state); > + igt_assert(psr_get_mode(data->debugfs_fd, NULL) == data- > >initial_state); > } > > igt_main > diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c > index a0349fa03..2895168f7 100644 > --- a/tests/kms_async_flips.c > +++ b/tests/kms_async_flips.c > @@ -391,7 +391,7 @@ static void test_cursor(data_t *data) > * necessary, causing the async flip to fail because async > flip is not > * supported in cursor plane. > */ > - igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd), > + igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd, > NULL), > "PSR2 sel fetch causes cursor to be added to > primary plane " \ > "pages flips and async flip is not supported in > cursor\n"); > > @@ -704,7 +704,7 @@ igt_main > * necessary, causing the async flip to fail because > async flip is not > * supported in cursor plane. > */ > - > igt_skip_on_f(i915_psr2_selective_fetch_check(data.drm_ > fd), > + igt_skip_on_f(i915_psr2_selective_fetch_check(data.dr > m_fd, NULL), > "PSR2 sel fetch causes cursor to be > added to primary plane " \ > "pages flips and async flip is not > supported in cursor\n"); > > diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c > index 0017659d4..a430f735a 100644 > --- a/tests/kms_cursor_legacy.c > +++ b/tests/kms_cursor_legacy.c > @@ -1849,7 +1849,7 @@ igt_main > * page flip with cursor legacy APIS when Intel's > PSR2 selective > * fetch is enabled, so switching PSR1 for this whole > test. > */ > - intel_psr2_restore = > i915_psr2_sel_fetch_to_psr1(display.drm_fd); > + intel_psr2_restore = > i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); > } > > igt_describe("Test checks how many cursor updates we can fit > between vblanks " > @@ -2074,7 +2074,7 @@ igt_main > > igt_fixture { > if (intel_psr2_restore) > - i915_psr2_sel_fetch_restore(display.drm_fd); > + i915_psr2_sel_fetch_restore(display.drm_fd, > NULL); > igt_display_fini(&display); > drm_close_driver(display.drm_fd); > } ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update 2024-02-19 16:33 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi 2024-02-19 16:33 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi @ 2024-02-19 16:33 ` Kunal Joshi 2024-02-20 8:48 ` Hogander, Jouni 2024-02-19 16:33 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi ` (3 subsequent siblings) 5 siblings, 1 reply; 17+ messages in thread From: Kunal Joshi @ 2024-02-19 16:33 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy adapt to kmd changes to support PR selective update https://patchwork.freedesktop.org/patch/575163/?series=128193&rev=3 v2: "PSR2 selective fetch: enable" valid for both cases (Jouni) v3: use check_psr2_support (Jouni) v4: split patches (Jouni) v5: drop changes on psr2_sel_fetch_to_psr1 and *_restore (Jouni) Cc: Jouni Högander <jouni.hogander@intel.com> Cc: Animesh Manna <animesh.manna@intel.com> Cc: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> --- lib/igt_psr.c | 20 ++++++++++++++------ lib/igt_psr.h | 2 +- 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/lib/igt_psr.c b/lib/igt_psr.c index cad8cce05..6008b73a6 100644 --- a/lib/igt_psr.c +++ b/lib/igt_psr.c @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd) return strstr(buf, "PSR mode: disabled\n"); } -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output) +bool selective_fetch_check(int debugfs_fd, igt_output_t *output) { char buf[PSR_STATUS_MAX_LEN]; char debugfs_file[128] = {0}; @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output (strstr(line, "PSR = yes") && (strstr(line, "[0x03]") || strstr(line, "[0x04]"))); case PR_MODE: - return strstr(line, "Panel Replay = yes"); + return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no"); + case PR_MODE_SEL_FETCH: + return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes"); default: igt_assert_f(false, "Invalid psr mode\n"); return false; @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output) return false; debugfs_fd = igt_debugfs_dir(drm_fd); - ret = psr2_selective_fetch_check(debugfs_fd, output); + ret = selective_fetch_check(debugfs_fd, output); close(debugfs_fd); return ret; @@ -343,7 +345,11 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) return ret; debugfs_fd = igt_debugfs_dir(drm_fd); - if (psr2_selective_fetch_check(debugfs_fd, output)) { + if (selective_fetch_check(debugfs_fd, output)) { + /* + * With below we switch to PSR1 incase of PSR and + * Panel Replay Full Frame update in case of Panel Replay. + */ psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); ret = true; } @@ -389,11 +395,13 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output) if (strstr(buf, "Panel Replay Enabled")) return PR_MODE; + else if (strstr(buf, "Panel Replay Selective Update Enabled")) + return PR_MODE_SEL_FETCH; else if (strstr(buf, "PSR2 selective fetch: enabled")) return PSR_MODE_2_SEL_FETCH; - else if (strstr(buf, "PSR2 enabled")) + else if (strstr(buf, "PSR2")) return PSR_MODE_2; - else if (strstr(buf, "PSR1 enabled")) + else if (strstr(buf, "PSR1")) return PSR_MODE_1; return PSR_DISABLED; diff --git a/lib/igt_psr.h b/lib/igt_psr.h index 372bef2b2..e8595fd8c 100644 --- a/lib/igt_psr.h +++ b/lib/igt_psr.h @@ -46,7 +46,7 @@ enum fbc_mode { }; bool psr_disabled_check(int debugfs_fd); -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output); +bool selective_fetch_check(int debugfs_fd, igt_output_t *output); bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); -- 2.25.1 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update 2024-02-19 16:33 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi @ 2024-02-20 8:48 ` Hogander, Jouni 0 siblings, 0 replies; 17+ messages in thread From: Hogander, Jouni @ 2024-02-20 8:48 UTC (permalink / raw) To: Joshi, Kunal1, igt-dev@lists.freedesktop.org Cc: Murthy, Arun R, Manna, Animesh On Mon, 2024-02-19 at 22:03 +0530, Kunal Joshi wrote: > adapt to kmd changes to support PR selective update > https://patchwork.freedesktop.org/patch/575163/?series=128193&rev=3 > > v2: "PSR2 selective fetch: enable" valid for both cases (Jouni) > v3: use check_psr2_support (Jouni) > v4: split patches (Jouni) > v5: drop changes on psr2_sel_fetch_to_psr1 and *_restore (Jouni) > > Cc: Jouni Högander <jouni.hogander@intel.com> > Cc: Animesh Manna <animesh.manna@intel.com> > Cc: Arun R Murthy <arun.r.murthy@intel.com> > Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> > --- > lib/igt_psr.c | 20 ++++++++++++++------ > lib/igt_psr.h | 2 +- > 2 files changed, 15 insertions(+), 7 deletions(-) > > diff --git a/lib/igt_psr.c b/lib/igt_psr.c > index cad8cce05..6008b73a6 100644 > --- a/lib/igt_psr.c > +++ b/lib/igt_psr.c > @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd) > return strstr(buf, "PSR mode: disabled\n"); > } > > -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t > *output) > +bool selective_fetch_check(int debugfs_fd, igt_output_t *output) > { > char buf[PSR_STATUS_MAX_LEN]; > char debugfs_file[128] = {0}; > @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd, > enum psr_mode mode, igt_output > (strstr(line, "PSR = yes") && > (strstr(line, "[0x03]") || strstr(line, > "[0x04]"))); > case PR_MODE: > - return strstr(line, "Panel Replay = yes"); > + return strstr(line, "Panel Replay = yes, Panel Replay > Selective Update = no"); > + case PR_MODE_SEL_FETCH: > + return strstr(line, "Panel Replay = yes, Panel Replay > Selective Update = yes"); > default: > igt_assert_f(false, "Invalid psr mode\n"); > return false; > @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd, > igt_output_t *output) > return false; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - ret = psr2_selective_fetch_check(debugfs_fd, output); > + ret = selective_fetch_check(debugfs_fd, output); > close(debugfs_fd); > > return ret; > @@ -343,7 +345,11 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd, > igt_output_t *output) > return ret; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - if (psr2_selective_fetch_check(debugfs_fd, output)) { > + if (selective_fetch_check(debugfs_fd, output)) { > + /* > + * With below we switch to PSR1 incase of PSR and > + * Panel Replay Full Frame update in case of Panel > Replay. > + */ > psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); > ret = true; > } > @@ -389,11 +395,13 @@ enum psr_mode psr_get_mode(int debugfs_fd, > igt_output_t *output) > > if (strstr(buf, "Panel Replay Enabled")) > return PR_MODE; > + else if (strstr(buf, "Panel Replay Selective Update > Enabled")) > + return PR_MODE_SEL_FETCH; > else if (strstr(buf, "PSR2 selective fetch: enabled")) > return PSR_MODE_2_SEL_FETCH; > - else if (strstr(buf, "PSR2 enabled")) > + else if (strstr(buf, "PSR2")) > return PSR_MODE_2; > - else if (strstr(buf, "PSR1 enabled")) > + else if (strstr(buf, "PSR1")) > return PSR_MODE_1; > > return PSR_DISABLED; > diff --git a/lib/igt_psr.h b/lib/igt_psr.h > index 372bef2b2..e8595fd8c 100644 > --- a/lib/igt_psr.h > +++ b/lib/igt_psr.h > @@ -46,7 +46,7 @@ enum fbc_mode { > }; > > bool psr_disabled_check(int debugfs_fd); > -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t > *output); > +bool selective_fetch_check(int debugfs_fd, igt_output_t *output); > bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t > *output); > bool psr_wait_update(int debugfs_fd, enum psr_mode mode, > igt_output_t *output); > bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, > igt_output_t *output); ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf 2024-02-19 16:33 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi 2024-02-19 16:33 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi 2024-02-19 16:33 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi @ 2024-02-19 16:33 ` Kunal Joshi 2024-02-20 9:06 ` Hogander, Jouni 2024-02-19 17:50 ` ✓ Fi.CI.BAT: success for extend psr2_sf test for pr_sf (rev6) Patchwork ` (2 subsequent siblings) 5 siblings, 1 reply; 17+ messages in thread From: Kunal Joshi @ 2024-02-19 16:33 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy Extend the tests to cover panel replay selective fetch feature. From kms_psr2_sf test point of view we have check_pr_psr2_sel_fetch_support function to check if PR/PSR2 selective fetch is supported for an output if output supports selective fetch then we check we if enter DEEP_SLEEP mode in run function v2: fixed dynamic test name v3: use check_psr2_support (Jouni) v4: correct order of checks in check_pr_psr2_sel_fetch_support (Jouni) use appropriate psr mode in psr_wait_entry (Jouni) v5: modify get_sel_fetch_mode_for_output to use member data (Jouni) Cc: Jouni Högander <jouni.hogander@intel.com> Cc: Animesh Manna <animesh.manna@intel.com> Cc: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> --- tests/intel/kms_psr2_sf.c | 191 +++++++++++++++++++++++++++----------- 1 file changed, 138 insertions(+), 53 deletions(-) diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c index 0fb300161..15046fd67 100644 --- a/tests/intel/kms_psr2_sf.c +++ b/tests/intel/kms_psr2_sf.c @@ -172,6 +172,7 @@ typedef struct { uint32_t screen_changes; int cur_x, cur_y; enum pipe pipe; + enum psr_mode psr_mode; enum { FEATURE_NONE = 0, FEATURE_DSC = 1, @@ -179,6 +171,39 @@ typedef struct { } coexist_feature; } data_t; +static bool get_sel_fetch_mode_for_output(data_t *data) +{ + bool supported = false; + + if (psr_sink_support(data->drm_fd, data->debugfs_fd, + PR_MODE_SEL_FETCH, data->output)) { + supported = true; + data->psr_mode = PR_MODE_SEL_FETCH; + } else if (psr_sink_support(data->drm_fd, data->debugfs_fd, + PSR_MODE_2, data->output)) { + supported = true; + data->psr_mode = PSR_MODE_2; + } else + igt_info("selective fetch not supported on output %s\n", data->output->name); + + return supported; +} + +static const char *get_psr_mode_str_for_output(data_t *data) +{ + static const char *psr_mode; + + if (get_sel_fetch_mode_for_output(data)) { + if (data->psr_mode == PSR_MODE_2) + psr_mode = "psr2"; + else if (data->psr_mode == PR_MODE_SEL_FETCH) + psr_mode = "pr"; + else + igt_assert_f(false, "Invalid psr mode\n"); + } + return psr_mode; +} + static const char *op_str(enum operations op) { static const char * const name[] = { @@ -688,7 +722,7 @@ static void damaged_plane_move(data_t *data) igt_display_commit2(&data->display, COMMIT_ATOMIC); - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); expected_output(data); } @@ -788,7 +822,7 @@ static void plane_move_continuous(data_t *data) { int target_x, target_y; - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); get_target_coords(data, &target_x, &target_y); @@ -865,7 +899,7 @@ static void damaged_plane_update(data_t *data) igt_plane_set_position(data->test_plane, 0, 0); igt_display_commit2(&data->display, COMMIT_ATOMIC); - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); expected_output(data); } @@ -874,7 +908,7 @@ static void run(data_t *data) { int i; - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); if (data->fbc_flag == true && data->op_fbc_mode == FBC_ENABLED) igt_assert_f(intel_fbc_wait_until_enabled(data->drm_fd, @@ -952,14 +986,22 @@ static void cleanup(data_t *data) igt_remove_fb(data->drm_fd, &data->fb_test); } -static int check_psr2_support(data_t *data) +static bool check_pr_psr2_sel_fetch_support(data_t *data) { - int status; + bool status = false; + + /* Check sink supports PR/PSR2 selective fetch */ + if (!get_sel_fetch_mode_for_output(data)) + return false; + + /* Check if selective fetch can be enabled */ + if (!selective_fetch_check(data->debugfs_fd, data->output)) + igt_assert("Selective fetch is not enabled even though panel should support it\n"); prepare(data); - status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL); + /* We enter into DEEP_SLEEP for both PSR2 and PR sel fetch */ + status = psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output); cleanup(data); - return status; } @@ -981,6 +1023,8 @@ pipe_output_combo_valid(igt_display_t *display, igt_main { + bool output_supports_pr_psr2_sel_fetch = false; + bool pr_psr2_sel_fetch_supported = false; data_t data = {}; igt_output_t *outputs[IGT_MAX_PIPES * IGT_MAX_PIPES]; int i, j, k, y; @@ -1000,11 +1044,6 @@ igt_main data.debugfs_fd = igt_debugfs_dir(data.drm_fd); kmstest_set_vt_graphics_mode(); - igt_require_f(psr_sink_support(data.drm_fd, - data.debugfs_fd, PSR_MODE_2, - NULL), - "Sink does not support PSR2\n"); - display_init(&data); if ((intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 20) && @@ -1028,7 +1067,8 @@ igt_main for_each_pipe_with_valid_output(&data.display, data.pipe, data.output) { coexist_features[n_pipes] = 0; - if (check_psr2_support(&data)) { + output_supports_pr_psr2_sel_fetch = check_pr_psr2_sel_fetch_support(&data); + if (output_supports_pr_psr2_sel_fetch) { pipes[n_pipes] = data.pipe; outputs[n_pipes] = data.output; @@ -1037,7 +1077,10 @@ igt_main n_pipes++; } + pr_psr2_sel_fetch_supported |= output_supports_pr_psr2_sel_fetch; } + igt_require_f(pr_psr2_sel_fetch_supported, + "No output supports selective fetch\n"); } for (y = 0; y < ARRAY_SIZE(fbc_status); y++) { @@ -1054,17 +1097,20 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_PRIMARY; data.coexist_feature = j; + igt_assert_f(get_sel_fetch_mode_for_output(&data), + "Invalid psr mode\n"); for (k = 1; k <= MAX_DAMAGE_AREAS; k++) { data.damage_area_count = k; prepare(&data); @@ -1087,18 +1133,21 @@ igt_main if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", + igt_dynamic_f("%s-pipe-%s-%s%s", + get_psr_mode_str_for_output(&data), kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_PRIMARY; data.coexist_feature = j; + igt_assert_f(get_sel_fetch_mode_for_output(&data), + "Invalid psr mode\n"); for (k = 1; k <= MAX_DAMAGE_AREAS; k++) { data.damage_area_count = k; prepare(&data); @@ -1119,17 +1168,20 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + igt_assert_f(get_sel_fetch_mode_for_output(&data), + "Invalid psr mode\n"); for (k = 1; k <= MAX_DAMAGE_AREAS; k++) { data.damage_area_count = k; prepare(&data); @@ -1149,17 +1201,20 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; + igt_assert_f(get_sel_fetch_mode_for_output(&data), + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1175,17 +1230,20 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; + igt_assert_f(get_sel_fetch_mode_for_output(&data), + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1202,17 +1260,20 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; + igt_assert_f(get_sel_fetch_mode_for_output(&data), + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1229,17 +1290,20 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; + igt_assert_f(get_sel_fetch_mode_for_output(&data), + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1257,17 +1321,21 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", + get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + igt_assert_f(get_sel_fetch_mode_for_output(&data), + "Invalid psr mode\n"); for (k = POS_TOP_LEFT; k <= POS_BOTTOM_RIGHT ; k++) { data.pos = k; prepare(&data); @@ -1286,17 +1354,20 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + igt_assert_f(get_sel_fetch_mode_for_output(&data), + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1313,17 +1384,20 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + igt_assert_f(get_sel_fetch_mode_for_output(&data), + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1340,17 +1414,20 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + igt_assert_f(get_sel_fetch_mode_for_output(&data), + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1368,19 +1445,22 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + get_psr_mode_str_for_output(&data), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; for (k = 1; k <= MAX_DAMAGE_AREAS; k++) { data.damage_area_count = k; data.test_plane_id = DRM_PLANE_TYPE_PRIMARY; data.coexist_feature = j; + igt_assert_f(get_sel_fetch_mode_for_output(&data), + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1401,15 +1481,16 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.damage_area_count = 1; if (data.op_fbc_mode == FBC_ENABLED) data.primary_format = DRM_FORMAT_XRGB8888; @@ -1417,6 +1498,8 @@ igt_main data.primary_format = DRM_FORMAT_NV12; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + igt_assert_f(get_sel_fetch_mode_for_output(&data), + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); -- 2.25.1 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf 2024-02-19 16:33 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi @ 2024-02-20 9:06 ` Hogander, Jouni 2024-02-21 8:54 ` Joshi, Kunal1 0 siblings, 1 reply; 17+ messages in thread From: Hogander, Jouni @ 2024-02-20 9:06 UTC (permalink / raw) To: Joshi, Kunal1, igt-dev@lists.freedesktop.org Cc: Murthy, Arun R, Manna, Animesh On Mon, 2024-02-19 at 22:03 +0530, Kunal Joshi wrote: > Extend the tests to cover panel replay selective fetch feature. > > From kms_psr2_sf test point of view we have > check_pr_psr2_sel_fetch_support > function to check if PR/PSR2 selective fetch is supported for an > output > if output supports selective fetch then we check we if enter > DEEP_SLEEP mode > in run function > > v2: fixed dynamic test name > v3: use check_psr2_support (Jouni) > v4: correct order of checks in check_pr_psr2_sel_fetch_support > (Jouni) > use appropriate psr mode in psr_wait_entry (Jouni) > v5: modify get_sel_fetch_mode_for_output to use member data (Jouni) > > Cc: Jouni Högander <jouni.hogander@intel.com> > Cc: Animesh Manna <animesh.manna@intel.com> > Cc: Arun R Murthy <arun.r.murthy@intel.com> > Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> > --- > tests/intel/kms_psr2_sf.c | 191 +++++++++++++++++++++++++++--------- > -- > 1 file changed, 138 insertions(+), 53 deletions(-) > > diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c > index 0fb300161..15046fd67 100644 > --- a/tests/intel/kms_psr2_sf.c > +++ b/tests/intel/kms_psr2_sf.c > @@ -172,6 +172,7 @@ typedef struct { > uint32_t screen_changes; > int cur_x, cur_y; > enum pipe pipe; > + enum psr_mode psr_mode; > enum { > FEATURE_NONE = 0, > FEATURE_DSC = 1, > @@ -179,6 +171,39 @@ typedef struct { > } coexist_feature; > } data_t; > > +static bool get_sel_fetch_mode_for_output(data_t *data) > +{ > + bool supported = false; > + > + if (psr_sink_support(data->drm_fd, data->debugfs_fd, > + PR_MODE_SEL_FETCH, > data->output)) { > + supported = true; > + data->psr_mode = PR_MODE_SEL_FETCH; > + } else if (psr_sink_support(data->drm_fd, data->debugfs_fd, > + PSR_MODE_2, > data->output)) { > + supported = true; > + data->psr_mode = PSR_MODE_2; > + } else > + igt_info("selective fetch not supported on output > %s\n", data->output->name); > + > + return supported; > +} > + > +static const char *get_psr_mode_str_for_output(data_t *data) > +{ > + static const char *psr_mode; If get_sel_fetch_mode_for_output returns false for some reason you will have something in psr_mode pointer. If you want to call get_sel_fetch_mode_for_output here I think you should use assert. Another option is to leave it to caller. I think that would be more clear solution. Currently code below works because it is called here. > + > + if (get_sel_fetch_mode_for_output(data)) { > + if (data->psr_mode == PSR_MODE_2) > + psr_mode = "psr2"; > + else if (data->psr_mode == PR_MODE_SEL_FETCH) > + psr_mode = "pr"; > + else > + igt_assert_f(false, "Invalid psr mode\n"); > + } > + return psr_mode; > +} > + > static const char *op_str(enum operations op) > { > static const char * const name[] = { > @@ -688,7 +722,7 @@ static void damaged_plane_move(data_t *data) > > igt_display_commit2(&data->display, COMMIT_ATOMIC); > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > expected_output(data); > } > @@ -788,7 +822,7 @@ static void plane_move_continuous(data_t *data) > { > int target_x, target_y; > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > get_target_coords(data, &target_x, &target_y); > > @@ -865,7 +899,7 @@ static void damaged_plane_update(data_t *data) > igt_plane_set_position(data->test_plane, 0, 0); > igt_display_commit2(&data->display, COMMIT_ATOMIC); > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > expected_output(data); > } > @@ -874,7 +908,7 @@ static void run(data_t *data) > { > int i; > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > if (data->fbc_flag == true && data->op_fbc_mode == > FBC_ENABLED) > igt_assert_f(intel_fbc_wait_until_enabled(data- > >drm_fd, > @@ -952,14 +986,22 @@ static void cleanup(data_t *data) > igt_remove_fb(data->drm_fd, &data->fb_test); > } > > -static int check_psr2_support(data_t *data) > +static bool check_pr_psr2_sel_fetch_support(data_t *data) > { > - int status; > + bool status = false; > + > + /* Check sink supports PR/PSR2 selective fetch */ > + if (!get_sel_fetch_mode_for_output(data)) > + return false; > + > + /* Check if selective fetch can be enabled */ > + if (!selective_fetch_check(data->debugfs_fd, data->output)) > + igt_assert("Selective fetch is not enabled even > though panel should support it\n"); > > prepare(data); > - status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL); > + /* We enter into DEEP_SLEEP for both PSR2 and PR sel fetch */ > + status = psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output); > cleanup(data); > - > return status; > } > > @@ -981,6 +1023,8 @@ pipe_output_combo_valid(igt_display_t *display, > > igt_main > { > + bool output_supports_pr_psr2_sel_fetch = false; > + bool pr_psr2_sel_fetch_supported = false; > data_t data = {}; > igt_output_t *outputs[IGT_MAX_PIPES * IGT_MAX_PIPES]; > int i, j, k, y; > @@ -1000,11 +1044,6 @@ igt_main > data.debugfs_fd = igt_debugfs_dir(data.drm_fd); > kmstest_set_vt_graphics_mode(); > > - igt_require_f(psr_sink_support(data.drm_fd, > - data.debugfs_fd, > PSR_MODE_2, > - NULL), > - "Sink does not support PSR2\n"); > - > display_init(&data); > > if > ((intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 20) && > @@ -1028,7 +1067,8 @@ igt_main > > for_each_pipe_with_valid_output(&data.display, > data.pipe, data.output) { > coexist_features[n_pipes] = 0; > - if (check_psr2_support(&data)) { > + output_supports_pr_psr2_sel_fetch = > check_pr_psr2_sel_fetch_support(&data); > + if (output_supports_pr_psr2_sel_fetch) { > pipes[n_pipes] = data.pipe; > outputs[n_pipes] = data.output; > > @@ -1037,7 +1077,10 @@ igt_main > > n_pipes++; > } > + pr_psr2_sel_fetch_supported |= > output_supports_pr_psr2_sel_fetch; > } > + igt_require_f(pr_psr2_sel_fetch_supported, > + "No output supports > selective fetch\n"); > } > > for (y = 0; y < ARRAY_SIZE(fbc_status); y++) { > @@ -1054,17 +1097,20 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), Here it is not clear that data->psr_mode is actually initialized by get_psr_mode_str_for_output(&data). On first glance it looks like just getter for some string. BR, Jouni Högander > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_PRIMARY; > data.coexist_feature > = j; > + igt_assert_f(get_sel_ > fetch_mode_for_output(&data), > + > "Invalid psr mode\n"); > for (k = 1; k <= > MAX_DAMAGE_AREAS; k++) { > data.damage_a > rea_count = k; > prepare(&data > ); > @@ -1087,18 +1133,21 @@ igt_main > if > (!pipe_output_combo_valid(&data.display, pipes[i], > > outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE > && !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe- > %s-%s%s", > + igt_dynamic_f("%s- > pipe-%s-%s%s", > + > get_psr_mode_str_for_output(&data), > > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = > pipes[i]; > - data.output = > outputs[i]; > data.test_pla > ne_id = DRM_PLANE_TYPE_PRIMARY; > data.coexist_ > feature = j; > + igt_assert_f( > get_sel_fetch_mode_for_output(&data), > + > "Invalid psr mode\n"); > for (k = 1; k > <= MAX_DAMAGE_AREAS; k++) { > data. > damage_area_count = k; > prepa > re(&data); > @@ -1119,17 +1168,20 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + igt_assert_f(get_sel_ > fetch_mode_for_output(&data), > + > "Invalid psr mode\n"); > for (k = 1; k <= > MAX_DAMAGE_AREAS; k++) { > data.damage_a > rea_count = k; > prepare(&data > ); > @@ -1149,17 +1201,20 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > + igt_assert_f(get_sel_ > fetch_mode_for_output(&data), > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1175,17 +1230,20 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > + igt_assert_f(get_sel_ > fetch_mode_for_output(&data), > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1202,17 +1260,20 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > + igt_assert_f(get_sel_ > fetch_mode_for_output(&data), > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1229,17 +1290,20 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > + igt_assert_f(get_sel_ > fetch_mode_for_output(&data), > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1257,17 +1321,21 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", > + > get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + igt_assert_f(get_sel_ > fetch_mode_for_output(&data), > + > "Invalid psr mode\n"); > for (k = > POS_TOP_LEFT; k <= POS_BOTTOM_RIGHT ; k++) { > data.pos = k; > prepare(&data > ); > @@ -1286,17 +1354,20 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature = j; > + igt_assert_f(get_sel_fetch_mo > de_for_output(&data), > + "Inva > lid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1313,17 +1384,20 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + igt_assert_f(get_sel_ > fetch_mode_for_output(&data), > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1340,17 +1414,20 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + igt_assert_f(get_sel_ > fetch_mode_for_output(&data), > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1368,19 +1445,22 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", kmstest_pipe_name(pipes[i]), > + > get_psr_mode_str_for_output(&data), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > for (k = 1; k <= > MAX_DAMAGE_AREAS; k++) { > data.damage_a > rea_count = k; > data.test_pla > ne_id = DRM_PLANE_TYPE_PRIMARY; > data.coexist_ > feature = j; > + igt_assert_f( > get_sel_fetch_mode_for_output(&data), > + > "Invalid psr mode\n"); > prepare(&data > ); > run(&data); > cleanup(&data > ); > @@ -1401,15 +1481,16 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.damage_area_coun > t = 1; > if (data.op_fbc_mode > == FBC_ENABLED) > data.primary_ > format = DRM_FORMAT_XRGB8888; > @@ -1417,6 +1498,8 @@ igt_main > data.primary_ > format = DRM_FORMAT_NV12; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + igt_assert_f(get_sel_ > fetch_mode_for_output(&data), > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf 2024-02-20 9:06 ` Hogander, Jouni @ 2024-02-21 8:54 ` Joshi, Kunal1 0 siblings, 0 replies; 17+ messages in thread From: Joshi, Kunal1 @ 2024-02-21 8:54 UTC (permalink / raw) To: Hogander, Jouni, igt-dev@lists.freedesktop.org Cc: Murthy, Arun R, Manna, Animesh Hello Jouni, On 2/20/2024 2:36 PM, Hogander, Jouni wrote: > On Mon, 2024-02-19 at 22:03 +0530, Kunal Joshi wrote: >> Extend the tests to cover panel replay selective fetch feature. >> >> From kms_psr2_sf test point of view we have >> check_pr_psr2_sel_fetch_support >> function to check if PR/PSR2 selective fetch is supported for an >> output >> if output supports selective fetch then we check we if enter >> DEEP_SLEEP mode >> in run function >> >> v2: fixed dynamic test name >> v3: use check_psr2_support (Jouni) >> v4: correct order of checks in check_pr_psr2_sel_fetch_support >> (Jouni) >> use appropriate psr mode in psr_wait_entry (Jouni) >> v5: modify get_sel_fetch_mode_for_output to use member data (Jouni) >> >> Cc: Jouni Högander <jouni.hogander@intel.com> >> Cc: Animesh Manna <animesh.manna@intel.com> >> Cc: Arun R Murthy <arun.r.murthy@intel.com> >> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> >> --- >> tests/intel/kms_psr2_sf.c | 191 +++++++++++++++++++++++++++--------- >> -- >> 1 file changed, 138 insertions(+), 53 deletions(-) >> >> diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c >> index 0fb300161..15046fd67 100644 >> --- a/tests/intel/kms_psr2_sf.c >> +++ b/tests/intel/kms_psr2_sf.c >> @@ -172,6 +172,7 @@ typedef struct { >> uint32_t screen_changes; >> int cur_x, cur_y; >> enum pipe pipe; >> + enum psr_mode psr_mode; >> enum { >> FEATURE_NONE = 0, >> FEATURE_DSC = 1, >> @@ -179,6 +171,39 @@ typedef struct { >> } coexist_feature; >> } data_t; >> >> +static bool get_sel_fetch_mode_for_output(data_t *data) >> +{ >> + bool supported = false; >> + >> + if (psr_sink_support(data->drm_fd, data->debugfs_fd, >> + PR_MODE_SEL_FETCH, >> data->output)) { >> + supported = true; >> + data->psr_mode = PR_MODE_SEL_FETCH; >> + } else if (psr_sink_support(data->drm_fd, data->debugfs_fd, >> + PSR_MODE_2, >> data->output)) { >> + supported = true; >> + data->psr_mode = PSR_MODE_2; >> + } else >> + igt_info("selective fetch not supported on output >> %s\n", data->output->name); >> + >> + return supported; >> +} >> + >> +static const char *get_psr_mode_str_for_output(data_t *data) >> +{ >> + static const char *psr_mode; > If get_sel_fetch_mode_for_output returns false for some reason you will > have something in psr_mode pointer. > > If you want to call get_sel_fetch_mode_for_output here I think you > should use assert. Another option is to leave it to caller. I think > that would be more clear solution. Currently code below works because > it is called here. > >> + >> + if (get_sel_fetch_mode_for_output(data)) { >> + if (data->psr_mode == PSR_MODE_2) >> + psr_mode = "psr2"; >> + else if (data->psr_mode == PR_MODE_SEL_FETCH) >> + psr_mode = "pr"; >> + else >> + igt_assert_f(false, "Invalid psr mode\n"); >> + } >> + return psr_mode; >> +} >> + >> static const char *op_str(enum operations op) >> { >> static const char * const name[] = { >> @@ -688,7 +722,7 @@ static void damaged_plane_move(data_t *data) >> >> igt_display_commit2(&data->display, COMMIT_ATOMIC); >> >> - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, >> NULL)); >> + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, >> data->output)); >> >> expected_output(data); >> } >> @@ -788,7 +822,7 @@ static void plane_move_continuous(data_t *data) >> { >> int target_x, target_y; >> >> - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, >> NULL)); >> + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, >> data->output)); >> >> get_target_coords(data, &target_x, &target_y); >> >> @@ -865,7 +899,7 @@ static void damaged_plane_update(data_t *data) >> igt_plane_set_position(data->test_plane, 0, 0); >> igt_display_commit2(&data->display, COMMIT_ATOMIC); >> >> - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, >> NULL)); >> + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, >> data->output)); >> >> expected_output(data); >> } >> @@ -874,7 +908,7 @@ static void run(data_t *data) >> { >> int i; >> >> - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, >> NULL)); >> + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, >> data->output)); >> >> if (data->fbc_flag == true && data->op_fbc_mode == >> FBC_ENABLED) >> igt_assert_f(intel_fbc_wait_until_enabled(data- >>> drm_fd, >> @@ -952,14 +986,22 @@ static void cleanup(data_t *data) >> igt_remove_fb(data->drm_fd, &data->fb_test); >> } >> >> -static int check_psr2_support(data_t *data) >> +static bool check_pr_psr2_sel_fetch_support(data_t *data) >> { >> - int status; >> + bool status = false; >> + >> + /* Check sink supports PR/PSR2 selective fetch */ >> + if (!get_sel_fetch_mode_for_output(data)) >> + return false; >> + >> + /* Check if selective fetch can be enabled */ >> + if (!selective_fetch_check(data->debugfs_fd, data->output)) >> + igt_assert("Selective fetch is not enabled even >> though panel should support it\n"); >> >> prepare(data); >> - status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL); >> + /* We enter into DEEP_SLEEP for both PSR2 and PR sel fetch */ >> + status = psr_wait_entry(data->debugfs_fd, data->psr_mode, >> data->output); >> cleanup(data); >> - >> return status; >> } >> >> @@ -981,6 +1023,8 @@ pipe_output_combo_valid(igt_display_t *display, >> >> igt_main >> { >> + bool output_supports_pr_psr2_sel_fetch = false; >> + bool pr_psr2_sel_fetch_supported = false; >> data_t data = {}; >> igt_output_t *outputs[IGT_MAX_PIPES * IGT_MAX_PIPES]; >> int i, j, k, y; >> @@ -1000,11 +1044,6 @@ igt_main >> data.debugfs_fd = igt_debugfs_dir(data.drm_fd); >> kmstest_set_vt_graphics_mode(); >> >> - igt_require_f(psr_sink_support(data.drm_fd, >> - data.debugfs_fd, >> PSR_MODE_2, >> - NULL), >> - "Sink does not support PSR2\n"); >> - >> display_init(&data); >> >> if >> ((intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 20) && >> @@ -1028,7 +1067,8 @@ igt_main >> >> for_each_pipe_with_valid_output(&data.display, >> data.pipe, data.output) { >> coexist_features[n_pipes] = 0; >> - if (check_psr2_support(&data)) { >> + output_supports_pr_psr2_sel_fetch = >> check_pr_psr2_sel_fetch_support(&data); >> + if (output_supports_pr_psr2_sel_fetch) { >> pipes[n_pipes] = data.pipe; >> outputs[n_pipes] = data.output; >> >> @@ -1037,7 +1077,10 @@ igt_main >> >> n_pipes++; >> } >> + pr_psr2_sel_fetch_supported |= >> output_supports_pr_psr2_sel_fetch; >> } >> + igt_require_f(pr_psr2_sel_fetch_supported, >> + "No output supports >> selective fetch\n"); >> } >> >> for (y = 0; y < ARRAY_SIZE(fbc_status); y++) { >> @@ -1054,17 +1097,20 @@ igt_main >> for (i = 0; i < n_pipes; i++) { >> if >> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) >> continue; >> + data.pipe = pipes[i]; >> + data.output = outputs[i]; >> >> for (j = FEATURE_NONE; j < >> FEATURE_COUNT; j++) { >> if (j != FEATURE_NONE && >> !(coexist_features[i] & j)) >> continue; >> - igt_dynamic_f("pipe-%s-%s%s", >> kmstest_pipe_name(pipes[i]), >> + igt_dynamic_f("%s-pipe-%s- >> %s%s", get_psr_mode_str_for_output(&data), > Here it is not clear that data->psr_mode is actually initialized by > get_psr_mode_str_for_output(&data). On first glance it looks like just > getter for some string. > > BR, > > Jouni Högander Thanks for reviewing this series :) Have sent new revision address comments. Regards Kunal Joshi > >> + >> kmstest_pipe_name(pipes[i]), >> >> igt_output_name(outputs[i]), >> >> coexist_feature_str(j)) { >> - data.pipe = pipes[i]; >> - data.output = >> outputs[i]; >> data.test_plane_id = >> DRM_PLANE_TYPE_PRIMARY; >> data.coexist_feature >> = j; >> + igt_assert_f(get_sel_ >> fetch_mode_for_output(&data), >> + >> "Invalid psr mode\n"); >> for (k = 1; k <= >> MAX_DAMAGE_AREAS; k++) { >> data.damage_a >> rea_count = k; >> prepare(&data >> ); >> @@ -1087,18 +1133,21 @@ igt_main >> if >> (!pipe_output_combo_valid(&data.display, pipes[i], >> >> outputs[i])) >> continue; >> + data.pipe = pipes[i]; >> + data.output = outputs[i]; >> >> for (j = FEATURE_NONE; j < >> FEATURE_COUNT; j++) { >> if (j != FEATURE_NONE >> && !(coexist_features[i] & j)) >> continue; >> - igt_dynamic_f("pipe- >> %s-%s%s", >> + igt_dynamic_f("%s- >> pipe-%s-%s%s", >> + >> get_psr_mode_str_for_output(&data), >> >> kmstest_pipe_name(pipes[i]), >> >> igt_output_name(outputs[i]), >> >> coexist_feature_str(j)) { >> - data.pipe = >> pipes[i]; >> - data.output = >> outputs[i]; >> data.test_pla >> ne_id = DRM_PLANE_TYPE_PRIMARY; >> data.coexist_ >> feature = j; >> + igt_assert_f( >> get_sel_fetch_mode_for_output(&data), >> + >> "Invalid psr mode\n"); >> for (k = 1; k >> <= MAX_DAMAGE_AREAS; k++) { >> data. >> damage_area_count = k; >> prepa >> re(&data); >> @@ -1119,17 +1168,20 @@ igt_main >> for (i = 0; i < n_pipes; i++) { >> if >> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) >> continue; >> + data.pipe = pipes[i]; >> + data.output = outputs[i]; >> >> for (j = FEATURE_NONE; j < >> FEATURE_COUNT; j++) { >> if (j != FEATURE_NONE && >> !(coexist_features[i] & j)) >> continue; >> - igt_dynamic_f("pipe-%s-%s%s", >> kmstest_pipe_name(pipes[i]), >> + igt_dynamic_f("%s-pipe-%s- >> %s%s", get_psr_mode_str_for_output(&data), >> + >> kmstest_pipe_name(pipes[i]), >> >> igt_output_name(outputs[i]), >> >> coexist_feature_str(j)) { >> - data.pipe = pipes[i]; >> - data.output = >> outputs[i]; >> data.test_plane_id = >> DRM_PLANE_TYPE_OVERLAY; >> data.coexist_feature >> = j; >> + igt_assert_f(get_sel_ >> fetch_mode_for_output(&data), >> + >> "Invalid psr mode\n"); >> for (k = 1; k <= >> MAX_DAMAGE_AREAS; k++) { >> data.damage_a >> rea_count = k; >> prepare(&data >> ); >> @@ -1149,17 +1201,20 @@ igt_main >> for (i = 0; i < n_pipes; i++) { >> if >> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) >> continue; >> + data.pipe = pipes[i]; >> + data.output = outputs[i]; >> >> for (j = FEATURE_NONE; j < >> FEATURE_COUNT; j++) { >> if (j != FEATURE_NONE && >> !(coexist_features[i] & j)) >> continue; >> - igt_dynamic_f("pipe-%s-%s%s", >> kmstest_pipe_name(pipes[i]), >> + igt_dynamic_f("%s-pipe-%s- >> %s%s", get_psr_mode_str_for_output(&data), >> + >> kmstest_pipe_name(pipes[i]), >> >> igt_output_name(outputs[i]), >> >> coexist_feature_str(j)) { >> - data.pipe = pipes[i]; >> - data.output = >> outputs[i]; >> data.test_plane_id = >> DRM_PLANE_TYPE_CURSOR; >> data.coexist_feature >> = j; >> + igt_assert_f(get_sel_ >> fetch_mode_for_output(&data), >> + >> "Invalid psr mode\n"); >> prepare(&data); >> run(&data); >> cleanup(&data); >> @@ -1175,17 +1230,20 @@ igt_main >> for (i = 0; i < n_pipes; i++) { >> if >> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) >> continue; >> + data.pipe = pipes[i]; >> + data.output = outputs[i]; >> >> for (j = FEATURE_NONE; j < >> FEATURE_COUNT; j++) { >> if (j != FEATURE_NONE && >> !(coexist_features[i] & j)) >> continue; >> - igt_dynamic_f("pipe-%s-%s%s", >> kmstest_pipe_name(pipes[i]), >> + igt_dynamic_f("%s-pipe-%s- >> %s%s", get_psr_mode_str_for_output(&data), >> + >> kmstest_pipe_name(pipes[i]), >> >> igt_output_name(outputs[i]), >> >> coexist_feature_str(j)) { >> - data.pipe = pipes[i]; >> - data.output = >> outputs[i]; >> data.test_plane_id = >> DRM_PLANE_TYPE_CURSOR; >> data.coexist_feature >> = j; >> + igt_assert_f(get_sel_ >> fetch_mode_for_output(&data), >> + >> "Invalid psr mode\n"); >> prepare(&data); >> run(&data); >> cleanup(&data); >> @@ -1202,17 +1260,20 @@ igt_main >> for (i = 0; i < n_pipes; i++) { >> if >> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) >> continue; >> + data.pipe = pipes[i]; >> + data.output = outputs[i]; >> >> for (j = FEATURE_NONE; j < >> FEATURE_COUNT; j++) { >> if (j != FEATURE_NONE && >> !(coexist_features[i] & j)) >> continue; >> - igt_dynamic_f("pipe-%s-%s%s", >> kmstest_pipe_name(pipes[i]), >> + igt_dynamic_f("%s-pipe-%s- >> %s%s", get_psr_mode_str_for_output(&data), >> + >> kmstest_pipe_name(pipes[i]), >> >> igt_output_name(outputs[i]), >> >> coexist_feature_str(j)) { >> - data.pipe = pipes[i]; >> - data.output = >> outputs[i]; >> data.test_plane_id = >> DRM_PLANE_TYPE_CURSOR; >> data.coexist_feature >> = j; >> + igt_assert_f(get_sel_ >> fetch_mode_for_output(&data), >> + >> "Invalid psr mode\n"); >> prepare(&data); >> run(&data); >> cleanup(&data); >> @@ -1229,17 +1290,20 @@ igt_main >> for (i = 0; i < n_pipes; i++) { >> if >> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) >> continue; >> + data.pipe = pipes[i]; >> + data.output = outputs[i]; >> >> for (j = FEATURE_NONE; j < >> FEATURE_COUNT; j++) { >> if (j != FEATURE_NONE && >> !(coexist_features[i] & j)) >> continue; >> - igt_dynamic_f("pipe-%s-%s%s", >> kmstest_pipe_name(pipes[i]), >> + igt_dynamic_f("%s-pipe-%s- >> %s%s", get_psr_mode_str_for_output(&data), >> + >> kmstest_pipe_name(pipes[i]), >> >> igt_output_name(outputs[i]), >> >> coexist_feature_str(j)) { >> - data.pipe = pipes[i]; >> - data.output = >> outputs[i]; >> data.test_plane_id = >> DRM_PLANE_TYPE_CURSOR; >> data.coexist_feature >> = j; >> + igt_assert_f(get_sel_ >> fetch_mode_for_output(&data), >> + >> "Invalid psr mode\n"); >> prepare(&data); >> run(&data); >> cleanup(&data); >> @@ -1257,17 +1321,21 @@ igt_main >> for (i = 0; i < n_pipes; i++) { >> if >> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) >> continue; >> + data.pipe = pipes[i]; >> + data.output = outputs[i]; >> >> for (j = FEATURE_NONE; j < >> FEATURE_COUNT; j++) { >> if (j != FEATURE_NONE && >> !(coexist_features[i] & j)) >> continue; >> - igt_dynamic_f("pipe-%s-%s%s", >> kmstest_pipe_name(pipes[i]), >> + igt_dynamic_f("%s-pipe-%s- >> %s%s", >> + >> get_psr_mode_str_for_output(&data), >> + >> kmstest_pipe_name(pipes[i]), >> >> igt_output_name(outputs[i]), >> >> coexist_feature_str(j)) { >> - data.pipe = pipes[i]; >> - data.output = >> outputs[i]; >> data.test_plane_id = >> DRM_PLANE_TYPE_OVERLAY; >> data.coexist_feature >> = j; >> + igt_assert_f(get_sel_ >> fetch_mode_for_output(&data), >> + >> "Invalid psr mode\n"); >> for (k = >> POS_TOP_LEFT; k <= POS_BOTTOM_RIGHT ; k++) { >> data.pos = k; >> prepare(&data >> ); >> @@ -1286,17 +1354,20 @@ igt_main >> �� for (i = 0; i < n_pipes; i++) { >> if >> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) >> continue; >> + data.pipe = pipes[i]; >> + data.output = outputs[i]; >> >> for (j = FEATURE_NONE; j < >> FEATURE_COUNT; j++) { >> if (j != FEATURE_NONE && >> !(coexist_features[i] & j)) >> continue; >> - igt_dynamic_f("pipe-%s-%s%s", >> kmstest_pipe_name(pipes[i]), >> + igt_dynamic_f("%s-pipe-%s- >> %s%s", get_psr_mode_str_for_output(&data), >> + >> kmstest_pipe_name(pipes[i]), >> >> igt_output_name(outputs[i]), >> >> coexist_feature_str(j)) { >> - data.pipe = pipes[i]; >> - data.output = outputs[i]; >> data.test_plane_id = >> DRM_PLANE_TYPE_OVERLAY; >> data.coexist_feature = j; >> + igt_assert_f(get_sel_fetch_mo >> de_for_output(&data), >> + "Inva >> lid psr mode\n"); >> prepare(&data); >> run(&data); >> cleanup(&data); >> @@ -1313,17 +1384,20 @@ igt_main >> for (i = 0; i < n_pipes; i++) { >> if >> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) >> continue; >> + data.pipe = pipes[i]; >> + data.output = outputs[i]; >> >> for (j = FEATURE_NONE; j < >> FEATURE_COUNT; j++) { >> if (j != FEATURE_NONE && >> !(coexist_features[i] & j)) >> continue; >> - igt_dynamic_f("pipe-%s-%s%s", >> kmstest_pipe_name(pipes[i]), >> + igt_dynamic_f("%s-pipe-%s- >> %s%s", get_psr_mode_str_for_output(&data), >> + >> kmstest_pipe_name(pipes[i]), >> >> igt_output_name(outputs[i]), >> >> coexist_feature_str(j)) { >> - data.pipe = pipes[i]; >> - data.output = >> outputs[i]; >> data.test_plane_id = >> DRM_PLANE_TYPE_OVERLAY; >> data.coexist_feature >> = j; >> + igt_assert_f(get_sel_ >> fetch_mode_for_output(&data), >> + >> "Invalid psr mode\n"); >> prepare(&data); >> run(&data); >> cleanup(&data); >> @@ -1340,17 +1414,20 @@ igt_main >> for (i = 0; i < n_pipes; i++) { >> if >> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) >> continue; >> + data.pipe = pipes[i]; >> + data.output = outputs[i]; >> >> for (j = FEATURE_NONE; j < >> FEATURE_COUNT; j++) { >> if (j != FEATURE_NONE && >> !(coexist_features[i] & j)) >> continue; >> - igt_dynamic_f("pipe-%s-%s%s", >> kmstest_pipe_name(pipes[i]), >> + igt_dynamic_f("%s-pipe-%s- >> %s%s", get_psr_mode_str_for_output(&data), >> + >> kmstest_pipe_name(pipes[i]), >> >> igt_output_name(outputs[i]), >> >> coexist_feature_str(j)) { >> - data.pipe = pipes[i]; >> - data.output = >> outputs[i]; >> data.test_plane_id = >> DRM_PLANE_TYPE_OVERLAY; >> data.coexist_feature >> = j; >> + igt_assert_f(get_sel_ >> fetch_mode_for_output(&data), >> + >> "Invalid psr mode\n"); >> prepare(&data); >> run(&data); >> cleanup(&data); >> @@ -1368,19 +1445,22 @@ igt_main >> for (i = 0; i < n_pipes; i++) { >> if >> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) >> continue; >> + data.pipe = pipes[i]; >> + data.output = outputs[i]; >> >> for (j = FEATURE_NONE; j < >> FEATURE_COUNT; j++) { >> if (j != FEATURE_NONE && >> !(coexist_features[i] & j)) >> continue; >> - igt_dynamic_f("pipe-%s-%s%s", >> kmstest_pipe_name(pipes[i]), >> + igt_dynamic_f("%s-pipe-%s- >> %s%s", kmstest_pipe_name(pipes[i]), >> + >> get_psr_mode_str_for_output(&data), >> >> igt_output_name(outputs[i]), >> >> coexist_feature_str(j)) { >> - data.pipe = pipes[i]; >> - data.output = >> outputs[i]; >> for (k = 1; k <= >> MAX_DAMAGE_AREAS; k++) { >> data.damage_a >> rea_count = k; >> data.test_pla >> ne_id = DRM_PLANE_TYPE_PRIMARY; >> data.coexist_ >> feature = j; >> + igt_assert_f( >> get_sel_fetch_mode_for_output(&data), >> + >> "Invalid psr mode\n"); >> prepare(&data >> ); >> run(&data); >> cleanup(&data >> ); >> @@ -1401,15 +1481,16 @@ igt_main >> for (i = 0; i < n_pipes; i++) { >> if >> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) >> continue; >> + data.pipe = pipes[i]; >> + data.output = outputs[i]; >> >> for (j = FEATURE_NONE; j < >> FEATURE_COUNT; j++) { >> if (j != FEATURE_NONE && >> !(coexist_features[i] & j)) >> continue; >> - igt_dynamic_f("pipe-%s-%s%s", >> kmstest_pipe_name(pipes[i]), >> + igt_dynamic_f("%s-pipe-%s- >> %s%s", get_psr_mode_str_for_output(&data), >> + >> kmstest_pipe_name(pipes[i]), >> >> igt_output_name(outputs[i]), >> >> coexist_feature_str(j)) { >> - data.pipe = pipes[i]; >> - data.output = >> outputs[i]; >> data.damage_area_coun >> t = 1; >> if (data.op_fbc_mode >> == FBC_ENABLED) >> data.primary_ >> format = DRM_FORMAT_XRGB8888; >> @@ -1417,6 +1498,8 @@ igt_main >> data.primary_ >> format = DRM_FORMAT_NV12; >> data.test_plane_id = >> DRM_PLANE_TYPE_OVERLAY; >> data.coexist_feature >> = j; >> + igt_assert_f(get_sel_ >> fetch_mode_for_output(&data), >> + >> "Invalid psr mode\n"); >> prepare(&data); >> run(&data); >> cleanup(&data); ^ permalink raw reply [flat|nested] 17+ messages in thread
* ✓ Fi.CI.BAT: success for extend psr2_sf test for pr_sf (rev6) 2024-02-19 16:33 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi ` (2 preceding siblings ...) 2024-02-19 16:33 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi @ 2024-02-19 17:50 ` Patchwork 2024-02-19 17:57 ` ✗ CI.xeBAT: failure " Patchwork 2024-02-19 23:45 ` ✗ Fi.CI.IGT: " Patchwork 5 siblings, 0 replies; 17+ messages in thread From: Patchwork @ 2024-02-19 17:50 UTC (permalink / raw) To: Kunal Joshi; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 1881 bytes --] == Series Details == Series: extend psr2_sf test for pr_sf (rev6) URL : https://patchwork.freedesktop.org/series/129004/ State : success == Summary == CI Bug Log - changes from IGT_7717 -> IGTPW_10696 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/index.html Participating hosts (37 -> 34) ------------------------------ Missing (3): bat-mtlp-8 fi-cfl-8109u fi-snb-2520m Known issues ------------ Here are the changes found in IGTPW_10696 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_selftest@live@execlists: - fi-bsw-nick: [PASS][1] -> [ABORT][2] ([i915#7911]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/fi-bsw-nick/igt@i915_selftest@live@execlists.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/fi-bsw-nick/igt@i915_selftest@live@execlists.html #### Possible fixes #### * igt@i915_pm_rpm@module-reload: - fi-kbl-7567u: [CRASH][3] ([i915#9947]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/fi-kbl-7567u/igt@i915_pm_rpm@module-reload.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/fi-kbl-7567u/igt@i915_pm_rpm@module-reload.html [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911 [i915#9947]: https://gitlab.freedesktop.org/drm/intel/issues/9947 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_7717 -> IGTPW_10696 CI-20190529: 20190529 CI_DRM_14296: f12bce6493b6443870b55f36b1462d65e450d29d @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_10696: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/index.html IGT_7717: 7717 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/index.html [-- Attachment #2: Type: text/html, Size: 2494 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ CI.xeBAT: failure for extend psr2_sf test for pr_sf (rev6) 2024-02-19 16:33 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi ` (3 preceding siblings ...) 2024-02-19 17:50 ` ✓ Fi.CI.BAT: success for extend psr2_sf test for pr_sf (rev6) Patchwork @ 2024-02-19 17:57 ` Patchwork 2024-02-19 23:45 ` ✗ Fi.CI.IGT: " Patchwork 5 siblings, 0 replies; 17+ messages in thread From: Patchwork @ 2024-02-19 17:57 UTC (permalink / raw) To: Kunal Joshi; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 2295 bytes --] == Series Details == Series: extend psr2_sf test for pr_sf (rev6) URL : https://patchwork.freedesktop.org/series/129004/ State : failure == Summary == CI Bug Log - changes from XEIGT_7717_BAT -> XEIGTPW_10696_BAT ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with XEIGTPW_10696_BAT absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in XEIGTPW_10696_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (4 -> 4) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in XEIGTPW_10696_BAT: ### IGT changes ### #### Possible regressions #### * igt@xe_evict@evict-beng-mixed-threads-small-multi-vm: - bat-dg2-oem2: [PASS][1] -> [TIMEOUT][2] [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7717/bat-dg2-oem2/igt@xe_evict@evict-beng-mixed-threads-small-multi-vm.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10696/bat-dg2-oem2/igt@xe_evict@evict-beng-mixed-threads-small-multi-vm.html Known issues ------------ Here are the changes found in XEIGTPW_10696_BAT that come from known issues: ### IGT changes ### #### Possible fixes #### * igt@xe_exec_threads@threads-mixed-shared-vm-basic: - bat-pvc-2: [DMESG-WARN][3] ([Intel XE#1238]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7717/bat-pvc-2/igt@xe_exec_threads@threads-mixed-shared-vm-basic.html [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10696/bat-pvc-2/igt@xe_exec_threads@threads-mixed-shared-vm-basic.html [Intel XE#1238]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1238 Build changes ------------- * IGT: IGT_7717 -> IGTPW_10696 IGTPW_10696: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/index.html IGT_7717: 7717 xe-803-f12bce6493b6443870b55f36b1462d65e450d29d: f12bce6493b6443870b55f36b1462d65e450d29d == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10696/index.html [-- Attachment #2: Type: text/html, Size: 2898 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.IGT: failure for extend psr2_sf test for pr_sf (rev6) 2024-02-19 16:33 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi ` (4 preceding siblings ...) 2024-02-19 17:57 ` ✗ CI.xeBAT: failure " Patchwork @ 2024-02-19 23:45 ` Patchwork 5 siblings, 0 replies; 17+ messages in thread From: Patchwork @ 2024-02-19 23:45 UTC (permalink / raw) To: Kunal Joshi; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 100255 bytes --] == Series Details == Series: extend psr2_sf test for pr_sf (rev6) URL : https://patchwork.freedesktop.org/series/129004/ State : failure == Summary == CI Bug Log - changes from IGT_7717_full -> IGTPW_10696_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_10696_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_10696_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/index.html Participating hosts (8 -> 8) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_10696_full: ### IGT changes ### #### Possible regressions #### * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode: - shard-dg1: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-dg1-18/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-15/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode.html * {igt@kms_psr2_sf@fbc-primary-plane-update-sf-dmg-area@psr2-pipe-a-edp-1} (NEW): - shard-mtlp: NOTRUN -> [SKIP][3] +23 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-1/igt@kms_psr2_sf@fbc-primary-plane-update-sf-dmg-area@psr2-pipe-a-edp-1.html #### Warnings #### * igt@kms_async_flips@test-cursor: - shard-mtlp: [SKIP][4] ([i915#6229]) -> [SKIP][5] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-mtlp-7/igt@kms_async_flips@test-cursor.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-4/igt@kms_async_flips@test-cursor.html New tests --------- New tests have been introduced between IGT_7717_full and IGTPW_10696_full: ### New IGT tests (50) ### * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [11.83] s * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [11.85] s * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [11.51] s * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [11.49] s * igt@kms_psr2_sf@cursor-plane-move-continuous-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [11.15] s * igt@kms_psr2_sf@cursor-plane-move-continuous-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [11.19] s * igt@kms_psr2_sf@cursor-plane-update-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [1.36] s * igt@kms_psr2_sf@cursor-plane-update-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [1.40] s * igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-fully-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.87] s * igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-fully-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.21] s * igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.89] s * igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.22] s * igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.86] s * igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.21] s * igt@kms_psr2_sf@fbc-cursor-plane-update-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.83] s * igt@kms_psr2_sf@fbc-cursor-plane-update-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.22] s * igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-fully-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.88] s * igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-fully-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.21] s * igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.83] s * igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.21] s * igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.83] s * igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.21] s * igt@kms_psr2_sf@fbc-overlay-plane-update-continuous-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.85] s * igt@kms_psr2_sf@fbc-overlay-plane-update-continuous-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.21] s * igt@kms_psr2_sf@fbc-overlay-plane-update-sf-dmg-area@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.83] s * igt@kms_psr2_sf@fbc-overlay-plane-update-sf-dmg-area@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.21] s * igt@kms_psr2_sf@fbc-overlay-primary-update-sf-dmg-area@a-pipe-psr2-edp-1: - Statuses : 1 skip(s) - Exec time: [0.83] s * igt@kms_psr2_sf@fbc-overlay-primary-update-sf-dmg-area@b-pipe-psr2-edp-1: - Statuses : 1 skip(s) - Exec time: [1.26] s * igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.83] s * igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.22] s * igt@kms_psr2_sf@fbc-primary-plane-update-sf-dmg-area@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.84] s * igt@kms_psr2_sf@fbc-primary-plane-update-sf-dmg-area@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.27] s * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [17.28] s * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [17.27] s * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [12.10] s * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [12.09] s * igt@kms_psr2_sf@overlay-plane-move-continuous-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [6.81] s * igt@kms_psr2_sf@overlay-plane-move-continuous-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [6.78] s * igt@kms_psr2_sf@overlay-plane-update-continuous-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [1.83] s * igt@kms_psr2_sf@overlay-plane-update-continuous-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [1.82] s * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [6.80] s * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [6.81] s * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area@a-pipe-psr2-edp-1: - Statuses : 1 pass(s) - Exec time: [6.83] s * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area@b-pipe-psr2-edp-1: - Statuses : 1 pass(s) - Exec time: [6.84] s * igt@kms_psr2_sf@plane-move-sf-dmg-area@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [5.47] s * igt@kms_psr2_sf@plane-move-sf-dmg-area@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [5.46] s * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [7.46] s * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [7.39] s * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [6.86] s * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [6.82] s Known issues ------------ Here are the changes found in IGTPW_10696_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@api_intel_bb@blit-reloc-purge-cache: - shard-mtlp: NOTRUN -> [SKIP][6] ([i915#8411]) +1 other test skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-7/igt@api_intel_bb@blit-reloc-purge-cache.html * igt@api_intel_bb@object-reloc-keep-cache: - shard-rkl: NOTRUN -> [SKIP][7] ([i915#8411]) +1 other test skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@api_intel_bb@object-reloc-keep-cache.html * igt@api_intel_bb@object-reloc-purge-cache: - shard-dg2: NOTRUN -> [SKIP][8] ([i915#8411]) +1 other test skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@api_intel_bb@object-reloc-purge-cache.html * igt@device_reset@unbind-cold-reset-rebind: - shard-tglu: NOTRUN -> [SKIP][9] ([i915#7701]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-3/igt@device_reset@unbind-cold-reset-rebind.html * igt@drm_fdinfo@virtual-busy: - shard-mtlp: NOTRUN -> [SKIP][10] ([i915#8414]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-7/igt@drm_fdinfo@virtual-busy.html * igt@drm_fdinfo@virtual-busy-all: - shard-dg2: NOTRUN -> [SKIP][11] ([i915#8414]) +12 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@drm_fdinfo@virtual-busy-all.html * igt@gem_busy@semaphore: - shard-dg2: NOTRUN -> [SKIP][12] ([i915#3936]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@gem_busy@semaphore.html * igt@gem_ccs@block-copy-compressed: - shard-rkl: NOTRUN -> [SKIP][13] ([i915#3555] / [i915#9323]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-3/igt@gem_ccs@block-copy-compressed.html * igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0: - shard-dg2: NOTRUN -> [INCOMPLETE][14] ([i915#10137] / [i915#7297]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0.html * igt@gem_create@create-ext-cpu-access-big: - shard-rkl: NOTRUN -> [SKIP][15] ([i915#6335]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@gem_create@create-ext-cpu-access-big.html * igt@gem_create@create-ext-set-pat: - shard-dg2: NOTRUN -> [SKIP][16] ([i915#8562]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-6/igt@gem_create@create-ext-set-pat.html * igt@gem_ctx_exec@basic-nohangcheck: - shard-rkl: [PASS][17] -> [FAIL][18] ([i915#6268]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-rkl-4/igt@gem_ctx_exec@basic-nohangcheck.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@gem_ctx_exec@basic-nohangcheck.html * igt@gem_ctx_param@set-priority-not-supported: - shard-mtlp: NOTRUN -> [SKIP][19] ([fdo#109314]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-5/igt@gem_ctx_param@set-priority-not-supported.html - shard-dg2: NOTRUN -> [SKIP][20] ([fdo#109314]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@gem_ctx_param@set-priority-not-supported.html - shard-rkl: NOTRUN -> [SKIP][21] ([fdo#109314]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-5/igt@gem_ctx_param@set-priority-not-supported.html * igt@gem_ctx_persistence@heartbeat-hostile: - shard-dg1: NOTRUN -> [SKIP][22] ([i915#8555]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-15/igt@gem_ctx_persistence@heartbeat-hostile.html * igt@gem_ctx_sseu@engines: - shard-rkl: NOTRUN -> [SKIP][23] ([i915#280]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-4/igt@gem_ctx_sseu@engines.html * igt@gem_eio@hibernate: - shard-rkl: NOTRUN -> [ABORT][24] ([i915#7975] / [i915#8213]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-3/igt@gem_eio@hibernate.html * igt@gem_eio@reset-stress: - shard-dg2: [PASS][25] -> [FAIL][26] ([i915#5784]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-dg2-1/igt@gem_eio@reset-stress.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@gem_eio@reset-stress.html * igt@gem_exec_balancer@bonded-pair: - shard-mtlp: NOTRUN -> [SKIP][27] ([i915#4771]) +1 other test skip [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-4/igt@gem_exec_balancer@bonded-pair.html * igt@gem_exec_balancer@bonded-sync: - shard-dg2: NOTRUN -> [SKIP][28] ([i915#4771]) +1 other test skip [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-6/igt@gem_exec_balancer@bonded-sync.html * igt@gem_exec_balancer@invalid-bonds: - shard-mtlp: NOTRUN -> [SKIP][29] ([i915#4036]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-6/igt@gem_exec_balancer@invalid-bonds.html * igt@gem_exec_balancer@noheartbeat: - shard-dg2: NOTRUN -> [SKIP][30] ([i915#8555]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@gem_exec_balancer@noheartbeat.html * igt@gem_exec_capture@capture-recoverable: - shard-rkl: NOTRUN -> [SKIP][31] ([i915#6344]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@gem_exec_capture@capture-recoverable.html * igt@gem_exec_capture@many-4k-incremental: - shard-mtlp: NOTRUN -> [FAIL][32] ([i915#9606]) [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-2/igt@gem_exec_capture@many-4k-incremental.html * igt@gem_exec_fair@basic-none-solo@rcs0: - shard-tglu: NOTRUN -> [FAIL][33] ([i915#2842]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-5/igt@gem_exec_fair@basic-none-solo@rcs0.html * igt@gem_exec_fair@basic-pace: - shard-dg1: NOTRUN -> [SKIP][34] ([i915#3539]) [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-13/igt@gem_exec_fair@basic-pace.html * igt@gem_exec_fair@basic-pace-share: - shard-mtlp: NOTRUN -> [SKIP][35] ([i915#4473] / [i915#4771]) +1 other test skip [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-1/igt@gem_exec_fair@basic-pace-share.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [PASS][36] -> [FAIL][37] ([i915#2842]) [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-glk3/igt@gem_exec_fair@basic-pace-share@rcs0.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-tglu: [PASS][38] -> [FAIL][39] ([i915#2842]) [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-tglu-7/igt@gem_exec_fair@basic-pace@rcs0.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-10/igt@gem_exec_fair@basic-pace@rcs0.html * igt@gem_exec_fair@basic-throttle: - shard-dg2: NOTRUN -> [SKIP][40] ([i915#3539]) +2 other tests skip [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@gem_exec_fair@basic-throttle.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-rkl: NOTRUN -> [FAIL][41] ([i915#2842]) +1 other test fail [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@gem_exec_fair@basic-throttle@rcs0.html * igt@gem_exec_fence@submit67: - shard-dg2: NOTRUN -> [SKIP][42] ([i915#4812]) +1 other test skip [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@gem_exec_fence@submit67.html * igt@gem_exec_flush@basic-uc-ro-default: - shard-dg2: NOTRUN -> [SKIP][43] ([i915#3539] / [i915#4852]) +3 other tests skip [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@gem_exec_flush@basic-uc-ro-default.html * igt@gem_exec_flush@basic-wb-ro-default: - shard-dg1: NOTRUN -> [SKIP][44] ([i915#3539] / [i915#4852]) [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-17/igt@gem_exec_flush@basic-wb-ro-default.html * igt@gem_exec_params@secure-non-root: - shard-dg2: NOTRUN -> [SKIP][45] ([fdo#112283]) +1 other test skip [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@gem_exec_params@secure-non-root.html * igt@gem_exec_reloc@basic-gtt: - shard-dg2: NOTRUN -> [SKIP][46] ([i915#3281]) +10 other tests skip [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@gem_exec_reloc@basic-gtt.html * igt@gem_exec_reloc@basic-gtt-read-active: - shard-dg1: NOTRUN -> [SKIP][47] ([i915#3281]) +2 other tests skip [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-19/igt@gem_exec_reloc@basic-gtt-read-active.html * igt@gem_exec_reloc@basic-scanout: - shard-rkl: NOTRUN -> [SKIP][48] ([i915#3281]) +6 other tests skip [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@gem_exec_reloc@basic-scanout.html * igt@gem_exec_schedule@reorder-wide: - shard-dg2: NOTRUN -> [SKIP][49] ([i915#4537] / [i915#4812]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@gem_exec_schedule@reorder-wide.html - shard-mtlp: NOTRUN -> [SKIP][50] ([i915#4537] / [i915#4812]) +1 other test skip [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-5/igt@gem_exec_schedule@reorder-wide.html * igt@gem_fence_thrash@bo-write-verify-x: - shard-dg2: NOTRUN -> [SKIP][51] ([i915#4860]) +1 other test skip [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@gem_fence_thrash@bo-write-verify-x.html * igt@gem_lmem_swapping@heavy-verify-multi-ccs: - shard-mtlp: NOTRUN -> [SKIP][52] ([i915#4613]) +2 other tests skip [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-1/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html * igt@gem_lmem_swapping@parallel-random: - shard-rkl: NOTRUN -> [SKIP][53] ([i915#4613]) +3 other tests skip [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@gem_lmem_swapping@parallel-random.html * igt@gem_lmem_swapping@smem-oom: - shard-glk: NOTRUN -> [SKIP][54] ([fdo#109271] / [i915#4613]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-glk2/igt@gem_lmem_swapping@smem-oom.html * igt@gem_media_fill@media-fill: - shard-dg2: NOTRUN -> [SKIP][55] ([i915#8289]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@gem_media_fill@media-fill.html * igt@gem_media_vme: - shard-dg2: NOTRUN -> [SKIP][56] ([i915#284]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@gem_media_vme.html - shard-rkl: NOTRUN -> [SKIP][57] ([i915#284]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-5/igt@gem_media_vme.html * igt@gem_mmap@bad-object: - shard-dg1: NOTRUN -> [SKIP][58] ([i915#4083]) +1 other test skip [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-17/igt@gem_mmap@bad-object.html * igt@gem_mmap_gtt@basic-small-bo: - shard-dg2: NOTRUN -> [SKIP][59] ([i915#4077]) +13 other tests skip [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-6/igt@gem_mmap_gtt@basic-small-bo.html * igt@gem_mmap_gtt@basic-write-read: - shard-mtlp: NOTRUN -> [SKIP][60] ([i915#4077]) +3 other tests skip [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-7/igt@gem_mmap_gtt@basic-write-read.html * igt@gem_mmap_wc@coherency: - shard-mtlp: NOTRUN -> [SKIP][61] ([i915#4083]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-1/igt@gem_mmap_wc@coherency.html * igt@gem_mmap_wc@write-prefaulted: - shard-dg2: NOTRUN -> [SKIP][62] ([i915#4083]) +7 other tests skip [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@gem_mmap_wc@write-prefaulted.html * igt@gem_partial_pwrite_pread@reads-uncached: - shard-dg2: NOTRUN -> [SKIP][63] ([i915#3282]) +5 other tests skip [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@gem_partial_pwrite_pread@reads-uncached.html * igt@gem_partial_pwrite_pread@writes-after-reads: - shard-rkl: NOTRUN -> [SKIP][64] ([i915#3282]) +5 other tests skip [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@gem_partial_pwrite_pread@writes-after-reads.html * igt@gem_pxp@protected-encrypted-src-copy-not-readible: - shard-dg1: NOTRUN -> [SKIP][65] ([i915#4270]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-13/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html * igt@gem_pxp@reject-modify-context-protection-on: - shard-rkl: NOTRUN -> [SKIP][66] ([i915#4270]) +1 other test skip [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@gem_pxp@reject-modify-context-protection-on.html * igt@gem_pxp@verify-pxp-execution-after-suspend-resume: - shard-dg2: NOTRUN -> [SKIP][67] ([i915#4270]) +5 other tests skip [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html * igt@gem_pxp@verify-pxp-stale-buf-execution: - shard-mtlp: NOTRUN -> [SKIP][68] ([i915#4270]) [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-6/igt@gem_pxp@verify-pxp-stale-buf-execution.html * igt@gem_readwrite@new-obj: - shard-dg1: NOTRUN -> [SKIP][69] ([i915#3282]) +1 other test skip [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-12/igt@gem_readwrite@new-obj.html * igt@gem_readwrite@read-bad-handle: - shard-mtlp: NOTRUN -> [SKIP][70] ([i915#3282]) +5 other tests skip [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-5/igt@gem_readwrite@read-bad-handle.html * igt@gem_render_copy@y-tiled-to-vebox-yf-tiled: - shard-dg2: NOTRUN -> [SKIP][71] ([i915#5190]) +11 other tests skip [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@gem_render_copy@y-tiled-to-vebox-yf-tiled.html * igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled: - shard-mtlp: NOTRUN -> [SKIP][72] ([i915#8428]) +3 other tests skip [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-4/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled.html * igt@gem_set_tiling_vs_blt@tiled-to-untiled: - shard-dg2: NOTRUN -> [SKIP][73] ([i915#4079]) +4 other tests skip [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html * igt@gem_set_tiling_vs_pwrite: - shard-mtlp: NOTRUN -> [SKIP][74] ([i915#4079]) [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-6/igt@gem_set_tiling_vs_pwrite.html * igt@gem_softpin@evict-snoop-interruptible: - shard-dg2: NOTRUN -> [SKIP][75] ([i915#4885]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@gem_softpin@evict-snoop-interruptible.html * igt@gem_tiled_partial_pwrite_pread@writes: - shard-dg1: NOTRUN -> [SKIP][76] ([i915#4077]) +3 other tests skip [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-16/igt@gem_tiled_partial_pwrite_pread@writes.html * igt@gem_userptr_blits@dmabuf-sync: - shard-tglu: NOTRUN -> [SKIP][77] ([i915#3323]) [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-3/igt@gem_userptr_blits@dmabuf-sync.html * igt@gem_userptr_blits@map-fixed-invalidate: - shard-dg2: NOTRUN -> [SKIP][78] ([i915#3297] / [i915#4880]) [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-6/igt@gem_userptr_blits@map-fixed-invalidate.html * igt@gem_userptr_blits@map-fixed-invalidate-busy: - shard-mtlp: NOTRUN -> [SKIP][79] ([i915#3297]) +1 other test skip [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-2/igt@gem_userptr_blits@map-fixed-invalidate-busy.html * igt@gem_userptr_blits@readonly-pwrite-unsync: - shard-rkl: NOTRUN -> [SKIP][80] ([i915#3297]) +1 other test skip [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@gem_userptr_blits@readonly-pwrite-unsync.html * igt@gem_userptr_blits@readonly-unsync: - shard-dg2: NOTRUN -> [SKIP][81] ([i915#3297]) +2 other tests skip [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@gem_userptr_blits@readonly-unsync.html * igt@gem_userptr_blits@relocations: - shard-mtlp: NOTRUN -> [SKIP][82] ([i915#3281]) +7 other tests skip [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-2/igt@gem_userptr_blits@relocations.html * igt@gem_userptr_blits@unsync-overlap: - shard-dg1: NOTRUN -> [SKIP][83] ([i915#3297]) [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-15/igt@gem_userptr_blits@unsync-overlap.html * igt@gen3_render_tiledx_blits: - shard-dg2: NOTRUN -> [SKIP][84] ([fdo#109289]) +4 other tests skip [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@gen3_render_tiledx_blits.html * igt@gen9_exec_parse@batch-invalid-length: - shard-rkl: NOTRUN -> [SKIP][85] ([i915#2527]) +3 other tests skip [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-1/igt@gen9_exec_parse@batch-invalid-length.html * igt@gen9_exec_parse@bb-start-cmd: - shard-dg1: NOTRUN -> [SKIP][86] ([i915#2527]) [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-19/igt@gen9_exec_parse@bb-start-cmd.html * igt@gen9_exec_parse@shadow-peek: - shard-dg2: NOTRUN -> [SKIP][87] ([i915#2856]) +4 other tests skip [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@gen9_exec_parse@shadow-peek.html - shard-mtlp: NOTRUN -> [SKIP][88] ([i915#2856]) +2 other tests skip [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-6/igt@gen9_exec_parse@shadow-peek.html * igt@gen9_exec_parse@unaligned-jump: - shard-tglu: NOTRUN -> [SKIP][89] ([i915#2527] / [i915#2856]) +1 other test skip [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-9/igt@gen9_exec_parse@unaligned-jump.html * igt@i915_fb_tiling: - shard-dg2: NOTRUN -> [SKIP][90] ([i915#4881]) [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@i915_fb_tiling.html * igt@i915_module_load@reload: - shard-snb: [PASS][91] -> [INCOMPLETE][92] ([i915#9849]) [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-snb6/igt@i915_module_load@reload.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-snb2/igt@i915_module_load@reload.html * igt@i915_pm_freq_api@freq-reset-multiple: - shard-rkl: NOTRUN -> [SKIP][93] ([i915#8399]) [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@i915_pm_freq_api@freq-reset-multiple.html * igt@i915_pm_freq_api@freq-suspend@gt0: - shard-dg2: [PASS][94] -> [INCOMPLETE][95] ([i915#9407]) [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-dg2-10/igt@i915_pm_freq_api@freq-suspend@gt0.html [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-6/igt@i915_pm_freq_api@freq-suspend@gt0.html * igt@i915_pm_rc6_residency@media-rc6-accuracy: - shard-rkl: NOTRUN -> [SKIP][96] ([fdo#109289]) +1 other test skip [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-6/igt@i915_pm_rc6_residency@media-rc6-accuracy.html * igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0: - shard-dg1: [PASS][97] -> [FAIL][98] ([i915#3591]) [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-dg1-19/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-12/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html * igt@i915_pm_rpm@gem-execbuf-stress-pc8: - shard-dg2: NOTRUN -> [SKIP][99] ([fdo#109293] / [fdo#109506]) [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html * igt@i915_pm_rps@min-max-config-idle: - shard-dg2: NOTRUN -> [SKIP][100] ([i915#6621]) +1 other test skip [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@i915_pm_rps@min-max-config-idle.html * igt@i915_pm_rps@thresholds-idle-park@gt0: - shard-dg2: NOTRUN -> [SKIP][101] ([i915#8925]) [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-6/igt@i915_pm_rps@thresholds-idle-park@gt0.html * igt@i915_pm_sseu@full-enable: - shard-rkl: NOTRUN -> [SKIP][102] ([i915#4387]) [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-5/igt@i915_pm_sseu@full-enable.html * igt@i915_query@query-topology-known-pci-ids: - shard-tglu: NOTRUN -> [SKIP][103] ([fdo#109303]) [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-6/igt@i915_query@query-topology-known-pci-ids.html * igt@i915_suspend@basic-s3-without-i915: - shard-rkl: [PASS][104] -> [FAIL][105] ([i915#10031]) [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-rkl-5/igt@i915_suspend@basic-s3-without-i915.html [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-4/igt@i915_suspend@basic-s3-without-i915.html - shard-tglu: NOTRUN -> [INCOMPLETE][106] ([i915#7443]) [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-4/igt@i915_suspend@basic-s3-without-i915.html * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-edp-1-4-rc-ccs-cc: - shard-mtlp: NOTRUN -> [SKIP][107] ([i915#8709]) +11 other tests skip [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-7/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-edp-1-4-rc-ccs-cc.html * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs: - shard-rkl: NOTRUN -> [SKIP][108] ([i915#8709]) +3 other tests skip [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs.html * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-hdmi-a-2-4-mc-ccs: - shard-dg2: NOTRUN -> [SKIP][109] ([i915#8709]) +11 other tests skip [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-hdmi-a-2-4-mc-ccs.html * igt@kms_atomic_transition@plane-all-modeset-transition-fencing: - shard-mtlp: NOTRUN -> [SKIP][110] ([i915#1769] / [i915#3555]) [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-4/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels: - shard-dg2: NOTRUN -> [SKIP][111] ([i915#1769] / [i915#3555]) [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-rkl: NOTRUN -> [SKIP][112] ([i915#1769] / [i915#3555]) [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-6/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html * igt@kms_big_fb@4-tiled-16bpp-rotate-90: - shard-mtlp: NOTRUN -> [SKIP][113] ([fdo#111614]) +2 other tests skip [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-8/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html * igt@kms_big_fb@4-tiled-32bpp-rotate-270: - shard-tglu: NOTRUN -> [SKIP][114] ([fdo#111615] / [i915#5286]) +1 other test skip [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-7/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html * igt@kms_big_fb@4-tiled-8bpp-rotate-0: - shard-rkl: NOTRUN -> [SKIP][115] ([i915#5286]) +4 other tests skip [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@kms_big_fb@4-tiled-8bpp-rotate-0.html * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip: - shard-dg1: NOTRUN -> [SKIP][116] ([i915#4538] / [i915#5286]) +1 other test skip [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-19/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip: - shard-mtlp: [PASS][117] -> [FAIL][118] ([i915#5138]) [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_big_fb@linear-8bpp-rotate-270: - shard-rkl: NOTRUN -> [SKIP][119] ([fdo#111614] / [i915#3638]) +2 other tests skip [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-1/igt@kms_big_fb@linear-8bpp-rotate-270.html * igt@kms_big_fb@x-tiled-16bpp-rotate-270: - shard-tglu: NOTRUN -> [SKIP][120] ([fdo#111614]) [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-6/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html * igt@kms_big_fb@x-tiled-16bpp-rotate-90: - shard-dg2: NOTRUN -> [SKIP][121] ([fdo#111614]) +4 other tests skip [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip: - shard-tglu: [PASS][122] -> [FAIL][123] ([i915#3743]) [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-tglu-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip: - shard-dg2: NOTRUN -> [SKIP][124] ([i915#4538] / [i915#5190]) +13 other tests skip [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html * igt@kms_big_fb@yf-tiled-16bpp-rotate-0: - shard-mtlp: NOTRUN -> [SKIP][125] ([fdo#111615]) +5 other tests skip [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-1/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html * igt@kms_big_fb@yf-tiled-addfb: - shard-rkl: NOTRUN -> [SKIP][126] ([fdo#111615]) +1 other test skip [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@kms_big_fb@yf-tiled-addfb.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180: - shard-rkl: NOTRUN -> [SKIP][127] ([fdo#110723]) +2 other tests skip [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip: - shard-dg1: NOTRUN -> [SKIP][128] ([i915#4538]) +1 other test skip [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-12/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180: - shard-tglu: NOTRUN -> [SKIP][129] ([fdo#111615]) +1 other test skip [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html * igt@kms_big_joiner@basic: - shard-dg2: NOTRUN -> [SKIP][130] ([i915#2705]) [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@kms_big_joiner@basic.html * igt@kms_big_joiner@invalid-modeset: - shard-tglu: NOTRUN -> [SKIP][131] ([i915#2705]) [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-7/igt@kms_big_joiner@invalid-modeset.html * igt@kms_ccs@pipe-a-crc-primary-basic-y-tiled-ccs: - shard-rkl: NOTRUN -> [SKIP][132] ([i915#5354] / [i915#6095]) +23 other tests skip [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-4/igt@kms_ccs@pipe-a-crc-primary-basic-y-tiled-ccs.html * igt@kms_ccs@pipe-b-crc-primary-basic-4-tiled-mtl-rc-ccs-cc: - shard-dg2: NOTRUN -> [SKIP][133] ([i915#5354]) +96 other tests skip [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@kms_ccs@pipe-b-crc-primary-basic-4-tiled-mtl-rc-ccs-cc.html * igt@kms_ccs@pipe-b-random-ccs-data-4-tiled-dg2-rc-ccs-cc: - shard-tglu: NOTRUN -> [SKIP][134] ([i915#5354] / [i915#6095]) +9 other tests skip [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-3/igt@kms_ccs@pipe-b-random-ccs-data-4-tiled-dg2-rc-ccs-cc.html * igt@kms_ccs@pipe-d-bad-aux-stride-y-tiled-gen12-rc-ccs-cc: - shard-glk: NOTRUN -> [SKIP][135] ([fdo#109271]) +56 other tests skip [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-glk2/igt@kms_ccs@pipe-d-bad-aux-stride-y-tiled-gen12-rc-ccs-cc.html * igt@kms_ccs@pipe-d-bad-rotation-90-yf-tiled-ccs: - shard-mtlp: NOTRUN -> [SKIP][136] ([i915#5354] / [i915#6095]) +20 other tests skip [136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-5/igt@kms_ccs@pipe-d-bad-rotation-90-yf-tiled-ccs.html * igt@kms_ccs@pipe-d-random-ccs-data-4-tiled-dg2-rc-ccs: - shard-dg1: NOTRUN -> [SKIP][137] ([i915#5354] / [i915#6095]) +7 other tests skip [137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-15/igt@kms_ccs@pipe-d-random-ccs-data-4-tiled-dg2-rc-ccs.html * igt@kms_ccs@pipe-d-random-ccs-data-4-tiled-mtl-rc-ccs-cc: - shard-rkl: NOTRUN -> [SKIP][138] ([i915#5354]) +28 other tests skip [138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-3/igt@kms_ccs@pipe-d-random-ccs-data-4-tiled-mtl-rc-ccs-cc.html * igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-2: - shard-dg2: NOTRUN -> [SKIP][139] ([i915#4087]) +3 other tests skip [139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-2.html * igt@kms_chamelium_audio@hdmi-audio: - shard-tglu: NOTRUN -> [SKIP][140] ([i915#7828]) +1 other test skip [140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-4/igt@kms_chamelium_audio@hdmi-audio.html * igt@kms_chamelium_color@ctm-green-to-red: - shard-dg2: NOTRUN -> [SKIP][141] ([fdo#111827]) +3 other tests skip [141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@kms_chamelium_color@ctm-green-to-red.html - shard-dg1: NOTRUN -> [SKIP][142] ([fdo#111827]) [142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-15/igt@kms_chamelium_color@ctm-green-to-red.html * igt@kms_chamelium_color@ctm-max: - shard-tglu: NOTRUN -> [SKIP][143] ([fdo#111827]) [143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-5/igt@kms_chamelium_color@ctm-max.html * igt@kms_chamelium_color@ctm-red-to-blue: - shard-rkl: NOTRUN -> [SKIP][144] ([fdo#111827]) [144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@kms_chamelium_color@ctm-red-to-blue.html - shard-mtlp: NOTRUN -> [SKIP][145] ([fdo#111827]) +1 other test skip [145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-5/igt@kms_chamelium_color@ctm-red-to-blue.html * igt@kms_chamelium_edid@dp-edid-stress-resolution-4k: - shard-rkl: NOTRUN -> [SKIP][146] ([i915#7828]) +5 other tests skip [146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-1/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html * igt@kms_chamelium_frames@hdmi-cmp-planar-formats: - shard-dg2: NOTRUN -> [SKIP][147] ([i915#7828]) +10 other tests skip [147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-6/igt@kms_chamelium_frames@hdmi-cmp-planar-formats.html * igt@kms_chamelium_hpd@dp-hpd-storm-disable: - shard-dg1: NOTRUN -> [SKIP][148] ([i915#7828]) +1 other test skip [148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-18/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html * igt@kms_chamelium_hpd@hdmi-hpd-fast: - shard-mtlp: NOTRUN -> [SKIP][149] ([i915#7828]) +1 other test skip [149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-8/igt@kms_chamelium_hpd@hdmi-hpd-fast.html * igt@kms_content_protection@content-type-change: - shard-mtlp: NOTRUN -> [SKIP][150] ([i915#6944] / [i915#9424]) [150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-4/igt@kms_content_protection@content-type-change.html - shard-dg2: NOTRUN -> [SKIP][151] ([i915#9424]) [151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@kms_content_protection@content-type-change.html - shard-rkl: NOTRUN -> [SKIP][152] ([i915#9424]) [152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-5/igt@kms_content_protection@content-type-change.html * igt@kms_content_protection@dp-mst-lic-type-1: - shard-dg2: NOTRUN -> [SKIP][153] ([i915#3299]) [153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@kms_content_protection@dp-mst-lic-type-1.html - shard-rkl: NOTRUN -> [SKIP][154] ([i915#3116]) [154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-1/igt@kms_content_protection@dp-mst-lic-type-1.html * igt@kms_content_protection@legacy: - shard-rkl: NOTRUN -> [SKIP][155] ([i915#7118] / [i915#9424]) [155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-4/igt@kms_content_protection@legacy.html * igt@kms_content_protection@uevent: - shard-dg2: NOTRUN -> [SKIP][156] ([i915#7118] / [i915#9424]) [156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@kms_content_protection@uevent.html * igt@kms_cursor_crc@cursor-offscreen-512x170: - shard-tglu: NOTRUN -> [SKIP][157] ([fdo#109279] / [i915#3359]) [157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-2/igt@kms_cursor_crc@cursor-offscreen-512x170.html * igt@kms_cursor_crc@cursor-onscreen-256x85: - shard-mtlp: NOTRUN -> [SKIP][158] ([i915#8814]) [158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-5/igt@kms_cursor_crc@cursor-onscreen-256x85.html * igt@kms_cursor_crc@cursor-random-32x32: - shard-dg1: NOTRUN -> [SKIP][159] ([i915#3555]) +1 other test skip [159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-16/igt@kms_cursor_crc@cursor-random-32x32.html * igt@kms_cursor_crc@cursor-random-512x170: - shard-dg2: NOTRUN -> [SKIP][160] ([i915#3359]) +1 other test skip [160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@kms_cursor_crc@cursor-random-512x170.html * igt@kms_cursor_crc@cursor-rapid-movement-32x32: - shard-rkl: NOTRUN -> [SKIP][161] ([i915#3555]) +4 other tests skip [161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-4/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html * igt@kms_cursor_crc@cursor-rapid-movement-512x170: - shard-mtlp: NOTRUN -> [SKIP][162] ([i915#3359]) [162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-4/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html * igt@kms_cursor_crc@cursor-sliding-512x170: - shard-rkl: NOTRUN -> [SKIP][163] ([i915#3359]) +1 other test skip [163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-5/igt@kms_cursor_crc@cursor-sliding-512x170.html * igt@kms_cursor_crc@cursor-sliding-512x512: - shard-tglu: NOTRUN -> [SKIP][164] ([i915#3359]) [164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-10/igt@kms_cursor_crc@cursor-sliding-512x512.html * igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy: - shard-tglu: NOTRUN -> [SKIP][165] ([fdo#109274]) [165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-8/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic: - shard-rkl: NOTRUN -> [SKIP][166] ([fdo#111767] / [fdo#111825]) +1 other test skip [166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html - shard-snb: [PASS][167] -> [SKIP][168] ([fdo#109271] / [fdo#111767]) +1 other test skip [167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-snb7/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html [168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-snb6/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - shard-dg2: NOTRUN -> [SKIP][169] ([i915#4103] / [i915#4213]) [169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html * igt@kms_cursor_legacy@cursora-vs-flipb-toggle: - shard-mtlp: NOTRUN -> [SKIP][170] ([i915#9809]) [170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-1/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic: - shard-dg2: NOTRUN -> [SKIP][171] ([fdo#109274] / [i915#5354]) +5 other tests skip [171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html * igt@kms_cursor_legacy@cursorb-vs-flipb-toggle: - shard-mtlp: NOTRUN -> [SKIP][172] ([fdo#111767]) [172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-6/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-glk: [PASS][173] -> [FAIL][174] ([i915#2346]) [173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html [174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions: - shard-rkl: NOTRUN -> [SKIP][175] ([i915#4103]) [175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html * igt@kms_cursor_legacy@torture-move@pipe-a: - shard-tglu: [PASS][176] -> [DMESG-WARN][177] ([i915#10166] / [i915#1982]) [176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-tglu-9/igt@kms_cursor_legacy@torture-move@pipe-a.html [177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-2/igt@kms_cursor_legacy@torture-move@pipe-a.html * igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-4: - shard-dg1: NOTRUN -> [SKIP][178] ([fdo#110189] / [i915#9723]) [178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-17/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-4.html * igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-vga-1: - shard-snb: NOTRUN -> [SKIP][179] ([fdo#109271] / [fdo#110189]) [179]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-snb7/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-vga-1.html * igt@kms_display_modes@extended-mode-basic: - shard-dg2: NOTRUN -> [SKIP][180] ([i915#3555]) +10 other tests skip [180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@kms_display_modes@extended-mode-basic.html * igt@kms_draw_crc@draw-method-mmap-gtt: - shard-mtlp: NOTRUN -> [SKIP][181] ([i915#3555] / [i915#8812]) [181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-8/igt@kms_draw_crc@draw-method-mmap-gtt.html * igt@kms_dsc@dsc-fractional-bpp: - shard-rkl: NOTRUN -> [SKIP][182] ([i915#3840]) [182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-1/igt@kms_dsc@dsc-fractional-bpp.html * igt@kms_dsc@dsc-with-formats: - shard-dg2: NOTRUN -> [SKIP][183] ([i915#3555] / [i915#3840]) [183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@kms_dsc@dsc-with-formats.html * igt@kms_dsc@dsc-with-output-formats: - shard-mtlp: NOTRUN -> [SKIP][184] ([i915#3555] / [i915#3840]) [184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-5/igt@kms_dsc@dsc-with-output-formats.html * igt@kms_dsc@dsc-with-output-formats-with-bpc: - shard-dg2: NOTRUN -> [SKIP][185] ([i915#3840] / [i915#9053]) [185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@kms_dsc@dsc-with-output-formats-with-bpc.html * igt@kms_fbcon_fbt@psr-suspend: - shard-dg2: NOTRUN -> [SKIP][186] ([i915#3469]) [186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@kms_fbcon_fbt@psr-suspend.html * igt@kms_feature_discovery@chamelium: - shard-dg2: NOTRUN -> [SKIP][187] ([i915#4854]) [187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@kms_feature_discovery@chamelium.html * igt@kms_feature_discovery@display-2x: - shard-dg2: NOTRUN -> [SKIP][188] ([i915#1839]) +1 other test skip [188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-6/igt@kms_feature_discovery@display-2x.html - shard-dg1: NOTRUN -> [SKIP][189] ([i915#1839]) [189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-18/igt@kms_feature_discovery@display-2x.html * igt@kms_feature_discovery@psr1: - shard-rkl: NOTRUN -> [SKIP][190] ([i915#658]) [190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-1/igt@kms_feature_discovery@psr1.html * igt@kms_flip@2x-flip-vs-fences: - shard-tglu: NOTRUN -> [SKIP][191] ([fdo#109274] / [i915#3637]) +2 other tests skip [191]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-2/igt@kms_flip@2x-flip-vs-fences.html * igt@kms_flip@2x-flip-vs-fences-interruptible: - shard-mtlp: NOTRUN -> [SKIP][192] ([i915#8381]) [192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-7/igt@kms_flip@2x-flip-vs-fences-interruptible.html - shard-dg2: NOTRUN -> [SKIP][193] ([i915#8381]) [193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-6/igt@kms_flip@2x-flip-vs-fences-interruptible.html * igt@kms_flip@2x-flip-vs-modeset-vs-hang: - shard-dg2: NOTRUN -> [SKIP][194] ([fdo#109274]) +8 other tests skip [194]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html * igt@kms_flip@2x-flip-vs-rmfb: - shard-mtlp: NOTRUN -> [SKIP][195] ([i915#3637]) +3 other tests skip [195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-4/igt@kms_flip@2x-flip-vs-rmfb.html * igt@kms_flip@2x-plain-flip-fb-recreate: - shard-dg1: NOTRUN -> [SKIP][196] ([fdo#111825] / [i915#9934]) [196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-13/igt@kms_flip@2x-plain-flip-fb-recreate.html * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode: - shard-dg1: NOTRUN -> [SKIP][197] ([i915#2587] / [i915#2672]) [197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-17/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode: - shard-mtlp: NOTRUN -> [SKIP][198] ([i915#3555] / [i915#8810]) +1 other test skip [198]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-default-mode: - shard-mtlp: NOTRUN -> [SKIP][199] ([i915#2672]) +1 other test skip [199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-default-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode: - shard-rkl: NOTRUN -> [SKIP][200] ([i915#2672]) +1 other test skip [200]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-valid-mode: - shard-dg2: NOTRUN -> [SKIP][201] ([i915#2672]) +6 other tests skip [201]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode: - shard-tglu: NOTRUN -> [SKIP][202] ([i915#2587] / [i915#2672]) [202]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode: - shard-dg2: NOTRUN -> [SKIP][203] ([i915#2672] / [i915#3555]) [203]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html * igt@kms_force_connector_basic@force-load-detect: - shard-tglu: NOTRUN -> [SKIP][204] ([fdo#109285]) [204]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-9/igt@kms_force_connector_basic@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - shard-mtlp: NOTRUN -> [SKIP][205] ([i915#5274]) [205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-6/igt@kms_force_connector_basic@prune-stale-modes.html - shard-dg2: NOTRUN -> [SKIP][206] ([i915#5274]) [206]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@kms_force_connector_basic@prune-stale-modes.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt: - shard-dg2: NOTRUN -> [FAIL][207] ([i915#6880]) [207]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt: - shard-dg2: NOTRUN -> [SKIP][208] ([i915#8708]) +21 other tests skip [208]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu: - shard-mtlp: NOTRUN -> [SKIP][209] ([i915#1825]) +15 other tests skip [209]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render: - shard-snb: [PASS][210] -> [SKIP][211] ([fdo#109271]) +12 other tests skip [210]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html [211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-snb1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-gtt: - shard-mtlp: NOTRUN -> [SKIP][212] ([i915#8708]) +2 other tests skip [212]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-rte: - shard-rkl: NOTRUN -> [SKIP][213] ([i915#3023]) +19 other tests skip [213]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt: - shard-rkl: NOTRUN -> [SKIP][214] ([fdo#111825]) +7 other tests skip [214]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-pri-indfb-multidraw: - shard-dg1: NOTRUN -> [SKIP][215] ([fdo#111825]) +9 other tests skip [215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-19/igt@kms_frontbuffer_tracking@fbcpsr-2p-pri-indfb-multidraw.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt: - shard-rkl: NOTRUN -> [SKIP][216] ([fdo#111825] / [i915#1825]) +26 other tests skip [216]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt: - shard-tglu: NOTRUN -> [SKIP][217] ([fdo#109280]) +6 other tests skip [217]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc: - shard-dg1: NOTRUN -> [SKIP][218] ([i915#8708]) +3 other tests skip [218]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-19/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y: - shard-dg2: NOTRUN -> [SKIP][219] ([i915#10055]) +1 other test skip [219]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt: - shard-tglu: NOTRUN -> [SKIP][220] ([fdo#110189]) +4 other tests skip [220]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-render: - shard-dg2: NOTRUN -> [SKIP][221] ([fdo#111767] / [i915#5354]) [221]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-render.html - shard-dg1: NOTRUN -> [SKIP][222] ([fdo#111767] / [fdo#111825]) [222]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-13/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary: - shard-dg2: NOTRUN -> [SKIP][223] ([i915#3458]) +26 other tests skip [223]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite: - shard-dg1: NOTRUN -> [SKIP][224] ([i915#3458]) +3 other tests skip [224]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-19/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite.html * igt@kms_hdr@bpc-switch: - shard-dg1: NOTRUN -> [SKIP][225] ([i915#3555] / [i915#8228]) [225]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-13/igt@kms_hdr@bpc-switch.html * igt@kms_hdr@static-swap: - shard-mtlp: NOTRUN -> [SKIP][226] ([i915#3555] / [i915#8228]) [226]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-6/igt@kms_hdr@static-swap.html * igt@kms_hdr@static-toggle: - shard-rkl: NOTRUN -> [SKIP][227] ([i915#3555] / [i915#8228]) +1 other test skip [227]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@kms_hdr@static-toggle.html * igt@kms_hdr@static-toggle-suspend: - shard-dg2: NOTRUN -> [SKIP][228] ([i915#3555] / [i915#8228]) +2 other tests skip [228]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-6/igt@kms_hdr@static-toggle-suspend.html * igt@kms_multipipe_modeset@basic-max-pipe-crc-check: - shard-mtlp: NOTRUN -> [SKIP][229] ([i915#4816]) [229]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-6/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html * igt@kms_panel_fitting@atomic-fastset: - shard-rkl: NOTRUN -> [SKIP][230] ([i915#6301]) [230]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-1/igt@kms_panel_fitting@atomic-fastset.html * igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c: - shard-tglu: NOTRUN -> [SKIP][231] ([fdo#109289]) [231]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-8/igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c.html * igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes: - shard-mtlp: NOTRUN -> [SKIP][232] ([fdo#109289]) +2 other tests skip [232]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-2/igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes.html * igt@kms_plane_lowres@tiling-yf: - shard-dg2: NOTRUN -> [SKIP][233] ([i915#3555] / [i915#8821]) [233]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@kms_plane_lowres@tiling-yf.html * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-a-hdmi-a-1: - shard-tglu: NOTRUN -> [SKIP][234] ([i915#9423]) +3 other tests skip [234]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-2/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-a-hdmi-a-1.html * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-a-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][235] ([i915#9423]) +5 other tests skip [235]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-1/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-a-hdmi-a-2.html * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b-hdmi-a-3: - shard-dg2: NOTRUN -> [SKIP][236] ([i915#9423]) +11 other tests skip [236]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b-hdmi-a-3.html * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers@pipe-b-edp-1: - shard-mtlp: NOTRUN -> [SKIP][237] ([i915#5176]) +7 other tests skip [237]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-5/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers@pipe-b-edp-1.html * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][238] ([i915#5176] / [i915#9423]) +1 other test skip [238]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-3/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b-hdmi-a-2.html * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-a-hdmi-a-3: - shard-dg1: NOTRUN -> [SKIP][239] ([i915#9423]) +11 other tests skip [239]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-12/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-a-hdmi-a-3.html * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d-hdmi-a-2: - shard-dg2: NOTRUN -> [SKIP][240] ([i915#5235] / [i915#9423] / [i915#9728]) +3 other tests skip [240]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d-hdmi-a-2.html * igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-c-hdmi-a-3: - shard-dg1: NOTRUN -> [SKIP][241] ([i915#5235]) +3 other tests skip [241]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-12/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-c-hdmi-a-3.html * igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-b-edp-1: - shard-mtlp: NOTRUN -> [SKIP][242] ([i915#5235]) +6 other tests skip [242]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-7/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-b-edp-1.html * igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-d-edp-1: - shard-mtlp: NOTRUN -> [SKIP][243] ([i915#3555] / [i915#5235]) [243]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-7/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-d-edp-1.html * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][244] ([i915#5235]) +9 other tests skip [244]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-1/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b-hdmi-a-2.html * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-3: - shard-dg2: NOTRUN -> [SKIP][245] ([i915#5235] / [i915#9423]) +15 other tests skip [245]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-3.html * igt@kms_pm_dc@dc6-dpms: - shard-mtlp: NOTRUN -> [SKIP][246] ([i915#10139]) [246]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-5/igt@kms_pm_dc@dc6-dpms.html - shard-dg2: NOTRUN -> [SKIP][247] ([i915#5978]) [247]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@kms_pm_dc@dc6-dpms.html - shard-rkl: NOTRUN -> [SKIP][248] ([i915#3361]) [248]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@kms_pm_dc@dc6-dpms.html * igt@kms_pm_rpm@modeset-lpsp: - shard-dg2: NOTRUN -> [SKIP][249] ([i915#9519]) +3 other tests skip [249]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@kms_pm_rpm@modeset-lpsp.html * igt@kms_pm_rpm@modeset-non-lpsp-stress: - shard-mtlp: NOTRUN -> [SKIP][250] ([i915#9519]) [250]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-1/igt@kms_pm_rpm@modeset-non-lpsp-stress.html * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait: - shard-rkl: [PASS][251] -> [SKIP][252] ([i915#9519]) +3 other tests skip [251]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-rkl-1/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html [252]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html * igt@kms_pm_rpm@modeset-pc8-residency-stress: - shard-tglu: NOTRUN -> [SKIP][253] ([fdo#109293] / [fdo#109506]) [253]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-2/igt@kms_pm_rpm@modeset-pc8-residency-stress.html * igt@kms_prime@basic-crc-hybrid: - shard-dg2: NOTRUN -> [SKIP][254] ([i915#6524] / [i915#6805]) [254]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@kms_prime@basic-crc-hybrid.html - shard-dg1: NOTRUN -> [SKIP][255] ([i915#6524]) [255]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-12/igt@kms_prime@basic-crc-hybrid.html * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf: - shard-rkl: NOTRUN -> [SKIP][256] ([fdo#110189]) +3 other tests skip [256]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf: - shard-dg2: NOTRUN -> [SKIP][257] ([fdo#110189]) +2 other tests skip [257]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf.html * igt@kms_psr_stress_test@invalidate-primary-flip-overlay: - shard-dg2: NOTRUN -> [SKIP][258] ([i915#9685]) [258]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html * igt@kms_rotation_crc@bad-pixel-format: - shard-dg2: NOTRUN -> [SKIP][259] ([i915#4235]) [259]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@kms_rotation_crc@bad-pixel-format.html * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180: - shard-tglu: NOTRUN -> [SKIP][260] ([i915#5289]) [260]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-3/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0: - shard-rkl: NOTRUN -> [SKIP][261] ([fdo#111615] / [i915#5289]) [261]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270: - shard-dg2: NOTRUN -> [SKIP][262] ([i915#4235] / [i915#5190]) +1 other test skip [262]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html * igt@kms_rotation_crc@sprite-rotation-90: - shard-mtlp: NOTRUN -> [SKIP][263] ([i915#4235]) [263]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-1/igt@kms_rotation_crc@sprite-rotation-90.html * igt@kms_setmode@basic@pipe-a-vga-1-pipe-b-hdmi-a-1: - shard-snb: NOTRUN -> [FAIL][264] ([i915#5465]) +3 other tests fail [264]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-snb7/igt@kms_setmode@basic@pipe-a-vga-1-pipe-b-hdmi-a-1.html * igt@kms_setmode@invalid-clone-exclusive-crtc: - shard-mtlp: NOTRUN -> [SKIP][265] ([i915#3555] / [i915#8823]) [265]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-2/igt@kms_setmode@invalid-clone-exclusive-crtc.html * igt@kms_tiled_display@basic-test-pattern: - shard-rkl: NOTRUN -> [SKIP][266] ([i915#8623]) [266]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@kms_tiled_display@basic-test-pattern.html * igt@kms_tv_load_detect@load-detect: - shard-dg2: NOTRUN -> [SKIP][267] ([fdo#109309]) [267]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-6/igt@kms_tv_load_detect@load-detect.html - shard-dg1: NOTRUN -> [SKIP][268] ([fdo#109309]) [268]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-18/igt@kms_tv_load_detect@load-detect.html * igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1: - shard-mtlp: NOTRUN -> [FAIL][269] ([i915#9196]) [269]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-7/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html * igt@kms_vblank@ts-continuation-modeset-rpm@pipe-b-vga-1: - shard-snb: NOTRUN -> [SKIP][270] ([fdo#109271]) +1 other test skip [270]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-snb7/igt@kms_vblank@ts-continuation-modeset-rpm@pipe-b-vga-1.html * igt@kms_writeback@writeback-check-output: - shard-rkl: NOTRUN -> [SKIP][271] ([i915#2437]) [271]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@kms_writeback@writeback-check-output.html * igt@kms_writeback@writeback-invalid-parameters: - shard-dg2: NOTRUN -> [SKIP][272] ([i915#2437]) [272]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@kms_writeback@writeback-invalid-parameters.html * igt@kms_writeback@writeback-pixel-formats: - shard-dg2: NOTRUN -> [SKIP][273] ([i915#2437] / [i915#9412]) [273]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@kms_writeback@writeback-pixel-formats.html - shard-rkl: NOTRUN -> [SKIP][274] ([i915#2437] / [i915#9412]) [274]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-4/igt@kms_writeback@writeback-pixel-formats.html * igt@perf@gen8-unprivileged-single-ctx-counters: - shard-dg2: NOTRUN -> [SKIP][275] ([i915#2436] / [i915#7387]) [275]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@perf@gen8-unprivileged-single-ctx-counters.html * igt@perf_pmu@busy-double-start@rcs0: - shard-mtlp: [PASS][276] -> [FAIL][277] ([i915#4349]) [276]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-mtlp-4/igt@perf_pmu@busy-double-start@rcs0.html [277]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-6/igt@perf_pmu@busy-double-start@rcs0.html * igt@perf_pmu@rc6-all-gts: - shard-dg2: NOTRUN -> [SKIP][278] ([i915#8516]) [278]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@perf_pmu@rc6-all-gts.html * igt@perf_pmu@rc6@other-idle-gt0: - shard-tglu: NOTRUN -> [SKIP][279] ([i915#8516]) [279]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-2/igt@perf_pmu@rc6@other-idle-gt0.html * igt@prime_vgem@basic-fence-read: - shard-dg2: NOTRUN -> [SKIP][280] ([i915#3291] / [i915#3708]) [280]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@prime_vgem@basic-fence-read.html * igt@prime_vgem@coherency-gtt: - shard-rkl: NOTRUN -> [SKIP][281] ([fdo#109295] / [fdo#111656] / [i915#3708]) [281]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-7/igt@prime_vgem@coherency-gtt.html * igt@sriov_basic@enable-vfs-autoprobe-on: - shard-rkl: NOTRUN -> [SKIP][282] ([i915#9917]) [282]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-4/igt@sriov_basic@enable-vfs-autoprobe-on.html * igt@sriov_basic@enable-vfs-bind-unbind-each: - shard-dg2: NOTRUN -> [SKIP][283] ([i915#9917]) [283]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@sriov_basic@enable-vfs-bind-unbind-each.html * igt@tools_test@sysfs_l3_parity: - shard-rkl: NOTRUN -> [SKIP][284] ([fdo#109307]) [284]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@tools_test@sysfs_l3_parity.html - shard-dg2: NOTRUN -> [SKIP][285] ([i915#4818]) [285]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@tools_test@sysfs_l3_parity.html * igt@v3d/v3d_job_submission@array-job-submission: - shard-rkl: NOTRUN -> [SKIP][286] ([fdo#109315]) +7 other tests skip [286]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-1/igt@v3d/v3d_job_submission@array-job-submission.html * igt@v3d/v3d_mmap@mmap-bad-flags: - shard-dg1: NOTRUN -> [SKIP][287] ([i915#2575]) +2 other tests skip [287]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-16/igt@v3d/v3d_mmap@mmap-bad-flags.html * igt@v3d/v3d_perfmon@destroy-invalid-perfmon: - shard-tglu: NOTRUN -> [SKIP][288] ([fdo#109315] / [i915#2575]) +1 other test skip [288]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-7/igt@v3d/v3d_perfmon@destroy-invalid-perfmon.html * igt@v3d/v3d_submit_cl@valid-submission: - shard-mtlp: NOTRUN -> [SKIP][289] ([i915#2575]) +5 other tests skip [289]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-6/igt@v3d/v3d_submit_cl@valid-submission.html * igt@v3d/v3d_submit_csd@single-out-sync: - shard-dg2: NOTRUN -> [SKIP][290] ([i915#2575]) +15 other tests skip [290]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@v3d/v3d_submit_csd@single-out-sync.html * igt@vc4/vc4_create_bo@create-bo-4096: - shard-dg1: NOTRUN -> [SKIP][291] ([i915#7711]) +1 other test skip [291]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-13/igt@vc4/vc4_create_bo@create-bo-4096.html * igt@vc4/vc4_purgeable_bo@free-purged-bo: - shard-mtlp: NOTRUN -> [SKIP][292] ([i915#7711]) +3 other tests skip [292]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-5/igt@vc4/vc4_purgeable_bo@free-purged-bo.html * igt@vc4/vc4_tiling@get-after-free: - shard-tglu: NOTRUN -> [SKIP][293] ([i915#2575]) +1 other test skip [293]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-2/igt@vc4/vc4_tiling@get-after-free.html * igt@vc4/vc4_tiling@get-bad-flags: - shard-rkl: NOTRUN -> [SKIP][294] ([i915#7711]) +7 other tests skip [294]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-3/igt@vc4/vc4_tiling@get-bad-flags.html * igt@vc4/vc4_tiling@set-get: - shard-dg2: NOTRUN -> [SKIP][295] ([i915#7711]) +12 other tests skip [295]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-10/igt@vc4/vc4_tiling@set-get.html #### Possible fixes #### * igt@drm_fdinfo@most-busy-idle-check-all@rcs0: - shard-rkl: [FAIL][296] ([i915#7742]) -> [PASS][297] [296]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-rkl-7/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html [297]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-5/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0: - shard-dg2: [INCOMPLETE][298] ([i915#7297]) -> [PASS][299] [298]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-dg2-6/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html [299]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html * igt@gem_ctx_exec@basic-nohangcheck: - shard-tglu: [FAIL][300] ([i915#6268]) -> [PASS][301] [300]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-tglu-6/igt@gem_ctx_exec@basic-nohangcheck.html [301]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-5/igt@gem_ctx_exec@basic-nohangcheck.html * igt@gem_eio@reset-stress: - shard-dg1: [FAIL][302] ([i915#5784]) -> [PASS][303] [302]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-dg1-17/igt@gem_eio@reset-stress.html [303]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-18/igt@gem_eio@reset-stress.html * igt@gem_exec_fair@basic-deadline: - shard-rkl: [FAIL][304] ([i915#2846]) -> [PASS][305] [304]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html [305]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-3/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-glk: [FAIL][306] ([i915#2842]) -> [PASS][307] [306]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-glk9/igt@gem_exec_fair@basic-pace-solo@rcs0.html [307]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-glk9/igt@gem_exec_fair@basic-pace-solo@rcs0.html * igt@gem_exec_fair@basic-pace@vecs0: - shard-rkl: [FAIL][308] ([i915#2842]) -> [PASS][309] +1 other test pass [308]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-rkl-1/igt@gem_exec_fair@basic-pace@vecs0.html [309]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-5/igt@gem_exec_fair@basic-pace@vecs0.html * igt@gem_exec_suspend@basic-s0@smem: - shard-dg2: [INCOMPLETE][310] ([i915#9275]) -> [PASS][311] [310]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-dg2-6/igt@gem_exec_suspend@basic-s0@smem.html [311]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-1/igt@gem_exec_suspend@basic-s0@smem.html * igt@gen9_exec_parse@allowed-all: - shard-glk: [INCOMPLETE][312] ([i915#10137] / [i915#5566]) -> [PASS][313] [312]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-glk3/igt@gen9_exec_parse@allowed-all.html [313]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-glk2/igt@gen9_exec_parse@allowed-all.html * igt@i915_module_load@reload-with-fault-injection: - shard-snb: [INCOMPLETE][314] ([i915#10137] / [i915#9200] / [i915#9849]) -> [PASS][315] [314]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-snb6/igt@i915_module_load@reload-with-fault-injection.html [315]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-snb5/igt@i915_module_load@reload-with-fault-injection.html - shard-tglu: [INCOMPLETE][316] ([i915#10137] / [i915#9200]) -> [PASS][317] [316]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-tglu-4/igt@i915_module_load@reload-with-fault-injection.html [317]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-2/igt@i915_module_load@reload-with-fault-injection.html - shard-dg2: [INCOMPLETE][318] ([i915#10137] / [i915#9820] / [i915#9849]) -> [PASS][319] [318]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-dg2-10/igt@i915_module_load@reload-with-fault-injection.html [319]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-5/igt@i915_module_load@reload-with-fault-injection.html * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip: - shard-tglu: [FAIL][320] ([i915#3743]) -> [PASS][321] [320]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-tglu-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html [321]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-glk: [FAIL][322] ([i915#2346]) -> [PASS][323] [322]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [323]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_cursor_legacy@torture-bo@pipe-a: - shard-tglu: [DMESG-WARN][324] ([i915#10166]) -> [PASS][325] [324]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-tglu-5/igt@kms_cursor_legacy@torture-bo@pipe-a.html [325]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-8/igt@kms_cursor_legacy@torture-bo@pipe-a.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt: - shard-snb: [SKIP][326] ([fdo#109271]) -> [PASS][327] +8 other tests pass [326]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html [327]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html * igt@kms_pm_dc@dc9-dpms: - shard-tglu: [SKIP][328] ([i915#4281]) -> [PASS][329] [328]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-tglu-8/igt@kms_pm_dc@dc9-dpms.html [329]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-4/igt@kms_pm_dc@dc9-dpms.html * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait: - shard-rkl: [SKIP][330] ([i915#9519]) -> [PASS][331] [330]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-rkl-1/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html [331]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html * igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1: - shard-tglu: [FAIL][332] ([i915#9196]) -> [PASS][333] [332]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-tglu-5/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html [333]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-2/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html * igt@perf_pmu@busy-double-start@ccs0: - shard-mtlp: [FAIL][334] ([i915#4349]) -> [PASS][335] [334]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-mtlp-4/igt@perf_pmu@busy-double-start@ccs0.html [335]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-mtlp-6/igt@perf_pmu@busy-double-start@ccs0.html #### Warnings #### * igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0: - shard-tglu: [FAIL][336] ([i915#3591]) -> [WARN][337] ([i915#2681]) +1 other test warn [336]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-tglu-5/igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0.html [337]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-2/igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0.html * igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0: - shard-tglu: [WARN][338] ([i915#2681]) -> [FAIL][339] ([i915#3591]) [338]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-tglu-5/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html [339]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-2/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html * igt@kms_content_protection@mei-interface: - shard-snb: [INCOMPLETE][340] ([i915#9878]) -> [SKIP][341] ([fdo#109271]) [340]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-snb7/igt@kms_content_protection@mei-interface.html [341]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-snb6/igt@kms_content_protection@mei-interface.html * igt@kms_content_protection@type1: - shard-snb: [SKIP][342] ([fdo#109271]) -> [INCOMPLETE][343] ([i915#8816]) [342]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-snb1/igt@kms_content_protection@type1.html [343]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-snb7/igt@kms_content_protection@type1.html * igt@kms_content_protection@uevent: - shard-snb: [INCOMPLETE][344] ([i915#8816]) -> [SKIP][345] ([fdo#109271]) [344]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-snb7/igt@kms_content_protection@uevent.html [345]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-snb4/igt@kms_content_protection@uevent.html * igt@kms_fbcon_fbt@psr: - shard-rkl: [SKIP][346] ([i915#3955]) -> [SKIP][347] ([fdo#110189] / [i915#3955]) [346]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-rkl-4/igt@kms_fbcon_fbt@psr.html [347]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-2/igt@kms_fbcon_fbt@psr.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc: - shard-snb: [SKIP][348] ([fdo#109271] / [fdo#111767]) -> [SKIP][349] ([fdo#109271]) [348]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-snb2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc.html [349]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-snb7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc.html * igt@kms_pm_dc@dc9-dpms: - shard-rkl: [SKIP][350] ([i915#4281]) -> [SKIP][351] ([i915#3361]) [350]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-rkl-5/igt@kms_pm_dc@dc9-dpms.html [351]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-3/igt@kms_pm_dc@dc9-dpms.html * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf: - shard-tglu: [SKIP][352] ([i915#9683]) -> [SKIP][353] ([fdo#110189]) +6 other tests skip [352]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-tglu-8/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html [353]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-2/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html * igt@kms_psr2_sf@cursor-plane-move-continuous-sf: - shard-dg1: [SKIP][354] ([i915#9683]) -> [SKIP][355] ([fdo#110189]) +5 other tests skip [354]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-dg1-16/igt@kms_psr2_sf@cursor-plane-move-continuous-sf.html [355]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-18/igt@kms_psr2_sf@cursor-plane-move-continuous-sf.html * igt@kms_psr2_sf@cursor-plane-update-sf: - shard-dg2: [SKIP][356] ([i915#9683]) -> [SKIP][357] ([fdo#110189]) +9 other tests skip [356]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-dg2-10/igt@kms_psr2_sf@cursor-plane-update-sf.html [357]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-6/igt@kms_psr2_sf@cursor-plane-update-sf.html - shard-rkl: [SKIP][358] ([fdo#111068] / [i915#9683]) -> [SKIP][359] ([fdo#110189]) +4 other tests skip [358]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-rkl-3/igt@kms_psr2_sf@cursor-plane-update-sf.html [359]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-5/igt@kms_psr2_sf@cursor-plane-update-sf.html * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf: - shard-rkl: [SKIP][360] ([i915#9683]) -> [SKIP][361] ([fdo#110189]) +3 other tests skip [360]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-rkl-7/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html [361]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-rkl-1/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@overlay-plane-update-continuous-sf: - shard-tglu: [SKIP][362] ([fdo#111068] / [i915#9683]) -> [SKIP][363] ([fdo#110189]) +5 other tests skip [362]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-tglu-7/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html [363]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-tglu-10/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area: - shard-glk: [SKIP][364] ([fdo#109271]) -> [SKIP][365] ([fdo#109271] / [fdo#110189]) +12 other tests skip [364]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-glk9/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html [365]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-glk8/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area: - shard-dg1: [SKIP][366] ([fdo#111068] / [i915#9683]) -> [SKIP][367] ([fdo#110189]) +5 other tests skip [366]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-dg1-15/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html [367]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg1-13/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb: - shard-snb: [SKIP][368] ([fdo#109271]) -> [SKIP][369] ([fdo#109271] / [fdo#110189]) +12 other tests skip [368]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-snb1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html [369]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-snb6/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html * igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem: - shard-dg2: [CRASH][370] ([i915#9351]) -> [INCOMPLETE][371] ([i915#5493]) [370]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7717/shard-dg2-2/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html [371]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/shard-dg2-2/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279 [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109293]: https://bugs.freedesktop.org/show_bug.cgi?id=109293 [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295 [fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303 [fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307 [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309 [fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615 [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656 [fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283 [i915#10031]: https://gitlab.freedesktop.org/drm/intel/issues/10031 [i915#10055]: https://gitlab.freedesktop.org/drm/intel/issues/10055 [i915#10137]: https://gitlab.freedesktop.org/drm/intel/issues/10137 [i915#10139]: https://gitlab.freedesktop.org/drm/intel/issues/10139 [i915#10166]: https://gitlab.freedesktop.org/drm/intel/issues/10166 [i915#10278]: https://gitlab.freedesktop.org/drm/intel/issues/10278 [i915#10282]: https://gitlab.freedesktop.org/drm/intel/issues/10282 [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769 [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825 [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346 [i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436 [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437 [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527 [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575 [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587 [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672 [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681 [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705 [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280 [i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846 [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856 [i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023 [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116 [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291 [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297 [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299 [i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323 [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359 [i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361 [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458 [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469 [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591 [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743 [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840 [i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936 [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955 [i915#4036]: https://gitlab.freedesktop.org/drm/intel/issues/4036 [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077 [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079 [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083 [i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213 [i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235 [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270 [i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281 [i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349 [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387 [i915#4473]: https://gitlab.freedesktop.org/drm/intel/issues/4473 [i915#4537]: https://gitlab.freedesktop.org/drm/intel/issues/4537 [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771 [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812 [i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816 [i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818 [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852 [i915#4854]: https://gitlab.freedesktop.org/drm/intel/issues/4854 [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860 [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880 [i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881 [i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885 [i915#5138]: == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10696/index.html [-- Attachment #2: Type: text/html, Size: 120693 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf @ 2024-02-21 9:01 Kunal Joshi 2024-02-21 9:01 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi 0 siblings, 1 reply; 17+ messages in thread From: Kunal Joshi @ 2024-02-21 9:01 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi kmd series [1] adds supports for panel replay selective fetch, modify lib and kms_psr2_sf to extend kms_psr2_sf tests to validate panel replay selective fetch as well. [1] https://patchwork.freedesktop.org/patch/575163/?series=128193&rev=3 Kunal Joshi (3): lib/igt_psr: modify library to support multiple PSR/PR outputs lib/igt_psr: add support for PR selective update tests/intel/kms_psr2_sf: extend tests for panel replay sf lib/igt_psr.c | 90 ++++++----- lib/igt_psr.h | 14 +- tests/intel/kms_dirtyfb.c | 4 +- tests/intel/kms_fbcon_fbt.c | 4 +- tests/intel/kms_frontbuffer_tracking.c | 4 +- tests/intel/kms_pm_dc.c | 6 +- tests/intel/kms_psr.c | 4 +- tests/intel/kms_psr2_sf.c | 200 ++++++++++++++++++------- tests/intel/kms_psr2_su.c | 2 +- tests/intel/kms_psr_stress_test.c | 4 +- tests/kms_async_flips.c | 4 +- tests/kms_cursor_legacy.c | 4 +- 12 files changed, 219 insertions(+), 121 deletions(-) -- 2.25.1 ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf 2024-02-21 9:01 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi @ 2024-02-21 9:01 ` Kunal Joshi 2024-02-21 8:56 ` Hogander, Jouni 0 siblings, 1 reply; 17+ messages in thread From: Kunal Joshi @ 2024-02-21 9:01 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy Extend the tests to cover panel replay selective fetch feature. From kms_psr2_sf test point of view we have check_pr_psr2_sel_fetch_support function to check if PR/PSR2 selective fetch is supported for an output if output supports selective fetch then we check we if enter DEEP_SLEEP mode in run function v2: fixed dynamic test name v3: use check_psr2_support (Jouni) v4: correct order of checks in check_pr_psr2_sel_fetch_support (Jouni) use appropriate psr mode in psr_wait_entry (Jouni) v5: modify get_sel_fetch_mode_for_output to use member data (Jouni) v6: modify get_sel_fetch_mode_for_output -> set_sel_fetch_mode_for_output (Jouni) Cc: Jouni Högander <jouni.hogander@intel.com> Cc: Animesh Manna <animesh.manna@intel.com> Cc: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> --- tests/intel/kms_psr2_sf.c | 195 +++++++++++++++++++++++++++----------- 1 file changed, 142 insertions(+), 53 deletions(-) diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c index 0fb300161..4c3e34aa0 100644 --- a/tests/intel/kms_psr2_sf.c +++ b/tests/intel/kms_psr2_sf.c @@ -172,6 +172,7 @@ typedef struct { uint32_t screen_changes; int cur_x, cur_y; enum pipe pipe; + enum psr_mode psr_mode; enum { FEATURE_NONE = 0, FEATURE_DSC = 1, @@ -179,6 +180,41 @@ typedef struct { } coexist_feature; } data_t; +static bool set_sel_fetch_mode_for_output(data_t *data) +{ + bool supported = false; + + if (psr_sink_support(data->drm_fd, data->debugfs_fd, + PR_MODE_SEL_FETCH, data->output)) { + supported = true; + data->psr_mode = PR_MODE_SEL_FETCH; + } else if (psr_sink_support(data->drm_fd, data->debugfs_fd, + PSR_MODE_2, data->output)) { + supported = true; + data->psr_mode = PSR_MODE_2; + } else + igt_info("selective fetch not supported on output %s\n", data->output->name); + + return supported; +} + +static const char *get_psr_mode_str_for_output(data_t *data) +{ + static const char *psr_mode; + + switch (data->psr_mode) { + case PSR_MODE_2: + psr_mode = "psr2"; + break; + case PR_MODE_SEL_FETCH: + psr_mode = "pr"; + break; + default: + psr_mode = ""; + } + return psr_mode; +} + static const char *op_str(enum operations op) { static const char * const name[] = { @@ -688,7 +724,7 @@ static void damaged_plane_move(data_t *data) igt_display_commit2(&data->display, COMMIT_ATOMIC); - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); expected_output(data); } @@ -788,7 +824,7 @@ static void plane_move_continuous(data_t *data) { int target_x, target_y; - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); get_target_coords(data, &target_x, &target_y); @@ -865,7 +901,7 @@ static void damaged_plane_update(data_t *data) igt_plane_set_position(data->test_plane, 0, 0); igt_display_commit2(&data->display, COMMIT_ATOMIC); - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); expected_output(data); } @@ -874,7 +910,7 @@ static void run(data_t *data) { int i; - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); if (data->fbc_flag == true && data->op_fbc_mode == FBC_ENABLED) igt_assert_f(intel_fbc_wait_until_enabled(data->drm_fd, @@ -952,14 +988,22 @@ static void cleanup(data_t *data) igt_remove_fb(data->drm_fd, &data->fb_test); } -static int check_psr2_support(data_t *data) +static bool check_pr_psr2_sel_fetch_support(data_t *data) { - int status; + bool status = false; + + /* Check sink supports PR/PSR2 selective fetch */ + if (!set_sel_fetch_mode_for_output(data)) + return false; + + /* Check if selective fetch can be enabled */ + if (!selective_fetch_check(data->debugfs_fd, data->output)) + igt_assert("Selective fetch is not enabled even though panel should support it\n"); prepare(data); - status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL); + /* We enter into DEEP_SLEEP for both PSR2 and PR sel fetch */ + status = psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output); cleanup(data); - return status; } @@ -981,6 +1025,8 @@ pipe_output_combo_valid(igt_display_t *display, igt_main { + bool output_supports_pr_psr2_sel_fetch = false; + bool pr_psr2_sel_fetch_supported = false; data_t data = {}; igt_output_t *outputs[IGT_MAX_PIPES * IGT_MAX_PIPES]; int i, j, k, y; @@ -1000,11 +1046,6 @@ igt_main data.debugfs_fd = igt_debugfs_dir(data.drm_fd); kmstest_set_vt_graphics_mode(); - igt_require_f(psr_sink_support(data.drm_fd, - data.debugfs_fd, PSR_MODE_2, - NULL), - "Sink does not support PSR2\n"); - display_init(&data); if ((intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 20) && @@ -1028,7 +1069,8 @@ igt_main for_each_pipe_with_valid_output(&data.display, data.pipe, data.output) { coexist_features[n_pipes] = 0; - if (check_psr2_support(&data)) { + output_supports_pr_psr2_sel_fetch = check_pr_psr2_sel_fetch_support(&data); + if (output_supports_pr_psr2_sel_fetch) { pipes[n_pipes] = data.pipe; outputs[n_pipes] = data.output; @@ -1037,7 +1079,10 @@ igt_main n_pipes++; } + pr_psr2_sel_fetch_supported |= output_supports_pr_psr2_sel_fetch; } + igt_require_f(pr_psr2_sel_fetch_supported, + "No output supports selective fetch\n"); } for (y = 0; y < ARRAY_SIZE(fbc_status); y++) { @@ -1054,15 +1099,18 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; + igt_assert_f(set_sel_fetch_mode_for_output(&data), + "Selective fetch is not supported\n"); for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_PRIMARY; data.coexist_feature = j; for (k = 1; k <= MAX_DAMAGE_AREAS; k++) { @@ -1087,18 +1135,22 @@ igt_main if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; + igt_assert_f(set_sel_fetch_mode_for_output(&data), + "Selective fetch is not supported\n"); for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", + igt_dynamic_f("%s-pipe-%s-%s%s", + get_psr_mode_str_for_output(&data), kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_PRIMARY; data.coexist_feature = j; + for (k = 1; k <= MAX_DAMAGE_AREAS; k++) { data.damage_area_count = k; prepare(&data); @@ -1119,17 +1171,21 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; + igt_assert_f(set_sel_fetch_mode_for_output(&data), + "Selective fetch is not supported\n"); for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + for (k = 1; k <= MAX_DAMAGE_AREAS; k++) { data.damage_area_count = k; prepare(&data); @@ -1149,15 +1205,18 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; + igt_assert_f(set_sel_fetch_mode_for_output(&data), + "Selective fetch is not supported\n"); for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; prepare(&data); @@ -1175,17 +1234,21 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; + igt_assert_f(set_sel_fetch_mode_for_output(&data), + "Selective fetch is not supported\n"); for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; + prepare(&data); run(&data); cleanup(&data); @@ -1202,15 +1265,18 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; + igt_assert_f(set_sel_fetch_mode_for_output(&data), + "Selective fetch is not supported\n"); for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; prepare(&data); @@ -1229,15 +1295,18 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; + igt_assert_f(set_sel_fetch_mode_for_output(&data), + "Selective fetch is not supported\n"); for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; prepare(&data); @@ -1257,15 +1326,19 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; + igt_assert_f(set_sel_fetch_mode_for_output(&data), + "Selective fetch is not supported\n"); for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", + get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; for (k = POS_TOP_LEFT; k <= POS_BOTTOM_RIGHT ; k++) { @@ -1286,15 +1359,18 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; + igt_assert_f(set_sel_fetch_mode_for_output(&data), + "Selective fetch is not supported\n"); for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; prepare(&data); @@ -1313,15 +1389,18 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; + igt_assert_f(set_sel_fetch_mode_for_output(&data), + "Selective fetch is not supported\n"); for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; prepare(&data); @@ -1340,15 +1419,18 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; + igt_assert_f(set_sel_fetch_mode_for_output(&data), + "Selective fetch is not supported\n"); for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; prepare(&data); @@ -1368,19 +1450,23 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; + igt_assert_f(set_sel_fetch_mode_for_output(&data), + "Selective fetch is not supported\n"); for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + get_psr_mode_str_for_output(&data), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; for (k = 1; k <= MAX_DAMAGE_AREAS; k++) { data.damage_area_count = k; data.test_plane_id = DRM_PLANE_TYPE_PRIMARY; data.coexist_feature = j; + prepare(&data); run(&data); cleanup(&data); @@ -1401,15 +1487,18 @@ igt_main for (i = 0; i < n_pipes; i++) { if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) continue; + data.pipe = pipes[i]; + data.output = outputs[i]; + igt_assert_f(set_sel_fetch_mode_for_output(&data), + "Selective fetch is not supported\n"); for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { - data.pipe = pipes[i]; - data.output = outputs[i]; data.damage_area_count = 1; if (data.op_fbc_mode == FBC_ENABLED) data.primary_format = DRM_FORMAT_XRGB8888; -- 2.25.1 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf 2024-02-21 9:01 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi @ 2024-02-21 8:56 ` Hogander, Jouni 0 siblings, 0 replies; 17+ messages in thread From: Hogander, Jouni @ 2024-02-21 8:56 UTC (permalink / raw) To: Joshi, Kunal1, igt-dev@lists.freedesktop.org Cc: Murthy, Arun R, Manna, Animesh On Wed, 2024-02-21 at 14:31 +0530, Kunal Joshi wrote: > Extend the tests to cover panel replay selective fetch feature. > > From kms_psr2_sf test point of view we have > check_pr_psr2_sel_fetch_support > function to check if PR/PSR2 selective fetch is supported for an > output > if output supports selective fetch then we check we if enter > DEEP_SLEEP mode > in run function > > v2: fixed dynamic test name > v3: use check_psr2_support (Jouni) > v4: correct order of checks in check_pr_psr2_sel_fetch_support > (Jouni) > use appropriate psr mode in psr_wait_entry (Jouni) > v5: modify get_sel_fetch_mode_for_output to use member data (Jouni) > v6: modify get_sel_fetch_mode_for_output -> > set_sel_fetch_mode_for_output (Jouni) > > Cc: Jouni Högander <jouni.hogander@intel.com> > Cc: Animesh Manna <animesh.manna@intel.com> > Cc: Arun R Murthy <arun.r.murthy@intel.com> > Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> > --- > tests/intel/kms_psr2_sf.c | 195 +++++++++++++++++++++++++++--------- > -- > 1 file changed, 142 insertions(+), 53 deletions(-) > > diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c > index 0fb300161..4c3e34aa0 100644 > --- a/tests/intel/kms_psr2_sf.c > +++ b/tests/intel/kms_psr2_sf.c > @@ -172,6 +172,7 @@ typedef struct { > uint32_t screen_changes; > int cur_x, cur_y; > enum pipe pipe; > + enum psr_mode psr_mode; > enum { > FEATURE_NONE = 0, > FEATURE_DSC = 1, > @@ -179,6 +180,41 @@ typedef struct { > } coexist_feature; > } data_t; > > +static bool set_sel_fetch_mode_for_output(data_t *data) > +{ > + bool supported = false; > + > + if (psr_sink_support(data->drm_fd, data->debugfs_fd, > + PR_MODE_SEL_FETCH, > data->output)) { > + supported = true; > + data->psr_mode = PR_MODE_SEL_FETCH; > + } else if (psr_sink_support(data->drm_fd, data->debugfs_fd, > + PSR_MODE_2, > data->output)) { > + supported = true; > + data->psr_mode = PSR_MODE_2; > + } else > + igt_info("selective fetch not supported on output > %s\n", data->output->name); > + > + return supported; > +} > + > +static const char *get_psr_mode_str_for_output(data_t *data) > +{ > + static const char *psr_mode; > + > + switch (data->psr_mode) { > + case PSR_MODE_2: > + psr_mode = "psr2"; > + break; > + case PR_MODE_SEL_FETCH: > + psr_mode = "pr"; > + break; > + default: > + psr_mode = ""; > + } > + return psr_mode; > +} > + > static const char *op_str(enum operations op) > { > static const char * const name[] = { > @@ -688,7 +724,7 @@ static void damaged_plane_move(data_t *data) > > igt_display_commit2(&data->display, COMMIT_ATOMIC); > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > expected_output(data); > } > @@ -788,7 +824,7 @@ static void plane_move_continuous(data_t *data) > { > int target_x, target_y; > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > get_target_coords(data, &target_x, &target_y); > > @@ -865,7 +901,7 @@ static void damaged_plane_update(data_t *data) > igt_plane_set_position(data->test_plane, 0, 0); > igt_display_commit2(&data->display, COMMIT_ATOMIC); > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > expected_output(data); > } > @@ -874,7 +910,7 @@ static void run(data_t *data) > { > int i; > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > if (data->fbc_flag == true && data->op_fbc_mode == > FBC_ENABLED) > igt_assert_f(intel_fbc_wait_until_enabled(data- > >drm_fd, > @@ -952,14 +988,22 @@ static void cleanup(data_t *data) > igt_remove_fb(data->drm_fd, &data->fb_test); > } > > -static int check_psr2_support(data_t *data) > +static bool check_pr_psr2_sel_fetch_support(data_t *data) > { > - int status; > + bool status = false; > + > + /* Check sink supports PR/PSR2 selective fetch */ > + if (!set_sel_fetch_mode_for_output(data)) > + return false; > + > + /* Check if selective fetch can be enabled */ > + if (!selective_fetch_check(data->debugfs_fd, data->output)) > + igt_assert("Selective fetch is not enabled even > though panel should support it\n"); > > prepare(data); > - status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL); > + /* We enter into DEEP_SLEEP for both PSR2 and PR sel fetch */ > + status = psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output); > cleanup(data); > - > return status; > } > > @@ -981,6 +1025,8 @@ pipe_output_combo_valid(igt_display_t *display, > > igt_main > { > + bool output_supports_pr_psr2_sel_fetch = false; > + bool pr_psr2_sel_fetch_supported = false; > data_t data = {}; > igt_output_t *outputs[IGT_MAX_PIPES * IGT_MAX_PIPES]; > int i, j, k, y; > @@ -1000,11 +1046,6 @@ igt_main > data.debugfs_fd = igt_debugfs_dir(data.drm_fd); > kmstest_set_vt_graphics_mode(); > > - igt_require_f(psr_sink_support(data.drm_fd, > - data.debugfs_fd, > PSR_MODE_2, > - NULL), > - "Sink does not support PSR2\n"); > - > display_init(&data); > > if > ((intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 20) && > @@ -1028,7 +1069,8 @@ igt_main > > for_each_pipe_with_valid_output(&data.display, > data.pipe, data.output) { > coexist_features[n_pipes] = 0; > - if (check_psr2_support(&data)) { > + output_supports_pr_psr2_sel_fetch = > check_pr_psr2_sel_fetch_support(&data); > + if (output_supports_pr_psr2_sel_fetch) { > pipes[n_pipes] = data.pipe; > outputs[n_pipes] = data.output; > > @@ -1037,7 +1079,10 @@ igt_main > > n_pipes++; > } > + pr_psr2_sel_fetch_supported |= > output_supports_pr_psr2_sel_fetch; > } > + igt_require_f(pr_psr2_sel_fetch_supported, > + "No output supports > selective fetch\n"); > } > > for (y = 0; y < ARRAY_SIZE(fbc_status); y++) { > @@ -1054,15 +1099,18 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > + igt_assert_f(set_sel_fetch_mode_for_o > utput(&data), > + "Selective > fetch is not supported\n"); > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_PRIMARY; > data.coexist_feature > = j; > for (k = 1; k <= > MAX_DAMAGE_AREAS; k++) { > @@ -1087,18 +1135,22 @@ igt_main > if > (!pipe_output_combo_valid(&data.display, pipes[i], > > outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > + igt_assert_f(set_sel_fetch_mo > de_for_output(&data), > + > "Selective fetch is not supported\n"); > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE > && !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe- > %s-%s%s", > + igt_dynamic_f("%s- > pipe-%s-%s%s", > + > get_psr_mode_str_for_output(&data), > > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = > pipes[i]; > - data.output = > outputs[i]; > data.test_pla > ne_id = DRM_PLANE_TYPE_PRIMARY; > data.coexist_ > feature = j; > + > for (k = 1; k > <= MAX_DAMAGE_AREAS; k++) { > data. > damage_area_count = k; > prepa > re(&data); > @@ -1119,17 +1171,21 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > + igt_assert_f(set_sel_fetch_mode_for_o > utput(&data), > + "Selective > fetch is not supported\n"); > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + > for (k = 1; k <= > MAX_DAMAGE_AREAS; k++) { > data.damage_a > rea_count = k; > prepare(&data > ); > @@ -1149,15 +1205,18 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > + igt_assert_f(set_sel_fetch_mode_for_o > utput(&data), > + "Selective > fetch is not supported\n"); > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > prepare(&data); > @@ -1175,17 +1234,21 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > + igt_assert_f(set_sel_fetch_mode_for_o > utput(&data), > + "Selective > fetch is not supported\n"); > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > + > prepare(&data); > run(&data); > cleanup(&data); > @@ -1202,15 +1265,18 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > + igt_assert_f(set_sel_fetch_mode_for_o > utput(&data), > + "Selective > fetch is not supported\n"); > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > prepare(&data); > @@ -1229,15 +1295,18 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > + igt_assert_f(set_sel_fetch_mode_for_o > utput(&data), > + "Selective > fetch is not supported\n"); > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > prepare(&data); > @@ -1257,15 +1326,19 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > + igt_assert_f(set_sel_fetch_mode_for_o > utput(&data), > + "Selective > fetch is not supported\n"); > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", > + > get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > for (k = > POS_TOP_LEFT; k <= POS_BOTTOM_RIGHT ; k++) { > @@ -1286,15 +1359,18 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > + igt_assert_f(set_sel_fetch_mode_for_o > utput(&data), > + "Selective > fetch is not supported\n"); > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature = j; > prepare(&data); > @@ -1313,15 +1389,18 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > + igt_assert_f(set_sel_fetch_mode_for_o > utput(&data), > + "Selective > fetch is not supported\n"); > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > prepare(&data); > @@ -1340,15 +1419,18 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > + igt_assert_f(set_sel_fetch_mode_for_o > utput(&data), > + "Selective > fetch is not supported\n"); > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > prepare(&data); > @@ -1368,19 +1450,23 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > + igt_assert_f(set_sel_fetch_mode_for_o > utput(&data), > + "Selective > fetch is not supported\n"); > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", kmstest_pipe_name(pipes[i]), > + > get_psr_mode_str_for_output(&data), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > for (k = 1; k <= > MAX_DAMAGE_AREAS; k++) { > data.damage_a > rea_count = k; > data.test_pla > ne_id = DRM_PLANE_TYPE_PRIMARY; > data.coexist_ > feature = j; > + > prepare(&data > ); > run(&data); > cleanup(&data > ); > @@ -1401,15 +1487,18 @@ igt_main > for (i = 0; i < n_pipes; i++) { > if > (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i])) > continue; > + data.pipe = pipes[i]; > + data.output = outputs[i]; > + igt_assert_f(set_sel_fetch_mode_for_o > utput(&data), > + "Selective > fetch is not supported\n"); > > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > - data.pipe = pipes[i]; > - data.output = > outputs[i]; > data.damage_area_coun > t = 1; > if (data.op_fbc_mode > == FBC_ENABLED) > data.primary_ > format = DRM_FORMAT_XRGB8888; ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf @ 2024-02-18 9:17 Kunal Joshi 2024-02-18 9:17 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi 0 siblings, 1 reply; 17+ messages in thread From: Kunal Joshi @ 2024-02-18 9:17 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi kmd series [1] adds supports for panel replay selective fetch, modify lib and kms_psr2_sf to extend kms_psr2_sf tests to validate panel replay selective fetch as well. [1] https://patchwork.freedesktop.org/patch/575163/?series=128193&rev=3 Kunal Joshi (3): lib/igt_psr: modify library to support multiple PSR/PR outputs lib/igt_psr: add support for PR selective update tests/intel/kms_psr2_sf: extend tests for panel replay sf lib/igt_psr.c | 98 +++++++++------- lib/igt_psr.h | 14 +-- tests/intel/kms_dirtyfb.c | 4 +- tests/intel/kms_fbcon_fbt.c | 4 +- tests/intel/kms_frontbuffer_tracking.c | 4 +- tests/intel/kms_pm_dc.c | 6 +- tests/intel/kms_psr.c | 4 +- tests/intel/kms_psr2_sf.c | 155 +++++++++++++++++++------ tests/intel/kms_psr2_su.c | 2 +- tests/intel/kms_psr_stress_test.c | 4 +- tests/kms_async_flips.c | 4 +- tests/kms_cursor_legacy.c | 4 +- 12 files changed, 204 insertions(+), 99 deletions(-) -- 2.25.1 ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf 2024-02-18 9:17 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi @ 2024-02-18 9:17 ` Kunal Joshi 2024-02-19 8:31 ` Hogander, Jouni 0 siblings, 1 reply; 17+ messages in thread From: Kunal Joshi @ 2024-02-18 9:17 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy Extend the tests to cover panel replay selective fetch feature. From kms_psr2_sf test point of view we have check_pr_psr2_sel_fetch_support function to check if PR/PSR2 selective fetch is supported for an output if output supports selective fetch then we check we enter DEEP_SLEEP mode in run function v2: fixed dynamic test name v3: use check_psr2_support (Jouni) v4: correct order of checks in check_pr_psr2_sel_fetch_support (Jouni) use appropriate psr mode in psr_wait_entry (Jouni) v5: use static in get_psr_mode_str_for_output (Jouni) Cc: Jouni Högander <jouni.hogander@intel.com> Cc: Animesh Manna <animesh.manna@intel.com> Cc: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> --- tests/intel/kms_psr2_sf.c | 147 +++++++++++++++++++++++++++++++------- 1 file changed, 120 insertions(+), 27 deletions(-) diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c index 8e6a9e02c..c6d871dd8 100644 --- a/tests/intel/kms_psr2_sf.c +++ b/tests/intel/kms_psr2_sf.c @@ -172,6 +172,7 @@ typedef struct { uint32_t screen_changes; int cur_x, cur_y; enum pipe pipe; + enum psr_mode psr_mode; enum { FEATURE_NONE = 0, FEATURE_DSC = 1, @@ -179,6 +180,34 @@ typedef struct { } coexist_feature; } data_t; +static enum psr_mode get_sel_fetch_mode_for_output(data_t *data, igt_output_t *output) +{ + enum psr_mode mode = PSR_DISABLED; + + if (psr_sink_support(data->drm_fd, data->debugfs_fd, + PR_MODE_SEL_FETCH, output)) + mode = PR_MODE_SEL_FETCH; + else if (psr_sink_support(data->drm_fd, data->debugfs_fd, + PSR_MODE_2, output)) + mode = PSR_MODE_2; + else + igt_info("selective fetch not supported on output %s\n", output->name); + + return mode; +} + +static const char *get_psr_mode_str_for_output(data_t *data, igt_output_t *output) +{ + static const char *psr_mode = NULL; + + if (get_sel_fetch_mode_for_output(data, output) == PR_MODE_SEL_FETCH) + psr_mode = "pr"; + else if (get_sel_fetch_mode_for_output(data, output) == PSR_MODE_2) + psr_mode = "psr2"; + igt_assert_f(psr_mode, "Invalid psr mode\n"); + return psr_mode; +} + static const char *op_str(enum operations op) { static const char * const name[] = { @@ -688,7 +717,7 @@ static void damaged_plane_move(data_t *data) igt_display_commit2(&data->display, COMMIT_ATOMIC); - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); expected_output(data); } @@ -788,7 +817,7 @@ static void plane_move_continuous(data_t *data) { int target_x, target_y; - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); get_target_coords(data, &target_x, &target_y); @@ -865,7 +894,7 @@ static void damaged_plane_update(data_t *data) igt_plane_set_position(data->test_plane, 0, 0); igt_display_commit2(&data->display, COMMIT_ATOMIC); - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); expected_output(data); } @@ -874,7 +903,7 @@ static void run(data_t *data) { int i; - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); if (data->fbc_flag == true && data->op_fbc_mode == FBC_ENABLED) igt_assert_f(intel_fbc_wait_until_enabled(data->drm_fd, @@ -952,14 +981,24 @@ static void cleanup(data_t *data) igt_remove_fb(data->drm_fd, &data->fb_test); } -static int check_psr2_support(data_t *data) +static bool check_pr_psr2_sel_fetch_support(data_t *data) { - int status; + bool status = false; + enum psr_mode psr_mode; + + /* Check sink supports PR/PSR2 selective fetch */ + psr_mode = get_sel_fetch_mode_for_output(data, data->output); + if (psr_mode == PSR_DISABLED) + return false; + + /* Check if selective fetch can be enabled */ + if (!selective_fetch_check(data->debugfs_fd, data->output)) + igt_assert("Selective fetch is not enabled even though panel should support it\n"); prepare(data); - status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL); + /* We enter into DEEP_SLEEP for both PSR2 and PR sel fetch */ + status = psr_wait_entry(data->debugfs_fd, psr_mode, data->output); cleanup(data); - return status; } @@ -981,6 +1020,8 @@ pipe_output_combo_valid(igt_display_t *display, igt_main { + bool output_supports_pr_psr2_sel_fetch = false; + bool pr_psr2_sel_fetch_supported = false; data_t data = {}; igt_output_t *outputs[IGT_MAX_PIPES * IGT_MAX_PIPES]; int i, j, k, y; @@ -1000,11 +1041,6 @@ igt_main data.debugfs_fd = igt_debugfs_dir(data.drm_fd); kmstest_set_vt_graphics_mode(); - igt_require_f(psr_sink_support(data.drm_fd, - data.debugfs_fd, PSR_MODE_2, - NULL), - "Sink does not support PSR2\n"); - display_init(&data); if ((intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 20) && @@ -1023,7 +1059,8 @@ igt_main for_each_pipe_with_valid_output(&data.display, data.pipe, data.output) { coexist_features[n_pipes] = 0; - if (check_psr2_support(&data)) { + output_supports_pr_psr2_sel_fetch = check_pr_psr2_sel_fetch_support(&data); + if (output_supports_pr_psr2_sel_fetch) { pipes[n_pipes] = data.pipe; outputs[n_pipes] = data.output; @@ -1032,7 +1069,10 @@ igt_main n_pipes++; } + pr_psr2_sel_fetch_supported |= output_supports_pr_psr2_sel_fetch; } + igt_require_f(pr_psr2_sel_fetch_supported, + "No output supports selective fetch\n"); } for (y = 0; y < ARRAY_SIZE(fbc_status); y++) { @@ -1053,13 +1093,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_PRIMARY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); for (k = 1; k <= MAX_DAMAGE_AREAS; k++) { data.damage_area_count = k; prepare(&data); @@ -1086,7 +1130,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", + igt_dynamic_f("%s-pipe-%s-%s%s", + get_psr_mode_str_for_output(&data, outputs[i]), kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { @@ -1094,6 +1139,9 @@ igt_main data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_PRIMARY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); for (k = 1; k <= MAX_DAMAGE_AREAS; k++) { data.damage_area_count = k; prepare(&data); @@ -1118,13 +1166,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); for (k = 1; k <= MAX_DAMAGE_AREAS; k++) { data.damage_area_count = k; prepare(&data); @@ -1148,13 +1200,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1174,13 +1230,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1201,13 +1261,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1228,13 +1292,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1256,13 +1324,18 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", + get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); for (k = POS_TOP_LEFT; k <= POS_BOTTOM_RIGHT ; k++) { data.pos = k; prepare(&data); @@ -1285,13 +1358,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1312,13 +1389,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1339,13 +1420,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1367,7 +1452,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + get_psr_mode_str_for_output(&data, outputs[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1376,6 +1462,9 @@ igt_main data.damage_area_count = k; data.test_plane_id = DRM_PLANE_TYPE_PRIMARY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1400,7 +1489,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1412,6 +1502,9 @@ igt_main data.primary_format = DRM_FORMAT_NV12; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); -- 2.25.1 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf 2024-02-18 9:17 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi @ 2024-02-19 8:31 ` Hogander, Jouni 0 siblings, 0 replies; 17+ messages in thread From: Hogander, Jouni @ 2024-02-19 8:31 UTC (permalink / raw) To: Joshi, Kunal1, igt-dev@lists.freedesktop.org Cc: Murthy, Arun R, Manna, Animesh On Sun, 2024-02-18 at 14:47 +0530, Kunal Joshi wrote: > Extend the tests to cover panel replay selective fetch feature. > > From kms_psr2_sf test point of view we have > check_pr_psr2_sel_fetch_support > function to check if PR/PSR2 selective fetch is supported for an > output > if output supports selective fetch then we check we enter DEEP_SLEEP > mode > in run function > > v2: fixed dynamic test name > v3: use check_psr2_support (Jouni) > v4: correct order of checks in check_pr_psr2_sel_fetch_support > (Jouni) > use appropriate psr mode in psr_wait_entry (Jouni) > v5: use static in get_psr_mode_str_for_output (Jouni) > > Cc: Jouni Högander <jouni.hogander@intel.com> > Cc: Animesh Manna <animesh.manna@intel.com> > Cc: Arun R Murthy <arun.r.murthy@intel.com> > Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> > --- > tests/intel/kms_psr2_sf.c | 147 +++++++++++++++++++++++++++++++----- > -- > 1 file changed, 120 insertions(+), 27 deletions(-) > > diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c > index 8e6a9e02c..c6d871dd8 100644 > --- a/tests/intel/kms_psr2_sf.c > +++ b/tests/intel/kms_psr2_sf.c > @@ -172,6 +172,7 @@ typedef struct { > uint32_t screen_changes; > int cur_x, cur_y; > enum pipe pipe; > + enum psr_mode psr_mode; > enum { > FEATURE_NONE = 0, > FEATURE_DSC = 1, > @@ -179,6 +180,34 @@ typedef struct { > } coexist_feature; > } data_t; > > +static enum psr_mode get_sel_fetch_mode_for_output(data_t *data, > igt_output_t *output) output is already part of data? > +{ > + enum psr_mode mode = PSR_DISABLED; > + > + if (psr_sink_support(data->drm_fd, data->debugfs_fd, > + PR_MODE_SEL_FETCH, > output)) > + mode = PR_MODE_SEL_FETCH; > + else if (psr_sink_support(data->drm_fd, data->debugfs_fd, > + PSR_MODE_2, > output)) > + mode = PSR_MODE_2; > + else > + igt_info("selective fetch not supported on output > %s\n", output->name); > + > + return mode; I think it is somehow wrong to return PSR_DISABLED here. It could be PSR1 or PR full frame update. How about setting data->psr_mode and return true if it's PSR2 or PR_SELECTIVE_UPDATE. > +} > + > +static const char *get_psr_mode_str_for_output(data_t *data, > igt_output_t *output) > +{ > + static const char *psr_mode = NULL; > + > + if (get_sel_fetch_mode_for_output(data, output) == > PR_MODE_SEL_FETCH) > + psr_mode = "pr"; > + else if (get_sel_fetch_mode_for_output(data, output) == > PSR_MODE_2) > + psr_mode = "psr2"; > + igt_assert_f(psr_mode, "Invalid psr mode\n"); > + return psr_mode; > +} > + > static const char *op_str(enum operations op) > { > static const char * const name[] = { > @@ -688,7 +717,7 @@ static void damaged_plane_move(data_t *data) > > igt_display_commit2(&data->display, COMMIT_ATOMIC); > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > expected_output(data); > } > @@ -788,7 +817,7 @@ static void plane_move_continuous(data_t *data) > { > int target_x, target_y; > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > get_target_coords(data, &target_x, &target_y); > > @@ -865,7 +894,7 @@ static void damaged_plane_update(data_t *data) > igt_plane_set_position(data->test_plane, 0, 0); > igt_display_commit2(&data->display, COMMIT_ATOMIC); > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > expected_output(data); > } > @@ -874,7 +903,7 @@ static void run(data_t *data) > { > int i; > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > if (data->fbc_flag == true && data->op_fbc_mode == > FBC_ENABLED) > igt_assert_f(intel_fbc_wait_until_enabled(data- > >drm_fd, > @@ -952,14 +981,24 @@ static void cleanup(data_t *data) > igt_remove_fb(data->drm_fd, &data->fb_test); > } > > -static int check_psr2_support(data_t *data) > +static bool check_pr_psr2_sel_fetch_support(data_t *data) > { > - int status; > + bool status = false; > + enum psr_mode psr_mode; You have already psr_mode in data structure. BR, Jouni Högander > + > + /* Check sink supports PR/PSR2 selective fetch */ > + psr_mode = get_sel_fetch_mode_for_output(data, data->output); > + if (psr_mode == PSR_DISABLED) > + return false; > + > + /* Check if selective fetch can be enabled */ > + if (!selective_fetch_check(data->debugfs_fd, data->output)) > + igt_assert("Selective fetch is not enabled even > though panel should support it\n"); > > prepare(data); > - status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL); > + /* We enter into DEEP_SLEEP for both PSR2 and PR sel fetch */ > + status = psr_wait_entry(data->debugfs_fd, psr_mode, data- > >output); > cleanup(data); > - > return status; > } > > @@ -981,6 +1020,8 @@ pipe_output_combo_valid(igt_display_t *display, > > igt_main > { > + bool output_supports_pr_psr2_sel_fetch = false; > + bool pr_psr2_sel_fetch_supported = false; > data_t data = {}; > igt_output_t *outputs[IGT_MAX_PIPES * IGT_MAX_PIPES]; > int i, j, k, y; > @@ -1000,11 +1041,6 @@ igt_main > data.debugfs_fd = igt_debugfs_dir(data.drm_fd); > kmstest_set_vt_graphics_mode(); > > - igt_require_f(psr_sink_support(data.drm_fd, > - data.debugfs_fd, > PSR_MODE_2, > - NULL), > - "Sink does not support PSR2\n"); > - > display_init(&data); > > if > ((intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 20) && > @@ -1023,7 +1059,8 @@ igt_main > > for_each_pipe_with_valid_output(&data.display, > data.pipe, data.output) { > coexist_features[n_pipes] = 0; > - if (check_psr2_support(&data)) { > + output_supports_pr_psr2_sel_fetch = > check_pr_psr2_sel_fetch_support(&data); > + if (output_supports_pr_psr2_sel_fetch) { > pipes[n_pipes] = data.pipe; > outputs[n_pipes] = data.output; > > @@ -1032,7 +1069,10 @@ igt_main > > n_pipes++; > } > + pr_psr2_sel_fetch_supported |= > output_supports_pr_psr2_sel_fetch; > } > + igt_require_f(pr_psr2_sel_fetch_supported, > + "No output supports > selective fetch\n"); > } > > for (y = 0; y < ARRAY_SIZE(fbc_status); y++) { > @@ -1053,13 +1093,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_PRIMARY; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > for (k = 1; k <= > MAX_DAMAGE_AREAS; k++) { > data.damage_a > rea_count = k; > prepare(&data > ); > @@ -1086,7 +1130,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE > && !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe- > %s-%s%s", > + igt_dynamic_f("%s- > pipe-%s-%s%s", > + > get_psr_mode_str_for_output(&data, outputs[i]), > > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > @@ -1094,6 +1139,9 @@ igt_main > data.output = > outputs[i]; > data.test_pla > ne_id = DRM_PLANE_TYPE_PRIMARY; > data.coexist_ > feature = j; > + data.psr_mode > = get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f( > data.psr_mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > for (k = 1; k > <= MAX_DAMAGE_AREAS; k++) { > data. > damage_area_count = k; > prepa > re(&data); > @@ -1118,13 +1166,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > for (k = 1; k <= > MAX_DAMAGE_AREAS; k++) { > data.damage_a > rea_count = k; > prepare(&data > ); > @@ -1148,13 +1200,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1174,13 +1230,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1201,13 +1261,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1228,13 +1292,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1256,13 +1324,18 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", > + > get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > for (k = > POS_TOP_LEFT; k <= POS_BOTTOM_RIGHT ; k++) { > data.pos = k; > prepare(&data > ); > @@ -1285,13 +1358,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr_mode != > PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1312,13 +1389,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1339,13 +1420,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1367,7 +1452,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", kmstest_pipe_name(pipes[i]), > + > get_psr_mode_str_for_output(&data, outputs[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1376,6 +1462,9 @@ igt_main > data.damage_a > rea_count = k; > data.test_pla > ne_id = DRM_PLANE_TYPE_PRIMARY; > data.coexist_ > feature = j; > + data.psr_mode > = get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f( > data.psr_mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data > ); > run(&data); > cleanup(&data > ); > @@ -1400,7 +1489,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1412,6 +1502,9 @@ igt_main > data.primary_ > format = DRM_FORMAT_NV12; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf @ 2024-02-07 13:53 Kunal Joshi 2024-02-07 13:53 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi 0 siblings, 1 reply; 17+ messages in thread From: Kunal Joshi @ 2024-02-07 13:53 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi kmd series [1] adds supports for panel replay selective fetch, modify lib and kms_psr2_sf to extend kms_psr2_sf tests to validate panel replay selective fetch as well. [1] https://patchwork.freedesktop.org/patch/575163/?series=128193&rev=3 Kunal Joshi (3): lib/igt_psr: add support for PR selective update lib/igt_psr: modify library to support multiple PSR/PR outputs tests/intel/kms_psr2_sf: extend tests for panel replay sf lib/igt_psr.c | 130 +++++++++++++++++-------- lib/igt_psr.h | 14 +-- tests/intel/kms_dirtyfb.c | 4 +- tests/intel/kms_fbcon_fbt.c | 4 +- tests/intel/kms_frontbuffer_tracking.c | 4 +- tests/intel/kms_pm_dc.c | 6 +- tests/intel/kms_psr.c | 4 +- tests/intel/kms_psr2_sf.c | 94 +++++++++++------- tests/intel/kms_psr2_su.c | 2 +- tests/intel/kms_psr_stress_test.c | 4 +- tests/kms_async_flips.c | 4 +- tests/kms_cursor_legacy.c | 4 +- 12 files changed, 177 insertions(+), 97 deletions(-) -- 2.25.1 ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf 2024-02-07 13:53 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi @ 2024-02-07 13:53 ` Kunal Joshi 2024-02-08 9:05 ` Hogander, Jouni 0 siblings, 1 reply; 17+ messages in thread From: Kunal Joshi @ 2024-02-07 13:53 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy Extend the tests to cover panel replay selective fetch feature. From kms_psr2_sf test point of view we have check_pr_psr2_sel_fetch_support function to check if PR/PSR2 selective fetch is supported for an output if output supports selective fetch then we check we enter DEEP_SLEEP mode in run function v2: fixed dynamic test name v3: use check_psr2_support (Jouni) Cc: Jouni Högander <jouni.hogander@intel.com> Cc: Animesh Manna <animesh.manna@intel.com> Cc: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> --- tests/intel/kms_psr2_sf.c | 86 +++++++++++++++++++++++++++------------ 1 file changed, 61 insertions(+), 25 deletions(-) diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c index 8e6a9e02c..1f12659e2 100644 --- a/tests/intel/kms_psr2_sf.c +++ b/tests/intel/kms_psr2_sf.c @@ -207,6 +207,21 @@ static const char *coexist_feature_str(int coexist_feature) } } +static const char *get_psr_mode_for_output(data_t *data, igt_output_t *output) +{ + const char *psr_mode = NULL; + + if (psr_sink_support(data->drm_fd, data->debugfs_fd, PR_MODE_SEL_FETCH, + output)) + psr_mode = "pr"; + else if (psr_sink_support(data->drm_fd, data->debugfs_fd, PSR_MODE_2, + output)) + psr_mode = "psr2"; + else + igt_assert_f(false, "PR/PSR2 selective fetch not supported\n"); + return psr_mode; +} + static void display_init(data_t *data) { igt_display_require(&data->display, data->drm_fd); @@ -874,7 +889,7 @@ static void run(data_t *data) { int i; - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, data->output)); if (data->fbc_flag == true && data->op_fbc_mode == FBC_ENABLED) igt_assert_f(intel_fbc_wait_until_enabled(data->drm_fd, @@ -952,14 +967,20 @@ static void cleanup(data_t *data) igt_remove_fb(data->drm_fd, &data->fb_test); } -static int check_psr2_support(data_t *data) +static bool check_pr_psr2_sel_fetch_support(data_t *data) { - int status; - + bool status = false; + + if (!selective_fetch_check(data->debugfs_fd, data->output)) + return false; + else if (!(psr_sink_support(data->drm_fd, data->debugfs_fd, + PR_MODE_SEL_FETCH, data->output) || + psr_sink_support(data->drm_fd, data->debugfs_fd, + PSR_MODE_2_SEL_FETCH, data->output))) + return false; prepare(data); - status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL); + status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, data->output); cleanup(data); - return status; } @@ -981,6 +1002,8 @@ pipe_output_combo_valid(igt_display_t *display, igt_main { + bool output_supports_pr_psr2_sel_fetch = false; + bool pr_psr2_sel_fetch_supported = false; data_t data = {}; igt_output_t *outputs[IGT_MAX_PIPES * IGT_MAX_PIPES]; int i, j, k, y; @@ -1000,11 +1023,6 @@ igt_main data.debugfs_fd = igt_debugfs_dir(data.drm_fd); kmstest_set_vt_graphics_mode(); - igt_require_f(psr_sink_support(data.drm_fd, - data.debugfs_fd, PSR_MODE_2, - NULL), - "Sink does not support PSR2\n"); - display_init(&data); if ((intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 20) && @@ -1023,7 +1041,8 @@ igt_main for_each_pipe_with_valid_output(&data.display, data.pipe, data.output) { coexist_features[n_pipes] = 0; - if (check_psr2_support(&data)) { + output_supports_pr_psr2_sel_fetch = check_pr_psr2_sel_fetch_support(&data); + if (output_supports_pr_psr2_sel_fetch) { pipes[n_pipes] = data.pipe; outputs[n_pipes] = data.output; @@ -1032,7 +1051,10 @@ igt_main n_pipes++; } + pr_psr2_sel_fetch_supported |= output_supports_pr_psr2_sel_fetch; } + igt_require_f(pr_psr2_sel_fetch_supported, + "No output supports selective fetch\n"); } for (y = 0; y < ARRAY_SIZE(fbc_status); y++) { @@ -1053,7 +1075,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1086,7 +1109,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", + igt_dynamic_f("%s-pipe-%s-%s%s", + get_psr_mode_for_output(&data, outputs[i]), kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { @@ -1118,7 +1142,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1148,7 +1173,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1174,7 +1200,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1201,7 +1228,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1228,7 +1256,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1256,7 +1285,9 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", + get_psr_mode_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1285,7 +1316,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1312,7 +1344,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1339,7 +1372,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1367,7 +1401,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + get_psr_mode_for_output(&data, outputs[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1400,7 +1435,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; -- 2.25.1 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf 2024-02-07 13:53 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi @ 2024-02-08 9:05 ` Hogander, Jouni 0 siblings, 0 replies; 17+ messages in thread From: Hogander, Jouni @ 2024-02-08 9:05 UTC (permalink / raw) To: Joshi, Kunal1, igt-dev@lists.freedesktop.org Cc: Murthy, Arun R, Manna, Animesh On Wed, 2024-02-07 at 19:23 +0530, Kunal Joshi wrote: > Extend the tests to cover panel replay selective fetch feature. > > From kms_psr2_sf test point of view we have > check_pr_psr2_sel_fetch_support > function to check if PR/PSR2 selective fetch is supported for an > output > if output supports selective fetch then we check we enter DEEP_SLEEP > mode > in run function > > v2: fixed dynamic test name > v3: use check_psr2_support (Jouni) > > Cc: Jouni Högander <jouni.hogander@intel.com> > Cc: Animesh Manna <animesh.manna@intel.com> > Cc: Arun R Murthy <arun.r.murthy@intel.com> > Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> > --- > tests/intel/kms_psr2_sf.c | 86 +++++++++++++++++++++++++++---------- > -- > 1 file changed, 61 insertions(+), 25 deletions(-) > > diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c > index 8e6a9e02c..1f12659e2 100644 > --- a/tests/intel/kms_psr2_sf.c > +++ b/tests/intel/kms_psr2_sf.c > @@ -207,6 +207,21 @@ static const char *coexist_feature_str(int > coexist_feature) > } > } > > +static const char *get_psr_mode_for_output(data_t *data, > igt_output_t *output) > +{ > + const char *psr_mode = NULL; > + > + if (psr_sink_support(data->drm_fd, data->debugfs_fd, > PR_MODE_SEL_FETCH, > + output)) > + psr_mode = "pr"; > + else if (psr_sink_support(data->drm_fd, data->debugfs_fd, > PSR_MODE_2, > + output)) > + psr_mode = "psr2"; > + else > + igt_assert_f(false, "PR/PSR2 selective fetch not > supported\n"); > + return psr_mode; > +} > + > static void display_init(data_t *data) > { > igt_display_require(&data->display, data->drm_fd); > @@ -874,7 +889,7 @@ static void run(data_t *data) > { > int i; > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, data- > >output)); > > if (data->fbc_flag == true && data->op_fbc_mode == > FBC_ENABLED) > igt_assert_f(intel_fbc_wait_until_enabled(data- > >drm_fd, > @@ -952,14 +967,20 @@ static void cleanup(data_t *data) > igt_remove_fb(data->drm_fd, &data->fb_test); > } > > -static int check_psr2_support(data_t *data) > +static bool check_pr_psr2_sel_fetch_support(data_t *data) > { > - int status; > - > + bool status = false; > + > + if (!selective_fetch_check(data->debugfs_fd, data->output)) > + return false; Generally it doesn't make sense to not run the testcase if selective_fetch_check doesn't fails (returns 1) and psr_sink_support fails (returns 0). > + else if (!(psr_sink_support(data->drm_fd, data->debugfs_fd, > + > PR_MODE_SEL_FETCH, data->output) || > + psr_sink_support(data->drm_fd, data- > >debugfs_fd, > + > PSR_MODE_2_SEL_FETCH, data->output))) > + return false; I think we want to have failure if: sink supports PSR2 and selective fetch is enabled and psr_wait_entry fails. We want to have skip/not run if: sink doesn't support PSR2 or selective fetch is not enabled. > prepare(data); > - status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL); > + status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, data- > >output); I think you can't use PSR_MODE_2 for panel replay selective update case. BR, Jouni Högander > cleanup(data); > - > return status; > } > > @@ -981,6 +1002,8 @@ pipe_output_combo_valid(igt_display_t *display, > > igt_main > { > + bool output_supports_pr_psr2_sel_fetch = false; > + bool pr_psr2_sel_fetch_supported = false; > data_t data = {}; > igt_output_t *outputs[IGT_MAX_PIPES * IGT_MAX_PIPES]; > int i, j, k, y; > @@ -1000,11 +1023,6 @@ igt_main > data.debugfs_fd = igt_debugfs_dir(data.drm_fd); > kmstest_set_vt_graphics_mode(); > > - igt_require_f(psr_sink_support(data.drm_fd, > - data.debugfs_fd, > PSR_MODE_2, > - NULL), > - "Sink does not support PSR2\n"); > - > display_init(&data); > > if > ((intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 20) && > @@ -1023,7 +1041,8 @@ igt_main > > for_each_pipe_with_valid_output(&data.display, > data.pipe, data.output) { > coexist_features[n_pipes] = 0; > - if (check_psr2_support(&data)) { > + output_supports_pr_psr2_sel_fetch = > check_pr_psr2_sel_fetch_support(&data); > + if (output_supports_pr_psr2_sel_fetch) { > pipes[n_pipes] = data.pipe; > outputs[n_pipes] = data.output; > > @@ -1032,7 +1051,10 @@ igt_main > > n_pipes++; > } > + pr_psr2_sel_fetch_supported |= > output_supports_pr_psr2_sel_fetch; > } > + igt_require_f(pr_psr2_sel_fetch_supported, > + "No output supports > selective fetch\n"); > } > > for (y = 0; y < ARRAY_SIZE(fbc_status); y++) { > @@ -1053,7 +1075,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1086,7 +1109,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE > && !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe- > %s-%s%s", > + igt_dynamic_f("%s- > pipe-%s-%s%s", > + > get_psr_mode_for_output(&data, outputs[i]), > > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > @@ -1118,7 +1142,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1148,7 +1173,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1174,7 +1200,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1201,7 +1228,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1228,7 +1256,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1256,7 +1285,9 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", > + > get_psr_mode_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1285,7 +1316,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1312,7 +1344,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1339,7 +1372,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1367,7 +1401,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", kmstest_pipe_name(pipes[i]), > + > get_psr_mode_for_output(&data, outputs[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1400,7 +1435,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; ^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2024-02-21 8:56 UTC | newest] Thread overview: 17+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-02-19 16:33 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi 2024-02-19 16:33 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi 2024-02-20 8:47 ` Hogander, Jouni 2024-02-19 16:33 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi 2024-02-20 8:48 ` Hogander, Jouni 2024-02-19 16:33 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi 2024-02-20 9:06 ` Hogander, Jouni 2024-02-21 8:54 ` Joshi, Kunal1 2024-02-19 17:50 ` ✓ Fi.CI.BAT: success for extend psr2_sf test for pr_sf (rev6) Patchwork 2024-02-19 17:57 ` ✗ CI.xeBAT: failure " Patchwork 2024-02-19 23:45 ` ✗ Fi.CI.IGT: " Patchwork -- strict thread matches above, loose matches on Subject: below -- 2024-02-21 9:01 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi 2024-02-21 9:01 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi 2024-02-21 8:56 ` Hogander, Jouni 2024-02-18 9:17 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi 2024-02-18 9:17 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi 2024-02-19 8:31 ` Hogander, Jouni 2024-02-07 13:53 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi 2024-02-07 13:53 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi 2024-02-08 9:05 ` Hogander, Jouni
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