* [PATCH i-g-t 0/3] Add vmwgfx prime tests
@ 2024-05-09 19:15 Zack Rusin
2024-05-09 19:15 ` [PATCH i-g-t 1/3] tests/vmwgfx: Removing incorrect assert in mob_repeated_unref Zack Rusin
` (5 more replies)
0 siblings, 6 replies; 9+ messages in thread
From: Zack Rusin @ 2024-05-09 19:15 UTC (permalink / raw)
To: igt-dev; +Cc: ian.forbes, martin.krastev, maaz.mombasawala, Zack Rusin
The following series makes some adjustments for testing prime/dma-buf
on vmwgfx, adds a vmwgfx dedicated test for it and fixes some minor
issues.
Nothing too serioues and everything is contained within the vmwgfx
testing code.
Maaz Mombasawala (1):
tests/vmwgfx: Removing incorrect assert in mob_repeated_unref
Zack Rusin (2):
lib/vmwgfx: Allow using any buffer handle as a surface backing
tests/vmwgfx: Add a prime test
lib/igt_vmwgfx.c | 33 ++-
lib/igt_vmwgfx.h | 12 +-
tests/vmwgfx/meson.build | 3 +-
tests/vmwgfx/vmw_mob_stress.c | 5 +-
tests/vmwgfx/vmw_prime.c | 355 ++++++++++++++++++++++++++++++++
tests/vmwgfx/vmw_ref_count.c | 12 +-
tests/vmwgfx/vmw_surface_copy.c | 8 +-
tests/vmwgfx/vmw_tri.c | 12 +-
8 files changed, 402 insertions(+), 38 deletions(-)
create mode 100644 tests/vmwgfx/vmw_prime.c
--
2.40.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH i-g-t 1/3] tests/vmwgfx: Removing incorrect assert in mob_repeated_unref
2024-05-09 19:15 [PATCH i-g-t 0/3] Add vmwgfx prime tests Zack Rusin
@ 2024-05-09 19:15 ` Zack Rusin
2024-05-13 14:01 ` Kamil Konieczny
2024-05-09 19:15 ` [PATCH i-g-t 2/3] lib/vmwgfx: Allow using any buffer handle as a surface backing Zack Rusin
` (4 subsequent siblings)
5 siblings, 1 reply; 9+ messages in thread
From: Zack Rusin @ 2024-05-09 19:15 UTC (permalink / raw)
To: igt-dev
Cc: ian.forbes, martin.krastev, maaz.mombasawala, Maaz Mombasawala,
Martin Krastev, Ian Forbes, Zack Rusin
From: Maaz Mombasawala <mombasawalam@vmware.com>
Remove an incorrect assert in test mob_repeated_unref that checked if return
value from multiple unrefs of a mob was 0. This was a bug in the vmwgfx driver,
since after the first unref it should return -EINVAL.
This bug was fixed with buffer rework in the vmwgfx driver and now the unref
ioctl behaves the correct way.
Signed-off-by: Maaz Mombasawala <mombasawalam@vmware.com>
Reviewed-by: Martin Krastev <krastevm@vmware.com>
Reviewed-by: Ian Forbes <iforbes@vmware.com>
Signed-off-by: Zack Rusin <zack.rusin@broadcom.com>
---
tests/vmwgfx/vmw_ref_count.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/tests/vmwgfx/vmw_ref_count.c b/tests/vmwgfx/vmw_ref_count.c
index da4b41f89..92d49dbd0 100644
--- a/tests/vmwgfx/vmw_ref_count.c
+++ b/tests/vmwgfx/vmw_ref_count.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/**********************************************************
- * Copyright 2021-2022 VMware, Inc.
+ * Copyright 2021-2023 VMware, Inc.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
@@ -256,13 +256,11 @@ igt_main
/* Shouldn't crash on multiple invocations */
for (i = 0; i < 3; i++) {
- int ret;
struct drm_vmw_handle_close_arg arg = {
.handle = mob->handle
};
- ret = drmCommandWrite(fd1, DRM_VMW_HANDLE_CLOSE, &arg,
+ drmCommandWrite(fd1, DRM_VMW_HANDLE_CLOSE, &arg,
sizeof(arg));
- igt_assert_eq(ret, 0);
}
free(mob);
}
--
2.40.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH i-g-t 2/3] lib/vmwgfx: Allow using any buffer handle as a surface backing
2024-05-09 19:15 [PATCH i-g-t 0/3] Add vmwgfx prime tests Zack Rusin
2024-05-09 19:15 ` [PATCH i-g-t 1/3] tests/vmwgfx: Removing incorrect assert in mob_repeated_unref Zack Rusin
@ 2024-05-09 19:15 ` Zack Rusin
2024-05-09 19:15 ` [PATCH i-g-t 3/3] tests/vmwgfx: Add a prime test Zack Rusin
` (3 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Zack Rusin @ 2024-05-09 19:15 UTC (permalink / raw)
To: igt-dev; +Cc: ian.forbes, martin.krastev, maaz.mombasawala, Zack Rusin
Allow using any buffer handle as a surface backing to allow testing
prime/dma-buf imports. This will allow addition of vmwgfx specific
drm prime tests.
The code always expected a mob structure created via the explicit
alloc dmabuf ioctl which made using buffers created via dumb_buffer
drm interface impossible.
Signed-off-by: Zack Rusin <zack.rusin@broadcom.com>
---
lib/igt_vmwgfx.c | 33 ++++++++++++++++-----------------
lib/igt_vmwgfx.h | 12 ++++++++----
tests/vmwgfx/vmw_mob_stress.c | 5 ++++-
tests/vmwgfx/vmw_ref_count.c | 6 +++---
tests/vmwgfx/vmw_surface_copy.c | 8 ++++----
tests/vmwgfx/vmw_tri.c | 12 ++++++++----
6 files changed, 43 insertions(+), 33 deletions(-)
diff --git a/lib/igt_vmwgfx.c b/lib/igt_vmwgfx.c
index 12b07b4a8..d2f699575 100644
--- a/lib/igt_vmwgfx.c
+++ b/lib/igt_vmwgfx.c
@@ -427,7 +427,7 @@ struct vmw_surface *vmw_ioctl_buffer_create(int fd, SVGA3dSurfaceAllFlags flags,
SVGA3dSize surface_size = { .width = size, .height = 1, .depth = 1 };
return vmw_create_surface_simple(fd, flags, SVGA3D_BUFFER, surface_size,
- mob);
+ mob->handle);
}
/**
@@ -454,7 +454,7 @@ struct vmw_surface *vmw_ioctl_create_surface_full(
uint32 multisample_count, SVGA3dMSPattern multisample_pattern,
SVGA3dMSQualityLevel quality_level, SVGA3dTextureFilter autogen_filter,
uint32 num_mip_levels, uint32 array_size, SVGA3dSize size,
- struct vmw_mob *mob, enum drm_vmw_surface_flags surface_flags)
+ uint32 buffer_handle, enum drm_vmw_surface_flags surface_flags)
{
struct vmw_surface *surface;
int32 ret;
@@ -470,10 +470,8 @@ struct vmw_surface *vmw_ioctl_create_surface_full(
arg.req.base.array_size = array_size;
arg.req.base.autogen_filter = autogen_filter;
arg.req.base.drm_surface_flags |= surface_flags;
- if (mob) {
- arg.req.base.buffer_handle = mob->handle;
- } else {
- arg.req.base.buffer_handle = SVGA3D_INVALID_ID;
+ arg.req.base.buffer_handle = buffer_handle;
+ if (buffer_handle != SVGA3D_INVALID_ID) {
arg.req.base.drm_surface_flags |=
drm_vmw_surface_flag_create_buffer;
}
@@ -499,7 +497,6 @@ struct vmw_surface *vmw_ioctl_create_surface_full(
}
surface->base = arg.rep;
- surface->mob = mob;
return surface;
out_err1:
@@ -511,7 +508,7 @@ struct vmw_surface *vmw_create_surface_simple(int fd,
SVGA3dSurfaceAllFlags flags,
SVGA3dSurfaceFormat format,
SVGA3dSize size,
- struct vmw_mob *mob)
+ uint32 buffer_handle)
{
/*
* TODO:
@@ -531,7 +528,7 @@ struct vmw_surface *vmw_create_surface_simple(int fd,
multisample_count,
multisample_pattern, quality_level,
SVGA3D_TEX_FILTER_NONE, 1,
- array_size, size, mob, 0);
+ array_size, size, buffer_handle, 0);
}
/**
@@ -921,14 +918,14 @@ void vmw_create_default_objects(struct vmw_svga_device *device,
device->drm_fd,
SVGA3D_SURFACE_HINT_TEXTURE | SVGA3D_SURFACE_HINT_RENDERTARGET |
SVGA3D_SURFACE_BIND_RENDER_TARGET,
- SVGA3D_R8G8B8A8_UNORM, *rt_size, NULL);
+ SVGA3D_R8G8B8A8_UNORM, *rt_size, SVGA3D_INVALID_ID);
objects->depth_rt = vmw_create_surface_simple(
device->drm_fd,
SVGA3D_SURFACE_HINT_DEPTHSTENCIL |
SVGA3D_SURFACE_HINT_RENDERTARGET |
SVGA3D_SURFACE_BIND_DEPTH_STENCIL,
- SVGA3D_R24G8_TYPELESS, *rt_size, NULL);
+ SVGA3D_R24G8_TYPELESS, *rt_size, SVGA3D_INVALID_ID);
rtv_desc.tex.arraySize = 1;
rtv_desc.tex.firstArraySlice = 0;
@@ -1225,7 +1222,8 @@ void vmw_cmd_surface_copy(struct vmw_execbuf *cmd_buf, SVGA3dSurfaceImageId src,
}
uint8 *vmw_triangle_draw(struct vmw_svga_device *device, int32 cid,
- struct vmw_default_objects *objects, bool do_sync)
+ struct vmw_default_objects *objects,
+ uint32_t draw_flags)
{
struct vmw_execbuf *cmd_buf;
struct drm_vmw_fence_rep cmd_fence;
@@ -1234,7 +1232,7 @@ uint8 *vmw_triangle_draw(struct vmw_svga_device *device, int32 cid,
SVGA3dVertexBuffer vb_binding;
SVGA3dRGBAFloat clear_color;
void *vertex_data;
- uint8 *rendered_img;
+ uint8 *rendered_img = NULL;
struct vmw_vertex vertices[3] = {
{ 0.0, 0.75, 0.5, 1.0, 0.0, 1.0, 0.0, 1.0 },
{ 0.75, -0.75, 0.5, 1.0, 1.0, 0.0, 0.0, 1.0 },
@@ -1281,19 +1279,20 @@ uint8 *vmw_triangle_draw(struct vmw_svga_device *device, int32 cid,
/* Draw */
vmw_cmd_draw(cmd_buf, 3, 0);
- vmw_cmd_draw(cmd_buf, 3, 0);
/* Readback */
- vmw_cmd_readback_gb_surface(cmd_buf, objects->color_rt->base.handle);
+ if (draw_flags & vmw_triangle_draw_flags_readback)
+ vmw_cmd_readback_gb_surface(cmd_buf, objects->color_rt->base.handle);
/* Submit commands */
vmw_execbuf_submit(cmd_buf, &cmd_fence);
- if (do_sync)
+ if (draw_flags & vmw_triangle_draw_flags_sync)
vmw_ioctl_fence_finish(device->drm_fd, &cmd_fence);
vmw_execbuf_destroy(cmd_buf);
/* Read framebuffer into system mem and save */
- rendered_img = vmw_readback_surface(device->drm_fd, objects->color_rt);
+ if (draw_flags & vmw_triangle_draw_flags_readback)
+ rendered_img = vmw_readback_surface(device->drm_fd, objects->color_rt);
vmw_ioctl_surface_unref(device->drm_fd, vertex_buffer);
vmw_ioctl_mob_close_handle(device->drm_fd, vertex_mob);
diff --git a/lib/igt_vmwgfx.h b/lib/igt_vmwgfx.h
index c8ed43bac..961aac389 100644
--- a/lib/igt_vmwgfx.h
+++ b/lib/igt_vmwgfx.h
@@ -115,7 +115,6 @@ struct vmw_mob {
struct vmw_surface {
struct drm_vmw_gb_surface_create_rep base;
struct drm_vmw_gb_surface_create_ext_req params;
- struct vmw_mob *mob;
};
struct vmw_vertex {
@@ -194,13 +193,13 @@ struct vmw_surface *vmw_ioctl_create_surface_full(
uint32 multisample_count, SVGA3dMSPattern multisample_pattern,
SVGA3dMSQualityLevel quality_level, SVGA3dTextureFilter autogen_filter,
uint32 num_mip_levels, uint32 array_size, SVGA3dSize size,
- struct vmw_mob *mob, enum drm_vmw_surface_flags surface_flags);
+ uint32 buffer_handle, enum drm_vmw_surface_flags surface_flags);
struct vmw_surface *vmw_create_surface_simple(int fd,
SVGA3dSurfaceAllFlags flags,
SVGA3dSurfaceFormat format,
SVGA3dSize size,
- struct vmw_mob *mob);
+ uint32 buffer_handle);
struct vmw_execbuf *vmw_execbuf_create(int drm_fd, int32_t cid);
void vmw_execbuf_set_cid(struct vmw_execbuf *execbuf, int32_t cid);
@@ -261,8 +260,13 @@ void vmw_cmd_surface_copy(struct vmw_execbuf *cmd_buf, SVGA3dSurfaceImageId src,
SVGA3dSurfaceImageId dest, const SVGA3dCopyBox *boxes,
uint32 num_boxes);
+enum vmw_triangle_draw_flags {
+ vmw_triangle_draw_flags_none = 0,
+ vmw_triangle_draw_flags_sync = 1 << 0,
+ vmw_triangle_draw_flags_readback = 1 << 1,
+};
uint8 *vmw_triangle_draw(struct vmw_svga_device *device, int32 cid,
- struct vmw_default_objects *objects, bool do_sync);
+ struct vmw_default_objects *objects, uint32_t draw_flags);
void vmw_triangle_assert_values(uint8 *rendered_img,
struct vmw_surface *color_rt);
diff --git a/tests/vmwgfx/vmw_mob_stress.c b/tests/vmwgfx/vmw_mob_stress.c
index 4af23d6f7..2e6a9422c 100644
--- a/tests/vmwgfx/vmw_mob_stress.c
+++ b/tests/vmwgfx/vmw_mob_stress.c
@@ -35,7 +35,10 @@ static void test_triangle_render(struct vmw_svga_device *device, int32 cid)
vmw_create_default_objects(device, cid, &objects,
&vmw_default_rect_size);
- rendered_tri = vmw_triangle_draw(device, cid, &objects, true);
+ rendered_tri =
+ vmw_triangle_draw(device, cid, &objects,
+ vmw_triangle_draw_flags_sync |
+ vmw_triangle_draw_flags_readback);
vmw_triangle_assert_values(rendered_tri, objects.color_rt);
free(rendered_tri);
diff --git a/tests/vmwgfx/vmw_ref_count.c b/tests/vmwgfx/vmw_ref_count.c
index 92d49dbd0..c765f2e70 100644
--- a/tests/vmwgfx/vmw_ref_count.c
+++ b/tests/vmwgfx/vmw_ref_count.c
@@ -72,7 +72,7 @@ create_and_write_shareable_surface(int32 fd, SVGA3dSize surface_size)
surface = vmw_ioctl_create_surface_full(
fd, SVGA3D_SURFACE_HINT_RENDERTARGET, SVGA3D_BUFFER, 0,
SVGA3D_MS_PATTERN_NONE, SVGA3D_MS_QUALITY_NONE,
- SVGA3D_TEX_FILTER_NONE, 1, 1, surface_size, NULL,
+ SVGA3D_TEX_FILTER_NONE, 1, 1, surface_size, SVGA3D_INVALID_ID,
drm_vmw_surface_flag_shareable);
mob.handle = surface->base.buffer_handle;
@@ -125,7 +125,7 @@ igt_main
surface = vmw_ioctl_create_surface_full(
fd1, SVGA3D_SURFACE_HINT_RENDERTARGET, SVGA3D_BUFFER, 0,
SVGA3D_MS_PATTERN_NONE, SVGA3D_MS_QUALITY_NONE,
- SVGA3D_TEX_FILTER_NONE, 1, 1, surface_size, mob,
+ SVGA3D_TEX_FILTER_NONE, 1, 1, surface_size, mob->handle,
drm_vmw_surface_flag_shareable);
write_to_mob(fd1, mob);
@@ -274,7 +274,7 @@ igt_main
surface = vmw_ioctl_create_surface_full(
fd1, SVGA3D_SURFACE_HINT_RENDERTARGET, SVGA3D_BUFFER, 0,
SVGA3D_MS_PATTERN_NONE, SVGA3D_MS_QUALITY_NONE,
- SVGA3D_TEX_FILTER_NONE, 1, 1, surface_size, NULL,
+ SVGA3D_TEX_FILTER_NONE, 1, 1, surface_size, SVGA3D_INVALID_ID,
drm_vmw_surface_flag_shareable);
/* Shouldn't crash on multiple invocations */
diff --git a/tests/vmwgfx/vmw_surface_copy.c b/tests/vmwgfx/vmw_surface_copy.c
index 57e90334f..471de54aa 100644
--- a/tests/vmwgfx/vmw_surface_copy.c
+++ b/tests/vmwgfx/vmw_surface_copy.c
@@ -120,9 +120,9 @@ static void test_invalid_copies(int fd, int32 cid)
vmw_is_format_supported(fd, SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8));
s1 = vmw_create_surface_simple(fd, 0, SVGA3D_A8R8G8B8, surface_size,
- NULL);
+ SVGA3D_INVALID_ID);
s2 = vmw_create_surface_simple(fd, 0, SVGA3D_A8R8G8B8, surface_size,
- NULL);
+ SVGA3D_INVALID_ID);
cmd_buf = vmw_execbuf_create(fd, cid);
box.x = 0;
@@ -271,8 +271,8 @@ static void test_invalid_copies_3d(int fd, int32 cid)
igt_require(vmw_is_format_supported(fd, SVGA3D_DEVCAP_DXFMT_Z_D32));
s1 = vmw_create_surface_simple(fd, 0, SVGA3D_A8R8G8B8, surface_size,
- NULL);
- s2 = vmw_create_surface_simple(fd, 0, SVGA3D_Z_D32, surface_size, NULL);
+ SVGA3D_INVALID_ID);
+ s2 = vmw_create_surface_simple(fd, 0, SVGA3D_Z_D32, surface_size, SVGA3D_INVALID_ID);
cmd_buf = vmw_execbuf_create(fd, cid);
box.x = 0;
diff --git a/tests/vmwgfx/vmw_tri.c b/tests/vmwgfx/vmw_tri.c
index f5a59229c..61c4d5df8 100644
--- a/tests/vmwgfx/vmw_tri.c
+++ b/tests/vmwgfx/vmw_tri.c
@@ -36,7 +36,10 @@ static void draw_triangle(struct vmw_svga_device *device, int32 cid)
vmw_create_default_objects(device, cid, &objects,
&vmw_default_rect_size);
- rendered_img = vmw_triangle_draw(device, cid, &objects, true);
+ rendered_img =
+ vmw_triangle_draw(device, cid, &objects,
+ vmw_triangle_draw_flags_sync |
+ vmw_triangle_draw_flags_readback);
save_status = vmw_save_data_as_png(objects.color_rt, rendered_img,
"vmw_tri.png");
@@ -65,7 +68,7 @@ static void replace_with_coherent_rt(struct vmw_svga_device *device,
SVGA3D_SURFACE_BIND_RENDER_TARGET,
SVGA3D_R8G8B8A8_UNORM, 0, SVGA3D_MS_PATTERN_NONE,
SVGA3D_MS_QUALITY_NONE, SVGA3D_TEX_FILTER_NONE, 1, 1, *rt_size,
- NULL, drm_vmw_surface_flag_coherent);
+ SVGA3D_INVALID_ID, drm_vmw_surface_flag_coherent);
objects->depth_rt = vmw_ioctl_create_surface_full(
device->drm_fd,
@@ -74,7 +77,7 @@ static void replace_with_coherent_rt(struct vmw_svga_device *device,
SVGA3D_SURFACE_BIND_DEPTH_STENCIL,
SVGA3D_R24G8_TYPELESS, 0, SVGA3D_MS_PATTERN_NONE,
SVGA3D_MS_QUALITY_NONE, SVGA3D_TEX_FILTER_NONE, 1, 1, *rt_size,
- NULL, drm_vmw_surface_flag_coherent);
+ SVGA3D_INVALID_ID, drm_vmw_surface_flag_coherent);
cmd_buf = vmw_execbuf_create(device->drm_fd, context_id);
@@ -160,7 +163,8 @@ static void draw_triangle_on_coherent_rt(struct vmw_svga_device *device,
default_ds_view_id = objects.ds_view_id;
replace_with_coherent_rt(device, cid, &objects, &vmw_default_rect_size);
- rendered_img = vmw_triangle_draw(device, cid, &objects, false);
+ rendered_img = vmw_triangle_draw(device, cid, &objects,
+ vmw_triangle_draw_flags_readback);
vmw_triangle_assert_values(rendered_img, objects.color_rt);
--
2.40.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH i-g-t 3/3] tests/vmwgfx: Add a prime test
2024-05-09 19:15 [PATCH i-g-t 0/3] Add vmwgfx prime tests Zack Rusin
2024-05-09 19:15 ` [PATCH i-g-t 1/3] tests/vmwgfx: Removing incorrect assert in mob_repeated_unref Zack Rusin
2024-05-09 19:15 ` [PATCH i-g-t 2/3] lib/vmwgfx: Allow using any buffer handle as a surface backing Zack Rusin
@ 2024-05-09 19:15 ` Zack Rusin
2024-05-10 12:29 ` Kamil Konieczny
2024-05-09 20:36 ` ✗ Fi.CI.BAT: failure for Add vmwgfx prime tests Patchwork
` (2 subsequent siblings)
5 siblings, 1 reply; 9+ messages in thread
From: Zack Rusin @ 2024-05-09 19:15 UTC (permalink / raw)
To: igt-dev; +Cc: ian.forbes, martin.krastev, maaz.mombasawala, Zack Rusin
Add a test that check for various dma-buf/prime related issues that might
show up on vmwgfx.
Signed-off-by: Zack Rusin <zack.rusin@broadcom.com>
---
tests/vmwgfx/meson.build | 3 +-
tests/vmwgfx/vmw_prime.c | 355 +++++++++++++++++++++++++++++++++++++++
2 files changed, 357 insertions(+), 1 deletion(-)
create mode 100644 tests/vmwgfx/vmw_prime.c
diff --git a/tests/vmwgfx/meson.build b/tests/vmwgfx/meson.build
index 073905f0a..716024381 100644
--- a/tests/vmwgfx/meson.build
+++ b/tests/vmwgfx/meson.build
@@ -4,7 +4,8 @@ vmwgfx_progs = [
'vmw_execution_buffer',
'vmw_surface_copy',
'vmw_mob_stress',
- 'vmw_ref_count'
+ 'vmw_ref_count',
+ 'vmw_prime'
]
vmwgfx_deps = test_deps
diff --git a/tests/vmwgfx/vmw_prime.c b/tests/vmwgfx/vmw_prime.c
new file mode 100644
index 000000000..b9294517b
--- /dev/null
+++ b/tests/vmwgfx/vmw_prime.c
@@ -0,0 +1,355 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/**********************************************************
+ * Copyright (c) 2024 Broadcom. All Rights Reserved. The term
+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ **********************************************************/
+
+#include "igt_vmwgfx.h"
+
+#include "igt_kms.h"
+
+IGT_TEST_DESCRIPTION(
+ "Check whether basic DRM prime and dma-buf work correctly.");
+
+static void replace_with_prime_rt(struct vmw_svga_device *device,
+ int32 context_id, uint32 buffer_handle,
+ struct vmw_default_objects *objects,
+ const SVGA3dSize *rt_size)
+{
+ struct vmw_execbuf *cmd_buf;
+ SVGA3dRenderTargetViewDesc rtv_desc = { 0 };
+ SVGA3dCmdDXDefineRenderTargetView rt_view_define_cmd = { 0 };
+ SVGA3dCmdDXDestroyRenderTargetView rt_view_cmd = {
+ .renderTargetViewId = objects->color_rt_id
+ };
+
+ vmw_ioctl_surface_unref(device->drm_fd, objects->color_rt);
+ objects->color_rt = vmw_ioctl_create_surface_full(
+ device->drm_fd,
+ SVGA3D_SURFACE_HINT_TEXTURE | SVGA3D_SURFACE_HINT_RENDERTARGET |
+ SVGA3D_SURFACE_BIND_RENDER_TARGET,
+ SVGA3D_R8G8B8A8_UNORM, 0, SVGA3D_MS_PATTERN_NONE,
+ SVGA3D_MS_QUALITY_NONE, SVGA3D_TEX_FILTER_NONE, 1, 1, *rt_size,
+ buffer_handle, drm_vmw_surface_flag_shareable);
+
+ cmd_buf = vmw_execbuf_create(device->drm_fd, context_id);
+
+ rtv_desc.tex.arraySize = 1;
+ rtv_desc.tex.firstArraySlice = 0;
+ rtv_desc.tex.mipSlice = 0;
+ vmw_bitvector_find_next_bit(device->rt_view_bv,
+ &rt_view_define_cmd.renderTargetViewId);
+ rt_view_define_cmd.sid = objects->color_rt->base.handle;
+ rt_view_define_cmd.format = SVGA3D_R8G8B8A8_UNORM;
+ rt_view_define_cmd.resourceDimension = SVGA3D_RESOURCE_TEXTURE2D;
+ rt_view_define_cmd.desc = rtv_desc;
+ vmw_execbuf_append(cmd_buf, SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW,
+ &rt_view_cmd, sizeof(rt_view_cmd), NULL, 0);
+ vmw_execbuf_append(cmd_buf, SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW,
+ &rt_view_define_cmd, sizeof(rt_view_define_cmd),
+ NULL, 0);
+ vmw_execbuf_submit(cmd_buf, NULL);
+ vmw_execbuf_destroy(cmd_buf);
+
+ vmw_bitvector_free_bit(device->rt_view_bv, objects->color_rt_id);
+ objects->color_rt_id = rt_view_define_cmd.renderTargetViewId;
+}
+
+static void draw_triangle_map_gem(struct vmw_svga_device *mdevice,
+ struct vmw_svga_device *device, int32 cid)
+{
+ struct vmw_default_objects objects;
+ void *ptr;
+ bool save_status;
+ int fd, imported_handle, gem_handle;
+ uint64_t gem_size;
+
+ gem_handle = kmstest_dumb_create(mdevice->drm_fd,
+ vmw_default_rect_size.width,
+ vmw_default_rect_size.height, 32, NULL,
+ &gem_size);
+ fd = prime_handle_to_fd(mdevice->drm_fd, gem_handle);
+ imported_handle = prime_fd_to_handle(device->drm_fd, fd);
+
+ vmw_create_default_objects(device, cid, &objects,
+ &vmw_default_rect_size);
+ replace_with_prime_rt(device, cid, imported_handle, &objects,
+ &vmw_default_rect_size);
+ vmw_triangle_draw(device, cid, &objects,
+ vmw_triangle_draw_flags_sync |
+ vmw_triangle_draw_flags_readback);
+
+ ptr = kmstest_dumb_map_buffer(mdevice->drm_fd, gem_handle, gem_size,
+ PROT_READ);
+
+ save_status = vmw_save_data_as_png(objects.color_rt, ptr,
+ "vmw_prime_tri1.png");
+ igt_assert(save_status);
+ vmw_triangle_assert_values(ptr, objects.color_rt);
+
+ munmap(ptr, gem_size);
+
+ vmw_destroy_default_objects(device, &objects);
+ kmstest_dumb_destroy(mdevice->drm_fd, gem_handle);
+}
+
+static void draw_triangle_map_dmabuf(struct vmw_svga_device *mdevice,
+ struct vmw_svga_device *device, int32 cid)
+{
+ struct vmw_default_objects objects;
+ void *ptr;
+ bool save_status;
+ int fd, imported_handle, gem_handle;
+ uint64_t gem_size;
+
+ gem_handle = kmstest_dumb_create(mdevice->drm_fd,
+ vmw_default_rect_size.width,
+ vmw_default_rect_size.height, 32, NULL,
+ &gem_size);
+ fd = prime_handle_to_fd_for_mmap(mdevice->drm_fd, gem_handle);
+ kmstest_dumb_destroy(mdevice->drm_fd, gem_handle);
+ imported_handle = prime_fd_to_handle(device->drm_fd, fd);
+
+ vmw_create_default_objects(device, cid, &objects,
+ &vmw_default_rect_size);
+ replace_with_prime_rt(device, cid, imported_handle, &objects,
+ &vmw_default_rect_size);
+ vmw_triangle_draw(device, cid, &objects,
+ vmw_triangle_draw_flags_sync |
+ vmw_triangle_draw_flags_readback);
+
+ ptr = mmap(NULL, gem_size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
+
+ save_status = vmw_save_data_as_png(objects.color_rt, ptr,
+ "vmw_prime_tri2.png");
+ igt_assert(save_status);
+ vmw_triangle_assert_values(ptr, objects.color_rt);
+
+ munmap(ptr, gem_size);
+ close(fd);
+
+ vmw_destroy_default_objects(device, &objects);
+}
+
+typedef struct {
+ struct vmw_svga_device mdevice;
+ struct vmw_svga_device rdevice;
+ int32 cid;
+ igt_display_t display;
+ struct igt_fb fb;
+ igt_output_t *output;
+ igt_plane_t *primary;
+ enum pipe pipe;
+ igt_crc_t reference_tri_crc;
+} gpu_process_t;
+
+static void cleanup_crtc(gpu_process_t *gpu)
+{
+ igt_display_t *display = &gpu->display;
+ igt_output_t *output = gpu->output;
+
+ igt_plane_set_fb(gpu->primary, NULL);
+
+ igt_output_set_pipe(output, PIPE_ANY);
+ igt_display_commit(display);
+
+ igt_remove_fb(gpu->mdevice.drm_fd, &gpu->fb);
+}
+
+static void prepare_crtc(gpu_process_t *gpu)
+{
+ igt_display_t *display = &gpu->display;
+ igt_output_t *output = gpu->output;
+ drmModeModeInfo *mode;
+ int ret;
+
+ /* select the pipe we want to use */
+ igt_output_set_pipe(output, gpu->pipe);
+
+ mode = igt_output_get_mode(output);
+
+ /* create a white fb and flip to it */
+ igt_create_color_fb(gpu->mdevice.drm_fd, mode->hdisplay, mode->vdisplay,
+ DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_LINEAR, 1.0,
+ 1.0, 1.0, &gpu->fb);
+
+ gpu->primary =
+ igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
+
+ igt_plane_set_fb(gpu->primary, &gpu->fb);
+ ret = igt_display_commit(display);
+ igt_assert(ret == 0);
+}
+
+static void run_renderer(struct vmw_svga_device *device, int prime_fd, int cid,
+ int fb_size, int width, int height,
+ uint32_t draw_flags)
+{
+ struct vmw_default_objects objects;
+ int imported_handle;
+ SVGA3dSize rt_size = { 0 };
+
+ rt_size.width = width;
+ rt_size.height = height;
+ rt_size.depth = 1;
+
+ imported_handle = prime_fd_to_handle(device->drm_fd, prime_fd);
+
+ vmw_create_default_objects(device, cid, &objects, &rt_size);
+ replace_with_prime_rt(device, cid, imported_handle, &objects, &rt_size);
+ vmw_triangle_draw(device, cid, &objects, draw_flags);
+
+ vmw_destroy_default_objects(device, &objects);
+}
+
+static void draw_triangle_3d(gpu_process_t *gpu, uint32_t draw_flags)
+{
+ igt_display_t *display = &gpu->display;
+ igt_output_t *output;
+ enum pipe pipe;
+ igt_pipe_crc_t *pipe_crc;
+ igt_crc_t blank_crc, tri_crc;
+ char *blank_crc_str, *tri_crc_str;
+ bool crc_equal;
+
+ for_each_pipe_with_valid_output(display, pipe, output) {
+ int prime_fd;
+
+ gpu->output = output;
+ gpu->pipe = pipe;
+
+ prepare_crtc(gpu);
+ pipe_crc = igt_pipe_crc_new(gpu->mdevice.drm_fd, pipe,
+ IGT_PIPE_CRC_SOURCE_AUTO);
+ igt_pipe_crc_collect_crc(pipe_crc, &blank_crc);
+
+ prime_fd = prime_handle_to_fd_for_mmap(gpu->mdevice.drm_fd,
+ gpu->fb.gem_handle);
+ igt_skip_on(prime_fd == -1 && errno == EINVAL);
+
+ igt_fork(renderer_no, 1)
+ {
+ run_renderer(&gpu->rdevice, prime_fd, gpu->cid,
+ gpu->fb.size, gpu->fb.width,
+ gpu->fb.height, draw_flags);
+ }
+ igt_waitchildren();
+
+ igt_plane_set_fb(gpu->primary, &gpu->fb);
+ igt_display_commit(display);
+ igt_pipe_crc_collect_crc(pipe_crc, &tri_crc);
+ blank_crc_str = igt_crc_to_string(&blank_crc);
+ tri_crc_str = igt_crc_to_string(&tri_crc);
+
+ igt_debug("Blank crc = '%s', tri = '%s\n'", blank_crc_str,
+ tri_crc_str);
+ crc_equal = igt_check_crc_equal(&blank_crc, &tri_crc);
+ igt_assert_f(
+ !crc_equal,
+ "Blank and rendered triangle CRCs should be different.\n");
+ if (draw_flags == (vmw_triangle_draw_flags_sync |
+ vmw_triangle_draw_flags_readback)) {
+ memcpy(&gpu->reference_tri_crc, &tri_crc,
+ sizeof(gpu->reference_tri_crc));
+ } else if (gpu->reference_tri_crc.has_valid_frame) {
+ igt_assert_crc_equal(&gpu->reference_tri_crc, &tri_crc);
+ }
+
+ igt_debug_wait_for_keypress("paint");
+
+ close(prime_fd);
+ igt_pipe_crc_free(pipe_crc);
+ cleanup_crtc(gpu);
+ free(blank_crc_str);
+ free(tri_crc_str);
+ /* once is enough */
+ return;
+ }
+
+ igt_skip("no valid crtc/connector combinations found\n");
+}
+
+igt_main
+{
+ gpu_process_t gpu = { 0 };
+
+ igt_fixture
+ {
+ vmw_svga_device_init(&gpu.mdevice, vmw_svga_device_node_master);
+ vmw_svga_device_init(&gpu.rdevice, vmw_svga_device_node_render);
+ igt_require(gpu.mdevice.drm_fd != -1);
+ igt_require(gpu.rdevice.drm_fd != -1);
+
+ gpu.cid = vmw_ioctl_context_create(gpu.rdevice.drm_fd);
+ igt_require(gpu.cid != SVGA3D_INVALID_ID);
+
+ kmstest_set_vt_graphics_mode();
+
+ igt_require_pipe_crc(gpu.mdevice.drm_fd);
+
+ igt_display_require(&gpu.display, gpu.mdevice.drm_fd);
+ }
+
+ igt_describe("Tests prime rendering triangle with gem mmap.");
+ igt_subtest("tri-map-gem")
+ {
+ draw_triangle_map_gem(&gpu.mdevice, &gpu.rdevice, gpu.cid);
+ }
+
+ igt_describe("Tests prime rendering triangle with dmabuf mmap.");
+ igt_subtest("tri-map-dmabuf")
+ {
+ draw_triangle_map_dmabuf(&gpu.mdevice, &gpu.rdevice, gpu.cid);
+ }
+
+ igt_describe(
+ "Tests synchronous/readback prime rendering triangle while buffer bound to fb");
+ igt_subtest("buffer-surface-fb-sharing-sync-readback")
+ {
+ draw_triangle_3d(&gpu,
+ vmw_triangle_draw_flags_sync |
+ vmw_triangle_draw_flags_readback);
+ }
+
+ igt_describe(
+ "Tests synchronous prime rendering triangle while buffer bound to fb");
+ igt_subtest("buffer-surface-fb-sharing-sync")
+ {
+ draw_triangle_3d(&gpu, vmw_triangle_draw_flags_sync);
+ }
+
+ igt_describe("Tests prime rendering triangle while buffer bound to fb");
+ igt_subtest("buffer-surface-fb-sharing")
+ {
+ draw_triangle_3d(&gpu, vmw_triangle_draw_flags_none);
+ }
+
+ igt_fixture
+ {
+ vmw_ioctl_context_destroy(gpu.rdevice.drm_fd, gpu.cid);
+ igt_display_fini(&gpu.display);
+ vmw_svga_device_fini(&gpu.rdevice);
+ vmw_svga_device_fini(&gpu.mdevice);
+ }
+}
--
2.40.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✗ Fi.CI.BAT: failure for Add vmwgfx prime tests
2024-05-09 19:15 [PATCH i-g-t 0/3] Add vmwgfx prime tests Zack Rusin
` (2 preceding siblings ...)
2024-05-09 19:15 ` [PATCH i-g-t 3/3] tests/vmwgfx: Add a prime test Zack Rusin
@ 2024-05-09 20:36 ` Patchwork
2024-05-09 20:48 ` ✓ CI.xeBAT: success " Patchwork
2024-05-10 1:26 ` ✗ CI.xeFULL: failure " Patchwork
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2024-05-09 20:36 UTC (permalink / raw)
To: Zack Rusin; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 2189 bytes --]
== Series Details ==
Series: Add vmwgfx prime tests
URL : https://patchwork.freedesktop.org/series/133402/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14740 -> IGTPW_11121
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_11121 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_11121, please notify your bug team ('I915-ci-infra@lists.freedesktop.org') to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11121/index.html
Participating hosts (38 -> 37)
------------------------------
Missing (1): fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_11121:
### IGT changes ###
#### Possible regressions ####
* igt@i915_module_load@reload:
- bat-atsm-1: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14740/bat-atsm-1/igt@i915_module_load@reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11121/bat-atsm-1/igt@i915_module_load@reload.html
Known issues
------------
Here are the changes found in IGTPW_11121 that come from known issues:
### IGT changes ###
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10911]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10911
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7846 -> IGTPW_11121
CI-20190529: 20190529
CI_DRM_14740: fa0763ee56bac0fea0c399b9f41f19439b07b616 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_11121: dede7eb874dc4abbb3449a6c02fc42e852e62485 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_7846: 4a5fd4e7cb2798636f6464e2bd61399f3242b322 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11121/index.html
[-- Attachment #2: Type: text/html, Size: 2723 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ CI.xeBAT: success for Add vmwgfx prime tests
2024-05-09 19:15 [PATCH i-g-t 0/3] Add vmwgfx prime tests Zack Rusin
` (3 preceding siblings ...)
2024-05-09 20:36 ` ✗ Fi.CI.BAT: failure for Add vmwgfx prime tests Patchwork
@ 2024-05-09 20:48 ` Patchwork
2024-05-10 1:26 ` ✗ CI.xeFULL: failure " Patchwork
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2024-05-09 20:48 UTC (permalink / raw)
To: Zack Rusin; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 1136 bytes --]
== Series Details ==
Series: Add vmwgfx prime tests
URL : https://patchwork.freedesktop.org/series/133402/
State : success
== Summary ==
CI Bug Log - changes from XEIGT_7846_BAT -> XEIGTPW_11121_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (5 -> 5)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_7846 -> IGTPW_11121
* Linux: xe-1263-92f877dd46245e4a44b6d24b5e303b8c03c40c75 -> xe-1265-2756f0412a64d4a3bedfb79b868fbd8c313ed027
IGTPW_11121: dede7eb874dc4abbb3449a6c02fc42e852e62485 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_7846: 4a5fd4e7cb2798636f6464e2bd61399f3242b322 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-1263-92f877dd46245e4a44b6d24b5e303b8c03c40c75: 92f877dd46245e4a44b6d24b5e303b8c03c40c75
xe-1265-2756f0412a64d4a3bedfb79b868fbd8c313ed027: 2756f0412a64d4a3bedfb79b868fbd8c313ed027
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/index.html
[-- Attachment #2: Type: text/html, Size: 1695 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✗ CI.xeFULL: failure for Add vmwgfx prime tests
2024-05-09 19:15 [PATCH i-g-t 0/3] Add vmwgfx prime tests Zack Rusin
` (4 preceding siblings ...)
2024-05-09 20:48 ` ✓ CI.xeBAT: success " Patchwork
@ 2024-05-10 1:26 ` Patchwork
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2024-05-10 1:26 UTC (permalink / raw)
To: Zack Rusin; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 31859 bytes --]
== Series Details ==
Series: Add vmwgfx prime tests
URL : https://patchwork.freedesktop.org/series/133402/
State : failure
== Summary ==
CI Bug Log - changes from XEIGT_7846_full -> XEIGTPW_11121_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with XEIGTPW_11121_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in XEIGTPW_11121_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (3 -> 1)
------------------------------
ERROR: It appears as if the changes made in XEIGTPW_11121_full prevented too many machines from booting.
Missing (2): shard-adlp shard-lnl
Known issues
------------
Here are the changes found in XEIGTPW_11121_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_atomic_interruptible@legacy-setmode:
- shard-dg2-set2: [PASS][1] -> [SKIP][2] ([Intel XE#1201] / [Intel XE#1234])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-464/igt@kms_atomic_interruptible@legacy-setmode.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_atomic_interruptible@legacy-setmode.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-0:
- shard-dg2-set2: [PASS][3] -> [SKIP][4] ([Intel XE#1201] / [Intel XE#829]) +2 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-434/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-0:
- shard-dg2-set2: NOTRUN -> [SKIP][5] ([Intel XE#1124] / [Intel XE#1201])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@kms_big_fb@yf-tiled-64bpp-rotate-0.html
* igt@kms_bw@linear-tiling-4-displays-2160x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][6] ([Intel XE#1201] / [Intel XE#367]) +1 other test skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-463/igt@kms_bw@linear-tiling-4-displays-2160x1440p.html
* igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][7] ([Intel XE#1201] / [Intel XE#787]) +71 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-dp-4.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-7:
- shard-dg2-set2: NOTRUN -> [SKIP][8] ([Intel XE#1201] / [Intel XE#455] / [Intel XE#787]) +21 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-7.html
* igt@kms_ccs@random-ccs-data-4-tiled-xe2-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][9] ([Intel XE#1201] / [Intel XE#1252])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-xe2-ccs.html
* igt@kms_cdclk@mode-transition@pipe-b-hdmi-a-7:
- shard-dg2-set2: NOTRUN -> [SKIP][10] ([Intel XE#1201] / [Intel XE#314]) +3 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@kms_cdclk@mode-transition@pipe-b-hdmi-a-7.html
* igt@kms_content_protection@atomic@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][11] ([Intel XE#1178])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-435/igt@kms_content_protection@atomic@pipe-a-dp-4.html
* igt@kms_content_protection@uevent@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][12] ([Intel XE#1188])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-436/igt@kms_content_protection@uevent@pipe-a-dp-4.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x170:
- shard-dg2-set2: NOTRUN -> [SKIP][13] ([Intel XE#1201] / [Intel XE#308])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-433/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
* igt@kms_cursor_crc@cursor-sliding-128x42:
- shard-dg2-set2: [PASS][14] -> [SKIP][15] ([Intel XE#1201]) +3 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-463/igt@kms_cursor_crc@cursor-sliding-128x42.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_cursor_crc@cursor-sliding-128x42.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-dg2-set2: [PASS][16] -> [DMESG-WARN][17] ([Intel XE#1214] / [Intel XE#282] / [Intel XE#910])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-466/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-463/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
* igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions:
- shard-dg2-set2: [PASS][18] -> [DMESG-WARN][19] ([Intel XE#1214] / [Intel XE#282]) +5 other tests dmesg-warn
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-466/igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions.html
* igt@kms_cursor_legacy@forked-move@pipe-b:
- shard-dg2-set2: NOTRUN -> [DMESG-WARN][20] ([Intel XE#1214] / [Intel XE#282]) +3 other tests dmesg-warn
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_cursor_legacy@forked-move@pipe-b.html
* igt@kms_flip@basic-plain-flip:
- shard-dg2-set2: NOTRUN -> [SKIP][21] ([Intel XE#1201])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_flip@basic-plain-flip.html
* igt@kms_flip@flip-vs-suspend@a-hdmi-a7:
- shard-dg2-set2: NOTRUN -> [DMESG-WARN][22] ([Intel XE#1162] / [Intel XE#1214]) +3 other tests dmesg-warn
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@kms_flip@flip-vs-suspend@a-hdmi-a7.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-7-4-rc-ccs-cc-to-4-mc-ccs:
- shard-dg2-set2: NOTRUN -> [FAIL][23] ([Intel XE#650]) +51 other tests fail
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-7-4-rc-ccs-cc-to-4-mc-ccs.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-shrfb-msflip-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][24] ([Intel XE#1201] / [Intel XE#651]) +4 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][25] ([Intel XE#1201] / [Intel XE#653]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-463/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a:
- shard-dg2-set2: NOTRUN -> [FAIL][26] ([Intel XE#616])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-433/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b:
- shard-dg2-set2: NOTRUN -> [DMESG-FAIL][27] ([Intel XE#1162]) +1 other test dmesg-fail
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-433/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25:
- shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#1201] / [Intel XE#305] / [Intel XE#455])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][29] ([Intel XE#1201] / [Intel XE#305]) +2 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c-hdmi-a-6.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-d-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][30] ([Intel XE#1201] / [Intel XE#455]) +5 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-d-hdmi-a-6.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-dg2-set2: [PASS][31] -> [SKIP][32] ([Intel XE#1201] / [Intel XE#1235])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-435/igt@kms_pm_rpm@modeset-lpsp.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
- shard-dg2-set2: NOTRUN -> [SKIP][33] ([Intel XE#1201] / [Intel XE#929])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-435/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-dg2-set2: [PASS][34] -> [TIMEOUT][35] ([Intel XE#1473]) +1 other test timeout
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-433/igt@xe_evict@evict-mixed-many-threads-small.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-466/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_exec_fault_mode@once-bindexecqueue-userptr-invalidate-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][36] ([Intel XE#1201] / [Intel XE#288])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-466/igt@xe_exec_fault_mode@once-bindexecqueue-userptr-invalidate-imm.html
* igt@xe_pm@s3-basic-exec:
- shard-dg2-set2: [PASS][37] -> [DMESG-WARN][38] ([Intel XE#1162] / [Intel XE#1214]) +7 other tests dmesg-warn
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-464/igt@xe_pm@s3-basic-exec.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-436/igt@xe_pm@s3-basic-exec.html
* igt@xe_pm@s3-d3cold-basic-exec:
- shard-dg2-set2: NOTRUN -> [SKIP][39] ([Intel XE#1201] / [Intel XE#366])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-435/igt@xe_pm@s3-d3cold-basic-exec.html
* igt@xe_query@multigpu-query-cs-cycles:
- shard-dg2-set2: NOTRUN -> [SKIP][40] ([Intel XE#1201] / [Intel XE#944])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-435/igt@xe_query@multigpu-query-cs-cycles.html
#### Possible fixes ####
* igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions:
- shard-dg2-set2: [DMESG-WARN][41] ([Intel XE#1214] / [Intel XE#282]) -> [PASS][42] +3 other tests pass
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-464/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions.html
* igt@kms_hdmi_inject@inject-audio:
- shard-dg2-set2: [SKIP][43] ([Intel XE#1201] / [Intel XE#417]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-434/igt@kms_hdmi_inject@inject-audio.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-436/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_hdr@invalid-hdr:
- shard-dg2-set2: [SKIP][45] ([Intel XE#1201] / [Intel XE#455]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-464/igt@kms_hdr@invalid-hdr.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-463/igt@kms_hdr@invalid-hdr.html
* igt@kms_pm_rpm@i2c:
- shard-dg2-set2: [FAIL][47] ([Intel XE#1787]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-464/igt@kms_pm_rpm@i2c.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@kms_pm_rpm@i2c.html
* igt@kms_universal_plane@disable-primary-vs-flip:
- shard-dg2-set2: [SKIP][49] ([Intel XE#1201] / [Intel XE#829]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-436/igt@kms_universal_plane@disable-primary-vs-flip.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-466/igt@kms_universal_plane@disable-primary-vs-flip.html
* igt@xe_evict@evict-beng-cm-threads-large:
- shard-dg2-set2: [INCOMPLETE][51] ([Intel XE#1195] / [Intel XE#1473] / [Intel XE#392]) -> [PASS][52] +1 other test pass
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-466/igt@xe_evict@evict-beng-cm-threads-large.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@xe_evict@evict-beng-cm-threads-large.html
* igt@xe_evict@evict-beng-mixed-many-threads-small:
- shard-dg2-set2: [TIMEOUT][53] ([Intel XE#1473] / [Intel XE#402]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-466/igt@xe_evict@evict-beng-mixed-many-threads-small.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-466/igt@xe_evict@evict-beng-mixed-many-threads-small.html
* igt@xe_evict@evict-beng-mixed-threads-large:
- shard-dg2-set2: [DMESG-FAIL][55] ([Intel XE#482]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-466/igt@xe_evict@evict-beng-mixed-threads-large.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@xe_evict@evict-beng-mixed-threads-large.html
* igt@xe_live_ktest@xe_mocs:
- shard-dg2-set2: [SKIP][57] ([Intel XE#1201]) -> [PASS][58] +3 other tests pass
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-464/igt@xe_live_ktest@xe_mocs.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-463/igt@xe_live_ktest@xe_mocs.html
* igt@xe_module_load@reload:
- shard-dg2-set2: [DMESG-WARN][59] ([Intel XE#1162] / [Intel XE#1214]) -> [PASS][60] +4 other tests pass
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-464/igt@xe_module_load@reload.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@xe_module_load@reload.html
#### Warnings ####
* igt@kms_big_fb@linear-16bpp-rotate-270:
- shard-dg2-set2: [SKIP][61] ([Intel XE#1201] / [Intel XE#316]) -> [SKIP][62] ([Intel XE#1201] / [Intel XE#829]) +1 other test skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-433/igt@kms_big_fb@linear-16bpp-rotate-270.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_big_fb@linear-16bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-270:
- shard-dg2-set2: [SKIP][63] ([Intel XE#1124] / [Intel XE#1201]) -> [SKIP][64] ([Intel XE#1201] / [Intel XE#829])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-433/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-dg2-set2: [SKIP][65] ([Intel XE#1201] / [Intel XE#610]) -> [SKIP][66] ([Intel XE#1201] / [Intel XE#829])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-434/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_bw@linear-tiling-3-displays-1920x1080p:
- shard-dg2-set2: [SKIP][67] ([Intel XE#1201]) -> [SKIP][68] ([Intel XE#1201] / [Intel XE#367])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-436/igt@kms_bw@linear-tiling-3-displays-1920x1080p.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@kms_bw@linear-tiling-3-displays-1920x1080p.html
* igt@kms_ccs@bad-aux-stride-y-tiled-ccs:
- shard-dg2-set2: [SKIP][69] ([Intel XE#1201] / [Intel XE#455] / [Intel XE#787]) -> [SKIP][70] ([Intel XE#1201] / [Intel XE#829])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-466/igt@kms_ccs@bad-aux-stride-y-tiled-ccs.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_ccs@bad-aux-stride-y-tiled-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: [SKIP][71] ([Intel XE#1201] / [Intel XE#829]) -> [FAIL][72] ([Intel XE#650])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-436/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-435/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc:
- shard-dg2-set2: [SKIP][73] ([Intel XE#1201] / [Intel XE#829]) -> [SKIP][74] ([Intel XE#1201] / [Intel XE#455] / [Intel XE#787])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-436/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_chamelium_hpd@dp-hpd-after-suspend:
- shard-dg2-set2: [SKIP][75] ([Intel XE#1201]) -> [SKIP][76] ([Intel XE#1201] / [Intel XE#373])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-436/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-463/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html
* igt@kms_chamelium_hpd@hdmi-hpd-storm:
- shard-dg2-set2: [SKIP][77] ([Intel XE#1201] / [Intel XE#373]) -> [SKIP][78] ([Intel XE#1201]) +1 other test skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-464/igt@kms_chamelium_hpd@hdmi-hpd-storm.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_chamelium_hpd@hdmi-hpd-storm.html
* igt@kms_content_protection@atomic:
- shard-dg2-set2: [SKIP][79] ([Intel XE#1201] / [Intel XE#455]) -> [FAIL][80] ([Intel XE#1178])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-464/igt@kms_content_protection@atomic.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-435/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-dg2-set2: [SKIP][81] ([Intel XE#1201]) -> [SKIP][82] ([Intel XE#1201] / [Intel XE#307])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-436/igt@kms_content_protection@dp-mst-type-0.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-436/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@legacy:
- shard-dg2-set2: [FAIL][83] ([Intel XE#1178]) -> [SKIP][84] ([Intel XE#1201] / [Intel XE#455])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-466/igt@kms_content_protection@legacy.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@uevent:
- shard-dg2-set2: [SKIP][85] ([Intel XE#1201] / [Intel XE#455]) -> [FAIL][86] ([Intel XE#1188])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-464/igt@kms_content_protection@uevent.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-436/igt@kms_content_protection@uevent.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
- shard-dg2-set2: [DMESG-WARN][87] ([Intel XE#1214] / [Intel XE#282]) -> [DMESG-WARN][88] ([Intel XE#1214] / [Intel XE#282] / [Intel XE#910])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-463/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-436/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
- shard-dg2-set2: [DMESG-WARN][89] ([Intel XE#1214] / [Intel XE#282]) -> [SKIP][90] ([Intel XE#1201])
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-434/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
* igt@kms_cursor_legacy@single-move:
- shard-dg2-set2: [DMESG-WARN][91] ([Intel XE#1214] / [Intel XE#282]) -> [DMESG-WARN][92] ([Intel XE#1214] / [Intel XE#282] / [Intel XE#877])
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-434/igt@kms_cursor_legacy@single-move.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-466/igt@kms_cursor_legacy@single-move.html
* igt@kms_cursor_legacy@single-move@pipe-a:
- shard-dg2-set2: [DMESG-WARN][93] ([Intel XE#1214] / [Intel XE#282]) -> [DMESG-WARN][94] ([Intel XE#1214] / [Intel XE#877])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-434/igt@kms_cursor_legacy@single-move@pipe-a.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-466/igt@kms_cursor_legacy@single-move@pipe-a.html
* igt@kms_frontbuffer_tracking@drrs-1p-pri-indfb-multidraw:
- shard-dg2-set2: [SKIP][95] ([Intel XE#1201] / [Intel XE#651]) -> [SKIP][96] ([Intel XE#1201]) +2 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-1p-pri-indfb-multidraw.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-plflip-blt:
- shard-dg2-set2: [SKIP][97] ([Intel XE#1201] / [Intel XE#651]) -> [SKIP][98] ([Intel XE#1201] / [Intel XE#1235])
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-463/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-plflip-blt.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt:
- shard-dg2-set2: [SKIP][99] ([Intel XE#1201]) -> [SKIP][100] ([Intel XE#1201] / [Intel XE#651]) +1 other test skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-onoff:
- shard-dg2-set2: [SKIP][101] ([Intel XE#1201] / [Intel XE#653]) -> [SKIP][102] ([Intel XE#1201]) +2 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-433/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-onoff.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-blt:
- shard-dg2-set2: [SKIP][103] ([Intel XE#1201]) -> [SKIP][104] ([Intel XE#1201] / [Intel XE#653]) +1 other test skip
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-blt.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_plane_scaling@plane-downscale-factor-0-75-with-pixel-format:
- shard-dg2-set2: [INCOMPLETE][105] ([Intel XE#1195] / [Intel XE#904] / [Intel XE#909]) -> [TIMEOUT][106] ([Intel XE#380] / [Intel XE#904] / [Intel XE#909])
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-435/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-pixel-format.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-463/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-pixel-format.html
* igt@kms_plane_scaling@plane-downscale-factor-0-75-with-pixel-format@pipe-a-hdmi-a-6:
- shard-dg2-set2: [INCOMPLETE][107] ([Intel XE#1195] / [Intel XE#904] / [Intel XE#909]) -> [TIMEOUT][108] ([Intel XE#904] / [Intel XE#909])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-435/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-pixel-format@pipe-a-hdmi-a-6.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-463/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-pixel-format@pipe-a-hdmi-a-6.html
* igt@kms_psr@fbc-psr2-cursor-plane-move:
- shard-dg2-set2: [SKIP][109] ([Intel XE#1201]) -> [SKIP][110] ([Intel XE#1201] / [Intel XE#929]) +1 other test skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-436/igt@kms_psr@fbc-psr2-cursor-plane-move.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-436/igt@kms_psr@fbc-psr2-cursor-plane-move.html
* igt@kms_psr@fbc-psr2-primary-blt:
- shard-dg2-set2: [SKIP][111] ([Intel XE#1201] / [Intel XE#929]) -> [SKIP][112] ([Intel XE#1201]) +1 other test skip
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-463/igt@kms_psr@fbc-psr2-primary-blt.html
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_psr@fbc-psr2-primary-blt.html
* igt@kms_vrr@flip-basic:
- shard-dg2-set2: [SKIP][113] ([Intel XE#1201]) -> [SKIP][114] ([Intel XE#1201] / [Intel XE#455])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-436/igt@kms_vrr@flip-basic.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-434/igt@kms_vrr@flip-basic.html
* igt@xe_evict@evict-large-multi-vm-cm:
- shard-dg2-set2: [FAIL][115] ([Intel XE#1600]) -> [FAIL][116] ([Intel XE#1041])
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-436/igt@xe_evict@evict-large-multi-vm-cm.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-433/igt@xe_evict@evict-large-multi-vm-cm.html
* igt@xe_evict@evict-mixed-many-threads-large:
- shard-dg2-set2: [INCOMPLETE][117] ([Intel XE#1195] / [Intel XE#1473] / [Intel XE#392]) -> [TIMEOUT][118] ([Intel XE#1041] / [Intel XE#1473] / [Intel XE#392])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-466/igt@xe_evict@evict-mixed-many-threads-large.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-436/igt@xe_evict@evict-mixed-many-threads-large.html
* igt@xe_evict@evict-threads-large:
- shard-dg2-set2: [INCOMPLETE][119] ([Intel XE#1195] / [Intel XE#1473] / [Intel XE#392]) -> [TIMEOUT][120] ([Intel XE#1473] / [Intel XE#392])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7846/shard-dg2-466/igt@xe_evict@evict-threads-large.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11121/shard-dg2-464/igt@xe_evict@evict-threads-large.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1041]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1041
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1162]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1162
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1195]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1195
[Intel XE#1201]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1201
[Intel XE#1214]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1214
[Intel XE#1234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1234
[Intel XE#1235]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1235
[Intel XE#1252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1252
[Intel XE#1473]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1473
[Intel XE#1600]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1600
[Intel XE#1787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1787
[Intel XE#1818]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1818
[Intel XE#282]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/282
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#305]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/305
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/314
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/380
[Intel XE#392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/392
[Intel XE#402]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/402
[Intel XE#417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/417
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/482
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/650
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#829]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/829
[Intel XE#877]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/877
[Intel XE#904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/904
[Intel XE#909]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/909
[Intel XE#910]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/910
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* IGT: IGT_7846 -> IGTPW_11121
* Linux: xe-1263-92f877dd46245e4a44b6d24b5e303b8c03c40c75 -> xe-1265-2756f0412a64d4a3bedfb79b868fbd8c313ed027
IGTPW_11121: dede7eb874dc4abbb3449a6c02fc42e852e62485 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_7846: 4a5fd4e7cb2798636f6464e2bd61399f3242b322 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-1263-92f877dd46245e4a44b6d24b5e303b8c03c40c75: 92f877dd46245e4a44b6d24b5e303b8c03c40c75
xe-1265-2756f0412a64d4a3bedfb79b868fbd8c313ed027: 2756f0412a64d4a3bedfb79b868fbd8c313ed027
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-133402v1/index.html
[-- Attachment #2: Type: text/html, Size: 44159 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH i-g-t 3/3] tests/vmwgfx: Add a prime test
2024-05-09 19:15 ` [PATCH i-g-t 3/3] tests/vmwgfx: Add a prime test Zack Rusin
@ 2024-05-10 12:29 ` Kamil Konieczny
0 siblings, 0 replies; 9+ messages in thread
From: Kamil Konieczny @ 2024-05-10 12:29 UTC (permalink / raw)
To: igt-dev; +Cc: Zack Rusin, ian.forbes, martin.krastev, maaz.mombasawala
Hi Zack,
On 2024-05-09 at 15:15:29 -0400, Zack Rusin wrote:
> Add a test that check for various dma-buf/prime related issues that might
> show up on vmwgfx.
>
> Signed-off-by: Zack Rusin <zack.rusin@broadcom.com>
> ---
> tests/vmwgfx/meson.build | 3 +-
> tests/vmwgfx/vmw_prime.c | 355 +++++++++++++++++++++++++++++++++++++++
> 2 files changed, 357 insertions(+), 1 deletion(-)
> create mode 100644 tests/vmwgfx/vmw_prime.c
>
> diff --git a/tests/vmwgfx/meson.build b/tests/vmwgfx/meson.build
> index 073905f0a..716024381 100644
> --- a/tests/vmwgfx/meson.build
> +++ b/tests/vmwgfx/meson.build
> @@ -4,7 +4,8 @@ vmwgfx_progs = [
> 'vmw_execution_buffer',
> 'vmw_surface_copy',
> 'vmw_mob_stress',
> - 'vmw_ref_count'
> + 'vmw_ref_count',
> + 'vmw_prime'
'prime' should be before 'ref_count'
Btw rest of vmw tests should also be sorted...
> ]
> vmwgfx_deps = test_deps
>
> diff --git a/tests/vmwgfx/vmw_prime.c b/tests/vmwgfx/vmw_prime.c
> new file mode 100644
> index 000000000..b9294517b
> --- /dev/null
> +++ b/tests/vmwgfx/vmw_prime.c
> @@ -0,0 +1,355 @@
> +// SPDX-License-Identifier: GPL-2.0 OR MIT
Could it be MIT?
> +/**********************************************************
> + * Copyright (c) 2024 Broadcom. All Rights Reserved. The term
Delete this, SPDX replaced it.
> + * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
> + *
> + * Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use, copy,
> + * modify, merge, publish, distribute, sublicense, and/or sell copies
> + * of the Software, and to permit persons to whom the Software is
> + * furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
> + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
> + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
> + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
> + * SOFTWARE.
> + *
> + **********************************************************/
> +
> +#include "igt_vmwgfx.h"
> +
Delete this empty line.
> +#include "igt_kms.h"
'kms.h' should be before 'vmwgfxh'.
Regards,
Kamil
> +
> +IGT_TEST_DESCRIPTION(
> + "Check whether basic DRM prime and dma-buf work correctly.");
> +
> +static void replace_with_prime_rt(struct vmw_svga_device *device,
> + int32 context_id, uint32 buffer_handle,
> + struct vmw_default_objects *objects,
> + const SVGA3dSize *rt_size)
> +{
> + struct vmw_execbuf *cmd_buf;
> + SVGA3dRenderTargetViewDesc rtv_desc = { 0 };
> + SVGA3dCmdDXDefineRenderTargetView rt_view_define_cmd = { 0 };
> + SVGA3dCmdDXDestroyRenderTargetView rt_view_cmd = {
> + .renderTargetViewId = objects->color_rt_id
> + };
> +
> + vmw_ioctl_surface_unref(device->drm_fd, objects->color_rt);
> + objects->color_rt = vmw_ioctl_create_surface_full(
> + device->drm_fd,
> + SVGA3D_SURFACE_HINT_TEXTURE | SVGA3D_SURFACE_HINT_RENDERTARGET |
> + SVGA3D_SURFACE_BIND_RENDER_TARGET,
> + SVGA3D_R8G8B8A8_UNORM, 0, SVGA3D_MS_PATTERN_NONE,
> + SVGA3D_MS_QUALITY_NONE, SVGA3D_TEX_FILTER_NONE, 1, 1, *rt_size,
> + buffer_handle, drm_vmw_surface_flag_shareable);
> +
> + cmd_buf = vmw_execbuf_create(device->drm_fd, context_id);
> +
> + rtv_desc.tex.arraySize = 1;
> + rtv_desc.tex.firstArraySlice = 0;
> + rtv_desc.tex.mipSlice = 0;
> + vmw_bitvector_find_next_bit(device->rt_view_bv,
> + &rt_view_define_cmd.renderTargetViewId);
> + rt_view_define_cmd.sid = objects->color_rt->base.handle;
> + rt_view_define_cmd.format = SVGA3D_R8G8B8A8_UNORM;
> + rt_view_define_cmd.resourceDimension = SVGA3D_RESOURCE_TEXTURE2D;
> + rt_view_define_cmd.desc = rtv_desc;
> + vmw_execbuf_append(cmd_buf, SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW,
> + &rt_view_cmd, sizeof(rt_view_cmd), NULL, 0);
> + vmw_execbuf_append(cmd_buf, SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW,
> + &rt_view_define_cmd, sizeof(rt_view_define_cmd),
> + NULL, 0);
> + vmw_execbuf_submit(cmd_buf, NULL);
> + vmw_execbuf_destroy(cmd_buf);
> +
> + vmw_bitvector_free_bit(device->rt_view_bv, objects->color_rt_id);
> + objects->color_rt_id = rt_view_define_cmd.renderTargetViewId;
> +}
> +
> +static void draw_triangle_map_gem(struct vmw_svga_device *mdevice,
> + struct vmw_svga_device *device, int32 cid)
> +{
> + struct vmw_default_objects objects;
> + void *ptr;
> + bool save_status;
> + int fd, imported_handle, gem_handle;
> + uint64_t gem_size;
> +
> + gem_handle = kmstest_dumb_create(mdevice->drm_fd,
> + vmw_default_rect_size.width,
> + vmw_default_rect_size.height, 32, NULL,
> + &gem_size);
> + fd = prime_handle_to_fd(mdevice->drm_fd, gem_handle);
> + imported_handle = prime_fd_to_handle(device->drm_fd, fd);
> +
> + vmw_create_default_objects(device, cid, &objects,
> + &vmw_default_rect_size);
> + replace_with_prime_rt(device, cid, imported_handle, &objects,
> + &vmw_default_rect_size);
> + vmw_triangle_draw(device, cid, &objects,
> + vmw_triangle_draw_flags_sync |
> + vmw_triangle_draw_flags_readback);
> +
> + ptr = kmstest_dumb_map_buffer(mdevice->drm_fd, gem_handle, gem_size,
> + PROT_READ);
> +
> + save_status = vmw_save_data_as_png(objects.color_rt, ptr,
> + "vmw_prime_tri1.png");
> + igt_assert(save_status);
> + vmw_triangle_assert_values(ptr, objects.color_rt);
> +
> + munmap(ptr, gem_size);
> +
> + vmw_destroy_default_objects(device, &objects);
> + kmstest_dumb_destroy(mdevice->drm_fd, gem_handle);
> +}
> +
> +static void draw_triangle_map_dmabuf(struct vmw_svga_device *mdevice,
> + struct vmw_svga_device *device, int32 cid)
> +{
> + struct vmw_default_objects objects;
> + void *ptr;
> + bool save_status;
> + int fd, imported_handle, gem_handle;
> + uint64_t gem_size;
> +
> + gem_handle = kmstest_dumb_create(mdevice->drm_fd,
> + vmw_default_rect_size.width,
> + vmw_default_rect_size.height, 32, NULL,
> + &gem_size);
> + fd = prime_handle_to_fd_for_mmap(mdevice->drm_fd, gem_handle);
> + kmstest_dumb_destroy(mdevice->drm_fd, gem_handle);
> + imported_handle = prime_fd_to_handle(device->drm_fd, fd);
> +
> + vmw_create_default_objects(device, cid, &objects,
> + &vmw_default_rect_size);
> + replace_with_prime_rt(device, cid, imported_handle, &objects,
> + &vmw_default_rect_size);
> + vmw_triangle_draw(device, cid, &objects,
> + vmw_triangle_draw_flags_sync |
> + vmw_triangle_draw_flags_readback);
> +
> + ptr = mmap(NULL, gem_size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
> +
> + save_status = vmw_save_data_as_png(objects.color_rt, ptr,
> + "vmw_prime_tri2.png");
> + igt_assert(save_status);
> + vmw_triangle_assert_values(ptr, objects.color_rt);
> +
> + munmap(ptr, gem_size);
> + close(fd);
> +
> + vmw_destroy_default_objects(device, &objects);
> +}
> +
> +typedef struct {
> + struct vmw_svga_device mdevice;
> + struct vmw_svga_device rdevice;
> + int32 cid;
> + igt_display_t display;
> + struct igt_fb fb;
> + igt_output_t *output;
> + igt_plane_t *primary;
> + enum pipe pipe;
> + igt_crc_t reference_tri_crc;
> +} gpu_process_t;
> +
> +static void cleanup_crtc(gpu_process_t *gpu)
> +{
> + igt_display_t *display = &gpu->display;
> + igt_output_t *output = gpu->output;
> +
> + igt_plane_set_fb(gpu->primary, NULL);
> +
> + igt_output_set_pipe(output, PIPE_ANY);
> + igt_display_commit(display);
> +
> + igt_remove_fb(gpu->mdevice.drm_fd, &gpu->fb);
> +}
> +
> +static void prepare_crtc(gpu_process_t *gpu)
> +{
> + igt_display_t *display = &gpu->display;
> + igt_output_t *output = gpu->output;
> + drmModeModeInfo *mode;
> + int ret;
> +
> + /* select the pipe we want to use */
> + igt_output_set_pipe(output, gpu->pipe);
> +
> + mode = igt_output_get_mode(output);
> +
> + /* create a white fb and flip to it */
> + igt_create_color_fb(gpu->mdevice.drm_fd, mode->hdisplay, mode->vdisplay,
> + DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_LINEAR, 1.0,
> + 1.0, 1.0, &gpu->fb);
> +
> + gpu->primary =
> + igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
> +
> + igt_plane_set_fb(gpu->primary, &gpu->fb);
> + ret = igt_display_commit(display);
> + igt_assert(ret == 0);
> +}
> +
> +static void run_renderer(struct vmw_svga_device *device, int prime_fd, int cid,
> + int fb_size, int width, int height,
> + uint32_t draw_flags)
> +{
> + struct vmw_default_objects objects;
> + int imported_handle;
> + SVGA3dSize rt_size = { 0 };
> +
> + rt_size.width = width;
> + rt_size.height = height;
> + rt_size.depth = 1;
> +
> + imported_handle = prime_fd_to_handle(device->drm_fd, prime_fd);
> +
> + vmw_create_default_objects(device, cid, &objects, &rt_size);
> + replace_with_prime_rt(device, cid, imported_handle, &objects, &rt_size);
> + vmw_triangle_draw(device, cid, &objects, draw_flags);
> +
> + vmw_destroy_default_objects(device, &objects);
> +}
> +
> +static void draw_triangle_3d(gpu_process_t *gpu, uint32_t draw_flags)
> +{
> + igt_display_t *display = &gpu->display;
> + igt_output_t *output;
> + enum pipe pipe;
> + igt_pipe_crc_t *pipe_crc;
> + igt_crc_t blank_crc, tri_crc;
> + char *blank_crc_str, *tri_crc_str;
> + bool crc_equal;
> +
> + for_each_pipe_with_valid_output(display, pipe, output) {
> + int prime_fd;
> +
> + gpu->output = output;
> + gpu->pipe = pipe;
> +
> + prepare_crtc(gpu);
> + pipe_crc = igt_pipe_crc_new(gpu->mdevice.drm_fd, pipe,
> + IGT_PIPE_CRC_SOURCE_AUTO);
> + igt_pipe_crc_collect_crc(pipe_crc, &blank_crc);
> +
> + prime_fd = prime_handle_to_fd_for_mmap(gpu->mdevice.drm_fd,
> + gpu->fb.gem_handle);
> + igt_skip_on(prime_fd == -1 && errno == EINVAL);
> +
> + igt_fork(renderer_no, 1)
> + {
> + run_renderer(&gpu->rdevice, prime_fd, gpu->cid,
> + gpu->fb.size, gpu->fb.width,
> + gpu->fb.height, draw_flags);
> + }
> + igt_waitchildren();
> +
> + igt_plane_set_fb(gpu->primary, &gpu->fb);
> + igt_display_commit(display);
> + igt_pipe_crc_collect_crc(pipe_crc, &tri_crc);
> + blank_crc_str = igt_crc_to_string(&blank_crc);
> + tri_crc_str = igt_crc_to_string(&tri_crc);
> +
> + igt_debug("Blank crc = '%s', tri = '%s\n'", blank_crc_str,
> + tri_crc_str);
> + crc_equal = igt_check_crc_equal(&blank_crc, &tri_crc);
> + igt_assert_f(
> + !crc_equal,
> + "Blank and rendered triangle CRCs should be different.\n");
> + if (draw_flags == (vmw_triangle_draw_flags_sync |
> + vmw_triangle_draw_flags_readback)) {
> + memcpy(&gpu->reference_tri_crc, &tri_crc,
> + sizeof(gpu->reference_tri_crc));
> + } else if (gpu->reference_tri_crc.has_valid_frame) {
> + igt_assert_crc_equal(&gpu->reference_tri_crc, &tri_crc);
> + }
> +
> + igt_debug_wait_for_keypress("paint");
> +
> + close(prime_fd);
> + igt_pipe_crc_free(pipe_crc);
> + cleanup_crtc(gpu);
> + free(blank_crc_str);
> + free(tri_crc_str);
> + /* once is enough */
> + return;
> + }
> +
> + igt_skip("no valid crtc/connector combinations found\n");
> +}
> +
> +igt_main
> +{
> + gpu_process_t gpu = { 0 };
> +
> + igt_fixture
> + {
> + vmw_svga_device_init(&gpu.mdevice, vmw_svga_device_node_master);
> + vmw_svga_device_init(&gpu.rdevice, vmw_svga_device_node_render);
> + igt_require(gpu.mdevice.drm_fd != -1);
> + igt_require(gpu.rdevice.drm_fd != -1);
> +
> + gpu.cid = vmw_ioctl_context_create(gpu.rdevice.drm_fd);
> + igt_require(gpu.cid != SVGA3D_INVALID_ID);
> +
> + kmstest_set_vt_graphics_mode();
> +
> + igt_require_pipe_crc(gpu.mdevice.drm_fd);
> +
> + igt_display_require(&gpu.display, gpu.mdevice.drm_fd);
> + }
> +
> + igt_describe("Tests prime rendering triangle with gem mmap.");
> + igt_subtest("tri-map-gem")
> + {
> + draw_triangle_map_gem(&gpu.mdevice, &gpu.rdevice, gpu.cid);
> + }
> +
> + igt_describe("Tests prime rendering triangle with dmabuf mmap.");
> + igt_subtest("tri-map-dmabuf")
> + {
> + draw_triangle_map_dmabuf(&gpu.mdevice, &gpu.rdevice, gpu.cid);
> + }
> +
> + igt_describe(
> + "Tests synchronous/readback prime rendering triangle while buffer bound to fb");
> + igt_subtest("buffer-surface-fb-sharing-sync-readback")
> + {
> + draw_triangle_3d(&gpu,
> + vmw_triangle_draw_flags_sync |
> + vmw_triangle_draw_flags_readback);
> + }
> +
> + igt_describe(
> + "Tests synchronous prime rendering triangle while buffer bound to fb");
> + igt_subtest("buffer-surface-fb-sharing-sync")
> + {
> + draw_triangle_3d(&gpu, vmw_triangle_draw_flags_sync);
> + }
> +
> + igt_describe("Tests prime rendering triangle while buffer bound to fb");
> + igt_subtest("buffer-surface-fb-sharing")
> + {
> + draw_triangle_3d(&gpu, vmw_triangle_draw_flags_none);
> + }
> +
> + igt_fixture
> + {
> + vmw_ioctl_context_destroy(gpu.rdevice.drm_fd, gpu.cid);
> + igt_display_fini(&gpu.display);
> + vmw_svga_device_fini(&gpu.rdevice);
> + vmw_svga_device_fini(&gpu.mdevice);
> + }
> +}
> --
> 2.40.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH i-g-t 1/3] tests/vmwgfx: Removing incorrect assert in mob_repeated_unref
2024-05-09 19:15 ` [PATCH i-g-t 1/3] tests/vmwgfx: Removing incorrect assert in mob_repeated_unref Zack Rusin
@ 2024-05-13 14:01 ` Kamil Konieczny
0 siblings, 0 replies; 9+ messages in thread
From: Kamil Konieczny @ 2024-05-13 14:01 UTC (permalink / raw)
To: igt-dev
Cc: Zack Rusin, ian.forbes, martin.krastev, maaz.mombasawala,
Maaz Mombasawala, Martin Krastev, Ian Forbes
Hi Zack,
On 2024-05-09 at 15:15:27 -0400, Zack Rusin wrote:
> From: Maaz Mombasawala <mombasawalam@vmware.com>
>
> Remove an incorrect assert in test mob_repeated_unref that checked if return
> value from multiple unrefs of a mob was 0. This was a bug in the vmwgfx driver,
> since after the first unref it should return -EINVAL.
> This bug was fixed with buffer rework in the vmwgfx driver and now the unref
> ioctl behaves the correct way.
>
> Signed-off-by: Maaz Mombasawala <mombasawalam@vmware.com>
> Reviewed-by: Martin Krastev <krastevm@vmware.com>
> Reviewed-by: Ian Forbes <iforbes@vmware.com>
> Signed-off-by: Zack Rusin <zack.rusin@broadcom.com>
> ---
> tests/vmwgfx/vmw_ref_count.c | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/tests/vmwgfx/vmw_ref_count.c b/tests/vmwgfx/vmw_ref_count.c
> index da4b41f89..92d49dbd0 100644
> --- a/tests/vmwgfx/vmw_ref_count.c
> +++ b/tests/vmwgfx/vmw_ref_count.c
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0 OR MIT
> /**********************************************************
> - * Copyright 2021-2022 VMware, Inc.
> + * Copyright 2021-2023 VMware, Inc.
-------------------- ^^^^
This should be 2024.
Regards,
Kamil
> *
> * Permission is hereby granted, free of charge, to any person
> * obtaining a copy of this software and associated documentation
> @@ -256,13 +256,11 @@ igt_main
>
> /* Shouldn't crash on multiple invocations */
> for (i = 0; i < 3; i++) {
> - int ret;
> struct drm_vmw_handle_close_arg arg = {
> .handle = mob->handle
> };
> - ret = drmCommandWrite(fd1, DRM_VMW_HANDLE_CLOSE, &arg,
> + drmCommandWrite(fd1, DRM_VMW_HANDLE_CLOSE, &arg,
> sizeof(arg));
> - igt_assert_eq(ret, 0);
> }
> free(mob);
> }
> --
> 2.40.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2024-05-13 14:02 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-05-09 19:15 [PATCH i-g-t 0/3] Add vmwgfx prime tests Zack Rusin
2024-05-09 19:15 ` [PATCH i-g-t 1/3] tests/vmwgfx: Removing incorrect assert in mob_repeated_unref Zack Rusin
2024-05-13 14:01 ` Kamil Konieczny
2024-05-09 19:15 ` [PATCH i-g-t 2/3] lib/vmwgfx: Allow using any buffer handle as a surface backing Zack Rusin
2024-05-09 19:15 ` [PATCH i-g-t 3/3] tests/vmwgfx: Add a prime test Zack Rusin
2024-05-10 12:29 ` Kamil Konieczny
2024-05-09 20:36 ` ✗ Fi.CI.BAT: failure for Add vmwgfx prime tests Patchwork
2024-05-09 20:48 ` ✓ CI.xeBAT: success " Patchwork
2024-05-10 1:26 ` ✗ CI.xeFULL: failure " Patchwork
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