From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: igt-dev@lists.freedesktop.org
Subject: [PATCH i-g-t 09/14] lib/intel_bufops: Add support for gen2 and i915 tiling layouts
Date: Fri, 4 Oct 2024 13:41:16 +0300 [thread overview]
Message-ID: <20241004104121.32750-10-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20241004104121.32750-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add support for tiling formats on gen2/3.
Our tile formats are as follows:
X-tile:
gen2: 128B x 16, made of 8B QWords
gen3: 512B x 8, made of 32B SWords
gen4+: 512B x 8, made of 16B OWords
Y-tile:
gen2: 128B x 16, made of 8B QWords
i915: 512B x 8, made of 32B SWords
i945+: 128B x 32, made of 16B OWords
We already had the i945+ Y-tile and i915+ X-tile
(since the i945 OW vs. i915 SW makes no difference
for X-tile). So just need to deal with gen2 X/Y-tile
and i915 Y-tile.
Note that the gen2 check that was there was incorrect
becasue it completely forgot about i915 Y-tile.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
lib/intel_bufops.c | 83 +++++++++++++++++++++++++++++++---------------
1 file changed, 56 insertions(+), 27 deletions(-)
diff --git a/lib/intel_bufops.c b/lib/intel_bufops.c
index 600a485362b5..619222019fd8 100644
--- a/lib/intel_bufops.c
+++ b/lib/intel_bufops.c
@@ -307,10 +307,9 @@ static void *linear_ptr(void *ptr,
static void *x_ptr(void *ptr,
unsigned int x, unsigned int y,
- unsigned int stride, unsigned int cpp)
+ unsigned int stride, unsigned int cpp,
+ const int tile_width, const int tile_height)
{
- const int tile_width = 512;
- const int tile_height = 8;
const int tile_size = tile_width * tile_height;
int offset_x, offset_y, pos;
int tile_x, tile_y;
@@ -327,13 +326,27 @@ static void *x_ptr(void *ptr,
return ptr + pos;
}
+static void *gen2_x_ptr(void *ptr,
+ unsigned int x, unsigned int y,
+ unsigned int stride, unsigned int cpp)
+{
+ return x_ptr(ptr, x, y, stride, cpp, 128, 16);
+}
+
+static void *gen3_x_ptr(void *ptr,
+ unsigned int x, unsigned int y,
+ unsigned int stride, unsigned int cpp)
+{
+ return x_ptr(ptr, x, y, stride, cpp, 512, 8);
+}
+
static void *y_ptr(void *ptr,
unsigned int x, unsigned int y,
- unsigned int stride, unsigned int cpp)
+ unsigned int stride, unsigned int cpp,
+ const int tile_width,
+ const int tile_height,
+ const int owords)
{
- const int tile_width = 128;
- const int tile_height = 32;
- const int owords = 16;
const int tile_size = tile_width * tile_height;
int offset_x, offset_y, pos;
int shift_x, shift_y;
@@ -352,6 +365,27 @@ static void *y_ptr(void *ptr,
return ptr + pos;
}
+static void *gen2_y_ptr(void *ptr,
+ unsigned int x, unsigned int y,
+ unsigned int stride, unsigned int cpp)
+{
+ return y_ptr(ptr, x, y, stride, cpp, 128, 16, 8);
+}
+
+static void *i915_y_ptr(void *ptr,
+ unsigned int x, unsigned int y,
+ unsigned int stride, unsigned int cpp)
+{
+ return y_ptr(ptr, x, y, stride, cpp, 512, 8, 32);
+}
+
+static void *i945_y_ptr(void *ptr,
+ unsigned int x, unsigned int y,
+ unsigned int stride, unsigned int cpp)
+{
+ return y_ptr(ptr, x, y, stride, cpp, 128, 32, 16);
+}
+
/*
* (x,y) to memory location in tiled-4 surface
*
@@ -426,8 +460,10 @@ static void *yf_ptr(void *ptr,
typedef void *(*tile_fn)(void *, unsigned int, unsigned int,
unsigned int, unsigned int);
-static tile_fn __get_tile_fn_ptr(int tiling)
+static tile_fn __get_tile_fn_ptr(int fd, int tiling)
{
+ const struct intel_device_info *info =
+ intel_get_device_info(intel_get_drm_devid(fd));
tile_fn fn = NULL;
switch (tiling) {
@@ -435,10 +471,18 @@ static tile_fn __get_tile_fn_ptr(int tiling)
fn = linear_ptr;
break;
case I915_TILING_X:
- fn = x_ptr;
+ if (info->graphics_ver == 2)
+ fn = gen2_x_ptr;
+ else
+ fn = gen3_x_ptr;
break;
case I915_TILING_Y:
- fn = y_ptr;
+ if (info->graphics_ver == 2)
+ fn = gen2_y_ptr;
+ else if (info->is_grantsdale || info->is_alviso)
+ fn = i915_y_ptr;
+ else
+ fn = i945_y_ptr;
break;
case I915_TILING_Yf:
fn = yf_ptr;
@@ -595,7 +639,7 @@ static void __copy_linear_to(int fd, struct intel_buf *buf,
const uint32_t *linear,
int tiling, uint32_t swizzle)
{
- const tile_fn fn = __get_tile_fn_ptr(tiling);
+ const tile_fn fn = __get_tile_fn_ptr(fd, tiling);
int height = intel_buf_height(buf);
int width = intel_buf_width(buf);
void *map = mmap_write(fd, buf);
@@ -659,7 +703,7 @@ static void copy_linear_to_tile4(struct buf_ops *bops, struct intel_buf *buf,
static void __copy_to_linear(int fd, struct intel_buf *buf,
uint32_t *linear, int tiling, uint32_t swizzle)
{
- const tile_fn fn = __get_tile_fn_ptr(tiling);
+ const tile_fn fn = __get_tile_fn_ptr(fd, tiling);
int height = intel_buf_height(buf);
int width = intel_buf_width(buf);
void *map = mmap_write(fd, buf);
@@ -1699,21 +1743,6 @@ static struct buf_ops *__buf_ops_create(int fd, bool check_idempotency)
return bops;
}
- /*
- * Warning!
- *
- * Gen2 software tiling/detiling is not supported! (yet).
- *
- * If you are brave hero with an access to Gen2 you can save the world.
- * Until then we're doomed to use only hardware (de)tiling.
- *
- * Ok, you have been warned.
- */
- if (bops->intel_gen == 2) {
- igt_warn("Gen2 detected. HW (de)tiling support only.");
- return bops;
- }
-
/* Let's probe X and Y hw tiling support */
if (is_hw_tiling_supported(bops, I915_TILING_X)) {
bool swizzling_supported;
--
2.45.2
next prev parent reply other threads:[~2024-10-04 10:41 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-04 10:41 [PATCH i-g-t 00/14] intel: igt_draw and intel_bufops improvements Ville Syrjala
2024-10-04 10:41 ` [PATCH i-g-t 01/14] lib/igt_draw: Use void* where appopriate Ville Syrjala
2024-10-29 14:44 ` Juha-Pekka Heikkila
2024-10-04 10:41 ` [PATCH i-g-t 02/14] lib/igt_draw: Extend the API to support 64bpp colors Ville Syrjala
2024-10-22 16:04 ` Kamil Konieczny
2024-10-04 10:41 ` [PATCH i-g-t 03/14] lib/igt_draw: Support 64bpp int the mmap/pwrite paths Ville Syrjala
2024-10-22 15:55 ` Kamil Konieczny
2024-10-04 10:41 ` [PATCH i-g-t 04/14] lib/igt_draw: Support 8bpp " Ville Syrjala
2024-10-22 15:54 ` Kamil Konieczny
2024-10-04 10:41 ` [PATCH i-g-t 05/14] lib/igt_draw: Use function pointers for the linear<->tiled conversion Ville Syrjala
2024-11-12 9:59 ` Juha-Pekka Heikkilä
2024-10-04 10:41 ` [PATCH i-g-t 06/14] lib/igt_draw: Add support for gen2 and i915 tiling layouts Ville Syrjala
2024-11-12 16:08 ` Juha-Pekka Heikkilä
2024-10-04 10:41 ` [PATCH i-g-t 07/14] lib/igt_draw: Add 64bpp support to the XY_FAST_COLOR_BLT path Ville Syrjala
2024-10-29 15:02 ` Juha-Pekka Heikkila
2024-10-04 10:41 ` [PATCH i-g-t 08/14] lib/igt_draw: Add 64bpp support for the non-XY_FAST_COLOR_BLT path Ville Syrjala
2024-11-18 14:42 ` Juha-Pekka Heikkilä
2024-10-04 10:41 ` Ville Syrjala [this message]
2024-10-04 10:41 ` [PATCH i-g-t 10/14] lib/intel_bufops: Provide pread/pwrite based fallback when we don't have WC Ville Syrjala
2024-10-22 15:51 ` Kamil Konieczny
2024-10-24 16:20 ` [PATCH i-g-t v2 " Ville Syrjala
2024-10-04 10:41 ` [PATCH i-g-t 11/14] lib/rendercopy: Use igt_require() to validate gen2/3 surface size Ville Syrjala
2024-10-22 16:21 ` Kamil Konieczny
2024-10-04 10:41 ` [PATCH i-g-t 12/14] tests/kms_draw_crc: Test 64bpp Ville Syrjala
2024-11-18 14:50 ` Juha-Pekka Heikkilä
2024-10-04 10:41 ` [PATCH i-g-t 13/14] lib/igt_aux: Add igt_ror() and igt_rol() Ville Syrjala
2024-10-22 15:52 ` Kamil Konieczny
2024-10-04 10:41 ` [PATCH i-g-t 14/14] tests/gem_draw: Test igt_draw without kms Ville Syrjala
2024-10-11 10:43 ` [PATCH i-g-t v2 " Ville Syrjala
2024-10-22 16:30 ` Kamil Konieczny
2024-10-23 12:21 ` Ville Syrjälä
2024-10-07 15:39 ` ✗ GitLab.Pipeline: warning for intel: igt_draw and intel_bufops improvements Patchwork
2024-10-10 19:41 ` Ville Syrjälä
2024-10-11 6:37 ` Zbigniew Kempczyński
2024-10-11 7:42 ` Kamil Konieczny
2024-10-11 10:25 ` Ville Syrjälä
2024-10-11 7:00 ` Zbigniew Kempczyński
2024-10-11 8:01 ` Piecielska, Katarzyna
2024-10-11 10:15 ` Ville Syrjälä
2024-10-11 15:23 ` ✓ Fi.CI.BAT: success for intel: igt_draw and intel_bufops improvements (rev2) Patchwork
2024-10-11 16:01 ` ✓ CI.xeBAT: " Patchwork
2024-10-11 19:55 ` ✗ CI.xeFULL: failure " Patchwork
2024-10-12 9:01 ` ✗ Fi.CI.IGT: " Patchwork
2024-10-24 18:03 ` ✓ Fi.CI.BAT: success for intel: igt_draw and intel_bufops improvements (rev3) Patchwork
2024-10-24 18:37 ` ✓ CI.xeBAT: " Patchwork
2024-10-24 20:53 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-10-25 22:48 ` ✗ CI.xeFULL: " Patchwork
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