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From: Swati Sharma <swati2.sharma@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: ankit.k.nautiyal@intel.com, Swati Sharma <swati2.sharma@intel.com>
Subject: [PATCH i-g-t 4/5] tests/intel/kms_cdclk: Introduce set_mode()
Date: Tue, 18 Feb 2025 03:05:30 +0530	[thread overview]
Message-ID: <20250217213531.402162-5-swati2.sharma@intel.com> (raw)
In-Reply-To: <20250217213531.402162-1-swati2.sharma@intel.com>

Encapsulate the mode-setting functionality in the set_mode
function to reduce redundancy.

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 tests/intel/kms_cdclk.c | 69 +++++++++++++----------------------------
 1 file changed, 22 insertions(+), 47 deletions(-)

diff --git a/tests/intel/kms_cdclk.c b/tests/intel/kms_cdclk.c
index a4355baf2..b84ec5cae 100644
--- a/tests/intel/kms_cdclk.c
+++ b/tests/intel/kms_cdclk.c
@@ -235,20 +235,35 @@ static void test_mode_transition(data_t *data, enum pipe pipe, igt_output_t *out
 	igt_remove_fb(display->drm_fd, &fb);
 }
 
+static void set_mode(data_t *data, int count, drmModeModeInfo *mode,
+		     igt_output_t **valid_outputs, struct igt_fb fb)
+{
+	igt_display_t *display = &data->display;
+	igt_pipe_t *pipe;
+	igt_plane_t *plane;
+
+	for (int i = 0; i < count; i++) {
+		pipe = &display->pipes[i];
+		plane = igt_pipe_get_plane_type(pipe, DRM_PLANE_TYPE_PRIMARY);
+
+		igt_output_override_mode(valid_outputs[i], &mode[i]);
+
+		igt_plane_set_fb(plane, &fb);
+		igt_fb_set_size(&fb, plane, mode[i].hdisplay, mode[i].vdisplay);
+		igt_plane_set_size(plane, mode[i].hdisplay, mode[i].vdisplay);
+	}
+}
+
 static void test_mode_transition_on_all_outputs(data_t *data)
 {
 	igt_display_t *display = &data->display;
-	drmModeModeInfo *mode, mode_hi, mode_lo;
-	drmModeModeInfo mode_highres[IGT_MAX_PIPES] = {0}, mode_lowres[IGT_MAX_PIPES] = {0};
+	drmModeModeInfo *mode, mode_highres[IGT_MAX_PIPES] = {0}, mode_lowres[IGT_MAX_PIPES] = {0};
 	igt_output_t *valid_outputs[IGT_MAX_PIPES] = {NULL};
 	igt_output_t *output;
 	int count = 0;
 	int cdclk_ref, cdclk_new;
 	uint16_t width = 0, height = 0;
 	struct igt_fb fb;
-	igt_pipe_t *pipe;
-	igt_plane_t *plane;
-	int i = 0, j = 0;
 
 	do_cleanup_display(display);
 	igt_display_reset(display);
@@ -288,51 +303,12 @@ static void test_mode_transition_on_all_outputs(data_t *data)
 
 	igt_create_pattern_fb(data->drm_fd, width, height, DRM_FORMAT_XRGB8888,
 			      DRM_FORMAT_MOD_LINEAR, &fb);
-	i = 0;
-	for_each_connected_output(display, output) {
-		pipe = &display->pipes[i];
-		plane = igt_pipe_get_plane_type(pipe, DRM_PLANE_TYPE_PRIMARY);
-
-		mode = NULL;
-
-		igt_output_set_pipe(output, i);
-		mode = igt_output_get_mode(output);
-		igt_assert(mode);
-
-		mode_lo = *get_lowres_mode(output);
-
-		igt_output_override_mode(output, &mode_lo);
-		igt_plane_set_fb(plane, &fb);
-		igt_fb_set_size(&fb, plane, mode_lo.hdisplay, mode_lo.vdisplay);
-		igt_plane_set_size(plane, mode_lo.hdisplay, mode_lo.vdisplay);
-		i++;
-	}
 
+	set_mode(data, count, mode_lowres, valid_outputs, fb);
 	igt_display_commit2(display, COMMIT_ATOMIC);
 	cdclk_ref = igt_get_current_cdclk(data->drm_fd);
 
-	j = 0;
-	for_each_connected_output(display, output) {
-		pipe = &display->pipes[j];
-		plane = igt_pipe_get_plane_type(pipe, DRM_PLANE_TYPE_PRIMARY);
-
-		mode = NULL;
-
-		igt_output_set_pipe(output, j);
-		mode = igt_output_get_mode(output);
-		igt_assert(mode);
-
-		mode_hi = *igt_output_get_highres_mode(output);
-		igt_require_f(is_4k(mode_hi), "Mode >= 4K not found on output %s\n",
-			      igt_output_name(output));
-
-		igt_output_override_mode(output, &mode_hi);
-		igt_plane_set_fb(plane, &fb);
-		igt_fb_set_size(&fb, plane, mode_hi.hdisplay, mode_hi.vdisplay);
-		igt_plane_set_size(plane, mode_hi.hdisplay, mode_hi.vdisplay);
-		j++;
-	}
-
+	set_mode(data, count, mode_highres, valid_outputs, fb);
 	igt_display_commit2(display, COMMIT_ATOMIC);
 	cdclk_new = igt_get_current_cdclk(data->drm_fd);
 	igt_info("CD clock frequency %d -> %d\n", cdclk_ref, cdclk_new);
@@ -340,7 +316,6 @@ static void test_mode_transition_on_all_outputs(data_t *data)
 	/* cdclk should bump */
 	igt_assert_lt(cdclk_ref, cdclk_new);
 
-	igt_plane_set_fb(plane, NULL);
 	do_cleanup_display(display);
 	igt_remove_fb(data->drm_fd, &fb);
 }
-- 
2.25.1


  parent reply	other threads:[~2025-02-17 21:30 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-17 21:35 [PATCH i-g-t 0/5] tests/intel/kms_cdclk: Refactor mode setting and CD clock verification Swati Sharma
2025-02-17 21:35 ` [PATCH i-g-t 1/5] lib/igt_kms: Add func() to read and parse cdclk debugfs Swati Sharma
2025-02-23 12:01   ` Nautiyal, Ankit K
2025-02-17 21:35 ` [PATCH i-g-t 2/5] lib/igt_kms: Add highres() and lowres() func Swati Sharma
2025-02-17 21:35 ` [PATCH i-g-t 3/5] tests/intel/kms_cdclk: Add conditions to filter valid outputs Swati Sharma
2025-02-17 21:35 ` Swati Sharma [this message]
2025-02-17 21:35 ` [PATCH i-g-t 5/5] tests/intel/kms_cdclk: Use igt_get_max_cdclk() Swati Sharma
2025-02-18  0:06 ` ✓ Xe.CI.BAT: success for tests/intel/kms_cdclk: Refactor mode setting and CD clock verification (rev4) Patchwork
2025-02-18  0:23 ` ✗ i915.CI.BAT: failure " Patchwork
2025-02-18 18:10 ` ✗ Xe.CI.Full: " Patchwork
2025-02-23 12:11 ` [PATCH i-g-t 0/5] tests/intel/kms_cdclk: Refactor mode setting and CD clock verification Nautiyal, Ankit K

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