[PATCH i-g-t v2] tests/intel/kms_pm_dc: Add skip logic and logging for DC5 psr test

[Mohammed Thasleem <mohammed.thasleem@intel.com>]

Low power Pipe A is required to run the DC5 transaction for Gen12.
For Gen12+ to Xe3, either Pipe A or Pipe B is needed for the DC5
transaction using a low power pipe. Added skip logic and logging
to enforce these requirements."

v2: Updated subject title and discription.
    Add Gen checks for low power pipe selection. (Santosh)

Signed-off-by: Mohammed Thasleem <mohammed.thasleem@intel.com>
---
 tests/intel/kms_pm_dc.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c
index bbb29d7d9..c7fde2af7 100644
--- a/tests/intel/kms_pm_dc.c
+++ b/tests/intel/kms_pm_dc.c
@@ -156,10 +156,15 @@ static void setup_output(data_t *data)
 	igt_display_t *display = &data->display;
 	igt_output_t *output;
 	enum pipe pipe;
+	int disp_ver = intel_display_ver(data->devid);
 
 	for_each_pipe_with_valid_output(display, pipe, output) {
 		drmModeConnectorPtr c = output->config.connector;
 
+		igt_skip_on_f((disp_ver <= 12 && pipe != PIPE_A) ||
+			      (disp_ver <= 30 && !(pipe == PIPE_B || pipe == PIPE_A)),
+			       "Low power pipe was not selected for the DC5 transaction.\n");
+
 		if (c->connector_type != DRM_MODE_CONNECTOR_eDP)
 			continue;
 
-- 
2.25.1