* [PATCH i-g-t v2 1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions
@ 2025-04-17 8:52 Jesse.zhang@amd.com
2025-04-17 12:42 ` Khatri, Sunil
2025-04-17 16:37 ` Kamil Konieczny
0 siblings, 2 replies; 11+ messages in thread
From: Jesse.zhang@amd.com @ 2025-04-17 8:52 UTC (permalink / raw)
To: igt-dev
Cc: Vitaly Prosyak, Alex Deucher, Christian Koenig, sukhatri,
Jesse.zhang@amd.com, Jesse . Zhang
Add UAPI definitions for queue priority levels (NORMAL_LOW, LOW, etc.)
and secure queue flag in amdgpu_drm.h. This matches the libdrm changes
in commit fdf384d4b546 ("amdgpu: add priority and secure flags for user queues").
v2: In general, UAPI changes should be part of a different change and only uapi should be part of it (Sunil)
Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
---
include/drm-uapi/amdgpu_drm.h | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/include/drm-uapi/amdgpu_drm.h b/include/drm-uapi/amdgpu_drm.h
index 8191d0bd0..3f4813879 100644
--- a/include/drm-uapi/amdgpu_drm.h
+++ b/include/drm-uapi/amdgpu_drm.h
@@ -329,6 +329,16 @@ union drm_amdgpu_ctx {
#define AMDGPU_USERQ_OP_CREATE 1
#define AMDGPU_USERQ_OP_FREE 2
+/* queue priority levels */
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_MASK 0x3
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_SHIFT 0
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_LOW 0
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_LOW 1
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_HIGH 2
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_HIGH 3 /* admin only */
+/* for queues that need access to protected content */
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE (1 << 2)
+
/*
* This structure is a container to pass input configuration
* info for all supported userqueue related operations.
@@ -355,7 +365,7 @@ struct drm_amdgpu_userq_in {
* and doorbell_offset in the doorbell bo.
*/
__u32 doorbell_offset;
- __u32 _pad;
+ __u32 flags;
/**
* @queue_va: Virtual address of the GPU memory which holds the queue
* object. The queue holds the workload packets.
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* RE: [PATCH i-g-t v2 1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions
2025-04-17 8:52 [PATCH i-g-t v2 1/2] " Jesse.zhang@amd.com
@ 2025-04-17 12:42 ` Khatri, Sunil
2025-04-17 16:37 ` Kamil Konieczny
1 sibling, 0 replies; 11+ messages in thread
From: Khatri, Sunil @ 2025-04-17 12:42 UTC (permalink / raw)
To: Zhang, Jesse(Jie), igt-dev@lists.freedesktop.org
Cc: Prosyak, Vitaly, Deucher, Alexander, Koenig, Christian,
Zhang, Jesse(Jie), Zhang, Jesse(Jie)
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
-----Original Message-----
From: Jesse.zhang@amd.com <jesse.zhang@amd.com>
Sent: Thursday, April 17, 2025 2:23 PM
To: igt-dev@lists.freedesktop.org
Cc: Prosyak, Vitaly <Vitaly.Prosyak@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Khatri, Sunil <Sunil.Khatri@amd.com>; Zhang, Jesse(Jie) <Jesse.Zhang@amd.com>; Zhang, Jesse(Jie) <Jesse.Zhang@amd.com>
Subject: [PATCH i-g-t v2 1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions
Add UAPI definitions for queue priority levels (NORMAL_LOW, LOW, etc.) and secure queue flag in amdgpu_drm.h. This matches the libdrm changes in commit fdf384d4b546 ("amdgpu: add priority and secure flags for user queues").
v2: In general, UAPI changes should be part of a different change and only uapi should be part of it (Sunil)
Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
---
include/drm-uapi/amdgpu_drm.h | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/include/drm-uapi/amdgpu_drm.h b/include/drm-uapi/amdgpu_drm.h index 8191d0bd0..3f4813879 100644
--- a/include/drm-uapi/amdgpu_drm.h
+++ b/include/drm-uapi/amdgpu_drm.h
@@ -329,6 +329,16 @@ union drm_amdgpu_ctx {
#define AMDGPU_USERQ_OP_CREATE 1
#define AMDGPU_USERQ_OP_FREE 2
+/* queue priority levels */
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_MASK 0x3 #define
+AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_SHIFT 0 #define
+AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_LOW 0 #define
+AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_LOW 1 #define
+AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_HIGH 2 #define
+AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_HIGH 3 /* admin only */
+/* for queues that need access to protected content */ #define
+AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE (1 << 2)
+
/*
* This structure is a container to pass input configuration
* info for all supported userqueue related operations.
@@ -355,7 +365,7 @@ struct drm_amdgpu_userq_in {
* and doorbell_offset in the doorbell bo.
*/
__u32 doorbell_offset;
- __u32 _pad;
+ __u32 flags;
/**
* @queue_va: Virtual address of the GPU memory which holds the queue
* object. The queue holds the workload packets.
--
2.25.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH i-g-t v2 1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions
2025-04-17 8:52 [PATCH i-g-t v2 1/2] " Jesse.zhang@amd.com
2025-04-17 12:42 ` Khatri, Sunil
@ 2025-04-17 16:37 ` Kamil Konieczny
2025-04-22 8:21 ` Christian König
1 sibling, 1 reply; 11+ messages in thread
From: Kamil Konieczny @ 2025-04-17 16:37 UTC (permalink / raw)
To: Jesse.zhang@amd.com
Cc: igt-dev, Vitaly Prosyak, Alex Deucher, Christian Koenig, sukhatri
Hi Jesse.zhang,
On 2025-04-17 at 16:52:46 +0800, Jesse.zhang@amd.com wrote:
> Add UAPI definitions for queue priority levels (NORMAL_LOW, LOW, etc.)
> and secure queue flag in amdgpu_drm.h. This matches the libdrm changes
> in commit fdf384d4b546 ("amdgpu: add priority and secure flags for user queues").
Please write from what tree comes this commit or
give lore.kernel.org link.
I tried to find out this on current drm-tip and failed,
am I missing something?
Regards,
Kamil
>
> v2: In general, UAPI changes should be part of a different change and only uapi should be part of it (Sunil)
>
> Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
> ---
> include/drm-uapi/amdgpu_drm.h | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/include/drm-uapi/amdgpu_drm.h b/include/drm-uapi/amdgpu_drm.h
> index 8191d0bd0..3f4813879 100644
> --- a/include/drm-uapi/amdgpu_drm.h
> +++ b/include/drm-uapi/amdgpu_drm.h
> @@ -329,6 +329,16 @@ union drm_amdgpu_ctx {
> #define AMDGPU_USERQ_OP_CREATE 1
> #define AMDGPU_USERQ_OP_FREE 2
>
> +/* queue priority levels */
> +#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_MASK 0x3
> +#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_SHIFT 0
> +#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_LOW 0
> +#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_LOW 1
> +#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_HIGH 2
> +#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_HIGH 3 /* admin only */
> +/* for queues that need access to protected content */
> +#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE (1 << 2)
> +
> /*
> * This structure is a container to pass input configuration
> * info for all supported userqueue related operations.
> @@ -355,7 +365,7 @@ struct drm_amdgpu_userq_in {
> * and doorbell_offset in the doorbell bo.
> */
> __u32 doorbell_offset;
> - __u32 _pad;
> + __u32 flags;
> /**
> * @queue_va: Virtual address of the GPU memory which holds the queue
> * object. The queue holds the workload packets.
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH i-g-t v2 1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions
@ 2025-04-18 2:29 Jesse.zhang@amd.com
2025-04-18 2:29 ` [PATCH i-g-t v2 2/2] lib/amdgpu: Implement priority and secure flags for user queues Jesse.zhang@amd.com
` (3 more replies)
0 siblings, 4 replies; 11+ messages in thread
From: Jesse.zhang@amd.com @ 2025-04-18 2:29 UTC (permalink / raw)
To: igt-dev
Cc: Vitaly Prosyak, Alex Deucher, Christian Koenig, Kamil Konieczny,
Jesse.zhang@amd.com, Jesse . Zhang, Sunil Khatri
Add UAPI definitions for queue priority levels (NORMAL_LOW, LOW, etc.)
and secure queue flag in amdgpu_drm.h. This matches the libdrm changes
in commit fdf384d4b546 ("amdgpu: add priority and secure flags for user queues").
https://gitlab.freedesktop.org/mesa/drm/-/commit/fdf384d4b546850bc4c200541c42d29a62b2eca7
Related driver patches provided by Alex:
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122782.html
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122780.html
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122786.html
v2: In general, UAPI changes should be part of a different change and only uapi should be part of it (Sunil)
Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
---
include/drm-uapi/amdgpu_drm.h | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/include/drm-uapi/amdgpu_drm.h b/include/drm-uapi/amdgpu_drm.h
index 8191d0bd0..3f4813879 100644
--- a/include/drm-uapi/amdgpu_drm.h
+++ b/include/drm-uapi/amdgpu_drm.h
@@ -329,6 +329,16 @@ union drm_amdgpu_ctx {
#define AMDGPU_USERQ_OP_CREATE 1
#define AMDGPU_USERQ_OP_FREE 2
+/* queue priority levels */
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_MASK 0x3
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_SHIFT 0
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_LOW 0
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_LOW 1
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_HIGH 2
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_HIGH 3 /* admin only */
+/* for queues that need access to protected content */
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE (1 << 2)
+
/*
* This structure is a container to pass input configuration
* info for all supported userqueue related operations.
@@ -355,7 +365,7 @@ struct drm_amdgpu_userq_in {
* and doorbell_offset in the doorbell bo.
*/
__u32 doorbell_offset;
- __u32 _pad;
+ __u32 flags;
/**
* @queue_va: Virtual address of the GPU memory which holds the queue
* object. The queue holds the workload packets.
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH i-g-t v2 2/2] lib/amdgpu: Implement priority and secure flags for user queues
2025-04-18 2:29 [PATCH i-g-t v2 1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions Jesse.zhang@amd.com
@ 2025-04-18 2:29 ` Jesse.zhang@amd.com
2025-04-18 5:25 ` Khatri, Sunil
2025-04-18 13:13 ` Kamil Konieczny
2025-04-18 3:19 ` ✗ i915.CI.BAT: failure for series starting with [i-g-t,v2,1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions Patchwork
` (2 subsequent siblings)
3 siblings, 2 replies; 11+ messages in thread
From: Jesse.zhang@amd.com @ 2025-04-18 2:29 UTC (permalink / raw)
To: igt-dev
Cc: Vitaly Prosyak, Alex Deucher, Christian Koenig, Kamil Konieczny,
Jesse.zhang@amd.com, Sunil Khatri
From: "Jesse.zhang@amd.com" <Jesse.zhang@amd.com>
This patch adds support for queue priority levels and secure queue
creation flags in the user queue interface. The changes include:
1. Extended the amdgpu_ring_context struct to store queue priority
2. Modified amdgpu_user_queue_create() to:
- Parse and pass through priority flags from context
- Handle secure queue flag
- Include flags in queue creation IOCTL calls
The priority levels allow workloads to specify different scheduling
priorities, with HIGH priority restricted to admin-only use. The secure
flag enables creation of queues that can access protected content.
This matches the corresponding libdrm changes in commit fdf384d4b546
("amdgpu: add priority and secure flags for user queues").
add both the conditions under one if (ctxt->secure) (Sunil)
Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
---
lib/amdgpu/amd_ip_blocks.h | 1 +
lib/amdgpu/amd_user_queue.c | 16 +++++++++++-----
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/lib/amdgpu/amd_ip_blocks.h b/lib/amdgpu/amd_ip_blocks.h
index 231098eb8..7d48f9107 100644
--- a/lib/amdgpu/amd_ip_blocks.h
+++ b/lib/amdgpu/amd_ip_blocks.h
@@ -118,6 +118,7 @@ struct amdgpu_ring_context {
uint32_t *pm4; /* data of the packet */
uint32_t pm4_size; /* max allocated packet size */
bool secure; /* secure or not */
+ uint32_t priority; /* user queue priority */
uint64_t bo_mc; /* GPU address of first buffer */
uint64_t bo_mc2; /* GPU address for p4 packet */
diff --git a/lib/amdgpu/amd_user_queue.c b/lib/amdgpu/amd_user_queue.c
index 0cdd0c4f9..444f9c022 100644
--- a/lib/amdgpu/amd_user_queue.c
+++ b/lib/amdgpu/amd_user_queue.c
@@ -270,7 +270,7 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
unsigned int type)
{
int r;
- uint64_t gtt_flags = 0;
+ uint64_t gtt_flags = 0, queue_flags = 0;
struct drm_amdgpu_userq_mqd_gfx11 gfx_mqd;
struct drm_amdgpu_userq_mqd_sdma_gfx11 sdma_mqd;
struct drm_amdgpu_userq_mqd_compute_gfx11 compute_mqd;
@@ -281,8 +281,14 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
return;
}
- if (ctxt->secure)
+ if (ctxt->secure) {
gtt_flags |= AMDGPU_GEM_CREATE_ENCRYPTED;
+ queue_flags |= AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE;
+ }
+
+ if (ctxt->priority)
+ queue_flags |= ctxt->priority & AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_MASK;
+
r = amdgpu_query_uq_fw_area_info(device_handle, AMD_IP_GFX, 0, &ctxt->info);
igt_assert_eq(r, 0);
@@ -404,7 +410,7 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
ctxt->db_handle, DOORBELL_INDEX,
ctxt->queue.mc_addr, USERMODE_QUEUE_SIZE,
ctxt->wptr.mc_addr, ctxt->rptr.mc_addr,
- mqd, &ctxt->queue_id);
+ mqd, queue_flags, &ctxt->queue_id);
igt_assert_eq(r, 0);
break;
@@ -413,7 +419,7 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
ctxt->db_handle, DOORBELL_INDEX,
ctxt->queue.mc_addr, USERMODE_QUEUE_SIZE,
ctxt->wptr.mc_addr, ctxt->rptr.mc_addr,
- mqd, &ctxt->queue_id);
+ mqd, queue_flags, &ctxt->queue_id);
igt_assert_eq(r, 0);
break;
@@ -422,7 +428,7 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
ctxt->db_handle, DOORBELL_INDEX,
ctxt->queue.mc_addr, USERMODE_QUEUE_SIZE,
ctxt->wptr.mc_addr, ctxt->rptr.mc_addr,
- mqd, &ctxt->queue_id);
+ mqd, queue_flags, &ctxt->queue_id);
igt_assert_eq(r, 0);
break;
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* ✗ i915.CI.BAT: failure for series starting with [i-g-t,v2,1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions
2025-04-18 2:29 [PATCH i-g-t v2 1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions Jesse.zhang@amd.com
2025-04-18 2:29 ` [PATCH i-g-t v2 2/2] lib/amdgpu: Implement priority and secure flags for user queues Jesse.zhang@amd.com
@ 2025-04-18 3:19 ` Patchwork
2025-04-18 3:31 ` ✗ Xe.CI.BAT: " Patchwork
2025-04-18 22:27 ` ✗ Xe.CI.Full: " Patchwork
3 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2025-04-18 3:19 UTC (permalink / raw)
To: Jesse.zhang@amd.com; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 4091 bytes --]
== Series Details ==
Series: series starting with [i-g-t,v2,1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions
URL : https://patchwork.freedesktop.org/series/147953/
State : failure
== Summary ==
CI Bug Log - changes from IGT_8326 -> IGTPW_13007
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_13007 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_13007, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13007/index.html
Participating hosts (45 -> 44)
------------------------------
Missing (1): fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_13007:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@requests:
- bat-atsm-1: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8326/bat-atsm-1/igt@i915_selftest@live@requests.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13007/bat-atsm-1/igt@i915_selftest@live@requests.html
#### Warnings ####
* igt@i915_selftest@live:
- bat-atsm-1: [DMESG-FAIL][3] ([i915#12061] / [i915#13929]) -> [INCOMPLETE][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8326/bat-atsm-1/igt@i915_selftest@live.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13007/bat-atsm-1/igt@i915_selftest@live.html
Known issues
------------
Here are the changes found in IGTPW_13007 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@workarounds:
- bat-mtlp-9: [PASS][5] -> [DMESG-FAIL][6] ([i915#12061]) +1 other test dmesg-fail
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8326/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13007/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
#### Possible fixes ####
* igt@gem_exec_fence@basic-await@vecs0:
- bat-rpls-4: [DMESG-WARN][7] ([i915#13400]) -> [PASS][8] +1 other test pass
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8326/bat-rpls-4/igt@gem_exec_fence@basic-await@vecs0.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13007/bat-rpls-4/igt@gem_exec_fence@basic-await@vecs0.html
* igt@i915_selftest@live@workarounds:
- bat-dg2-11: [DMESG-FAIL][9] ([i915#12061]) -> [PASS][10] +1 other test pass
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8326/bat-dg2-11/igt@i915_selftest@live@workarounds.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13007/bat-dg2-11/igt@i915_selftest@live@workarounds.html
- bat-arls-6: [DMESG-FAIL][11] ([i915#12061]) -> [PASS][12] +1 other test pass
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8326/bat-arls-6/igt@i915_selftest@live@workarounds.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13007/bat-arls-6/igt@i915_selftest@live@workarounds.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#13400]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13400
[i915#13929]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13929
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_8326 -> IGTPW_13007
* Linux: CI_DRM_16431 -> CI_DRM_16437
CI-20190529: 20190529
CI_DRM_16431: 1afb38d5acb616dc76381ec0d80b081106146bbd @ git://anongit.freedesktop.org/gfx-ci/linux
CI_DRM_16437: 1e5b5f168ee053192ea7ec05bfe826f848be7d68 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_13007: 48aac6b11b3a2908afc8ced2bd40afdc7ff260b6 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8326: 8326
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13007/index.html
[-- Attachment #2: Type: text/html, Size: 5047 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✗ Xe.CI.BAT: failure for series starting with [i-g-t,v2,1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions
2025-04-18 2:29 [PATCH i-g-t v2 1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions Jesse.zhang@amd.com
2025-04-18 2:29 ` [PATCH i-g-t v2 2/2] lib/amdgpu: Implement priority and secure flags for user queues Jesse.zhang@amd.com
2025-04-18 3:19 ` ✗ i915.CI.BAT: failure for series starting with [i-g-t,v2,1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions Patchwork
@ 2025-04-18 3:31 ` Patchwork
2025-04-18 22:27 ` ✗ Xe.CI.Full: " Patchwork
3 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2025-04-18 3:31 UTC (permalink / raw)
To: Jesse.zhang@amd.com; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 2453 bytes --]
== Series Details ==
Series: series starting with [i-g-t,v2,1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions
URL : https://patchwork.freedesktop.org/series/147953/
State : failure
== Summary ==
CI Bug Log - changes from XEIGT_8326_BAT -> XEIGTPW_13007_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with XEIGTPW_13007_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in XEIGTPW_13007_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (8 -> 8)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in XEIGTPW_13007_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@kms_pipe_crc_basic@nonblocking-crc:
- bat-dg2-oem2: [PASS][1] -> [DMESG-WARN][2] +56 other tests dmesg-warn
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/bat-dg2-oem2/igt@kms_pipe_crc_basic@nonblocking-crc.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/bat-dg2-oem2/igt@kms_pipe_crc_basic@nonblocking-crc.html
#### Warnings ####
* igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries:
- bat-lnl-2: [ABORT][3] ([Intel XE#4749]) -> [ABORT][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/bat-lnl-2/igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/bat-lnl-2/igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries.html
[Intel XE#4749]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4749
Build changes
-------------
* IGT: IGT_8326 -> IGTPW_13007
* Linux: xe-2965-1afb38d5acb616dc76381ec0d80b081106146bbd -> xe-2971-1e5b5f168ee053192ea7ec05bfe826f848be7d68
IGTPW_13007: 48aac6b11b3a2908afc8ced2bd40afdc7ff260b6 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8326: 8326
xe-2965-1afb38d5acb616dc76381ec0d80b081106146bbd: 1afb38d5acb616dc76381ec0d80b081106146bbd
xe-2971-1e5b5f168ee053192ea7ec05bfe826f848be7d68: 1e5b5f168ee053192ea7ec05bfe826f848be7d68
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/index.html
[-- Attachment #2: Type: text/html, Size: 3071 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* RE: [PATCH i-g-t v2 2/2] lib/amdgpu: Implement priority and secure flags for user queues
2025-04-18 2:29 ` [PATCH i-g-t v2 2/2] lib/amdgpu: Implement priority and secure flags for user queues Jesse.zhang@amd.com
@ 2025-04-18 5:25 ` Khatri, Sunil
2025-04-18 13:13 ` Kamil Konieczny
1 sibling, 0 replies; 11+ messages in thread
From: Khatri, Sunil @ 2025-04-18 5:25 UTC (permalink / raw)
To: Zhang, Jesse(Jie), igt-dev@lists.freedesktop.org
Cc: Prosyak, Vitaly, Deucher, Alexander, Koenig, Christian,
Kamil Konieczny, Zhang, Jesse(Jie)
[AMD Official Use Only - AMD Internal Distribution Only]
-----Original Message-----
From: Jesse.zhang@amd.com <jesse.zhang@amd.com>
Sent: Friday, April 18, 2025 7:59 AM
To: igt-dev@lists.freedesktop.org
Cc: Prosyak, Vitaly <Vitaly.Prosyak@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Kamil Konieczny <kamil.konieczny@linux.intel.com>; Zhang, Jesse(Jie) <Jesse.Zhang@amd.com>; Khatri, Sunil <Sunil.Khatri@amd.com>
Subject: [PATCH i-g-t v2 2/2] lib/amdgpu: Implement priority and secure flags for user queues
From: "Jesse.zhang@amd.com" <Jesse.zhang@amd.com>
This patch adds support for queue priority levels and secure queue creation flags in the user queue interface. The changes include:
1. Extended the amdgpu_ring_context struct to store queue priority
2. Modified amdgpu_user_queue_create() to:
- Parse and pass through priority flags from context
- Handle secure queue flag
- Include flags in queue creation IOCTL calls
The priority levels allow workloads to specify different scheduling priorities, with HIGH priority restricted to admin-only use. The secure flag enables creation of queues that can access protected content.
This matches the corresponding libdrm changes in commit fdf384d4b546
("amdgpu: add priority and secure flags for user queues").
add both the conditions under one if (ctxt->secure) (Sunil)
Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
---
lib/amdgpu/amd_ip_blocks.h | 1 +
lib/amdgpu/amd_user_queue.c | 16 +++++++++++-----
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/lib/amdgpu/amd_ip_blocks.h b/lib/amdgpu/amd_ip_blocks.h index 231098eb8..7d48f9107 100644
--- a/lib/amdgpu/amd_ip_blocks.h
+++ b/lib/amdgpu/amd_ip_blocks.h
@@ -118,6 +118,7 @@ struct amdgpu_ring_context {
uint32_t *pm4; /* data of the packet */
uint32_t pm4_size; /* max allocated packet size */
bool secure; /* secure or not */
+ uint32_t priority; /* user queue priority */
Can we move this to the bottom where we have all arguments of the usermode queues until this priority is for both user and kernel submissions ? I did mention that in previous patch review too, may be you missed that.
regards
Sunil Khatri
uint64_t bo_mc; /* GPU address of first buffer */
uint64_t bo_mc2; /* GPU address for p4 packet */
diff --git a/lib/amdgpu/amd_user_queue.c b/lib/amdgpu/amd_user_queue.c index 0cdd0c4f9..444f9c022 100644
--- a/lib/amdgpu/amd_user_queue.c
+++ b/lib/amdgpu/amd_user_queue.c
@@ -270,7 +270,7 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
unsigned int type)
{
int r;
- uint64_t gtt_flags = 0;
+ uint64_t gtt_flags = 0, queue_flags = 0;
struct drm_amdgpu_userq_mqd_gfx11 gfx_mqd;
struct drm_amdgpu_userq_mqd_sdma_gfx11 sdma_mqd;
struct drm_amdgpu_userq_mqd_compute_gfx11 compute_mqd; @@ -281,8 +281,14 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
return;
}
- if (ctxt->secure)
+ if (ctxt->secure) {
gtt_flags |= AMDGPU_GEM_CREATE_ENCRYPTED;
+ queue_flags |= AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE;
+ }
+
+ if (ctxt->priority)
+ queue_flags |= ctxt->priority &
+AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_MASK;
+
r = amdgpu_query_uq_fw_area_info(device_handle, AMD_IP_GFX, 0, &ctxt->info);
igt_assert_eq(r, 0);
@@ -404,7 +410,7 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
ctxt->db_handle, DOORBELL_INDEX,
ctxt->queue.mc_addr, USERMODE_QUEUE_SIZE,
ctxt->wptr.mc_addr, ctxt->rptr.mc_addr,
- mqd, &ctxt->queue_id);
+ mqd, queue_flags, &ctxt->queue_id);
igt_assert_eq(r, 0);
break;
@@ -413,7 +419,7 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
ctxt->db_handle, DOORBELL_INDEX,
ctxt->queue.mc_addr, USERMODE_QUEUE_SIZE,
ctxt->wptr.mc_addr, ctxt->rptr.mc_addr,
- mqd, &ctxt->queue_id);
+ mqd, queue_flags, &ctxt->queue_id);
igt_assert_eq(r, 0);
break;
@@ -422,7 +428,7 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
ctxt->db_handle, DOORBELL_INDEX,
ctxt->queue.mc_addr, USERMODE_QUEUE_SIZE,
ctxt->wptr.mc_addr, ctxt->rptr.mc_addr,
- mqd, &ctxt->queue_id);
+ mqd, queue_flags, &ctxt->queue_id);
igt_assert_eq(r, 0);
break;
--
2.25.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH i-g-t v2 2/2] lib/amdgpu: Implement priority and secure flags for user queues
2025-04-18 2:29 ` [PATCH i-g-t v2 2/2] lib/amdgpu: Implement priority and secure flags for user queues Jesse.zhang@amd.com
2025-04-18 5:25 ` Khatri, Sunil
@ 2025-04-18 13:13 ` Kamil Konieczny
1 sibling, 0 replies; 11+ messages in thread
From: Kamil Konieczny @ 2025-04-18 13:13 UTC (permalink / raw)
To: Jesse.zhang@amd.com
Cc: igt-dev, Vitaly Prosyak, Alex Deucher, Christian Koenig,
Sunil Khatri
Hi Jesse.zhang,
On 2025-04-18 at 10:29:18 +0800, Jesse.zhang@amd.com wrote:
> From: "Jesse.zhang@amd.com" <Jesse.zhang@amd.com>
imho you should have space instead of dot:
> From: Jesse Zhang <Jesse.zhang@amd.com>
See also below.
>
> This patch adds support for queue priority levels and secure queue
> creation flags in the user queue interface. The changes include:
>
> 1. Extended the amdgpu_ring_context struct to store queue priority
>
> 2. Modified amdgpu_user_queue_create() to:
> - Parse and pass through priority flags from context
> - Handle secure queue flag
> - Include flags in queue creation IOCTL calls
>
> The priority levels allow workloads to specify different scheduling
> priorities, with HIGH priority restricted to admin-only use. The secure
> flag enables creation of queues that can access protected content.
>
> This matches the corresponding libdrm changes in commit fdf384d4b546
> ("amdgpu: add priority and secure flags for user queues").
>
> add both the conditions under one if (ctxt->secure) (Sunil)
>
> Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
Same here, please configure your git global config with
something like (in your home ~/.gitconfig):
[user]
email = Jesse.zhang@amd.com
name = Jesse Zhang
Please use this also in your first patch.
One final note at end.
> Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
> ---
> lib/amdgpu/amd_ip_blocks.h | 1 +
> lib/amdgpu/amd_user_queue.c | 16 +++++++++++-----
> 2 files changed, 12 insertions(+), 5 deletions(-)
>
> diff --git a/lib/amdgpu/amd_ip_blocks.h b/lib/amdgpu/amd_ip_blocks.h
> index 231098eb8..7d48f9107 100644
> --- a/lib/amdgpu/amd_ip_blocks.h
> +++ b/lib/amdgpu/amd_ip_blocks.h
>
[...cut...]
> --
> 2.25.1
>
This looks old, please update your git to somewhat newer version,
on my current machine:
git --version
git version 2.49.0
Regards,
Kamil
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✗ Xe.CI.Full: failure for series starting with [i-g-t,v2,1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions
2025-04-18 2:29 [PATCH i-g-t v2 1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions Jesse.zhang@amd.com
` (2 preceding siblings ...)
2025-04-18 3:31 ` ✗ Xe.CI.BAT: " Patchwork
@ 2025-04-18 22:27 ` Patchwork
3 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2025-04-18 22:27 UTC (permalink / raw)
To: Jesse.zhang@amd.com; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 68458 bytes --]
== Series Details ==
Series: series starting with [i-g-t,v2,1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions
URL : https://patchwork.freedesktop.org/series/147953/
State : failure
== Summary ==
CI Bug Log - changes from XEIGT_8326_FULL -> XEIGTPW_13007_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with XEIGTPW_13007_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in XEIGTPW_13007_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 3)
------------------------------
Missing (1): shard-adlp
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in XEIGTPW_13007_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_cursor_crc@cursor-rapid-movement-64x64:
- shard-bmg: [PASS][1] -> [SKIP][2] +1 other test skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-4/igt@kms_cursor_crc@cursor-rapid-movement-64x64.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@kms_cursor_crc@cursor-rapid-movement-64x64.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-bmg: NOTRUN -> [SKIP][3] +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@kms_hdr@bpc-switch-dpms.html
* igt@xe_pmu@gt-frequency:
- shard-dg2-set2: [PASS][4] -> [FAIL][5] +1 other test fail
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-436/igt@xe_pmu@gt-frequency.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-435/igt@xe_pmu@gt-frequency.html
Known issues
------------
Here are the changes found in XEIGTPW_13007_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@test-cursor-atomic:
- shard-lnl: NOTRUN -> [SKIP][6] ([Intel XE#664])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-6/igt@kms_async_flips@test-cursor-atomic.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-270:
- shard-dg2-set2: NOTRUN -> [SKIP][7] ([Intel XE#316]) +2 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-90:
- shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#1407])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-3/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@linear-16bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2327])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-3/igt@kms_big_fb@linear-16bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-dg2-set2: NOTRUN -> [SKIP][10] ([Intel XE#1124]) +4 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-433/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-0:
- shard-lnl: NOTRUN -> [SKIP][11] ([Intel XE#1124]) +6 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-4/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#1124]) +4 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p:
- shard-dg2-set2: NOTRUN -> [SKIP][13] ([Intel XE#2191])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-434/igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p.html
* igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
- shard-lnl: NOTRUN -> [SKIP][14] ([Intel XE#1512])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-6/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-1-displays-2560x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][15] ([Intel XE#367])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-435/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-3-displays-3840x2160p:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#367])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-8/igt@kms_bw@linear-tiling-3-displays-3840x2160p.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs:
- shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#2887]) +7 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-6/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][18] ([Intel XE#455] / [Intel XE#787]) +34 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-435/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][19] ([Intel XE#2907])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-466/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#3432])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][21] ([Intel XE#787]) +148 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-433/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#2887]) +6 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-8/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: [PASS][23] -> [INCOMPLETE][24] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) +1 other test incomplete
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-6.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][25] ([Intel XE#1727] / [Intel XE#3113])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#2652] / [Intel XE#787]) +4 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-lnl: NOTRUN -> [SKIP][27] ([Intel XE#4418])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-1/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_cdclk@mode-transition@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#4417]) +3 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-433/igt@kms_cdclk@mode-transition@pipe-d-dp-4.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2325])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_color@ctm-green-to-red:
- shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#306])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-5/igt@kms_chamelium_color@ctm-green-to-red.html
* igt@kms_chamelium_color@ctm-red-to-blue:
- shard-dg2-set2: NOTRUN -> [SKIP][31] ([Intel XE#306])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-434/igt@kms_chamelium_color@ctm-red-to-blue.html
* igt@kms_chamelium_edid@dp-edid-change-during-suspend:
- shard-lnl: NOTRUN -> [SKIP][32] ([Intel XE#373]) +5 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-4/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html
* igt@kms_chamelium_hpd@hdmi-hpd:
- shard-dg2-set2: NOTRUN -> [SKIP][33] ([Intel XE#373]) +4 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_chamelium_hpd@hdmi-hpd.html
* igt@kms_chamelium_hpd@hdmi-hpd-fast:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#2252]) +2 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@kms_chamelium_hpd@hdmi-hpd-fast.html
* igt@kms_content_protection@atomic:
- shard-lnl: NOTRUN -> [SKIP][35] ([Intel XE#3278]) +1 other test skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-8/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@atomic@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][36] ([Intel XE#1178])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-8/igt@kms_content_protection@atomic@pipe-a-dp-2.html
* igt@kms_content_protection@legacy@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][37] ([Intel XE#1178])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-434/igt@kms_content_protection@legacy@pipe-a-dp-4.html
* igt@kms_content_protection@type1:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#2341])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-8/igt@kms_content_protection@type1.html
* igt@kms_content_protection@uevent@pipe-a-dp-2:
- shard-dg2-set2: NOTRUN -> [FAIL][39] ([Intel XE#1188])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-432/igt@kms_content_protection@uevent@pipe-a-dp-2.html
* igt@kms_cursor_crc@cursor-offscreen-128x42:
- shard-lnl: NOTRUN -> [SKIP][40] ([Intel XE#1424]) +2 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-7/igt@kms_cursor_crc@cursor-offscreen-128x42.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-lnl: NOTRUN -> [SKIP][41] ([Intel XE#2321]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-1/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x170:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#2321])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-2/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-dg2-set2: NOTRUN -> [SKIP][43] ([Intel XE#308])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-435/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#2320]) +3 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-1/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy:
- shard-lnl: NOTRUN -> [SKIP][45] ([Intel XE#309]) +2 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-8/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
- shard-bmg: [PASS][46] -> [SKIP][47] ([Intel XE#2291]) +3 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-7/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-dg2-set2: [PASS][48] -> [SKIP][49] ([Intel XE#309]) +4 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-432/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
- shard-dg2-set2: NOTRUN -> [SKIP][50] ([Intel XE#309]) +1 other test skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
* igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy:
- shard-bmg: NOTRUN -> [DMESG-FAIL][51] ([Intel XE#3428])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html
* igt@kms_display_modes@extended-mode-basic:
- shard-lnl: NOTRUN -> [SKIP][52] ([Intel XE#4302])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-4/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dp_aux_dev:
- shard-bmg: [PASS][53] -> [SKIP][54] ([Intel XE#3009])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-1/igt@kms_dp_aux_dev.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@kms_dp_aux_dev.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-lnl: NOTRUN -> [SKIP][55] ([Intel XE#4294])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-5/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
- shard-lnl: NOTRUN -> [SKIP][56] ([Intel XE#4422])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-8/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
* igt@kms_feature_discovery@display-2x:
- shard-dg2-set2: NOTRUN -> [SKIP][57] ([Intel XE#702])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_feature_discovery@display-2x.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop:
- shard-dg2-set2: [PASS][58] -> [SKIP][59] ([Intel XE#310]) +4 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-463/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3:
- shard-bmg: NOTRUN -> [FAIL][60] ([Intel XE#3321]) +2 other tests fail
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3.html
* igt@kms_flip@2x-flip-vs-modeset:
- shard-lnl: NOTRUN -> [SKIP][61] ([Intel XE#1421]) +2 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-6/igt@kms_flip@2x-flip-vs-modeset.html
* igt@kms_flip@2x-flip-vs-rmfb-interruptible:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2316])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-bmg: [PASS][63] -> [SKIP][64] ([Intel XE#2316]) +8 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-2/igt@kms_flip@2x-nonexisting-fb.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip@bo-too-big-interruptible@a-edp1:
- shard-lnl: NOTRUN -> [TIMEOUT][65] ([Intel XE#1504]) +1 other test timeout
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-1/igt@kms_flip@bo-too-big-interruptible@a-edp1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-lnl: [PASS][66] -> [FAIL][67] ([Intel XE#301]) +3 other tests fail
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@d-dp4:
- shard-dg2-set2: [PASS][68] -> [FAIL][69] ([Intel XE#301] / [Intel XE#3321])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-463/igt@kms_flip@flip-vs-expired-vblank@d-dp4.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-435/igt@kms_flip@flip-vs-expired-vblank@d-dp4.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@c-dp2:
- shard-bmg: [PASS][70] -> [FAIL][71] ([Intel XE#2882]) +11 other tests fail
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-7/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-dp2.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-dp2.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][72] ([Intel XE#1401]) +1 other test skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
- shard-lnl: NOTRUN -> [SKIP][73] ([Intel XE#1401] / [Intel XE#1745]) +1 other test skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-onoff:
- shard-lnl: NOTRUN -> [SKIP][74] ([Intel XE#651]) +7 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-4/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@drrs-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][75] ([Intel XE#651]) +12 other tests skip
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][76] ([Intel XE#4141]) +6 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-msflip-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][77] ([Intel XE#656]) +1 other test skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-render:
- shard-dg2-set2: [PASS][78] -> [SKIP][79] ([Intel XE#656]) +3 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-463/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-render.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][80] ([Intel XE#2311]) +8 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][81] ([Intel XE#2313]) +7 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#2312]) +4 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-lnl: NOTRUN -> [SKIP][83] ([Intel XE#1469])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt:
- shard-lnl: NOTRUN -> [SKIP][84] ([Intel XE#656]) +27 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-plflip-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][85] ([Intel XE#653]) +18 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-463/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-plflip-blt.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [PASS][86] -> [SKIP][87] ([Intel XE#1503])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-4/igt@kms_hdr@invalid-hdr.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-1/igt@kms_hdr@invalid-hdr.html
* igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][88] ([Intel XE#1450]) +1 other test skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-7/igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1.html
* igt@kms_invalid_mode@clock-too-high@pipe-c-edp-1:
- shard-lnl: NOTRUN -> [SKIP][89] ([Intel XE#1450] / [Intel XE#2568]) +1 other test skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-7/igt@kms_invalid_mode@clock-too-high@pipe-c-edp-1.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-dg2-set2: NOTRUN -> [SKIP][90] ([Intel XE#2925])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-432/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-dg2-set2: NOTRUN -> [SKIP][91] ([Intel XE#455]) +9 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-435/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane_cursor@primary@pipe-a-hdmi-a-6-size-256:
- shard-dg2-set2: NOTRUN -> [FAIL][92] ([Intel XE#616]) +2 other tests fail
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-434/igt@kms_plane_cursor@primary@pipe-a-hdmi-a-6-size-256.html
* igt@kms_plane_multiple@2x-tiling-none:
- shard-bmg: [PASS][93] -> [SKIP][94] ([Intel XE#4596])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-none.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-none.html
* igt@kms_plane_multiple@2x-tiling-x:
- shard-lnl: NOTRUN -> [SKIP][95] ([Intel XE#4596])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-3/igt@kms_plane_multiple@2x-tiling-x.html
* igt@kms_plane_multiple@tiling-yf:
- shard-lnl: NOTRUN -> [SKIP][96] ([Intel XE#2493])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-6/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b:
- shard-lnl: NOTRUN -> [SKIP][97] ([Intel XE#2763]) +11 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-4/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b:
- shard-dg2-set2: NOTRUN -> [SKIP][98] ([Intel XE#2763]) +2 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-435/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d:
- shard-dg2-set2: NOTRUN -> [SKIP][99] ([Intel XE#2763] / [Intel XE#455]) +1 other test skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-435/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b:
- shard-bmg: NOTRUN -> [SKIP][100] ([Intel XE#2763]) +9 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-2/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b.html
* igt@kms_pm_dc@dc6-psr:
- shard-bmg: NOTRUN -> [SKIP][101] ([Intel XE#2392])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-1/igt@kms_pm_dc@dc6-psr.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-dg2-set2: [PASS][102] -> [SKIP][103] ([Intel XE#836])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-436/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf:
- shard-lnl: NOTRUN -> [SKIP][104] ([Intel XE#2893]) +1 other test skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-5/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][105] ([Intel XE#1489]) +4 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-433/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][106] ([Intel XE#1489]) +4 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][107] ([Intel XE#4608])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-a-edp-1.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-lnl: NOTRUN -> [SKIP][108] ([Intel XE#1128])
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-3/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@fbc-psr2-cursor-plane-move:
- shard-bmg: NOTRUN -> [SKIP][109] ([Intel XE#2234] / [Intel XE#2850]) +4 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-8/igt@kms_psr@fbc-psr2-cursor-plane-move.html
- shard-lnl: NOTRUN -> [SKIP][110] ([Intel XE#1406]) +4 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-3/igt@kms_psr@fbc-psr2-cursor-plane-move.html
* igt@kms_psr@fbc-psr2-cursor-plane-move@edp-1:
- shard-lnl: NOTRUN -> [SKIP][111] ([Intel XE#4609]) +1 other test skip
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-3/igt@kms_psr@fbc-psr2-cursor-plane-move@edp-1.html
* igt@kms_psr@fbc-psr2-sprite-plane-move:
- shard-dg2-set2: NOTRUN -> [SKIP][112] ([Intel XE#2850] / [Intel XE#929]) +6 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-434/igt@kms_psr@fbc-psr2-sprite-plane-move.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-dg2-set2: NOTRUN -> [SKIP][113] ([Intel XE#3414]) +1 other test skip
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-432/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-lnl: NOTRUN -> [SKIP][114] ([Intel XE#3414] / [Intel XE#3904])
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_setmode@clone-exclusive-crtc:
- shard-bmg: [PASS][115] -> [SKIP][116] ([Intel XE#1435])
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-3/igt@kms_setmode@clone-exclusive-crtc.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@kms_setmode@clone-exclusive-crtc.html
- shard-lnl: NOTRUN -> [SKIP][117] ([Intel XE#1435])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-7/igt@kms_setmode@clone-exclusive-crtc.html
* igt@kms_setmode@invalid-clone-single-crtc-stealing:
- shard-dg2-set2: [PASS][118] -> [SKIP][119] ([Intel XE#455])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-436/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
* igt@kms_tv_load_detect@load-detect:
- shard-dg2-set2: NOTRUN -> [SKIP][120] ([Intel XE#330])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_tv_load_detect@load-detect.html
* igt@kms_vblank@ts-continuation-dpms-suspend:
- shard-bmg: NOTRUN -> [DMESG-WARN][121] ([Intel XE#3428]) +4 other tests dmesg-warn
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@kms_vblank@ts-continuation-dpms-suspend.html
* igt@kms_writeback@writeback-fb-id:
- shard-bmg: NOTRUN -> [SKIP][122] ([Intel XE#756])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@kms_writeback@writeback-fb-id.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-lnl: NOTRUN -> [SKIP][123] ([Intel XE#756])
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-5/igt@kms_writeback@writeback-invalid-parameters.html
* igt@xe_compute@ccs-mode-compute-kernel:
- shard-lnl: NOTRUN -> [SKIP][124] ([Intel XE#1447])
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-8/igt@xe_compute@ccs-mode-compute-kernel.html
* igt@xe_compute_preempt@compute-preempt:
- shard-dg2-set2: NOTRUN -> [SKIP][125] ([Intel XE#1280] / [Intel XE#455]) +1 other test skip
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-432/igt@xe_compute_preempt@compute-preempt.html
* igt@xe_copy_basic@mem-copy-linear-0xfffe:
- shard-dg2-set2: NOTRUN -> [SKIP][126] ([Intel XE#1123])
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-433/igt@xe_copy_basic@mem-copy-linear-0xfffe.html
* igt@xe_eudebug@attach-debug-metadata:
- shard-bmg: NOTRUN -> [SKIP][127] ([Intel XE#2905]) +4 other tests skip
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-1/igt@xe_eudebug@attach-debug-metadata.html
* igt@xe_eudebug@basic-client:
- shard-lnl: NOTRUN -> [SKIP][128] ([Intel XE#2905]) +6 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-1/igt@xe_eudebug@basic-client.html
* igt@xe_eudebug@basic-vm-bind-ufence-reconnect:
- shard-bmg: NOTRUN -> [SKIP][129] ([Intel XE#2905] / [Intel XE#3889]) +1 other test skip
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-2/igt@xe_eudebug@basic-vm-bind-ufence-reconnect.html
* igt@xe_eudebug_online@interrupt-all-set-breakpoint:
- shard-dg2-set2: NOTRUN -> [SKIP][130] ([Intel XE#2905]) +8 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-432/igt@xe_eudebug_online@interrupt-all-set-breakpoint.html
* igt@xe_eudebug_online@set-breakpoint-sigint-debugger:
- shard-bmg: NOTRUN -> [SKIP][131] ([Intel XE#4577])
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-1/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html
* igt@xe_eudebug_sriov@deny-eudebug:
- shard-lnl: NOTRUN -> [SKIP][132] ([Intel XE#4518])
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-4/igt@xe_eudebug_sriov@deny-eudebug.html
* igt@xe_evict_ccs@evict-overcommit-parallel-nofree-reopen:
- shard-lnl: NOTRUN -> [SKIP][133] ([Intel XE#688]) +5 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-1/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-reopen.html
* igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
- shard-dg2-set2: [PASS][134] -> [SKIP][135] ([Intel XE#1392]) +3 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-436/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
* igt@xe_exec_basic@multigpu-no-exec-rebind:
- shard-bmg: NOTRUN -> [SKIP][136] ([Intel XE#2322]) +1 other test skip
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-2/igt@xe_exec_basic@multigpu-no-exec-rebind.html
* igt@xe_exec_basic@multigpu-once-userptr-invalidate:
- shard-lnl: NOTRUN -> [SKIP][137] ([Intel XE#1392]) +4 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-4/igt@xe_exec_basic@multigpu-once-userptr-invalidate.html
* igt@xe_exec_fault_mode@once-invalid-userptr-fault:
- shard-dg2-set2: NOTRUN -> [SKIP][138] ([Intel XE#288]) +13 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-463/igt@xe_exec_fault_mode@once-invalid-userptr-fault.html
* igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit:
- shard-lnl: NOTRUN -> [SKIP][139] ([Intel XE#2229]) +1 other test skip
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-3/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html
* igt@xe_live_ktest@xe_eudebug:
- shard-bmg: NOTRUN -> [SKIP][140] ([Intel XE#2833])
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@xe_live_ktest@xe_eudebug.html
* igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit:
- shard-dg2-set2: [PASS][141] -> [FAIL][142] ([Intel XE#1999]) +2 other tests fail
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-432/igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-466/igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit.html
* igt@xe_media_fill@media-fill:
- shard-bmg: NOTRUN -> [SKIP][143] ([Intel XE#2459] / [Intel XE#2596])
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@xe_media_fill@media-fill.html
* igt@xe_oa@disabled-read-error:
- shard-dg2-set2: NOTRUN -> [SKIP][144] ([Intel XE#2541] / [Intel XE#3573]) +3 other tests skip
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-433/igt@xe_oa@disabled-read-error.html
* igt@xe_oa@enable-disable@ccs-0:
- shard-lnl: NOTRUN -> [FAIL][145] ([Intel XE#4804])
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-4/igt@xe_oa@enable-disable@ccs-0.html
* igt@xe_pm@d3cold-multiple-execs:
- shard-dg2-set2: NOTRUN -> [SKIP][146] ([Intel XE#2284] / [Intel XE#366])
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@xe_pm@d3cold-multiple-execs.html
* igt@xe_pm@s3-d3hot-basic-exec:
- shard-lnl: NOTRUN -> [SKIP][147] ([Intel XE#584])
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-2/igt@xe_pm@s3-d3hot-basic-exec.html
* igt@xe_pm@s4-mocs:
- shard-lnl: [PASS][148] -> [ABORT][149] ([Intel XE#1794])
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-lnl-4/igt@xe_pm@s4-mocs.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-2/igt@xe_pm@s4-mocs.html
* igt@xe_pm_residency@cpg-basic:
- shard-bmg: [PASS][150] -> [DMESG-WARN][151] ([Intel XE#3428]) +16 other tests dmesg-warn
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-3/igt@xe_pm_residency@cpg-basic.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@xe_pm_residency@cpg-basic.html
* igt@xe_pmu@all-fn-engine-activity-load:
- shard-dg2-set2: NOTRUN -> [SKIP][152] ([Intel XE#4650])
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-433/igt@xe_pmu@all-fn-engine-activity-load.html
* igt@xe_pmu@fn-engine-activity-sched-if-idle:
- shard-bmg: NOTRUN -> [SKIP][153] ([Intel XE#4650])
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
* igt@xe_pmu@gt-frequency:
- shard-lnl: [PASS][154] -> [FAIL][155] ([Intel XE#4817]) +1 other test fail
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-lnl-8/igt@xe_pmu@gt-frequency.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-4/igt@xe_pmu@gt-frequency.html
* igt@xe_pxp@pxp-stale-queue-post-termination-irq:
- shard-bmg: NOTRUN -> [SKIP][156] ([Intel XE#4733]) +1 other test skip
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-2/igt@xe_pxp@pxp-stale-queue-post-termination-irq.html
* igt@xe_pxp@pxp-termination-key-update-post-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][157] ([Intel XE#4733]) +3 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-435/igt@xe_pxp@pxp-termination-key-update-post-suspend.html
* igt@xe_query@multigpu-query-invalid-query:
- shard-lnl: NOTRUN -> [SKIP][158] ([Intel XE#944])
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-8/igt@xe_query@multigpu-query-invalid-query.html
* igt@xe_query@multigpu-query-mem-usage:
- shard-dg2-set2: NOTRUN -> [SKIP][159] ([Intel XE#944]) +1 other test skip
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@xe_query@multigpu-query-mem-usage.html
* igt@xe_query@multigpu-query-topology:
- shard-bmg: NOTRUN -> [SKIP][160] ([Intel XE#944])
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@xe_query@multigpu-query-topology.html
* igt@xe_render_copy@render-stress-2-copies:
- shard-dg2-set2: NOTRUN -> [SKIP][161] ([Intel XE#4814])
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-466/igt@xe_render_copy@render-stress-2-copies.html
* igt@xe_sriov_auto_provisioning@fair-allocation:
- shard-dg2-set2: NOTRUN -> [SKIP][162] ([Intel XE#4130])
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@xe_sriov_auto_provisioning@fair-allocation.html
* igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs:
- shard-lnl: NOTRUN -> [SKIP][163] ([Intel XE#4130])
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-4/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html
* igt@xe_sriov_flr@flr-vfs-parallel:
- shard-dg2-set2: NOTRUN -> [SKIP][164] ([Intel XE#4273])
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-466/igt@xe_sriov_flr@flr-vfs-parallel.html
* igt@xe_sriov_scheduling@nonpreempt-engine-resets:
- shard-bmg: NOTRUN -> [SKIP][165] ([Intel XE#4351])
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
#### Possible fixes ####
* igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries-display-off:
- shard-lnl: [ABORT][166] ([Intel XE#4624]) -> [PASS][167] +1 other test pass
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-lnl-7/igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries-display-off.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-3/igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries-display-off.html
* igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
- shard-bmg: [SKIP][168] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][169]
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-4/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-2/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [DMESG-WARN][170] ([Intel XE#3428]) -> [PASS][171] +2 other tests pass
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4:
- shard-dg2-set2: [INCOMPLETE][172] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [PASS][173]
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
- shard-dg2-set2: [SKIP][174] ([Intel XE#309]) -> [PASS][175] +4 other tests pass
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-464/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-435/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [SKIP][176] ([Intel XE#2291]) -> [PASS][177] +3 other tests pass
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-dg2-set2: [SKIP][178] ([Intel XE#4331]) -> [PASS][179]
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-464/igt@kms_dp_linktrain_fallback@dp-fallback.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-434/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_flip@2x-absolute-wf_vblank-interruptible:
- shard-dg2-set2: [SKIP][180] ([Intel XE#310]) -> [PASS][181] +5 other tests pass
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-464/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-435/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html
* igt@kms_flip@2x-flip-vs-panning-vs-hang:
- shard-bmg: [SKIP][182] ([Intel XE#2316]) -> [PASS][183] +4 other tests pass
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-4/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-dg2-set2: [FAIL][184] ([Intel XE#301]) -> [PASS][185] +4 other tests pass
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-463/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@c-dp4:
- shard-dg2-set2: [FAIL][186] ([Intel XE#301] / [Intel XE#3321]) -> [PASS][187]
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-463/igt@kms_flip@flip-vs-expired-vblank@c-dp4.html
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-435/igt@kms_flip@flip-vs-expired-vblank@c-dp4.html
* igt@kms_flip@plain-flip-ts-check-interruptible:
- shard-lnl: [FAIL][188] ([Intel XE#886]) -> [PASS][189] +1 other test pass
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-lnl-3/igt@kms_flip@plain-flip-ts-check-interruptible.html
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-4/igt@kms_flip@plain-flip-ts-check-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move:
- shard-dg2-set2: [SKIP][190] ([Intel XE#656]) -> [PASS][191] +5 other tests pass
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-466/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-dg2-set2: [SKIP][192] ([Intel XE#4328]) -> [PASS][193]
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-464/igt@kms_joiner@basic-force-big-joiner.html
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-466/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_plane_multiple@2x-tiling-none:
- shard-dg2-set2: [SKIP][194] ([Intel XE#4596]) -> [PASS][195]
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-464/igt@kms_plane_multiple@2x-tiling-none.html
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-434/igt@kms_plane_multiple@2x-tiling-none.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-dg2-set2: [SKIP][196] ([Intel XE#836]) -> [PASS][197]
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-464/igt@kms_pm_rpm@modeset-non-lpsp.html
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-463/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_setmode@clone-exclusive-crtc:
- shard-dg2-set2: [SKIP][198] ([Intel XE#455]) -> [PASS][199]
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-464/igt@kms_setmode@clone-exclusive-crtc.html
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-434/igt@kms_setmode@clone-exclusive-crtc.html
* igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race:
- shard-dg2-set2: [SKIP][200] ([Intel XE#1392]) -> [PASS][201] +7 other tests pass
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-433/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race.html
* igt@xe_pm@s4-basic:
- shard-lnl: [ABORT][202] ([Intel XE#1794]) -> [PASS][203]
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-lnl-2/igt@xe_pm@s4-basic.html
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-lnl-3/igt@xe_pm@s4-basic.html
#### Warnings ####
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-6:
- shard-dg2-set2: [SKIP][204] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][205] ([Intel XE#787]) +12 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-464/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-6.html
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-466/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-6.html
* igt@kms_ccs@bad-aux-stride-y-tiled-ccs@pipe-d-hdmi-a-6:
- shard-dg2-set2: [SKIP][206] ([Intel XE#787]) -> [SKIP][207] ([Intel XE#455] / [Intel XE#787]) +8 other tests skip
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-433/igt@kms_ccs@bad-aux-stride-y-tiled-ccs@pipe-d-hdmi-a-6.html
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_ccs@bad-aux-stride-y-tiled-ccs@pipe-d-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [INCOMPLETE][208] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [INCOMPLETE][209] ([Intel XE#1727] / [Intel XE#3113])
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_content_protection@atomic:
- shard-bmg: [SKIP][210] ([Intel XE#2341]) -> [FAIL][211] ([Intel XE#1178])
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-4/igt@kms_content_protection@atomic.html
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-8/igt@kms_content_protection@atomic.html
- shard-dg2-set2: [FAIL][212] ([Intel XE#1178]) -> [SKIP][213] ([Intel XE#455])
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-463/igt@kms_content_protection@atomic.html
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@legacy:
- shard-bmg: [FAIL][214] ([Intel XE#1178]) -> [SKIP][215] ([Intel XE#2341])
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-2/igt@kms_content_protection@legacy.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-6/igt@kms_content_protection@legacy.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6:
- shard-dg2-set2: [SKIP][216] ([i915#3804]) -> [SKIP][217] ([Intel XE#4494] / [i915#3804])
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-436/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-433/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-bmg: [FAIL][218] ([Intel XE#3321]) -> [SKIP][219] ([Intel XE#2316])
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-2/igt@kms_flip@2x-flip-vs-expired-vblank.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-bmg: [SKIP][220] ([Intel XE#2316]) -> [FAIL][221] ([Intel XE#3321])
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff:
- shard-dg2-set2: [SKIP][222] ([Intel XE#651]) -> [SKIP][223] ([Intel XE#656]) +10 other tests skip
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-433/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff.html
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][224] ([Intel XE#2311]) -> [SKIP][225] ([Intel XE#2312]) +15 other tests skip
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: [SKIP][226] ([Intel XE#2312]) -> [SKIP][227] ([Intel XE#2311]) +10 other tests skip
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: [SKIP][228] ([Intel XE#2312]) -> [SKIP][229] ([Intel XE#4141]) +4 other tests skip
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-bmg: [SKIP][230] ([Intel XE#4141]) -> [SKIP][231] ([Intel XE#2312]) +3 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-pgflip-blt:
- shard-dg2-set2: [SKIP][232] ([Intel XE#656]) -> [SKIP][233] ([Intel XE#651]) +14 other tests skip
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-pgflip-blt.html
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
- shard-bmg: [SKIP][234] ([Intel XE#2313]) -> [SKIP][235] ([Intel XE#2312]) +16 other tests skip
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-render:
- shard-dg2-set2: [SKIP][236] ([Intel XE#656]) -> [SKIP][237] ([Intel XE#653]) +19 other tests skip
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-render.html
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt:
- shard-dg2-set2: [SKIP][238] ([Intel XE#653]) -> [SKIP][239] ([Intel XE#656]) +10 other tests skip
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-463/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][240] ([Intel XE#2312]) -> [SKIP][241] ([Intel XE#2313]) +13 other tests skip
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-dg2-set2: [SKIP][242] ([Intel XE#455]) -> [SKIP][243] ([Intel XE#4596])
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-436/igt@kms_plane_multiple@2x-tiling-y.html
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-dg2-set2: [ABORT][244] ([Intel XE#4760]) -> [ABORT][245] ([Intel XE#2705] / [Intel XE#4760])
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-463/igt@kms_plane_scaling@intel-max-src-size.html
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-6:
- shard-dg2-set2: [ABORT][246] ([Intel XE#4760]) -> [ABORT][247] ([Intel XE#4502] / [Intel XE#4760])
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-463/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-6.html
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-6.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg2-set2: [FAIL][248] ([Intel XE#1729]) -> [SKIP][249] ([Intel XE#362])
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8326/shard-dg2-436/igt@kms_tiled_display@basic-test-pattern.html
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/shard-dg2-464/igt@kms_tiled_display@basic-test-pattern.html
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1447
[Intel XE#1450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1450
[Intel XE#1469]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1469
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1504
[Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#1794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1794
[Intel XE#1999]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1999
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2392
[Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
[Intel XE#2493]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2493
[Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
[Intel XE#2568]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2568
[Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2905
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
[Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3428
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3889]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3889
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4273]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4273
[Intel XE#4294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4294
[Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
[Intel XE#4328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4328
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351
[Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
[Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4494]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4494
[Intel XE#4502]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4502
[Intel XE#4518]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4518
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4577]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4577
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
[Intel XE#4624]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4624
[Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4760
[Intel XE#4804]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4804
[Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
[Intel XE#4817]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4817
[Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#664]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/664
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#702]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/702
[Intel XE#756]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/756
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
Build changes
-------------
* IGT: IGT_8326 -> IGTPW_13007
* Linux: xe-2965-1afb38d5acb616dc76381ec0d80b081106146bbd -> xe-2971-1e5b5f168ee053192ea7ec05bfe826f848be7d68
IGTPW_13007: 48aac6b11b3a2908afc8ced2bd40afdc7ff260b6 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8326: 8326
xe-2965-1afb38d5acb616dc76381ec0d80b081106146bbd: 1afb38d5acb616dc76381ec0d80b081106146bbd
xe-2971-1e5b5f168ee053192ea7ec05bfe826f848be7d68: 1e5b5f168ee053192ea7ec05bfe826f848be7d68
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13007/index.html
[-- Attachment #2: Type: text/html, Size: 80973 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH i-g-t v2 1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions
2025-04-17 16:37 ` Kamil Konieczny
@ 2025-04-22 8:21 ` Christian König
0 siblings, 0 replies; 11+ messages in thread
From: Christian König @ 2025-04-22 8:21 UTC (permalink / raw)
To: Kamil Konieczny, Jesse.zhang@amd.com, igt-dev, Vitaly Prosyak,
Alex Deucher, sukhatri
Am 17.04.25 um 18:37 schrieb Kamil Konieczny:
> Hi Jesse.zhang,
> On 2025-04-17 at 16:52:46 +0800, Jesse.zhang@amd.com wrote:
>> Add UAPI definitions for queue priority levels (NORMAL_LOW, LOW, etc.)
>> and secure queue flag in amdgpu_drm.h. This matches the libdrm changes
>> in commit fdf384d4b546 ("amdgpu: add priority and secure flags for user queues").
> Please write from what tree comes this commit or
> give lore.kernel.org link.
>
> I tried to find out this on current drm-tip and failed,
> am I missing something?
This is a patch for the IGT test cases and not the Linux kernel.
It has i-g-t in the subject line and is send out on the igt-dev mailing list.
Regards,
Christian.
>
> Regards,
> Kamil
>
>> v2: In general, UAPI changes should be part of a different change and only uapi should be part of it (Sunil)
>>
>> Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
>> ---
>> include/drm-uapi/amdgpu_drm.h | 12 +++++++++++-
>> 1 file changed, 11 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/drm-uapi/amdgpu_drm.h b/include/drm-uapi/amdgpu_drm.h
>> index 8191d0bd0..3f4813879 100644
>> --- a/include/drm-uapi/amdgpu_drm.h
>> +++ b/include/drm-uapi/amdgpu_drm.h
>> @@ -329,6 +329,16 @@ union drm_amdgpu_ctx {
>> #define AMDGPU_USERQ_OP_CREATE 1
>> #define AMDGPU_USERQ_OP_FREE 2
>>
>> +/* queue priority levels */
>> +#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_MASK 0x3
>> +#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_SHIFT 0
>> +#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_LOW 0
>> +#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_LOW 1
>> +#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_HIGH 2
>> +#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_HIGH 3 /* admin only */
>> +/* for queues that need access to protected content */
>> +#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE (1 << 2)
>> +
>> /*
>> * This structure is a container to pass input configuration
>> * info for all supported userqueue related operations.
>> @@ -355,7 +365,7 @@ struct drm_amdgpu_userq_in {
>> * and doorbell_offset in the doorbell bo.
>> */
>> __u32 doorbell_offset;
>> - __u32 _pad;
>> + __u32 flags;
>> /**
>> * @queue_va: Virtual address of the GPU memory which holds the queue
>> * object. The queue holds the workload packets.
>> --
>> 2.25.1
>>
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2025-04-22 8:21 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-04-18 2:29 [PATCH i-g-t v2 1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions Jesse.zhang@amd.com
2025-04-18 2:29 ` [PATCH i-g-t v2 2/2] lib/amdgpu: Implement priority and secure flags for user queues Jesse.zhang@amd.com
2025-04-18 5:25 ` Khatri, Sunil
2025-04-18 13:13 ` Kamil Konieczny
2025-04-18 3:19 ` ✗ i915.CI.BAT: failure for series starting with [i-g-t,v2,1/2] drm-uapi/amdgpu: Add queue priority and secure flags definitions Patchwork
2025-04-18 3:31 ` ✗ Xe.CI.BAT: " Patchwork
2025-04-18 22:27 ` ✗ Xe.CI.Full: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2025-04-17 8:52 [PATCH i-g-t v2 1/2] " Jesse.zhang@amd.com
2025-04-17 12:42 ` Khatri, Sunil
2025-04-17 16:37 ` Kamil Konieczny
2025-04-22 8:21 ` Christian König
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