[PATCH i-g-t v1 0/4] lib/amdgpu: refactor cmd_context ownership and packet operands

[PATCH i-g-t v1 0/4] lib/amdgpu: refactor cmd_context ownership and packet operands

[Junhua Shen]

This series refactors the amdgpu command-submission helper library
(lib/amdgpu/amd_command_submission.*) around a single principle:
cmd_context should own only the PM4/IB command stream, while the buffers
those commands read and write, together with their GPU virtual addresses,
are supplied and kept resident by the caller.

Currently cmd_context both builds the PM4 stream and allocates and clears
an internal data BO, and several IB and packet sizes are derived from the
data transfer size (write_length) rather than from the command-stream
capacity (pm4_size). This couples unrelated concerns, hides residency
management from callers, and leaves the IB size ambiguous. The series
separates these concerns incrementally while keeping every existing
caller compiling and functional.

Scope: cmd_context is a convenience wrapper for SDMA data operations
(linear write/copy/const-fill/atomic). Only three tests currently use it
(amd_mem, amd_dmabuf_unload, amd_kfd_dmabuf_unload); the rest of the
amdgpu tests deliberately drive libdrm_amdgpu directly to validate the
kernel submission UAPI (cs_submit, bo_list, syncobj, gang, compute
dispatch), and are intentionally left untouched. The ring_context field
usage in those low-level callers is already consistent with the contract
documented here, so no changes are required on their side.

Overview of the changes
-----------------------
1. document amdgpu_ring_context field contract
   Add IN/OUT/INTERNAL annotations to struct amdgpu_ring_context so the
   ownership and direction of each field is unambiguous before the
   behavioural changes are introduced. Documentation only, no functional
   change.

2. drop external BO from cmd_context
   cmd_context no longer allocates, tracks, or clears a caller-visible
   data BO. Callers now register the residency of those buffers
   explicitly via the new cmd_context_add_resource(). cmd_context_create()
   loses the write_length parameter (the IB is sized from pm4_size alone)
   and all call sites are updated (amd_dmabuf_unload.c,
   amd_kfd_dmabuf_unload.c, amd_mem.c).

3. source packet operands from params and size the IB from pm4_size
   The legacy IB byte size is now derived from pm4_size (the command
   stream capacity), not write_length (the data transfer size).
   WRITE_LINEAR, WRITE_ATOMIC and COPY_LINEAR take their source and
   destination GPU virtual addresses from cmd_packet_params_t, so callers
   pass those addresses directly rather than relying on context-internal
   BOs.

4. add CONST_FILL packet type and pass caller fill value through
   Add a CMD_PACKET_CONST_FILL packet type with a per-packet size guard,
   and propagate the caller-supplied fill value
   (write_data/write_data_valid) through write_linear and const_fill in
   the IP block builders.

Testing
-------
Ran on local hardware: AMD GFX1036 (GFX10_3). The three cmd_context
callers (amd_mem, amd_dmabuf_unload, amd_kfd_dmabuf_unload) and the
low-level tests that exercise the changed shared code (amd_basic SDMA and
compute submission, amd_userptr_invalidation) all pass. There is no
regression from this series.

Known limitations / follow-up work
----------------------------------
The following items are intentionally excluded from this series to limit
its scope; they are candidates for follow-up patches:

- pm4_size is currently a hard-coded 256 dwords in cmd_context_create().
  It should become a caller-provided parameter (or be derived from the
  expected packet mix) so large PM4 streams are not silently truncated.

- The residency set (amdgpu_ring_context.resources[]) is a fixed-size
  array (4 entries). cmd_context_add_resource() returns -ENOSPC when it
  overflows; a growable set would remove that limit for callers that
  require more operands per submit.

- Some low-level callers open-code the same linear write/copy/fill
  sequences that cmd_context now wraps. Where a test only needs the data
  operation itself (and is not specifically exercising the submission
  UAPI), it could be migrated onto the high-level cmd_context API to
  remove boilerplate. Tests that deliberately drive libdrm_amdgpu to
  validate cs_submit/bo_list/syncobj/gang/compute paths should stay as
  they are.

Junhua Shen (4):
  lib/amdgpu: document amdgpu_ring_context field contract
  lib/amdgpu: drop external BO from cmd_context
  lib/amdgpu: source packet operands from params and size the IB from
    pm4_size
  lib/amdgpu: add CONST_FILL packet type and pass caller fill value
    through

 lib/amdgpu/amd_command_submission.c  | 385 ++++++++++++++-------------
 lib/amdgpu/amd_command_submission.h  | 102 ++++++-
 lib/amdgpu/amd_ip_blocks.c           |  20 +-
 lib/amdgpu/amd_ip_blocks.h           |  59 +++-
 tests/amdgpu/amd_dmabuf_unload.c     |  15 +-
 tests/amdgpu/amd_kfd_dmabuf_unload.c |  15 +-
 tests/amdgpu/amd_mem.c               |  22 +-
 7 files changed, 378 insertions(+), 240 deletions(-)

-- 
2.34.1

[PATCH i-g-t v1 1/4] lib/amdgpu: document amdgpu_ring_context field contract

[Junhua Shen]

Signed-off-by: Junhua Shen <Junhua.Shen@amd.com>
---
 lib/amdgpu/amd_ip_blocks.h | 57 ++++++++++++++++++++++++++++++--------
 1 file changed, 45 insertions(+), 12 deletions(-)

diff --git a/lib/amdgpu/amd_ip_blocks.h b/lib/amdgpu/amd_ip_blocks.h
index 40a9735be..37f38ed44 100644
--- a/lib/amdgpu/amd_ip_blocks.h
+++ b/lib/amdgpu/amd_ip_blocks.h
@@ -272,26 +272,59 @@ amdgpu_dma_default_bytes(const struct amdgpu_dma_limits *lim,
 	}
 }
 
-/* aux struct to hold misc parameters for convenience to maintain */
+/*
+ * struct amdgpu_ring_context - hand-off structure shared by the packet builder
+ * and submitter roles.
+ *
+ * Builder role: the ip_block->funcs PM4 callbacks declared in struct
+ *   amdgpu_ip_funcs (write_linear, copy_linear, const_fill, ...). A builder
+ *   reads only the IN fields, populates pm4[], and reports the produced length
+ *   in pm4_dw. It does not access the device, allocate buffer objects, or
+ *   submit.
+ *
+ * Submitter role: the caller that drives a builder. It populates the IN fields
+ *   required by the target packet type prior to invocation, then consumes the
+ *   OUT fields (pm4[]/pm4_dw) to perform the command submission.
+ *
+ * This structure is the sole interface between the two roles; each field is
+ * annotated with a direction:
+ *   IN       set by the submitter before invocation; read by the builder.
+ *   OUT      set by the builder; read by the submitter.
+ *   INTERNAL owned by the submitter; the builder populates its contents only.
+ */
 struct amdgpu_ring_context {
 
 	int ring_id; /* ring_id from amdgpu_query_hw_ip_info */
-	int res_cnt; /* num of bo in amdgpu_bo_handle resources[2] */
+	int res_cnt; /* IN: number of valid entries in resources[] */
 
-	uint64_t write_length;  /* transfer size in bytes */
-	uint64_t write_length2; /* transfer size in bytes, second packet */
-	uint32_t *pm4;		/* data of the packet */
-	uint32_t pm4_size;	/* max allocated packet size */
-	bool secure;		/* secure or not */
+	/*
+	 * IN: per-packet transfer size in bytes. The builder interprets it
+	 * per packet type:
+	 *   write_linear/atomic    - inlined as write_length/4 dwords into pm4[]
+	 *                            (grows pm4_dw; pm4_size must accommodate it);
+	 *   copy_linear/const_fill - HW DMA transfer data count;
+	 *   compare/compare_pattern - verification span (num_compare = write_length/div).
+	 */
+	uint64_t write_length;
+	uint64_t write_length2; /* IN: transfer size in bytes, second packet */
+	uint32_t *pm4;		/* INTERNAL: packet buffer (submitter-owned, builder fills) */
+	uint32_t pm4_size;	/* IN: capacity of pm4[] in dwords (required, non-zero) */
+	bool secure;		/* IN: secure or not */
 	uint32_t priority;	/* user queue priority */
 
-	uint64_t bo_mc;		/* GPU address of first buffer */
-	uint64_t bo_mc2;	/* GPU address for p4 packet */
+	/*
+	 * Operand GPU virtual addresses, assigned per packet type by the
+	 * submitter prior to builder invocation:
+	 *   WRITE/ATOMIC/FILL: bo_mc = destination VA
+	 *   COPY:              bo_mc = source VA, bo_mc2 = destination VA
+	 */
+	uint64_t bo_mc;		/* IN: GPU VA, primary operand (destination, or source for copy) */
+	uint64_t bo_mc2;	/* IN: GPU VA, secondary operand (destination for copy) */
 	uint64_t bo_mc3;	/* GPU address of second buffer */
 	uint64_t bo_mc4;	/* GPU address of second p4 packet */
 
-	uint32_t pm4_dw;	/* actual size of pm4 */
-	uint32_t pm4_dw2;	/* actual size of second pm4 */
+	uint32_t pm4_dw;	/* OUT: actual packet size in dwords */
+	uint32_t pm4_dw2;	/* OUT: actual size of second pm4 in dwords */
 
 	volatile uint32_t *bo_cpu;	/* cpu adddress of mapped GPU buf */
 	volatile uint32_t *bo2_cpu;	/* cpu adddress of mapped pm4 */
@@ -311,7 +344,7 @@ struct amdgpu_ring_context {
 	amdgpu_context_handle context_handle;
 	struct drm_amdgpu_info_hw_ip hw_ip_info;  /* result of amdgpu_query_hw_ip_info */
 
-	amdgpu_bo_handle resources[4]; /* amdgpu_bo_alloc_and_map */
+	amdgpu_bo_handle resources[4]; /* IN: bo_list residency set, maintained by the submitter */
 	amdgpu_va_handle va_handle;    /* amdgpu_bo_alloc_and_map */
 	amdgpu_va_handle va_handle2;   /* amdgpu_bo_alloc_and_map */
 	amdgpu_va_handle va_handle3;   /* amdgpu_bo_alloc_and_map */
-- 
2.34.1

[PATCH i-g-t v1 2/4] lib/amdgpu: drop external BO from cmd_context

[Junhua Shen]

Rework cmd_context so it no longer owns or clears a caller-visible data
buffer. Operand residency is registered explicitly, and the leftover
internal-BO plumbing is removed.

- cmd_context_create()/destroy(): remove the external-BO plumbing; the
  context no longer allocates or tracks a data BO.
- Add cmd_context_add_resource(): so callers register BO-backed operand
  addresses in the per-submit bo_list residency set explicitly.
- Drop the write_length parameter from cmd_context_create(): the IB/PM4
  buffer is sized solely from pm4_size.
- Update all cmd_context_create() call sites to the new signature:
  tests/amdgpu/amd_dmabuf_unload.c, amd_kfd_dmabuf_unload.c, and
  amd_mem.c (three sites).

Signed-off-by: Junhua Shen <Junhua.Shen@amd.com>
---
 lib/amdgpu/amd_command_submission.c  | 283 ++++++++++-----------------
 lib/amdgpu/amd_command_submission.h  |  99 +++++++++-
 tests/amdgpu/amd_dmabuf_unload.c     |  15 +-
 tests/amdgpu/amd_kfd_dmabuf_unload.c |  15 +-
 tests/amdgpu/amd_mem.c               |  22 ++-
 5 files changed, 220 insertions(+), 214 deletions(-)

diff --git a/lib/amdgpu/amd_command_submission.c b/lib/amdgpu/amd_command_submission.c
index 0334c2ded..26f36256a 100644
--- a/lib/amdgpu/amd_command_submission.c
+++ b/lib/amdgpu/amd_command_submission.c
@@ -906,31 +906,22 @@ amdgpu_command_ce_write_fence(amdgpu_device_handle dev,
 }
 
 /**
- * command context creation with optional external BO
+ * command context creation
  *
  * @param device AMDGPU device handle
  * @param ip_type IP block type (GFX, DMA, etc.)
  * @param ring_id Ring index to use
  * @param user_queue Whether to use user queue mode
- * @param write_length Size of write operations in DWORDs
- * @param external_bo Optional external buffer object (NULL for internal allocation)
- * @param external_bo_mc GPU MC address of external BO (required if external_bo provided)
- * @param external_bo_cpu CPU mapping of external BO (required if external_bo provided)
+ * @param write_length Default per-packet transfer size in bytes (overridden per
+ *                     packet by cmd_packet_params_t::size)
  * @return New command context, or NULL on failure
  */
 cmd_context_t* cmd_context_create(amdgpu_device_handle device,
                                     enum amd_ip_block_type ip_type,
                                     uint32_t ring_id,
-                                    bool user_queue,
-                                    uint32_t write_length,
-                                    amdgpu_bo_handle external_bo,
-                                    uint64_t external_bo_mc,
-                                    volatile uint32_t *external_bo_cpu)
+                                    bool user_queue)
 {
 	cmd_context_t *ctx;
-	void *cpu_ptr = NULL;
-	uint64_t bo_mc = 0;
-	amdgpu_va_handle va_handle = NULL;
 	int r;
 
 	if (!device)
@@ -949,7 +940,6 @@ cmd_context_t* cmd_context_create(amdgpu_device_handle device,
 	ctx->ip_type = ip_type;
 	ctx->user_queue = user_queue;
 	ctx->last_submit_seq = 0;
-	ctx->uses_external_bo = (external_bo != NULL);  // Now this member exists
 	ctx->initialized = false;
 
 	/* Get IP block for the specified IP type */
@@ -967,7 +957,6 @@ cmd_context_t* cmd_context_create(amdgpu_device_handle device,
 	}
 
 	/* Setup ring context parameters */
-	ctx->ring_ctx->write_length = write_length ? write_length : 128;
 	ctx->ring_ctx->pm4_size = 256;
 	ctx->ring_ctx->pm4 = calloc(ctx->ring_ctx->pm4_size, sizeof(uint32_t));
 	if (!ctx->ring_ctx->pm4) {
@@ -976,7 +965,7 @@ cmd_context_t* cmd_context_create(amdgpu_device_handle device,
 		return NULL;
 	}
 
-	ctx->ring_ctx->res_cnt = 1;
+	ctx->ring_ctx->res_cnt = 0;
 	ctx->ring_ctx->ring_id = ring_id;
 	ctx->ring_ctx->secure = false;
 	ctx->ring_ctx->user_queue = user_queue;
@@ -990,7 +979,7 @@ cmd_context_t* cmd_context_create(amdgpu_device_handle device,
 			return NULL;
 		}
 		ctx->ip_block->funcs->userq_create(device, ctx->ring_ctx, (unsigned int)ip_type);
-	}else {
+	} else {
 		/* Create regular command submission context */
 		r = amdgpu_cs_ctx_create(device, &ctx->ring_ctx->context_handle);
 		if (r) {
@@ -1001,115 +990,60 @@ cmd_context_t* cmd_context_create(amdgpu_device_handle device,
 		}
 	}
 
-	/* BO allocation strategy: use external BO if provided, otherwise allocate internally */
-	if (external_bo) {
-		/* Validate external BO arguments */
-		if (!external_bo_cpu || !external_bo_mc) {
-			igt_debug("Invalid external BO arguments (mc=0x%llx, cpu=%p)\n",
-					  (unsigned long long)external_bo_mc, external_bo_cpu);
-			free(ctx->ring_ctx->pm4);
-			free(ctx->ring_ctx);
-			free(ctx);
-			return NULL;
-		}
-
-		/* Use caller-provided external BO */
-		ctx->ring_ctx->bo = external_bo;
-		ctx->ring_ctx->bo_mc = external_bo_mc;
-		ctx->ring_ctx->bo_cpu = external_bo_cpu;
-		ctx->ring_ctx->va_handle = NULL;  // VA management is caller's responsibility
-
-		igt_info("Using external BO: GPU=0x%llx, CPU=%p\n",
-				 (unsigned long long)external_bo_mc, external_bo_cpu);
-	} else {
-		/* Allocate internal BO for command operations */
-		r = amdgpu_bo_alloc_and_map(device,
-				   ctx->ring_ctx->write_length,
-				   4096,
-				   AMDGPU_GEM_DOMAIN_GTT,
-				   0,
-				   &ctx->ring_ctx->bo,
-				   &cpu_ptr,
-				   &bo_mc,
-				   &va_handle);
-		if (r) {
-			goto cleanup_error;
+	/* Allocate a single per-context IB sized to the PM4 buffer capacity. */
+	r = amdgpu_bo_alloc_and_map(device,
+				    ctx->ring_ctx->pm4_size * sizeof(uint32_t), 4096,
+				    AMDGPU_GEM_DOMAIN_GTT, 0,
+				    &ctx->ib_bo, &ctx->ib_cpu, &ctx->ib_mc,
+				    &ctx->ib_va);
+	if (r) {
+		if (user_queue) {
+			if (ctx->ip_block->funcs->userq_destroy)
+				ctx->ip_block->funcs->userq_destroy(device, ctx->ring_ctx,
+								    (unsigned int)ip_type);
+		} else {
+			amdgpu_cs_ctx_free(ctx->ring_ctx->context_handle);
 		}
-
-		ctx->ring_ctx->bo_mc = bo_mc;
-		ctx->ring_ctx->bo_cpu = (volatile uint32_t *)cpu_ptr;
-		ctx->ring_ctx->va_handle = va_handle;
-
-		igt_info("Allocated internal BO: GPU=0x%llx, CPU=%p\n",
-			 (unsigned long long)bo_mc, cpu_ptr);
-	}
-
-	/* Initialize resources array */
-	ctx->ring_ctx->resources[0] = ctx->ring_ctx->bo;
-	for (int i = 1; i < 4; i++) {
-		ctx->ring_ctx->resources[i] = NULL;
+		free(ctx->ring_ctx->pm4);
+		free(ctx->ring_ctx);
+		free(ctx);
+		return NULL;
 	}
 
 	ctx->initialized = true;
 	return ctx;
-
-cleanup_error:
-	/* Cleanup resources in case of allocation failure */
-	if (user_queue) {
-		ctx->ip_block->funcs->userq_destroy(device, ctx->ring_ctx, (unsigned int)ip_type);
-	} else {
-		if (ctx->ring_ctx->context_handle)
-		    amdgpu_cs_ctx_free(ctx->ring_ctx->context_handle);
-	}
-
-	free(ctx->ring_ctx->pm4);
-	free(ctx->ring_ctx);
-	free(ctx);
-	return NULL;
 }
 
 /**
- * context destruction function with external BO control
+ * context destruction function
  *
  * @param ctx Command context to destroy
- * @param destroy_external_bo Whether to destroy external BO (if used)
  */
-void cmd_context_destroy(cmd_context_t *ctx, bool destroy_external_bo)
+void cmd_context_destroy(cmd_context_t *ctx)
 {
 	if (!ctx || !ctx->initialized)
 		return;
 
-	if (ctx->ring_ctx) {
-		/* Handle BO cleanup based on allocation type */
-		if (ctx->ring_ctx->bo) {
-			if (!ctx->uses_external_bo || destroy_external_bo) {
-				/* Clean up internal BO or external BO if explicitly requested */
-				if (ctx->ring_ctx->va_handle) {
-				    /* Internal BO with VA handle - full cleanup */
-				    amdgpu_bo_unmap_and_free(ctx->ring_ctx->bo, ctx->ring_ctx->va_handle,
-							   ctx->ring_ctx->bo_mc,
-							   ctx->ring_ctx->write_length);
-				} else if (destroy_external_bo) {
-				    /* External BO without VA handle - just free the BO */
-				    amdgpu_bo_free(ctx->ring_ctx->bo);
-				}
-			} else {
-				/* External BO, preserve it as requested by caller */
-				igt_info("Preserving external BO (GPU=0x%llx)\n",
-						 (unsigned long long)ctx->ring_ctx->bo_mc);
-			}
-		}
+	/* Free the per-context IB. */
+	if (ctx->ib_bo) {
+		if (ctx->submit_pending)
+			cmd_wait_completion(ctx);
+		amdgpu_bo_unmap_and_free(ctx->ib_bo, ctx->ib_va, ctx->ib_mc,
+					 ctx->ring_ctx->pm4_size * sizeof(uint32_t));
+		ctx->ib_bo = NULL;
+	}
 
+	if (ctx->ring_ctx) {
 		/* Clean up command submission context */
 		if (ctx->user_queue) {
 			if (ctx->ip_block && ctx->ip_block->funcs->userq_destroy) {
 				ctx->ip_block->funcs->userq_destroy(ctx->device, ctx->ring_ctx,
 							  (unsigned int)ctx->ip_type);
-		    }
+			}
 		} else {
 			if (ctx->ring_ctx->context_handle) {
 				amdgpu_cs_ctx_free(ctx->ring_ctx->context_handle);
-		    }
+			}
 		}
 
 		/* Free PM4 command buffer */
@@ -1123,6 +1057,42 @@ void cmd_context_destroy(cmd_context_t *ctx, bool destroy_external_bo)
 	free(ctx);
 }
 
+int cmd_context_add_resource(cmd_context_t *ctx, amdgpu_bo_handle bo)
+{
+	struct amdgpu_ring_context *rc;
+	int i;
+
+	if (!ctx || !ctx->initialized || !ctx->ring_ctx || !bo)
+		return -EINVAL;
+
+	rc = ctx->ring_ctx;
+
+	/* Deduplicate: an already-registered BO needs no second slot. */
+	for (i = 0; i < rc->res_cnt; i++) {
+		if (rc->resources[i] == bo)
+			return 0;
+	}
+
+	if (rc->res_cnt >= (int)ARRAY_SIZE(rc->resources))
+		return -ENOSPC;
+
+	rc->resources[rc->res_cnt++] = bo;
+	return 0;
+}
+
+static void cmd_reset_packet_operands(cmd_context_t *ctx)
+{
+	struct amdgpu_ring_context *rc = ctx->ring_ctx;
+
+	rc->bo_mc = 0;
+	rc->bo_mc2 = 0;
+	rc->write_length = 0;
+
+	/* Drop the per-submit residency set. */
+	memset(rc->resources, 0, sizeof(rc->resources));
+	rc->res_cnt = 0;
+}
+
 /**
  * Submit command packet without waiting - Fixed submission logic
  */
@@ -1132,10 +1102,6 @@ int cmd_submit_packet(cmd_context_t *ctx)
 	int r;
 	struct amdgpu_cs_request ibs_request;
 	struct amdgpu_cs_ib_info ib_info;
-	amdgpu_bo_handle ib_bo;
-	void *ib_cpu;
-	uint64_t ib_mc_address;
-	amdgpu_va_handle ib_va_handle;
 	amdgpu_bo_handle all_res[5] = {0};
 	uint32_t res_count = 0;
 	uint32_t i;
@@ -1145,12 +1111,27 @@ int cmd_submit_packet(cmd_context_t *ctx)
 		return -EINVAL;
 	}
 
-	/* Check required parameters */
-	if (ctx->ring_ctx->pm4_dw == 0 || ctx->ring_ctx->pm4_dw > 1024) {
-		igt_debug("Invalid PM4 size: %u (must be 1-1024)\n", ctx->ring_ctx->pm4_dw);
+	/* Check required parameters: the PM4 stream must be non-empty and fit
+	 * in the per-context IB allocated by cmd_context_create().
+	 */
+	if (ctx->ring_ctx->pm4_dw == 0 || ctx->ring_ctx->pm4_dw > ctx->ring_ctx->pm4_size) {
+		igt_debug("Invalid PM4 size: %u (must be 1-%u)\n",
+			  ctx->ring_ctx->pm4_dw, ctx->ring_ctx->pm4_size);
 		return -EINVAL;
 	}
 
+	igt_assert_f(ctx->ib_bo && ctx->ring_ctx->pm4_dw <= ctx->ring_ctx->pm4_size,
+		     "PM4 stream (%u dw) exceeds IB capacity (%u dw)\n",
+		     ctx->ring_ctx->pm4_dw, ctx->ring_ctx->pm4_size);
+
+	if (ctx->submit_pending) {
+		cmd_wait_completion(ctx);
+		ctx->submit_pending = false;
+	}
+
+	memcpy(ctx->ib_cpu, ctx->ring_ctx->pm4,
+	       ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
+
 	/* For user queues, use userq_submit */
 	if (ctx->user_queue) {
 		if (!ctx->ip_block || !ctx->ip_block->funcs->userq_submit) {
@@ -1158,16 +1139,14 @@ int cmd_submit_packet(cmd_context_t *ctx)
 			return -ENOTSUP;
 		}
 
-		if (!ctx->ring_ctx->bo_mc) {
-		igt_debug("Invalid BO MC address for user queue\n");
-		return -EINVAL;
-		}
-
 		ctx->ip_block->funcs->userq_submit(ctx->device, ctx->ring_ctx,
 		      (unsigned int)ctx->ip_type,
-		      ctx->ring_ctx->bo_mc);
+		      ctx->ib_mc);
 		ctx->last_submit_seq = ctx->ring_ctx->point;
+		ctx->submit_pending = true;
 		igt_info("User queue submission successful, point=%lu\n", ctx->last_submit_seq);
+
+		cmd_reset_packet_operands(ctx);
 		return 0;
 	}
 
@@ -1175,26 +1154,8 @@ int cmd_submit_packet(cmd_context_t *ctx)
 	memset(&ibs_request, 0, sizeof(ibs_request));
 	memset(&ib_info, 0, sizeof(ib_info));
 
-	/* Allocate separate IB buffer instead of reusing command buffer */
-	r = amdgpu_bo_alloc_and_map(ctx->device,
-			       ctx->ring_ctx->pm4_dw * sizeof(uint32_t),
-			       4096,
-			       AMDGPU_GEM_DOMAIN_GTT,
-			       0,
-			       &ib_bo,
-			       &ib_cpu,
-			       &ib_mc_address,
-			       &ib_va_handle);
-	if (r) {
-		igt_debug("Failed to allocate IB: %d\n", r);
-		return r;
-	}
-
-	/* Copy PM4 commands to IB */
-	memcpy(ib_cpu, ctx->ring_ctx->pm4, ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
-
-	/* Setup IB information */
-	ib_info.ib_mc_address = ib_mc_address;
+	/* Point the IB info at the per-context IB */
+	ib_info.ib_mc_address = ctx->ib_mc;
 	ib_info.size = ctx->ring_ctx->pm4_dw;
 	if (ctx->ring_ctx->secure)
 		ib_info.flags |= AMDGPU_IB_FLAGS_SECURE;
@@ -1215,14 +1176,12 @@ int cmd_submit_packet(cmd_context_t *ctx)
 	}
 
 	/* Add IB as the last resource */
-	all_res[res_count++] = ib_bo;
+	all_res[res_count++] = ctx->ib_bo;
 
 	/* Create BO list */
 	r = amdgpu_bo_list_create(ctx->device, res_count, all_res, NULL, &bo_list);
 	if (r) {
 		igt_debug("amdgpu_bo_list_create failed: %d\n", r);
-		amdgpu_bo_unmap_and_free(ib_bo, ib_va_handle, ib_mc_address,
-				       ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
 		return r;
 	}
 
@@ -1234,8 +1193,6 @@ int cmd_submit_packet(cmd_context_t *ctx)
 	if (r != 0) {
 		igt_debug("amdgpu_cs_submit failed: %d\n", r);
 		amdgpu_bo_list_destroy(bo_list);
-		amdgpu_bo_unmap_and_free(ib_bo, ib_va_handle, ib_mc_address,
-				       ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
 		return r;
 	}
 
@@ -1243,10 +1200,11 @@ int cmd_submit_packet(cmd_context_t *ctx)
 	ctx->last_submit_seq = ibs_request.seq_no;
 	igt_debug("Command submitted successfully, seq_no=%lu\n", ctx->last_submit_seq);
 
-	/* Cleanup resources */
+	/* The kernel has snapshotted the bo_list; it can be released now. */
 	amdgpu_bo_list_destroy(bo_list);
-	amdgpu_bo_unmap_and_free(ib_bo, ib_va_handle, ib_mc_address,
-			   ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
+
+	ctx->submit_pending = true;
+	cmd_reset_packet_operands(ctx);
 
 	return 0;
 }
@@ -1258,14 +1216,9 @@ int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params)
 	if (!ctx || !ctx->initialized || !ctx->ip_block || !params)
 		return -EINVAL;
 
-	if (!ctx->ring_ctx || !ctx->ring_ctx->bo_cpu)
+	if (!ctx->ring_ctx)
 		return -EINVAL;
 
-	/* Clear the buffer before operation */
-	memset((void *)ctx->ring_ctx->bo_cpu, 0,
-	ctx->ring_ctx->write_length);
-
-
 	/* Build the command packet based on type */
 	switch (params->type) {
 	case CMD_PACKET_WRITE_LINEAR:
@@ -1280,13 +1233,6 @@ int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params)
 		result = ctx->ip_block->funcs->write_linear(ctx->ip_block->funcs,
 						       ctx->ring_ctx,
 						       &ctx->ring_ctx->pm4_dw);
-
-		/*  Copy PM4 packet to ring buffer */
-		if (result == 0 && ctx->ring_ctx->pm4_dw > 0) {
-			memcpy((void *)ctx->ring_ctx->bo_cpu,
-			       ctx->ring_ctx->pm4,
-			       ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
-		}
 		return result;
 
 	case CMD_PACKET_WRITE_ATOMIC:
@@ -1300,13 +1246,6 @@ int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params)
 		result = ctx->ip_block->funcs->write_linear_atomic(ctx->ip_block->funcs,
 						      ctx->ring_ctx,
 						      &ctx->ring_ctx->pm4_dw);
-
-		/*  Copy PM4 packet to ring buffer */
-		if (result == 0 && ctx->ring_ctx->pm4_dw > 0) {
-		memcpy((void *)ctx->ring_ctx->bo_cpu,
-		ctx->ring_ctx->pm4,
-		ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
-		}
 		return result;
 
 	case CMD_PACKET_COPY_LINEAR:
@@ -1321,16 +1260,6 @@ int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params)
 	    result = ctx->ip_block->funcs->copy_linear(ctx->ip_block->funcs,
 						      ctx->ring_ctx,
 						      &ctx->ring_ctx->pm4_dw);
-
-	    /* Copy PM4 packet to ring buffer */
-	    if (result == 0 && ctx->ring_ctx->pm4_dw > 0) {
-	        memcpy((void *)ctx->ring_ctx->bo_cpu,
-	               ctx->ring_ctx->pm4,
-	               ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
-
-	        //igt_info("cmd_place_packet: Copied %u DWORDs to ring buffer (copy)\n",
-	          //       ctx->ring_ctx->pm4_dw);
-	    }
 	    return result;
 
 	case CMD_PACKET_COPY_ATOMIC:
@@ -1429,8 +1358,8 @@ int cmd_wait_completion(cmd_context_t *ctx)
 			return -EINVAL;
 
 		return amdgpu_timeline_syncobj_wait(ctx->device,
-						   ctx->ring_ctx->timeline_syncobj_handle,
-						   ctx->ring_ctx->point);
+						    ctx->ring_ctx->timeline_syncobj_handle,
+						    ctx->ring_ctx->point);
 	}
 
 	/* For regular queues, wait on fence */
@@ -1441,8 +1370,8 @@ int cmd_wait_completion(cmd_context_t *ctx)
 	fence_status.fence = ctx->last_submit_seq;
 
 	return amdgpu_cs_query_fence_status(&fence_status,
-				       AMDGPU_TIMEOUT_INFINITE,
-				       0, &expired);
+					    AMDGPU_TIMEOUT_INFINITE,
+					    0, &expired);
 }
 
 /**
diff --git a/lib/amdgpu/amd_command_submission.h b/lib/amdgpu/amd_command_submission.h
index 331889161..8644f25ed 100644
--- a/lib/amdgpu/amd_command_submission.h
+++ b/lib/amdgpu/amd_command_submission.h
@@ -50,8 +50,16 @@ typedef struct {
     enum amd_ip_block_type ip_type;
     bool initialized;
     bool user_queue;
-    bool uses_external_bo;
     uint64_t last_submit_seq; /* Last submission sequence number */
+
+    /* IB shared by the user-queue and CS paths; created in cmd_context_create,
+     * freed in cmd_context_destroy, reusable across multiple submits.
+     */
+    amdgpu_bo_handle ib_bo;
+    void *ib_cpu;
+    uint64_t ib_mc;
+    amdgpu_va_handle ib_va;
+    bool submit_pending;   /* a submit is in flight; wait before reuse/free */
 } cmd_context_t;
 
 /**
@@ -89,15 +97,92 @@ void amdgpu_command_submission_copy_linear_helper(amdgpu_device_handle device,
 void  amdgpu_command_ce_write_fence(amdgpu_device_handle dev,
 					  amdgpu_context_handle ctx);
 
+/*
+ * cmd_* command-submission API
+ * ============================
+ *
+ * A small wrapper around raw amdgpu command submission that hides the
+ * context / IB / bo_list / fence plumbing and lets a test issue DMA-style
+ * operations (write, copy, const-fill, atomic) on an IP ring (SDMA, GFX or
+ * Compute) by GPU virtual address.
+ *
+ * Lifecycle
+ * ---------
+ *   1. cmd_context_create()  - create a context bound to one IP ring. It
+ *      allocates a reusable IB/PM4 buffer for the emitted packets.
+ *   2. issue one or more operations (see the two API layers below).
+ *   3. cmd_context_destroy()  - waits for any in-flight submission, then frees
+ *      the IB and the context.
+ *
+ * Two API layers
+ * --------------
+ *   High-level convenience helpers build one packet and submit it in a single
+ *   call:
+ *       cmd_submit_write_linear(ctx, dst_va, size, data)
+ *       cmd_submit_copy_linear (ctx, src_va, dst_va, size)
+ *       cmd_submit_const_fill  (ctx, dst_va, size, data)
+ *       cmd_submit_atomic      (ctx, dst_va, data)
+ *
+ *   Low-level path, for full control over cmd_packet_params_t (custom_data,
+ *   fence/timestamp packets, etc.):
+ *       cmd_place_packet(ctx, &params)          - build the PM4 stream
+ *       cmd_submit_packet(ctx)                  - submit it
+ *       cmd_place_and_submit_packet(ctx, &p)    - both of the above
+ *
+ * Semantics
+ * ---------
+ *   - Submission is asynchronous: cmd_submit_* returns after the CS is queued.
+ *     The next submit on the same ctx, or cmd_context_destroy(), transparently
+ *     waits for the previous one. Call cmd_wait_completion(ctx) to block
+ *     explicitly (e.g. before reading back the destination).
+ *   - Operands are plain GPU virtual addresses, not BOs. For every BO-backed
+ *     address you pass (source, destination, fence/timestamp target, ...) call
+ *     cmd_context_add_resource(ctx, bo) to add the owning BO to the residency
+ *     set. The residency set is per-submit: it is cleared automatically once
+ *     the packet has been captured for submission, so you must (re-)register
+ *     every required BO immediately before each submit.
+ *   - One call emits exactly one hardware packet and does NOT chunk. A transfer
+ *     larger than the per-packet maximum (see amdgpu_dma_limits_query) will be
+ *     rejected; the caller must split it. Return values are 0 on success or a
+ *     negative errno (e.g. -ENOTSUP if the IP lacks the requested op).
+ *
+ * Example: fill then copy 4 KiB over the SDMA ring
+ * ------------------------------------------------
+ *   cmd_context_t *ctx;
+ *   int r;
+ *
+ *   ctx = cmd_context_create(device, AMD_IP_DMA, 0, false);
+ *   if (!ctx)
+ *           return -ENODEV;
+ *
+ *   // Residency is per-submit, so register before every submit.
+ *   cmd_context_add_resource(ctx, dst_bo);  // owns dst_va
+ *   r = cmd_submit_const_fill(ctx, dst_va, 4096, 0xdeadbeef);
+ *   if (!r) {
+ *           cmd_context_add_resource(ctx, dst_bo);    // owns dst_va
+ *           cmd_context_add_resource(ctx, dst2_bo);   // owns dst2_va
+ *           r = cmd_submit_copy_linear(ctx, dst_va, dst2_va, 4096);
+ *   }
+ *
+ *   cmd_wait_completion(ctx);   // ensure the copy has landed
+ *   cmd_context_destroy(ctx);   // (would also wait) release resources
+ *   return r;
+ */
 cmd_context_t* cmd_context_create(amdgpu_device_handle device,
                                     enum amd_ip_block_type ip_type,
                                     uint32_t ring_id,
-                                    bool user_queue,
-                                    uint32_t write_length,
-                                    amdgpu_bo_handle external_bo,
-                                    uint64_t external_bo_mc,
-                                    volatile uint32_t *external_bo_cpu);
-void cmd_context_destroy(cmd_context_t *ctx, bool destroy_external_bo);
+                                    bool user_queue);
+void cmd_context_destroy(cmd_context_t *ctx);
+
+/*
+ * Register a buffer object in the context's bo_list residency set so it is
+ * resident when the next submission executes. See the cmd_* API overview above
+ * cmd_context_create() for how this fits into the submission flow.
+ *
+ * Returns 0 on success, -EINVAL on bad arguments,
+ * or -ENOSPC when the residency set (resources[]) is full.
+ */
+int cmd_context_add_resource(cmd_context_t *ctx, amdgpu_bo_handle bo);
 
 int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params);
 
diff --git a/tests/amdgpu/amd_dmabuf_unload.c b/tests/amdgpu/amd_dmabuf_unload.c
index 05ca3cf2c..0e43de0e6 100644
--- a/tests/amdgpu/amd_dmabuf_unload.c
+++ b/tests/amdgpu/amd_dmabuf_unload.c
@@ -121,9 +121,7 @@ static void test_fence_outlives_module(int vgem, int amd_fd,
 	igt_assert_eq(r, 0);
 
 	/* Create SDMA command context */
-	cmd_ctx = cmd_context_create(dev, AMD_IP_DMA, 0, false,
-				     copy_size, src_bo, src_mc,
-				     (volatile uint32_t *)src_cpu);
+	cmd_ctx = cmd_context_create(dev, AMD_IP_DMA, 0, false);
 	igt_assert(cmd_ctx != NULL);
 
 	/*
@@ -138,17 +136,14 @@ static void test_fence_outlives_module(int vgem, int amd_fd,
 			     AMDGPU_VA_OP_MAP);
 	igt_assert_eq(r, 0);
 
-	/* Set up bo_list: IB (src), dst, imported VGEM BO */
-	cmd_ctx->ring_ctx->bo2 = dst_bo;
-	cmd_ctx->ring_ctx->bo_mc2 = dst_mc;
-	cmd_ctx->ring_ctx->resources[1] = dst_bo;
-	cmd_ctx->ring_ctx->resources[2] = import.buf_handle;
-	cmd_ctx->ring_ctx->res_cnt = 3;
-
 	igt_info("Submitting %d x %llu-byte SDMA copies (no wait)...\n",
 		 NUM_SDMA_COPIES, (unsigned long long)copy_size);
 
 	for (i = 0; i < NUM_SDMA_COPIES; i++) {
+		igt_assert_eq(cmd_context_add_resource(cmd_ctx, src_bo), 0);
+		igt_assert_eq(cmd_context_add_resource(cmd_ctx, dst_bo), 0);
+		igt_assert_eq(cmd_context_add_resource(cmd_ctx, import.buf_handle), 0);
+
 		r = cmd_submit_copy_linear(cmd_ctx,
 					   src_mc, dst_mc,
 					   (uint32_t)copy_size);
diff --git a/tests/amdgpu/amd_kfd_dmabuf_unload.c b/tests/amdgpu/amd_kfd_dmabuf_unload.c
index 24260b560..28caf8982 100644
--- a/tests/amdgpu/amd_kfd_dmabuf_unload.c
+++ b/tests/amdgpu/amd_kfd_dmabuf_unload.c
@@ -309,23 +309,18 @@ static void test_kfd_fence_outlives_module(int vgem, int amd_fd,
 	igt_assert_eq(r, 0);
 
 	/* Create SDMA command context */
-	cmd_ctx = cmd_context_create(dev, AMD_IP_DMA, 0, false,
-				     copy_size, src_bo, src_mc,
-				     (volatile uint32_t *)src_cpu);
+	cmd_ctx = cmd_context_create(dev, AMD_IP_DMA, 0, false);
 	igt_assert(cmd_ctx != NULL);
 
-	/* Set up bo_list: IB (src), dst, imported VGEM BO */
-	cmd_ctx->ring_ctx->bo2 = dst_bo;
-	cmd_ctx->ring_ctx->bo_mc2 = dst_mc;
-	cmd_ctx->ring_ctx->resources[1] = dst_bo;
-	cmd_ctx->ring_ctx->resources[2] = import.buf_handle;
-	cmd_ctx->ring_ctx->res_cnt = 3;
-
 	igt_info("Submitting %d SDMA copies "
 		 "(KFD amdgpu fences on dma_resv, no wait)...",
 		 NUM_SDMA_COPIES);
 
 	for (i = 0; i < NUM_SDMA_COPIES; i++) {
+		igt_assert_eq(cmd_context_add_resource(cmd_ctx, src_bo), 0);
+		igt_assert_eq(cmd_context_add_resource(cmd_ctx, dst_bo), 0);
+		igt_assert_eq(cmd_context_add_resource(cmd_ctx, import.buf_handle), 0);
+
 		r = cmd_submit_copy_linear(cmd_ctx,
 					   src_mc, dst_mc,
 					   (uint32_t)copy_size);
diff --git a/tests/amdgpu/amd_mem.c b/tests/amdgpu/amd_mem.c
index 7c6855d3f..eef869b41 100644
--- a/tests/amdgpu/amd_mem.c
+++ b/tests/amdgpu/amd_mem.c
@@ -850,7 +850,7 @@ static void test_cache_invalidate_on_sdma_write_asm(amdgpu_device_handle device,
 
 	/* 5. Issue SDMA write to buffer[0] while shader is polling */
 	if (cmd_ring_available(device, AMD_IP_DMA, 0, false))
-		dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false, 64, NULL, 0, NULL);
+		dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false);
 	igt_assert(dma_ctx);
 	r = cmd_submit_write_linear(dma_ctx, vram_mc, sizeof(uint32_t), kPattern);
 	igt_assert_eq(r, 0);
@@ -875,7 +875,7 @@ static void test_cache_invalidate_on_sdma_write_asm(amdgpu_device_handle device,
 	igt_info("cache-invalidate-sdma-write: PASSED (dst[100]=0x%x)\n", buf[dwLocation]);
 
 	/* Cleanup */
-	cmd_context_destroy(dma_ctx, false);
+	cmd_context_destroy(dma_ctx);
 	amdgpu_bo_list_destroy(bo_list);
 	amdgpu_bo_unmap_and_free(bo_cmd, va_cmd, mc_cmd, 4096);
 	amdgpu_cs_ctx_free(compute_ctx);
@@ -1919,7 +1919,7 @@ static int init_dma_context(mm_bench_context_t *ctx, amdgpu_device_handle device
 	}
 
 	/* Create DMA context for ring 0 */
-	ctx->dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false, 128, NULL, 0, NULL);
+	ctx->dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false);
 	if (!ctx->dma_ctx) {
 		igt_debug("Failed to create DMA context for ring 0\n");
 		return -ENODEV;
@@ -1935,7 +1935,7 @@ static int init_dma_context(mm_bench_context_t *ctx, amdgpu_device_handle device
 static void cleanup_dma_context(mm_bench_context_t *ctx)
 {
 	if (ctx->dma_ctx) {
-		cmd_context_destroy(ctx->dma_ctx, false);
+		cmd_context_destroy(ctx->dma_ctx);
 		ctx->dma_ctx = NULL;
 	}
 }
@@ -3164,10 +3164,11 @@ static void test_signal_handling(amdgpu_device_handle device)
 		/* Parent process - perform memory operations with signal handling */
 		igt_info("Parent process starting memory mapping operations...\n");
 
-		/* FIX: Use cmd_context_create_ex with the same BO for both internal buffer and target */
-		/* This ensures SDMA writes to the correct memory address */
-		dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false, 128,
-				     sys_bo, sys_mc_address, (volatile uint32_t *)sys_cpu_ptr);
+		/*
+		 * Create a DMA context; sys_bo is registered in its residency set
+		 * immediately before the submit below (residency is per-submit).
+		 */
+		dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false);
 		igt_assert_f(dma_ctx, "Failed to create DMA command submission context");
 
 		/* Wait for child process to complete with proper signal handling */
@@ -3215,6 +3216,7 @@ static void test_signal_handling(amdgpu_device_handle device)
 		igt_info("Writing 0xdeadbeaf to address 0x%" PRIx64 "\n", sys_mc_address);
 
 		/* Now SDMA should write to the correct address since we're using the same BO */
+		igt_assert_eq(cmd_context_add_resource(dma_ctx, sys_bo), 0);
 		r = cmd_submit_write_linear(dma_ctx, sys_mc_address, sizeof(uint32_t), 0xdeadbeaf);
 		igt_info("cmd_submit_write_linear returned: %d\n", r);
 		igt_assert_eq(r, 0);
@@ -3244,8 +3246,8 @@ static void test_signal_handling(amdgpu_device_handle device)
 
 		igt_info("Memory successfully updated to: 0x%08x\n", sys_mem[0]);
 
-		/* Cleanup command context - don't destroy the external BO */
-		cmd_context_destroy(dma_ctx, false);
+		/* Cleanup command context; sys_bo is owned by the caller. */
+		cmd_context_destroy(dma_ctx);
 		dma_ctx = NULL;
 	}
 
-- 
2.34.1

RE: [PATCH i-g-t v1 2/4] lib/amdgpu: drop external BO from cmd_context

[Zhang, Jesse(Jie)]

AMD General

> -----Original Message-----
> From: Junhua Shen <Junhua.Shen@amd.com>
> Sent: Friday, August 21, 2026 8:42 PM
> To: igt-dev@lists.freedesktop.org
> Cc: Prosyak, Vitaly <Vitaly.Prosyak@amd.com>; Zhang, Jesse(Jie)
> <Jesse.Zhang@amd.com>; Khatri, Sunil <Sunil.Khatri@amd.com>; Huang,
> Honglei1 <Honglei1.Huang@amd.com>; Huang, Ray <Ray.Huang@amd.com>;
> Ma, Yiru <Yiru.Ma@amd.com>; Shen, Junhua <Junhua.Shen@amd.com>
> Subject: [PATCH i-g-t v1 2/4] lib/amdgpu: drop external BO from cmd_context
>
> Rework cmd_context so it no longer owns or clears a caller-visible data buffer.
> Operand residency is registered explicitly, and the leftover internal-BO plumbing is
> removed.
>
> - cmd_context_create()/destroy(): remove the external-BO plumbing; the
>   context no longer allocates or tracks a data BO.
> - Add cmd_context_add_resource(): so callers register BO-backed operand
>   addresses in the per-submit bo_list residency set explicitly.
> - Drop the write_length parameter from cmd_context_create(): the IB/PM4
>   buffer is sized solely from pm4_size.
> - Update all cmd_context_create() call sites to the new signature:
>   tests/amdgpu/amd_dmabuf_unload.c, amd_kfd_dmabuf_unload.c, and
>   amd_mem.c (three sites).
>
> Signed-off-by: Junhua Shen <Junhua.Shen@amd.com>
> ---
>  lib/amdgpu/amd_command_submission.c  | 283 ++++++++++-----------------
> lib/amdgpu/amd_command_submission.h  |  99 +++++++++-
>  tests/amdgpu/amd_dmabuf_unload.c     |  15 +-
>  tests/amdgpu/amd_kfd_dmabuf_unload.c |  15 +-
>  tests/amdgpu/amd_mem.c               |  22 ++-
>  5 files changed, 220 insertions(+), 214 deletions(-)
>
> diff --git a/lib/amdgpu/amd_command_submission.c
> b/lib/amdgpu/amd_command_submission.c
> index 0334c2ded..26f36256a 100644
> --- a/lib/amdgpu/amd_command_submission.c
> +++ b/lib/amdgpu/amd_command_submission.c
> @@ -906,31 +906,22 @@
> amdgpu_command_ce_write_fence(amdgpu_device_handle dev,  }
>
>  /**
> - * command context creation with optional external BO
> + * command context creation
>   *
>   * @param device AMDGPU device handle
>   * @param ip_type IP block type (GFX, DMA, etc.)
>   * @param ring_id Ring index to use
>   * @param user_queue Whether to use user queue mode
> - * @param write_length Size of write operations in DWORDs
> - * @param external_bo Optional external buffer object (NULL for internal allocation)
> - * @param external_bo_mc GPU MC address of external BO (required if
> external_bo provided)
> - * @param external_bo_cpu CPU mapping of external BO (required if external_bo
> provided)
> + * @param write_length Default per-packet transfer size in bytes (overridden per
> + *                     packet by cmd_packet_params_t::size)
>   * @return New command context, or NULL on failure
>   */
>  cmd_context_t* cmd_context_create(amdgpu_device_handle device,
>                                      enum amd_ip_block_type ip_type,
>                                      uint32_t ring_id,
> -                                    bool user_queue,
> -                                    uint32_t write_length,
> -                                    amdgpu_bo_handle external_bo,
> -                                    uint64_t external_bo_mc,
> -                                    volatile uint32_t *external_bo_cpu)
> +                                    bool user_queue)
>  {
>       cmd_context_t *ctx;
> -     void *cpu_ptr = NULL;
> -     uint64_t bo_mc = 0;
> -     amdgpu_va_handle va_handle = NULL;
>       int r;
>
>       if (!device)
> @@ -949,7 +940,6 @@ cmd_context_t*
> cmd_context_create(amdgpu_device_handle device,
>       ctx->ip_type = ip_type;
>       ctx->user_queue = user_queue;
>       ctx->last_submit_seq = 0;
> -     ctx->uses_external_bo = (external_bo != NULL);  // Now this member exists
>       ctx->initialized = false;
>
>       /* Get IP block for the specified IP type */ @@ -967,7 +957,6 @@
> cmd_context_t* cmd_context_create(amdgpu_device_handle device,
>       }
>
>       /* Setup ring context parameters */
> -     ctx->ring_ctx->write_length = write_length ? write_length : 128;
>       ctx->ring_ctx->pm4_size = 256;
>       ctx->ring_ctx->pm4 = calloc(ctx->ring_ctx->pm4_size, sizeof(uint32_t));
>       if (!ctx->ring_ctx->pm4) {
> @@ -976,7 +965,7 @@ cmd_context_t*
> cmd_context_create(amdgpu_device_handle device,
>               return NULL;
>       }
>
> -     ctx->ring_ctx->res_cnt = 1;
> +     ctx->ring_ctx->res_cnt = 0;
>       ctx->ring_ctx->ring_id = ring_id;
>       ctx->ring_ctx->secure = false;
>       ctx->ring_ctx->user_queue = user_queue; @@ -990,7 +979,7 @@
> cmd_context_t* cmd_context_create(amdgpu_device_handle device,
>                       return NULL;
>               }
>               ctx->ip_block->funcs->userq_create(device, ctx->ring_ctx,
> (unsigned int)ip_type);
> -     }else {
> +     } else {
>               /* Create regular command submission context */
>               r = amdgpu_cs_ctx_create(device, &ctx->ring_ctx-
> >context_handle);
>               if (r) {
> @@ -1001,115 +990,60 @@ cmd_context_t*
> cmd_context_create(amdgpu_device_handle device,
>               }
>       }
>
> -     /* BO allocation strategy: use external BO if provided, otherwise allocate
> internally */
> -     if (external_bo) {
> -             /* Validate external BO arguments */
> -             if (!external_bo_cpu || !external_bo_mc) {
> -                     igt_debug("Invalid external BO arguments (mc=0x%llx,
> cpu=%p)\n",
> -                                       (unsigned long long)external_bo_mc,
> external_bo_cpu);
> -                     free(ctx->ring_ctx->pm4);
> -                     free(ctx->ring_ctx);
> -                     free(ctx);
> -                     return NULL;
> -             }
> -
> -             /* Use caller-provided external BO */
> -             ctx->ring_ctx->bo = external_bo;
> -             ctx->ring_ctx->bo_mc = external_bo_mc;
> -             ctx->ring_ctx->bo_cpu = external_bo_cpu;
> -             ctx->ring_ctx->va_handle = NULL;  // VA management is caller's
> responsibility
> -
> -             igt_info("Using external BO: GPU=0x%llx, CPU=%p\n",
> -                              (unsigned long long)external_bo_mc,
> external_bo_cpu);
> -     } else {
> -             /* Allocate internal BO for command operations */
> -             r = amdgpu_bo_alloc_and_map(device,
> -                                ctx->ring_ctx->write_length,
> -                                4096,
> -                                AMDGPU_GEM_DOMAIN_GTT,
> -                                0,
> -                                &ctx->ring_ctx->bo,
> -                                &cpu_ptr,
> -                                &bo_mc,
> -                                &va_handle);
> -             if (r) {
> -                     goto cleanup_error;
> +     /* Allocate a single per-context IB sized to the PM4 buffer capacity. */
> +     r = amdgpu_bo_alloc_and_map(device,
> +                                 ctx->ring_ctx->pm4_size * sizeof(uint32_t), 4096,
> +                                 AMDGPU_GEM_DOMAIN_GTT, 0,
> +                                 &ctx->ib_bo, &ctx->ib_cpu, &ctx->ib_mc,
> +                                 &ctx->ib_va);
> +     if (r) {
> +             if (user_queue) {
> +                     if (ctx->ip_block->funcs->userq_destroy)
> +                             ctx->ip_block->funcs->userq_destroy(device, ctx-
> >ring_ctx,
> +                                                                 (unsigned
> int)ip_type);
> +             } else {
> +                     amdgpu_cs_ctx_free(ctx->ring_ctx->context_handle);
>               }
> -
> -             ctx->ring_ctx->bo_mc = bo_mc;
> -             ctx->ring_ctx->bo_cpu = (volatile uint32_t *)cpu_ptr;
> -             ctx->ring_ctx->va_handle = va_handle;
> -
> -             igt_info("Allocated internal BO: GPU=0x%llx, CPU=%p\n",
> -                      (unsigned long long)bo_mc, cpu_ptr);
> -     }
> -
> -     /* Initialize resources array */
> -     ctx->ring_ctx->resources[0] = ctx->ring_ctx->bo;
> -     for (int i = 1; i < 4; i++) {
> -             ctx->ring_ctx->resources[i] = NULL;
> +             free(ctx->ring_ctx->pm4);
> +             free(ctx->ring_ctx);
> +             free(ctx);
> +             return NULL;
>       }
>
>       ctx->initialized = true;
>       return ctx;
> -
> -cleanup_error:
> -     /* Cleanup resources in case of allocation failure */
> -     if (user_queue) {
> -             ctx->ip_block->funcs->userq_destroy(device, ctx->ring_ctx,
> (unsigned int)ip_type);
> -     } else {
> -             if (ctx->ring_ctx->context_handle)
> -                 amdgpu_cs_ctx_free(ctx->ring_ctx->context_handle);
> -     }
> -
> -     free(ctx->ring_ctx->pm4);
> -     free(ctx->ring_ctx);
> -     free(ctx);
> -     return NULL;
>  }
>
>  /**
> - * context destruction function with external BO control
> + * context destruction function
>   *
>   * @param ctx Command context to destroy
> - * @param destroy_external_bo Whether to destroy external BO (if used)
>   */
> -void cmd_context_destroy(cmd_context_t *ctx, bool destroy_external_bo)
> +void cmd_context_destroy(cmd_context_t *ctx)
>  {
>       if (!ctx || !ctx->initialized)
>               return;
>
> -     if (ctx->ring_ctx) {
> -             /* Handle BO cleanup based on allocation type */
> -             if (ctx->ring_ctx->bo) {
> -                     if (!ctx->uses_external_bo || destroy_external_bo) {
> -                             /* Clean up internal BO or external BO if explicitly
> requested */
> -                             if (ctx->ring_ctx->va_handle) {
> -                                 /* Internal BO with VA handle - full cleanup */
> -                                 amdgpu_bo_unmap_and_free(ctx->ring_ctx->bo,
> ctx->ring_ctx->va_handle,
> -                                                        ctx->ring_ctx->bo_mc,
> -                                                        ctx->ring_ctx->write_length);
> -                             } else if (destroy_external_bo) {
> -                                 /* External BO without VA handle - just free the BO
> */
> -                                 amdgpu_bo_free(ctx->ring_ctx->bo);
> -                             }
> -                     } else {
> -                             /* External BO, preserve it as requested by caller */
> -                             igt_info("Preserving external BO (GPU=0x%llx)\n",
> -                                              (unsigned long long)ctx->ring_ctx-
> >bo_mc);
> -                     }
> -             }
> +     /* Free the per-context IB. */
> +     if (ctx->ib_bo) {
> +             if (ctx->submit_pending)
> +                     cmd_wait_completion(ctx);
> +             amdgpu_bo_unmap_and_free(ctx->ib_bo, ctx->ib_va, ctx->ib_mc,
> +                                      ctx->ring_ctx->pm4_size * sizeof(uint32_t));
> +             ctx->ib_bo = NULL;
> +     }
>
> +     if (ctx->ring_ctx) {
>               /* Clean up command submission context */
>               if (ctx->user_queue) {
>                       if (ctx->ip_block && ctx->ip_block->funcs->userq_destroy) {
>                               ctx->ip_block->funcs->userq_destroy(ctx->device,
> ctx->ring_ctx,
>                                                         (unsigned int)ctx->ip_type);
> -                 }
> +                     }
>               } else {
>                       if (ctx->ring_ctx->context_handle) {
>                               amdgpu_cs_ctx_free(ctx->ring_ctx->context_handle);
> -                 }
> +                     }
>               }
>
>               /* Free PM4 command buffer */
> @@ -1123,6 +1057,42 @@ void cmd_context_destroy(cmd_context_t *ctx, bool
> destroy_external_bo)
>       free(ctx);
>  }
>
> +int cmd_context_add_resource(cmd_context_t *ctx, amdgpu_bo_handle bo) {
> +     struct amdgpu_ring_context *rc;
> +     int i;
> +
> +     if (!ctx || !ctx->initialized || !ctx->ring_ctx || !bo)
> +             return -EINVAL;
> +
> +     rc = ctx->ring_ctx;
> +
> +     /* Deduplicate: an already-registered BO needs no second slot. */
> +     for (i = 0; i < rc->res_cnt; i++) {
> +             if (rc->resources[i] == bo)
> +                     return 0;
> +     }
> +
> +     if (rc->res_cnt >= (int)ARRAY_SIZE(rc->resources))
> +             return -ENOSPC;
> +
> +     rc->resources[rc->res_cnt++] = bo;
> +     return 0;
> +}
> +
> +static void cmd_reset_packet_operands(cmd_context_t *ctx) {
> +     struct amdgpu_ring_context *rc = ctx->ring_ctx;
> +
> +     rc->bo_mc = 0;
> +     rc->bo_mc2 = 0;
> +     rc->write_length = 0;
> +
> +     /* Drop the per-submit residency set. */
> +     memset(rc->resources, 0, sizeof(rc->resources));
> +     rc->res_cnt = 0;
> +}
> +
>  /**
>   * Submit command packet without waiting - Fixed submission logic
>   */
> @@ -1132,10 +1102,6 @@ int cmd_submit_packet(cmd_context_t *ctx)
>       int r;
>       struct amdgpu_cs_request ibs_request;
>       struct amdgpu_cs_ib_info ib_info;
> -     amdgpu_bo_handle ib_bo;
> -     void *ib_cpu;
> -     uint64_t ib_mc_address;
> -     amdgpu_va_handle ib_va_handle;
>       amdgpu_bo_handle all_res[5] = {0};
>       uint32_t res_count = 0;
>       uint32_t i;
> @@ -1145,12 +1111,27 @@ int cmd_submit_packet(cmd_context_t *ctx)
>               return -EINVAL;
>       }
>
> -     /* Check required parameters */
> -     if (ctx->ring_ctx->pm4_dw == 0 || ctx->ring_ctx->pm4_dw > 1024) {
> -             igt_debug("Invalid PM4 size: %u (must be 1-1024)\n", ctx->ring_ctx-
> >pm4_dw);
> +     /* Check required parameters: the PM4 stream must be non-empty and fit
> +      * in the per-context IB allocated by cmd_context_create().
> +      */
> +     if (ctx->ring_ctx->pm4_dw == 0 || ctx->ring_ctx->pm4_dw > ctx->ring_ctx-
> >pm4_size) {
> +             igt_debug("Invalid PM4 size: %u (must be 1-%u)\n",
> +                       ctx->ring_ctx->pm4_dw, ctx->ring_ctx->pm4_size);
>               return -EINVAL;
>       }
>
> +     igt_assert_f(ctx->ib_bo && ctx->ring_ctx->pm4_dw <= ctx->ring_ctx-
> >pm4_size,
> +                  "PM4 stream (%u dw) exceeds IB capacity (%u dw)\n",
> +                  ctx->ring_ctx->pm4_dw, ctx->ring_ctx->pm4_size);
> +
> +     if (ctx->submit_pending) {
> +             cmd_wait_completion(ctx);
> +             ctx->submit_pending = false;
> +     }
cmd_submit_packet() should propagate cmd_wait_completion() errors instead of unconditionally clearing submit_pending and reusing the IB. Also consider clearing submit_pending inside cmd_wait_completion() on success to avoid redundant waits.

> +
> +     memcpy(ctx->ib_cpu, ctx->ring_ctx->pm4,
> +            ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
> +
>       /* For user queues, use userq_submit */
>       if (ctx->user_queue) {
>               if (!ctx->ip_block || !ctx->ip_block->funcs->userq_submit) { @@ -
> 1158,16 +1139,14 @@ int cmd_submit_packet(cmd_context_t *ctx)
>                       return -ENOTSUP;
>               }
>
> -             if (!ctx->ring_ctx->bo_mc) {
> -             igt_debug("Invalid BO MC address for user queue\n");
> -             return -EINVAL;
> -             }
> -
>               ctx->ip_block->funcs->userq_submit(ctx->device, ctx->ring_ctx,
>                     (unsigned int)ctx->ip_type,
> -                   ctx->ring_ctx->bo_mc);
> +                   ctx->ib_mc);
>               ctx->last_submit_seq = ctx->ring_ctx->point;
> +             ctx->submit_pending = true;
>               igt_info("User queue submission successful, point=%lu\n", ctx-
> >last_submit_seq);
> +
> +             cmd_reset_packet_operands(ctx);
>               return 0;
>       }
>
> @@ -1175,26 +1154,8 @@ int cmd_submit_packet(cmd_context_t *ctx)
>       memset(&ibs_request, 0, sizeof(ibs_request));
>       memset(&ib_info, 0, sizeof(ib_info));
>
> -     /* Allocate separate IB buffer instead of reusing command buffer */
> -     r = amdgpu_bo_alloc_and_map(ctx->device,
> -                            ctx->ring_ctx->pm4_dw * sizeof(uint32_t),
> -                            4096,
> -                            AMDGPU_GEM_DOMAIN_GTT,
> -                            0,
> -                            &ib_bo,
> -                            &ib_cpu,
> -                            &ib_mc_address,
> -                            &ib_va_handle);
> -     if (r) {
> -             igt_debug("Failed to allocate IB: %d\n", r);
> -             return r;
> -     }
> -
> -     /* Copy PM4 commands to IB */
> -     memcpy(ib_cpu, ctx->ring_ctx->pm4, ctx->ring_ctx->pm4_dw *
> sizeof(uint32_t));
> -
> -     /* Setup IB information */
> -     ib_info.ib_mc_address = ib_mc_address;
> +     /* Point the IB info at the per-context IB */
> +     ib_info.ib_mc_address = ctx->ib_mc;
>       ib_info.size = ctx->ring_ctx->pm4_dw;
>       if (ctx->ring_ctx->secure)
>               ib_info.flags |= AMDGPU_IB_FLAGS_SECURE; @@ -1215,14
> +1176,12 @@ int cmd_submit_packet(cmd_context_t *ctx)
>       }
>
>       /* Add IB as the last resource */
> -     all_res[res_count++] = ib_bo;
> +     all_res[res_count++] = ctx->ib_bo;
>
>       /* Create BO list */
>       r = amdgpu_bo_list_create(ctx->device, res_count, all_res, NULL, &bo_list);
>       if (r) {
>               igt_debug("amdgpu_bo_list_create failed: %d\n", r);
> -             amdgpu_bo_unmap_and_free(ib_bo, ib_va_handle, ib_mc_address,
> -                                    ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
>               return r;
>       }
>
> @@ -1234,8 +1193,6 @@ int cmd_submit_packet(cmd_context_t *ctx)
>       if (r != 0) {
>               igt_debug("amdgpu_cs_submit failed: %d\n", r);
>               amdgpu_bo_list_destroy(bo_list);
> -             amdgpu_bo_unmap_and_free(ib_bo, ib_va_handle, ib_mc_address,
> -                                    ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
>               return r;
>       }
>
> @@ -1243,10 +1200,11 @@ int cmd_submit_packet(cmd_context_t *ctx)
>       ctx->last_submit_seq = ibs_request.seq_no;
>       igt_debug("Command submitted successfully, seq_no=%lu\n", ctx-
> >last_submit_seq);
>
> -     /* Cleanup resources */
> +     /* The kernel has snapshotted the bo_list; it can be released now. */
>       amdgpu_bo_list_destroy(bo_list);
> -     amdgpu_bo_unmap_and_free(ib_bo, ib_va_handle, ib_mc_address,
> -                        ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
> +
> +     ctx->submit_pending = true;
> +     cmd_reset_packet_operands(ctx);
>
>       return 0;
>  }
> @@ -1258,14 +1216,9 @@ int cmd_place_packet(cmd_context_t *ctx, const
> cmd_packet_params_t *params)
>       if (!ctx || !ctx->initialized || !ctx->ip_block || !params)
>               return -EINVAL;
>
> -     if (!ctx->ring_ctx || !ctx->ring_ctx->bo_cpu)
> +     if (!ctx->ring_ctx)
>               return -EINVAL;
>
> -     /* Clear the buffer before operation */
> -     memset((void *)ctx->ring_ctx->bo_cpu, 0,
> -     ctx->ring_ctx->write_length);
> -
> -
>       /* Build the command packet based on type */
>       switch (params->type) {
>       case CMD_PACKET_WRITE_LINEAR:
> @@ -1280,13 +1233,6 @@ int cmd_place_packet(cmd_context_t *ctx, const
> cmd_packet_params_t *params)
>               result = ctx->ip_block->funcs->write_linear(ctx->ip_block->funcs,
>                                                      ctx->ring_ctx,
>                                                      &ctx->ring_ctx->pm4_dw);
> -
> -             /*  Copy PM4 packet to ring buffer */
> -             if (result == 0 && ctx->ring_ctx->pm4_dw > 0) {
> -                     memcpy((void *)ctx->ring_ctx->bo_cpu,
> -                            ctx->ring_ctx->pm4,
> -                            ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
> -             }
>               return result;
>
>       case CMD_PACKET_WRITE_ATOMIC:
> @@ -1300,13 +1246,6 @@ int cmd_place_packet(cmd_context_t *ctx, const
> cmd_packet_params_t *params)
>               result = ctx->ip_block->funcs->write_linear_atomic(ctx->ip_block-
> >funcs,
>                                                     ctx->ring_ctx,
>                                                     &ctx->ring_ctx->pm4_dw);
> -
> -             /*  Copy PM4 packet to ring buffer */
> -             if (result == 0 && ctx->ring_ctx->pm4_dw > 0) {
> -             memcpy((void *)ctx->ring_ctx->bo_cpu,
> -             ctx->ring_ctx->pm4,
> -             ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
> -             }
>               return result;
>
>       case CMD_PACKET_COPY_LINEAR:
> @@ -1321,16 +1260,6 @@ int cmd_place_packet(cmd_context_t *ctx, const
> cmd_packet_params_t *params)
>           result = ctx->ip_block->funcs->copy_linear(ctx->ip_block->funcs,
>                                                     ctx->ring_ctx,
>                                                     &ctx->ring_ctx->pm4_dw);
> -
> -         /* Copy PM4 packet to ring buffer */
> -         if (result == 0 && ctx->ring_ctx->pm4_dw > 0) {
> -             memcpy((void *)ctx->ring_ctx->bo_cpu,
> -                    ctx->ring_ctx->pm4,
> -                    ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
> -
> -             //igt_info("cmd_place_packet: Copied %u DWORDs to ring buffer
> (copy)\n",
> -               //       ctx->ring_ctx->pm4_dw);
> -         }
>           return result;
>
>       case CMD_PACKET_COPY_ATOMIC:
> @@ -1429,8 +1358,8 @@ int cmd_wait_completion(cmd_context_t *ctx)
>                       return -EINVAL;
>
>               return amdgpu_timeline_syncobj_wait(ctx->device,
> -                                                ctx->ring_ctx-
> >timeline_syncobj_handle,
> -                                                ctx->ring_ctx->point);
> +                                                 ctx->ring_ctx-
> >timeline_syncobj_handle,
> +                                                 ctx->ring_ctx->point);
>       }
>
>       /* For regular queues, wait on fence */ @@ -1441,8 +1370,8 @@ int
> cmd_wait_completion(cmd_context_t *ctx)
>       fence_status.fence = ctx->last_submit_seq;
>
>       return amdgpu_cs_query_fence_status(&fence_status,
> -                                    AMDGPU_TIMEOUT_INFINITE,
> -                                    0, &expired);
> +                                         AMDGPU_TIMEOUT_INFINITE,
> +                                         0, &expired);
>  }
>
>  /**
> diff --git a/lib/amdgpu/amd_command_submission.h
> b/lib/amdgpu/amd_command_submission.h
> index 331889161..8644f25ed 100644
> --- a/lib/amdgpu/amd_command_submission.h
> +++ b/lib/amdgpu/amd_command_submission.h
> @@ -50,8 +50,16 @@ typedef struct {
>      enum amd_ip_block_type ip_type;
>      bool initialized;
>      bool user_queue;
> -    bool uses_external_bo;
>      uint64_t last_submit_seq; /* Last submission sequence number */
> +
> +    /* IB shared by the user-queue and CS paths; created in cmd_context_create,
> +     * freed in cmd_context_destroy, reusable across multiple submits.
> +     */
> +    amdgpu_bo_handle ib_bo;
> +    void *ib_cpu;
> +    uint64_t ib_mc;
> +    amdgpu_va_handle ib_va;
> +    bool submit_pending;   /* a submit is in flight; wait before reuse/free */
>  } cmd_context_t;
>
>  /**
> @@ -89,15 +97,92 @@ void
> amdgpu_command_submission_copy_linear_helper(amdgpu_device_handle
> device,  void  amdgpu_command_ce_write_fence(amdgpu_device_handle dev,
>                                         amdgpu_context_handle ctx);
>
> +/*
> + * cmd_* command-submission API
> + * ============================
> + *
> + * A small wrapper around raw amdgpu command submission that hides the
> + * context / IB / bo_list / fence plumbing and lets a test issue
> +DMA-style
> + * operations (write, copy, const-fill, atomic) on an IP ring (SDMA,
> +GFX or
> + * Compute) by GPU virtual address.
> + *
> + * Lifecycle
> + * ---------
> + *   1. cmd_context_create()  - create a context bound to one IP ring. It
> + *      allocates a reusable IB/PM4 buffer for the emitted packets.
> + *   2. issue one or more operations (see the two API layers below).
> + *   3. cmd_context_destroy()  - waits for any in-flight submission, then frees
> + *      the IB and the context.
> + *
> + * Two API layers
> + * --------------
> + *   High-level convenience helpers build one packet and submit it in a single
> + *   call:
> + *       cmd_submit_write_linear(ctx, dst_va, size, data)
> + *       cmd_submit_copy_linear (ctx, src_va, dst_va, size)
> + *       cmd_submit_const_fill  (ctx, dst_va, size, data)
> + *       cmd_submit_atomic      (ctx, dst_va, data)
> + *
> + *   Low-level path, for full control over cmd_packet_params_t (custom_data,
> + *   fence/timestamp packets, etc.):
> + *       cmd_place_packet(ctx, &params)          - build the PM4 stream
> + *       cmd_submit_packet(ctx)                  - submit it
> + *       cmd_place_and_submit_packet(ctx, &p)    - both of the above
> + *
> + * Semantics
> + * ---------
> + *   - Submission is asynchronous: cmd_submit_* returns after the CS is queued.
> + *     The next submit on the same ctx, or cmd_context_destroy(), transparently
> + *     waits for the previous one. Call cmd_wait_completion(ctx) to block
> + *     explicitly (e.g. before reading back the destination).
> + *   - Operands are plain GPU virtual addresses, not BOs. For every BO-backed
> + *     address you pass (source, destination, fence/timestamp target, ...) call
> + *     cmd_context_add_resource(ctx, bo) to add the owning BO to the residency
> + *     set. The residency set is per-submit: it is cleared automatically once
> + *     the packet has been captured for submission, so you must (re-)register
> + *     every required BO immediately before each submit.
> + *   - One call emits exactly one hardware packet and does NOT chunk. A transfer
> + *     larger than the per-packet maximum (see amdgpu_dma_limits_query) will be
> + *     rejected; the caller must split it. Return values are 0 on success or a
> + *     negative errno (e.g. -ENOTSUP if the IP lacks the requested op).
> + *
> + * Example: fill then copy 4 KiB over the SDMA ring
> + * ------------------------------------------------
> + *   cmd_context_t *ctx;
> + *   int r;
> + *
> + *   ctx = cmd_context_create(device, AMD_IP_DMA, 0, false);
> + *   if (!ctx)
> + *           return -ENODEV;
> + *
> + *   // Residency is per-submit, so register before every submit.
> + *   cmd_context_add_resource(ctx, dst_bo);  // owns dst_va
> + *   r = cmd_submit_const_fill(ctx, dst_va, 4096, 0xdeadbeef);
> + *   if (!r) {
> + *           cmd_context_add_resource(ctx, dst_bo);    // owns dst_va
> + *           cmd_context_add_resource(ctx, dst2_bo);   // owns dst2_va
> + *           r = cmd_submit_copy_linear(ctx, dst_va, dst2_va, 4096);
> + *   }
> + *
> + *   cmd_wait_completion(ctx);   // ensure the copy has landed
> + *   cmd_context_destroy(ctx);   // (would also wait) release resources
> + *   return r;
> + */
>  cmd_context_t* cmd_context_create(amdgpu_device_handle device,
>                                      enum amd_ip_block_type ip_type,
>                                      uint32_t ring_id,
> -                                    bool user_queue,
> -                                    uint32_t write_length,
> -                                    amdgpu_bo_handle external_bo,
> -                                    uint64_t external_bo_mc,
> -                                    volatile uint32_t *external_bo_cpu);
> -void cmd_context_destroy(cmd_context_t *ctx, bool destroy_external_bo);
> +                                    bool user_queue); void
> +cmd_context_destroy(cmd_context_t *ctx);
> +
> +/*
> + * Register a buffer object in the context's bo_list residency set so
> +it is
> + * resident when the next submission executes. See the cmd_* API
> +overview above
> + * cmd_context_create() for how this fits into the submission flow.
> + *
> + * Returns 0 on success, -EINVAL on bad arguments,
> + * or -ENOSPC when the residency set (resources[]) is full.
> + */
> +int cmd_context_add_resource(cmd_context_t *ctx, amdgpu_bo_handle bo);
>
>  int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params);
>
> diff --git a/tests/amdgpu/amd_dmabuf_unload.c
> b/tests/amdgpu/amd_dmabuf_unload.c
> index 05ca3cf2c..0e43de0e6 100644
> --- a/tests/amdgpu/amd_dmabuf_unload.c
> +++ b/tests/amdgpu/amd_dmabuf_unload.c
> @@ -121,9 +121,7 @@ static void test_fence_outlives_module(int vgem, int
> amd_fd,
>       igt_assert_eq(r, 0);
>
>       /* Create SDMA command context */
> -     cmd_ctx = cmd_context_create(dev, AMD_IP_DMA, 0, false,
> -                                  copy_size, src_bo, src_mc,
> -                                  (volatile uint32_t *)src_cpu);
> +     cmd_ctx = cmd_context_create(dev, AMD_IP_DMA, 0, false);
>       igt_assert(cmd_ctx != NULL);
>
>       /*
> @@ -138,17 +136,14 @@ static void test_fence_outlives_module(int vgem, int
> amd_fd,
>                            AMDGPU_VA_OP_MAP);
>       igt_assert_eq(r, 0);
>
> -     /* Set up bo_list: IB (src), dst, imported VGEM BO */
> -     cmd_ctx->ring_ctx->bo2 = dst_bo;
> -     cmd_ctx->ring_ctx->bo_mc2 = dst_mc;
> -     cmd_ctx->ring_ctx->resources[1] = dst_bo;
> -     cmd_ctx->ring_ctx->resources[2] = import.buf_handle;
> -     cmd_ctx->ring_ctx->res_cnt = 3;
> -
>       igt_info("Submitting %d x %llu-byte SDMA copies (no wait)...\n",
>                NUM_SDMA_COPIES, (unsigned long long)copy_size);
>
>       for (i = 0; i < NUM_SDMA_COPIES; i++) {
> +             igt_assert_eq(cmd_context_add_resource(cmd_ctx, src_bo), 0);
> +             igt_assert_eq(cmd_context_add_resource(cmd_ctx, dst_bo), 0);
> +             igt_assert_eq(cmd_context_add_resource(cmd_ctx,
> import.buf_handle),
> +0);
> +
>               r = cmd_submit_copy_linear(cmd_ctx,
>                                          src_mc, dst_mc,
>                                          (uint32_t)copy_size);
> diff --git a/tests/amdgpu/amd_kfd_dmabuf_unload.c
> b/tests/amdgpu/amd_kfd_dmabuf_unload.c
> index 24260b560..28caf8982 100644
> --- a/tests/amdgpu/amd_kfd_dmabuf_unload.c
> +++ b/tests/amdgpu/amd_kfd_dmabuf_unload.c
> @@ -309,23 +309,18 @@ static void test_kfd_fence_outlives_module(int vgem, int
> amd_fd,
>       igt_assert_eq(r, 0);
>
>       /* Create SDMA command context */
> -     cmd_ctx = cmd_context_create(dev, AMD_IP_DMA, 0, false,
> -                                  copy_size, src_bo, src_mc,
> -                                  (volatile uint32_t *)src_cpu);
> +     cmd_ctx = cmd_context_create(dev, AMD_IP_DMA, 0, false);
>       igt_assert(cmd_ctx != NULL);
>
> -     /* Set up bo_list: IB (src), dst, imported VGEM BO */
> -     cmd_ctx->ring_ctx->bo2 = dst_bo;
> -     cmd_ctx->ring_ctx->bo_mc2 = dst_mc;
> -     cmd_ctx->ring_ctx->resources[1] = dst_bo;
> -     cmd_ctx->ring_ctx->resources[2] = import.buf_handle;
> -     cmd_ctx->ring_ctx->res_cnt = 3;
> -
>       igt_info("Submitting %d SDMA copies "
>                "(KFD amdgpu fences on dma_resv, no wait)...",
>                NUM_SDMA_COPIES);
>
>       for (i = 0; i < NUM_SDMA_COPIES; i++) {
> +             igt_assert_eq(cmd_context_add_resource(cmd_ctx, src_bo), 0);
> +             igt_assert_eq(cmd_context_add_resource(cmd_ctx, dst_bo), 0);
> +             igt_assert_eq(cmd_context_add_resource(cmd_ctx,
> import.buf_handle),
> +0);
> +
>               r = cmd_submit_copy_linear(cmd_ctx,
>                                          src_mc, dst_mc,
>                                          (uint32_t)copy_size);
> diff --git a/tests/amdgpu/amd_mem.c b/tests/amdgpu/amd_mem.c index
> 7c6855d3f..eef869b41 100644
> --- a/tests/amdgpu/amd_mem.c
> +++ b/tests/amdgpu/amd_mem.c
only updates create/destroy signatures in three places,  only updates create/destroy signatures in three places, but two submit paths still omit residency registration:

test_cache_invalidate_on_sdma_write_asm (~line 855):

r = cmd_submit_write_linear(dma_ctx, vram_mc, sizeof(uint32_t), kPattern);
Needs cmd_context_add_resource(dma_ctx, bo_vram) before submit. Without it, the CS bo_list may not include the destination BO → potential fault or undefined behavior.

submit_dma_write_operation (~lines 1961-1963) - broken after refactor:

r = cmd_submit_write_linear(ctx->dma_ctx,
            ctx->dma_ctx->ring_ctx->bo_mc,  /* internal data BO - removed */
            64, 0x12345678);


Regards
Jesse

> @@ -850,7 +850,7 @@ static void
> test_cache_invalidate_on_sdma_write_asm(amdgpu_device_handle device,
>
>       /* 5. Issue SDMA write to buffer[0] while shader is polling */
>       if (cmd_ring_available(device, AMD_IP_DMA, 0, false))
> -             dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false, 64,
> NULL, 0, NULL);
> +             dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false);
>       igt_assert(dma_ctx);
>       r = cmd_submit_write_linear(dma_ctx, vram_mc, sizeof(uint32_t), kPattern);
>       igt_assert_eq(r, 0);
> @@ -875,7 +875,7 @@ static void
> test_cache_invalidate_on_sdma_write_asm(amdgpu_device_handle device,
>       igt_info("cache-invalidate-sdma-write: PASSED (dst[100]=0x%x)\n",
> buf[dwLocation]);
>
>       /* Cleanup */
> -     cmd_context_destroy(dma_ctx, false);
> +     cmd_context_destroy(dma_ctx);
>       amdgpu_bo_list_destroy(bo_list);
>       amdgpu_bo_unmap_and_free(bo_cmd, va_cmd, mc_cmd, 4096);
>       amdgpu_cs_ctx_free(compute_ctx);
> @@ -1919,7 +1919,7 @@ static int init_dma_context(mm_bench_context_t *ctx,
> amdgpu_device_handle device
>       }
>
>       /* Create DMA context for ring 0 */
> -     ctx->dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false, 128,
> NULL, 0, NULL);
> +     ctx->dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false);
>       if (!ctx->dma_ctx) {
>               igt_debug("Failed to create DMA context for ring 0\n");
>               return -ENODEV;
> @@ -1935,7 +1935,7 @@ static int init_dma_context(mm_bench_context_t *ctx,
> amdgpu_device_handle device  static void
> cleanup_dma_context(mm_bench_context_t *ctx)  {
>       if (ctx->dma_ctx) {
> -             cmd_context_destroy(ctx->dma_ctx, false);
> +             cmd_context_destroy(ctx->dma_ctx);
>               ctx->dma_ctx = NULL;
>       }
>  }
> @@ -3164,10 +3164,11 @@ static void
> test_signal_handling(amdgpu_device_handle device)
>               /* Parent process - perform memory operations with signal handling
> */
>               igt_info("Parent process starting memory mapping operations...\n");
>
> -             /* FIX: Use cmd_context_create_ex with the same BO for both
> internal buffer and target */
> -             /* This ensures SDMA writes to the correct memory address */
> -             dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false,
> 128,
> -                                  sys_bo, sys_mc_address, (volatile uint32_t
> *)sys_cpu_ptr);
> +             /*
> +              * Create a DMA context; sys_bo is registered in its residency set
> +              * immediately before the submit below (residency is per-submit).
> +              */
> +             dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false);
>               igt_assert_f(dma_ctx, "Failed to create DMA command submission
> context");
>
>               /* Wait for child process to complete with proper signal handling */
> @@ -3215,6 +3216,7 @@ static void test_signal_handling(amdgpu_device_handle
> device)
>               igt_info("Writing 0xdeadbeaf to address 0x%" PRIx64 "\n",
> sys_mc_address);
>
>               /* Now SDMA should write to the correct address since we're using
> the same BO */
> +             igt_assert_eq(cmd_context_add_resource(dma_ctx, sys_bo), 0);
>               r = cmd_submit_write_linear(dma_ctx, sys_mc_address,
> sizeof(uint32_t), 0xdeadbeaf);
>               igt_info("cmd_submit_write_linear returned: %d\n", r);
>               igt_assert_eq(r, 0);
> @@ -3244,8 +3246,8 @@ static void test_signal_handling(amdgpu_device_handle
> device)
>
>               igt_info("Memory successfully updated to: 0x%08x\n", sys_mem[0]);
>
> -             /* Cleanup command context - don't destroy the external BO */
> -             cmd_context_destroy(dma_ctx, false);
> +             /* Cleanup command context; sys_bo is owned by the caller. */
> +             cmd_context_destroy(dma_ctx);
>               dma_ctx = NULL;
>       }
>
> --
> 2.34.1

Re: [PATCH i-g-t v1 2/4] lib/amdgpu: drop external BO from cmd_context

[Junhua Shen]

On Tue, Aug 25, 2026 at 10:18:32AM +0000, Zhang, Jesse(Jie) wrote:
> AMD General
> 
> > -----Original Message-----
> > From: Junhua Shen <Junhua.Shen@amd.com>
> > Sent: Friday, August 21, 2026 8:42 PM
> > To: igt-dev@lists.freedesktop.org
> > Cc: Prosyak, Vitaly <Vitaly.Prosyak@amd.com>; Zhang, Jesse(Jie)
> > <Jesse.Zhang@amd.com>; Khatri, Sunil <Sunil.Khatri@amd.com>; Huang,
> > Honglei1 <Honglei1.Huang@amd.com>; Huang, Ray <Ray.Huang@amd.com>;
> > Ma, Yiru <Yiru.Ma@amd.com>; Shen, Junhua <Junhua.Shen@amd.com>
> > Subject: [PATCH i-g-t v1 2/4] lib/amdgpu: drop external BO from cmd_context
> >
> > Rework cmd_context so it no longer owns or clears a caller-visible data buffer.
> > Operand residency is registered explicitly, and the leftover internal-BO plumbing is
> > removed.
> >
> > - cmd_context_create()/destroy(): remove the external-BO plumbing; the
> >   context no longer allocates or tracks a data BO.
> > - Add cmd_context_add_resource(): so callers register BO-backed operand
> >   addresses in the per-submit bo_list residency set explicitly.
> > - Drop the write_length parameter from cmd_context_create(): the IB/PM4
> >   buffer is sized solely from pm4_size.
> > - Update all cmd_context_create() call sites to the new signature:
> >   tests/amdgpu/amd_dmabuf_unload.c, amd_kfd_dmabuf_unload.c, and
> >   amd_mem.c (three sites).
> >
> > Signed-off-by: Junhua Shen <Junhua.Shen@amd.com>
> > ---
> >  lib/amdgpu/amd_command_submission.c  | 283 ++++++++++-----------------
> > lib/amdgpu/amd_command_submission.h  |  99 +++++++++-
> >  tests/amdgpu/amd_dmabuf_unload.c     |  15 +-
> >  tests/amdgpu/amd_kfd_dmabuf_unload.c |  15 +-
> >  tests/amdgpu/amd_mem.c               |  22 ++-
> >  5 files changed, 220 insertions(+), 214 deletions(-)
> >
> > diff --git a/lib/amdgpu/amd_command_submission.c
> > b/lib/amdgpu/amd_command_submission.c
> > index 0334c2ded..26f36256a 100644
> > --- a/lib/amdgpu/amd_command_submission.c
> > +++ b/lib/amdgpu/amd_command_submission.c
> > @@ -906,31 +906,22 @@
> > amdgpu_command_ce_write_fence(amdgpu_device_handle dev,  }
> >
> >  /**
> > - * command context creation with optional external BO
> > + * command context creation
> >   *
> >   * @param device AMDGPU device handle
> >   * @param ip_type IP block type (GFX, DMA, etc.)
> >   * @param ring_id Ring index to use
> >   * @param user_queue Whether to use user queue mode
> > - * @param write_length Size of write operations in DWORDs
> > - * @param external_bo Optional external buffer object (NULL for internal allocation)
> > - * @param external_bo_mc GPU MC address of external BO (required if
> > external_bo provided)
> > - * @param external_bo_cpu CPU mapping of external BO (required if external_bo
> > provided)
> > + * @param write_length Default per-packet transfer size in bytes (overridden per
> > + *                     packet by cmd_packet_params_t::size)
> >   * @return New command context, or NULL on failure
> >   */
> >  cmd_context_t* cmd_context_create(amdgpu_device_handle device,
> >                                      enum amd_ip_block_type ip_type,
> >                                      uint32_t ring_id,
> > -                                    bool user_queue,
> > -                                    uint32_t write_length,
> > -                                    amdgpu_bo_handle external_bo,
> > -                                    uint64_t external_bo_mc,
> > -                                    volatile uint32_t *external_bo_cpu)
> > +                                    bool user_queue)
> >  {
> >       cmd_context_t *ctx;
> > -     void *cpu_ptr = NULL;
> > -     uint64_t bo_mc = 0;
> > -     amdgpu_va_handle va_handle = NULL;
> >       int r;
> >
> >       if (!device)
> > @@ -949,7 +940,6 @@ cmd_context_t*
> > cmd_context_create(amdgpu_device_handle device,
> >       ctx->ip_type = ip_type;
> >       ctx->user_queue = user_queue;
> >       ctx->last_submit_seq = 0;
> > -     ctx->uses_external_bo = (external_bo != NULL);  // Now this member exists
> >       ctx->initialized = false;
> >
> >       /* Get IP block for the specified IP type */ @@ -967,7 +957,6 @@
> > cmd_context_t* cmd_context_create(amdgpu_device_handle device,
> >       }
> >
> >       /* Setup ring context parameters */
> > -     ctx->ring_ctx->write_length = write_length ? write_length : 128;
> >       ctx->ring_ctx->pm4_size = 256;
> >       ctx->ring_ctx->pm4 = calloc(ctx->ring_ctx->pm4_size, sizeof(uint32_t));
> >       if (!ctx->ring_ctx->pm4) {
> > @@ -976,7 +965,7 @@ cmd_context_t*
> > cmd_context_create(amdgpu_device_handle device,
> >               return NULL;
> >       }
> >
> > -     ctx->ring_ctx->res_cnt = 1;
> > +     ctx->ring_ctx->res_cnt = 0;
> >       ctx->ring_ctx->ring_id = ring_id;
> >       ctx->ring_ctx->secure = false;
> >       ctx->ring_ctx->user_queue = user_queue; @@ -990,7 +979,7 @@
> > cmd_context_t* cmd_context_create(amdgpu_device_handle device,
> >                       return NULL;
> >               }
> >               ctx->ip_block->funcs->userq_create(device, ctx->ring_ctx,
> > (unsigned int)ip_type);
> > -     }else {
> > +     } else {
> >               /* Create regular command submission context */
> >               r = amdgpu_cs_ctx_create(device, &ctx->ring_ctx-
> > >context_handle);
> >               if (r) {
> > @@ -1001,115 +990,60 @@ cmd_context_t*
> > cmd_context_create(amdgpu_device_handle device,
> >               }
> >       }
> >
> > -     /* BO allocation strategy: use external BO if provided, otherwise allocate
> > internally */
> > -     if (external_bo) {
> > -             /* Validate external BO arguments */
> > -             if (!external_bo_cpu || !external_bo_mc) {
> > -                     igt_debug("Invalid external BO arguments (mc=0x%llx,
> > cpu=%p)\n",
> > -                                       (unsigned long long)external_bo_mc,
> > external_bo_cpu);
> > -                     free(ctx->ring_ctx->pm4);
> > -                     free(ctx->ring_ctx);
> > -                     free(ctx);
> > -                     return NULL;
> > -             }
> > -
> > -             /* Use caller-provided external BO */
> > -             ctx->ring_ctx->bo = external_bo;
> > -             ctx->ring_ctx->bo_mc = external_bo_mc;
> > -             ctx->ring_ctx->bo_cpu = external_bo_cpu;
> > -             ctx->ring_ctx->va_handle = NULL;  // VA management is caller's
> > responsibility
> > -
> > -             igt_info("Using external BO: GPU=0x%llx, CPU=%p\n",
> > -                              (unsigned long long)external_bo_mc,
> > external_bo_cpu);
> > -     } else {
> > -             /* Allocate internal BO for command operations */
> > -             r = amdgpu_bo_alloc_and_map(device,
> > -                                ctx->ring_ctx->write_length,
> > -                                4096,
> > -                                AMDGPU_GEM_DOMAIN_GTT,
> > -                                0,
> > -                                &ctx->ring_ctx->bo,
> > -                                &cpu_ptr,
> > -                                &bo_mc,
> > -                                &va_handle);
> > -             if (r) {
> > -                     goto cleanup_error;
> > +     /* Allocate a single per-context IB sized to the PM4 buffer capacity. */
> > +     r = amdgpu_bo_alloc_and_map(device,
> > +                                 ctx->ring_ctx->pm4_size * sizeof(uint32_t), 4096,
> > +                                 AMDGPU_GEM_DOMAIN_GTT, 0,
> > +                                 &ctx->ib_bo, &ctx->ib_cpu, &ctx->ib_mc,
> > +                                 &ctx->ib_va);
> > +     if (r) {
> > +             if (user_queue) {
> > +                     if (ctx->ip_block->funcs->userq_destroy)
> > +                             ctx->ip_block->funcs->userq_destroy(device, ctx-
> > >ring_ctx,
> > +                                                                 (unsigned
> > int)ip_type);
> > +             } else {
> > +                     amdgpu_cs_ctx_free(ctx->ring_ctx->context_handle);
> >               }
> > -
> > -             ctx->ring_ctx->bo_mc = bo_mc;
> > -             ctx->ring_ctx->bo_cpu = (volatile uint32_t *)cpu_ptr;
> > -             ctx->ring_ctx->va_handle = va_handle;
> > -
> > -             igt_info("Allocated internal BO: GPU=0x%llx, CPU=%p\n",
> > -                      (unsigned long long)bo_mc, cpu_ptr);
> > -     }
> > -
> > -     /* Initialize resources array */
> > -     ctx->ring_ctx->resources[0] = ctx->ring_ctx->bo;
> > -     for (int i = 1; i < 4; i++) {
> > -             ctx->ring_ctx->resources[i] = NULL;
> > +             free(ctx->ring_ctx->pm4);
> > +             free(ctx->ring_ctx);
> > +             free(ctx);
> > +             return NULL;
> >       }
> >
> >       ctx->initialized = true;
> >       return ctx;
> > -
> > -cleanup_error:
> > -     /* Cleanup resources in case of allocation failure */
> > -     if (user_queue) {
> > -             ctx->ip_block->funcs->userq_destroy(device, ctx->ring_ctx,
> > (unsigned int)ip_type);
> > -     } else {
> > -             if (ctx->ring_ctx->context_handle)
> > -                 amdgpu_cs_ctx_free(ctx->ring_ctx->context_handle);
> > -     }
> > -
> > -     free(ctx->ring_ctx->pm4);
> > -     free(ctx->ring_ctx);
> > -     free(ctx);
> > -     return NULL;
> >  }
> >
> >  /**
> > - * context destruction function with external BO control
> > + * context destruction function
> >   *
> >   * @param ctx Command context to destroy
> > - * @param destroy_external_bo Whether to destroy external BO (if used)
> >   */
> > -void cmd_context_destroy(cmd_context_t *ctx, bool destroy_external_bo)
> > +void cmd_context_destroy(cmd_context_t *ctx)
> >  {
> >       if (!ctx || !ctx->initialized)
> >               return;
> >
> > -     if (ctx->ring_ctx) {
> > -             /* Handle BO cleanup based on allocation type */
> > -             if (ctx->ring_ctx->bo) {
> > -                     if (!ctx->uses_external_bo || destroy_external_bo) {
> > -                             /* Clean up internal BO or external BO if explicitly
> > requested */
> > -                             if (ctx->ring_ctx->va_handle) {
> > -                                 /* Internal BO with VA handle - full cleanup */
> > -                                 amdgpu_bo_unmap_and_free(ctx->ring_ctx->bo,
> > ctx->ring_ctx->va_handle,
> > -                                                        ctx->ring_ctx->bo_mc,
> > -                                                        ctx->ring_ctx->write_length);
> > -                             } else if (destroy_external_bo) {
> > -                                 /* External BO without VA handle - just free the BO
> > */
> > -                                 amdgpu_bo_free(ctx->ring_ctx->bo);
> > -                             }
> > -                     } else {
> > -                             /* External BO, preserve it as requested by caller */
> > -                             igt_info("Preserving external BO (GPU=0x%llx)\n",
> > -                                              (unsigned long long)ctx->ring_ctx-
> > >bo_mc);
> > -                     }
> > -             }
> > +     /* Free the per-context IB. */
> > +     if (ctx->ib_bo) {
> > +             if (ctx->submit_pending)
> > +                     cmd_wait_completion(ctx);
> > +             amdgpu_bo_unmap_and_free(ctx->ib_bo, ctx->ib_va, ctx->ib_mc,
> > +                                      ctx->ring_ctx->pm4_size * sizeof(uint32_t));
> > +             ctx->ib_bo = NULL;
> > +     }
> >
> > +     if (ctx->ring_ctx) {
> >               /* Clean up command submission context */
> >               if (ctx->user_queue) {
> >                       if (ctx->ip_block && ctx->ip_block->funcs->userq_destroy) {
> >                               ctx->ip_block->funcs->userq_destroy(ctx->device,
> > ctx->ring_ctx,
> >                                                         (unsigned int)ctx->ip_type);
> > -                 }
> > +                     }
> >               } else {
> >                       if (ctx->ring_ctx->context_handle) {
> >                               amdgpu_cs_ctx_free(ctx->ring_ctx->context_handle);
> > -                 }
> > +                     }
> >               }
> >
> >               /* Free PM4 command buffer */
> > @@ -1123,6 +1057,42 @@ void cmd_context_destroy(cmd_context_t *ctx, bool
> > destroy_external_bo)
> >       free(ctx);
> >  }
> >
> > +int cmd_context_add_resource(cmd_context_t *ctx, amdgpu_bo_handle bo) {
> > +     struct amdgpu_ring_context *rc;
> > +     int i;
> > +
> > +     if (!ctx || !ctx->initialized || !ctx->ring_ctx || !bo)
> > +             return -EINVAL;
> > +
> > +     rc = ctx->ring_ctx;
> > +
> > +     /* Deduplicate: an already-registered BO needs no second slot. */
> > +     for (i = 0; i < rc->res_cnt; i++) {
> > +             if (rc->resources[i] == bo)
> > +                     return 0;
> > +     }
> > +
> > +     if (rc->res_cnt >= (int)ARRAY_SIZE(rc->resources))
> > +             return -ENOSPC;
> > +
> > +     rc->resources[rc->res_cnt++] = bo;
> > +     return 0;
> > +}
> > +
> > +static void cmd_reset_packet_operands(cmd_context_t *ctx) {
> > +     struct amdgpu_ring_context *rc = ctx->ring_ctx;
> > +
> > +     rc->bo_mc = 0;
> > +     rc->bo_mc2 = 0;
> > +     rc->write_length = 0;
> > +
> > +     /* Drop the per-submit residency set. */
> > +     memset(rc->resources, 0, sizeof(rc->resources));
> > +     rc->res_cnt = 0;
> > +}
> > +
> >  /**
> >   * Submit command packet without waiting - Fixed submission logic
> >   */
> > @@ -1132,10 +1102,6 @@ int cmd_submit_packet(cmd_context_t *ctx)
> >       int r;
> >       struct amdgpu_cs_request ibs_request;
> >       struct amdgpu_cs_ib_info ib_info;
> > -     amdgpu_bo_handle ib_bo;
> > -     void *ib_cpu;
> > -     uint64_t ib_mc_address;
> > -     amdgpu_va_handle ib_va_handle;
> >       amdgpu_bo_handle all_res[5] = {0};
> >       uint32_t res_count = 0;
> >       uint32_t i;
> > @@ -1145,12 +1111,27 @@ int cmd_submit_packet(cmd_context_t *ctx)
> >               return -EINVAL;
> >       }
> >
> > -     /* Check required parameters */
> > -     if (ctx->ring_ctx->pm4_dw == 0 || ctx->ring_ctx->pm4_dw > 1024) {
> > -             igt_debug("Invalid PM4 size: %u (must be 1-1024)\n", ctx->ring_ctx-
> > >pm4_dw);
> > +     /* Check required parameters: the PM4 stream must be non-empty and fit
> > +      * in the per-context IB allocated by cmd_context_create().
> > +      */
> > +     if (ctx->ring_ctx->pm4_dw == 0 || ctx->ring_ctx->pm4_dw > ctx->ring_ctx-
> > >pm4_size) {
> > +             igt_debug("Invalid PM4 size: %u (must be 1-%u)\n",
> > +                       ctx->ring_ctx->pm4_dw, ctx->ring_ctx->pm4_size);
> >               return -EINVAL;
> >       }
> >
> > +     igt_assert_f(ctx->ib_bo && ctx->ring_ctx->pm4_dw <= ctx->ring_ctx-
> > >pm4_size,
> > +                  "PM4 stream (%u dw) exceeds IB capacity (%u dw)\n",
> > +                  ctx->ring_ctx->pm4_dw, ctx->ring_ctx->pm4_size);
> > +
> > +     if (ctx->submit_pending) {
> > +             cmd_wait_completion(ctx);
> > +             ctx->submit_pending = false;
> > +     }
> cmd_submit_packet() should propagate cmd_wait_completion() errors instead of unconditionally clearing submit_pending and reusing the IB. Also consider clearing submit_pending inside cmd_wait_completion() on success to avoid redundant waits.
>
Agreed. Will propagate `cmd_wait_completion()` errors in
`cmd_submit_packet()`, and move `submit_pending` clearing to successful
`cmd_wait_completion()` to avoid redundant waits.

> > +
> > +     memcpy(ctx->ib_cpu, ctx->ring_ctx->pm4,
> > +            ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
> > +
> >       /* For user queues, use userq_submit */
> >       if (ctx->user_queue) {
> >               if (!ctx->ip_block || !ctx->ip_block->funcs->userq_submit) { @@ -
> > 1158,16 +1139,14 @@ int cmd_submit_packet(cmd_context_t *ctx)
> >                       return -ENOTSUP;
> >               }
> >
> > -             if (!ctx->ring_ctx->bo_mc) {
> > -             igt_debug("Invalid BO MC address for user queue\n");
> > -             return -EINVAL;
> > -             }
> > -
> >               ctx->ip_block->funcs->userq_submit(ctx->device, ctx->ring_ctx,
> >                     (unsigned int)ctx->ip_type,
> > -                   ctx->ring_ctx->bo_mc);
> > +                   ctx->ib_mc);
> >               ctx->last_submit_seq = ctx->ring_ctx->point;
> > +             ctx->submit_pending = true;
> >               igt_info("User queue submission successful, point=%lu\n", ctx-
> > >last_submit_seq);
> > +
> > +             cmd_reset_packet_operands(ctx);
> >               return 0;
> >       }
> >
> > @@ -1175,26 +1154,8 @@ int cmd_submit_packet(cmd_context_t *ctx)
> >       memset(&ibs_request, 0, sizeof(ibs_request));
> >       memset(&ib_info, 0, sizeof(ib_info));
> >
> > -     /* Allocate separate IB buffer instead of reusing command buffer */
> > -     r = amdgpu_bo_alloc_and_map(ctx->device,
> > -                            ctx->ring_ctx->pm4_dw * sizeof(uint32_t),
> > -                            4096,
> > -                            AMDGPU_GEM_DOMAIN_GTT,
> > -                            0,
> > -                            &ib_bo,
> > -                            &ib_cpu,
> > -                            &ib_mc_address,
> > -                            &ib_va_handle);
> > -     if (r) {
> > -             igt_debug("Failed to allocate IB: %d\n", r);
> > -             return r;
> > -     }
> > -
> > -     /* Copy PM4 commands to IB */
> > -     memcpy(ib_cpu, ctx->ring_ctx->pm4, ctx->ring_ctx->pm4_dw *
> > sizeof(uint32_t));
> > -
> > -     /* Setup IB information */
> > -     ib_info.ib_mc_address = ib_mc_address;
> > +     /* Point the IB info at the per-context IB */
> > +     ib_info.ib_mc_address = ctx->ib_mc;
> >       ib_info.size = ctx->ring_ctx->pm4_dw;
> >       if (ctx->ring_ctx->secure)
> >               ib_info.flags |= AMDGPU_IB_FLAGS_SECURE; @@ -1215,14
> > +1176,12 @@ int cmd_submit_packet(cmd_context_t *ctx)
> >       }
> >
> >       /* Add IB as the last resource */
> > -     all_res[res_count++] = ib_bo;
> > +     all_res[res_count++] = ctx->ib_bo;
> >
> >       /* Create BO list */
> >       r = amdgpu_bo_list_create(ctx->device, res_count, all_res, NULL, &bo_list);
> >       if (r) {
> >               igt_debug("amdgpu_bo_list_create failed: %d\n", r);
> > -             amdgpu_bo_unmap_and_free(ib_bo, ib_va_handle, ib_mc_address,
> > -                                    ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
> >               return r;
> >       }
> >
> > @@ -1234,8 +1193,6 @@ int cmd_submit_packet(cmd_context_t *ctx)
> >       if (r != 0) {
> >               igt_debug("amdgpu_cs_submit failed: %d\n", r);
> >               amdgpu_bo_list_destroy(bo_list);
> > -             amdgpu_bo_unmap_and_free(ib_bo, ib_va_handle, ib_mc_address,
> > -                                    ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
> >               return r;
> >       }
> >
> > @@ -1243,10 +1200,11 @@ int cmd_submit_packet(cmd_context_t *ctx)
> >       ctx->last_submit_seq = ibs_request.seq_no;
> >       igt_debug("Command submitted successfully, seq_no=%lu\n", ctx-
> > >last_submit_seq);
> >
> > -     /* Cleanup resources */
> > +     /* The kernel has snapshotted the bo_list; it can be released now. */
> >       amdgpu_bo_list_destroy(bo_list);
> > -     amdgpu_bo_unmap_and_free(ib_bo, ib_va_handle, ib_mc_address,
> > -                        ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
> > +
> > +     ctx->submit_pending = true;
> > +     cmd_reset_packet_operands(ctx);
> >
> >       return 0;
> >  }
> > @@ -1258,14 +1216,9 @@ int cmd_place_packet(cmd_context_t *ctx, const
> > cmd_packet_params_t *params)
> >       if (!ctx || !ctx->initialized || !ctx->ip_block || !params)
> >               return -EINVAL;
> >
> > -     if (!ctx->ring_ctx || !ctx->ring_ctx->bo_cpu)
> > +     if (!ctx->ring_ctx)
> >               return -EINVAL;
> >
> > -     /* Clear the buffer before operation */
> > -     memset((void *)ctx->ring_ctx->bo_cpu, 0,
> > -     ctx->ring_ctx->write_length);
> > -
> > -
> >       /* Build the command packet based on type */
> >       switch (params->type) {
> >       case CMD_PACKET_WRITE_LINEAR:
> > @@ -1280,13 +1233,6 @@ int cmd_place_packet(cmd_context_t *ctx, const
> > cmd_packet_params_t *params)
> >               result = ctx->ip_block->funcs->write_linear(ctx->ip_block->funcs,
> >                                                      ctx->ring_ctx,
> >                                                      &ctx->ring_ctx->pm4_dw);
> > -
> > -             /*  Copy PM4 packet to ring buffer */
> > -             if (result == 0 && ctx->ring_ctx->pm4_dw > 0) {
> > -                     memcpy((void *)ctx->ring_ctx->bo_cpu,
> > -                            ctx->ring_ctx->pm4,
> > -                            ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
> > -             }
> >               return result;
> >
> >       case CMD_PACKET_WRITE_ATOMIC:
> > @@ -1300,13 +1246,6 @@ int cmd_place_packet(cmd_context_t *ctx, const
> > cmd_packet_params_t *params)
> >               result = ctx->ip_block->funcs->write_linear_atomic(ctx->ip_block-
> > >funcs,
> >                                                     ctx->ring_ctx,
> >                                                     &ctx->ring_ctx->pm4_dw);
> > -
> > -             /*  Copy PM4 packet to ring buffer */
> > -             if (result == 0 && ctx->ring_ctx->pm4_dw > 0) {
> > -             memcpy((void *)ctx->ring_ctx->bo_cpu,
> > -             ctx->ring_ctx->pm4,
> > -             ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
> > -             }
> >               return result;
> >
> >       case CMD_PACKET_COPY_LINEAR:
> > @@ -1321,16 +1260,6 @@ int cmd_place_packet(cmd_context_t *ctx, const
> > cmd_packet_params_t *params)
> >           result = ctx->ip_block->funcs->copy_linear(ctx->ip_block->funcs,
> >                                                     ctx->ring_ctx,
> >                                                     &ctx->ring_ctx->pm4_dw);
> > -
> > -         /* Copy PM4 packet to ring buffer */
> > -         if (result == 0 && ctx->ring_ctx->pm4_dw > 0) {
> > -             memcpy((void *)ctx->ring_ctx->bo_cpu,
> > -                    ctx->ring_ctx->pm4,
> > -                    ctx->ring_ctx->pm4_dw * sizeof(uint32_t));
> > -
> > -             //igt_info("cmd_place_packet: Copied %u DWORDs to ring buffer
> > (copy)\n",
> > -               //       ctx->ring_ctx->pm4_dw);
> > -         }
> >           return result;
> >
> >       case CMD_PACKET_COPY_ATOMIC:
> > @@ -1429,8 +1358,8 @@ int cmd_wait_completion(cmd_context_t *ctx)
> >                       return -EINVAL;
> >
> >               return amdgpu_timeline_syncobj_wait(ctx->device,
> > -                                                ctx->ring_ctx-
> > >timeline_syncobj_handle,
> > -                                                ctx->ring_ctx->point);
> > +                                                 ctx->ring_ctx-
> > >timeline_syncobj_handle,
> > +                                                 ctx->ring_ctx->point);
> >       }
> >
> >       /* For regular queues, wait on fence */ @@ -1441,8 +1370,8 @@ int
> > cmd_wait_completion(cmd_context_t *ctx)
> >       fence_status.fence = ctx->last_submit_seq;
> >
> >       return amdgpu_cs_query_fence_status(&fence_status,
> > -                                    AMDGPU_TIMEOUT_INFINITE,
> > -                                    0, &expired);
> > +                                         AMDGPU_TIMEOUT_INFINITE,
> > +                                         0, &expired);
> >  }
> >
> >  /**
> > diff --git a/lib/amdgpu/amd_command_submission.h
> > b/lib/amdgpu/amd_command_submission.h
> > index 331889161..8644f25ed 100644
> > --- a/lib/amdgpu/amd_command_submission.h
> > +++ b/lib/amdgpu/amd_command_submission.h
> > @@ -50,8 +50,16 @@ typedef struct {
> >      enum amd_ip_block_type ip_type;
> >      bool initialized;
> >      bool user_queue;
> > -    bool uses_external_bo;
> >      uint64_t last_submit_seq; /* Last submission sequence number */
> > +
> > +    /* IB shared by the user-queue and CS paths; created in cmd_context_create,
> > +     * freed in cmd_context_destroy, reusable across multiple submits.
> > +     */
> > +    amdgpu_bo_handle ib_bo;
> > +    void *ib_cpu;
> > +    uint64_t ib_mc;
> > +    amdgpu_va_handle ib_va;
> > +    bool submit_pending;   /* a submit is in flight; wait before reuse/free */
> >  } cmd_context_t;
> >
> >  /**
> > @@ -89,15 +97,92 @@ void
> > amdgpu_command_submission_copy_linear_helper(amdgpu_device_handle
> > device,  void  amdgpu_command_ce_write_fence(amdgpu_device_handle dev,
> >                                         amdgpu_context_handle ctx);
> >
> > +/*
> > + * cmd_* command-submission API
> > + * ============================
> > + *
> > + * A small wrapper around raw amdgpu command submission that hides the
> > + * context / IB / bo_list / fence plumbing and lets a test issue
> > +DMA-style
> > + * operations (write, copy, const-fill, atomic) on an IP ring (SDMA,
> > +GFX or
> > + * Compute) by GPU virtual address.
> > + *
> > + * Lifecycle
> > + * ---------
> > + *   1. cmd_context_create()  - create a context bound to one IP ring. It
> > + *      allocates a reusable IB/PM4 buffer for the emitted packets.
> > + *   2. issue one or more operations (see the two API layers below).
> > + *   3. cmd_context_destroy()  - waits for any in-flight submission, then frees
> > + *      the IB and the context.
> > + *
> > + * Two API layers
> > + * --------------
> > + *   High-level convenience helpers build one packet and submit it in a single
> > + *   call:
> > + *       cmd_submit_write_linear(ctx, dst_va, size, data)
> > + *       cmd_submit_copy_linear (ctx, src_va, dst_va, size)
> > + *       cmd_submit_const_fill  (ctx, dst_va, size, data)
> > + *       cmd_submit_atomic      (ctx, dst_va, data)
> > + *
> > + *   Low-level path, for full control over cmd_packet_params_t (custom_data,
> > + *   fence/timestamp packets, etc.):
> > + *       cmd_place_packet(ctx, &params)          - build the PM4 stream
> > + *       cmd_submit_packet(ctx)                  - submit it
> > + *       cmd_place_and_submit_packet(ctx, &p)    - both of the above
> > + *
> > + * Semantics
> > + * ---------
> > + *   - Submission is asynchronous: cmd_submit_* returns after the CS is queued.
> > + *     The next submit on the same ctx, or cmd_context_destroy(), transparently
> > + *     waits for the previous one. Call cmd_wait_completion(ctx) to block
> > + *     explicitly (e.g. before reading back the destination).
> > + *   - Operands are plain GPU virtual addresses, not BOs. For every BO-backed
> > + *     address you pass (source, destination, fence/timestamp target, ...) call
> > + *     cmd_context_add_resource(ctx, bo) to add the owning BO to the residency
> > + *     set. The residency set is per-submit: it is cleared automatically once
> > + *     the packet has been captured for submission, so you must (re-)register
> > + *     every required BO immediately before each submit.
> > + *   - One call emits exactly one hardware packet and does NOT chunk. A transfer
> > + *     larger than the per-packet maximum (see amdgpu_dma_limits_query) will be
> > + *     rejected; the caller must split it. Return values are 0 on success or a
> > + *     negative errno (e.g. -ENOTSUP if the IP lacks the requested op).
> > + *
> > + * Example: fill then copy 4 KiB over the SDMA ring
> > + * ------------------------------------------------
> > + *   cmd_context_t *ctx;
> > + *   int r;
> > + *
> > + *   ctx = cmd_context_create(device, AMD_IP_DMA, 0, false);
> > + *   if (!ctx)
> > + *           return -ENODEV;
> > + *
> > + *   // Residency is per-submit, so register before every submit.
> > + *   cmd_context_add_resource(ctx, dst_bo);  // owns dst_va
> > + *   r = cmd_submit_const_fill(ctx, dst_va, 4096, 0xdeadbeef);
> > + *   if (!r) {
> > + *           cmd_context_add_resource(ctx, dst_bo);    // owns dst_va
> > + *           cmd_context_add_resource(ctx, dst2_bo);   // owns dst2_va
> > + *           r = cmd_submit_copy_linear(ctx, dst_va, dst2_va, 4096);
> > + *   }
> > + *
> > + *   cmd_wait_completion(ctx);   // ensure the copy has landed
> > + *   cmd_context_destroy(ctx);   // (would also wait) release resources
> > + *   return r;
> > + */
> >  cmd_context_t* cmd_context_create(amdgpu_device_handle device,
> >                                      enum amd_ip_block_type ip_type,
> >                                      uint32_t ring_id,
> > -                                    bool user_queue,
> > -                                    uint32_t write_length,
> > -                                    amdgpu_bo_handle external_bo,
> > -                                    uint64_t external_bo_mc,
> > -                                    volatile uint32_t *external_bo_cpu);
> > -void cmd_context_destroy(cmd_context_t *ctx, bool destroy_external_bo);
> > +                                    bool user_queue); void
> > +cmd_context_destroy(cmd_context_t *ctx);
> > +
> > +/*
> > + * Register a buffer object in the context's bo_list residency set so
> > +it is
> > + * resident when the next submission executes. See the cmd_* API
> > +overview above
> > + * cmd_context_create() for how this fits into the submission flow.
> > + *
> > + * Returns 0 on success, -EINVAL on bad arguments,
> > + * or -ENOSPC when the residency set (resources[]) is full.
> > + */
> > +int cmd_context_add_resource(cmd_context_t *ctx, amdgpu_bo_handle bo);
> >
> >  int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params);
> >
> > diff --git a/tests/amdgpu/amd_dmabuf_unload.c
> > b/tests/amdgpu/amd_dmabuf_unload.c
> > index 05ca3cf2c..0e43de0e6 100644
> > --- a/tests/amdgpu/amd_dmabuf_unload.c
> > +++ b/tests/amdgpu/amd_dmabuf_unload.c
> > @@ -121,9 +121,7 @@ static void test_fence_outlives_module(int vgem, int
> > amd_fd,
> >       igt_assert_eq(r, 0);
> >
> >       /* Create SDMA command context */
> > -     cmd_ctx = cmd_context_create(dev, AMD_IP_DMA, 0, false,
> > -                                  copy_size, src_bo, src_mc,
> > -                                  (volatile uint32_t *)src_cpu);
> > +     cmd_ctx = cmd_context_create(dev, AMD_IP_DMA, 0, false);
> >       igt_assert(cmd_ctx != NULL);
> >
> >       /*
> > @@ -138,17 +136,14 @@ static void test_fence_outlives_module(int vgem, int
> > amd_fd,
> >                            AMDGPU_VA_OP_MAP);
> >       igt_assert_eq(r, 0);
> >
> > -     /* Set up bo_list: IB (src), dst, imported VGEM BO */
> > -     cmd_ctx->ring_ctx->bo2 = dst_bo;
> > -     cmd_ctx->ring_ctx->bo_mc2 = dst_mc;
> > -     cmd_ctx->ring_ctx->resources[1] = dst_bo;
> > -     cmd_ctx->ring_ctx->resources[2] = import.buf_handle;
> > -     cmd_ctx->ring_ctx->res_cnt = 3;
> > -
> >       igt_info("Submitting %d x %llu-byte SDMA copies (no wait)...\n",
> >                NUM_SDMA_COPIES, (unsigned long long)copy_size);
> >
> >       for (i = 0; i < NUM_SDMA_COPIES; i++) {
> > +             igt_assert_eq(cmd_context_add_resource(cmd_ctx, src_bo), 0);
> > +             igt_assert_eq(cmd_context_add_resource(cmd_ctx, dst_bo), 0);
> > +             igt_assert_eq(cmd_context_add_resource(cmd_ctx,
> > import.buf_handle),
> > +0);
> > +
> >               r = cmd_submit_copy_linear(cmd_ctx,
> >                                          src_mc, dst_mc,
> >                                          (uint32_t)copy_size);
> > diff --git a/tests/amdgpu/amd_kfd_dmabuf_unload.c
> > b/tests/amdgpu/amd_kfd_dmabuf_unload.c
> > index 24260b560..28caf8982 100644
> > --- a/tests/amdgpu/amd_kfd_dmabuf_unload.c
> > +++ b/tests/amdgpu/amd_kfd_dmabuf_unload.c
> > @@ -309,23 +309,18 @@ static void test_kfd_fence_outlives_module(int vgem, int
> > amd_fd,
> >       igt_assert_eq(r, 0);
> >
> >       /* Create SDMA command context */
> > -     cmd_ctx = cmd_context_create(dev, AMD_IP_DMA, 0, false,
> > -                                  copy_size, src_bo, src_mc,
> > -                                  (volatile uint32_t *)src_cpu);
> > +     cmd_ctx = cmd_context_create(dev, AMD_IP_DMA, 0, false);
> >       igt_assert(cmd_ctx != NULL);
> >
> > -     /* Set up bo_list: IB (src), dst, imported VGEM BO */
> > -     cmd_ctx->ring_ctx->bo2 = dst_bo;
> > -     cmd_ctx->ring_ctx->bo_mc2 = dst_mc;
> > -     cmd_ctx->ring_ctx->resources[1] = dst_bo;
> > -     cmd_ctx->ring_ctx->resources[2] = import.buf_handle;
> > -     cmd_ctx->ring_ctx->res_cnt = 3;
> > -
> >       igt_info("Submitting %d SDMA copies "
> >                "(KFD amdgpu fences on dma_resv, no wait)...",
> >                NUM_SDMA_COPIES);
> >
> >       for (i = 0; i < NUM_SDMA_COPIES; i++) {
> > +             igt_assert_eq(cmd_context_add_resource(cmd_ctx, src_bo), 0);
> > +             igt_assert_eq(cmd_context_add_resource(cmd_ctx, dst_bo), 0);
> > +             igt_assert_eq(cmd_context_add_resource(cmd_ctx,
> > import.buf_handle),
> > +0);
> > +
> >               r = cmd_submit_copy_linear(cmd_ctx,
> >                                          src_mc, dst_mc,
> >                                          (uint32_t)copy_size);
> > diff --git a/tests/amdgpu/amd_mem.c b/tests/amdgpu/amd_mem.c index
> > 7c6855d3f..eef869b41 100644
> > --- a/tests/amdgpu/amd_mem.c
> > +++ b/tests/amdgpu/amd_mem.c
> only updates create/destroy signatures in three places,  only updates create/destroy signatures in three places, but two submit paths still omit residency registration:
> 
> test_cache_invalidate_on_sdma_write_asm (~line 855):
> 
> r = cmd_submit_write_linear(dma_ctx, vram_mc, sizeof(uint32_t), kPattern);
> Needs cmd_context_add_resource(dma_ctx, bo_vram) before submit. Without it, the CS bo_list may not include the destination BO → potential fault or undefined behavior.
> 
> submit_dma_write_operation (~lines 1961-1963) - broken after refactor:
> 
> r = cmd_submit_write_linear(ctx->dma_ctx,
>             ctx->dma_ctx->ring_ctx->bo_mc,  /* internal data BO - removed */
>             64, 0x12345678);
> 
>
Agreed. These two cases were missed. Fix coming in the next version.

Thanks,
Junhua

> Regards
> Jesse
> 
> > @@ -850,7 +850,7 @@ static void
> > test_cache_invalidate_on_sdma_write_asm(amdgpu_device_handle device,
> >
> >       /* 5. Issue SDMA write to buffer[0] while shader is polling */
> >       if (cmd_ring_available(device, AMD_IP_DMA, 0, false))
> > -             dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false, 64,
> > NULL, 0, NULL);
> > +             dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false);
> >       igt_assert(dma_ctx);
> >       r = cmd_submit_write_linear(dma_ctx, vram_mc, sizeof(uint32_t), kPattern);
> >       igt_assert_eq(r, 0);
> > @@ -875,7 +875,7 @@ static void
> > test_cache_invalidate_on_sdma_write_asm(amdgpu_device_handle device,
> >       igt_info("cache-invalidate-sdma-write: PASSED (dst[100]=0x%x)\n",
> > buf[dwLocation]);
> >
> >       /* Cleanup */
> > -     cmd_context_destroy(dma_ctx, false);
> > +     cmd_context_destroy(dma_ctx);
> >       amdgpu_bo_list_destroy(bo_list);
> >       amdgpu_bo_unmap_and_free(bo_cmd, va_cmd, mc_cmd, 4096);
> >       amdgpu_cs_ctx_free(compute_ctx);
> > @@ -1919,7 +1919,7 @@ static int init_dma_context(mm_bench_context_t *ctx,
> > amdgpu_device_handle device
> >       }
> >
> >       /* Create DMA context for ring 0 */
> > -     ctx->dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false, 128,
> > NULL, 0, NULL);
> > +     ctx->dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false);
> >       if (!ctx->dma_ctx) {
> >               igt_debug("Failed to create DMA context for ring 0\n");
> >               return -ENODEV;
> > @@ -1935,7 +1935,7 @@ static int init_dma_context(mm_bench_context_t *ctx,
> > amdgpu_device_handle device  static void
> > cleanup_dma_context(mm_bench_context_t *ctx)  {
> >       if (ctx->dma_ctx) {
> > -             cmd_context_destroy(ctx->dma_ctx, false);
> > +             cmd_context_destroy(ctx->dma_ctx);
> >               ctx->dma_ctx = NULL;
> >       }
> >  }
> > @@ -3164,10 +3164,11 @@ static void
> > test_signal_handling(amdgpu_device_handle device)
> >               /* Parent process - perform memory operations with signal handling
> > */
> >               igt_info("Parent process starting memory mapping operations...\n");
> >
> > -             /* FIX: Use cmd_context_create_ex with the same BO for both
> > internal buffer and target */
> > -             /* This ensures SDMA writes to the correct memory address */
> > -             dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false,
> > 128,
> > -                                  sys_bo, sys_mc_address, (volatile uint32_t
> > *)sys_cpu_ptr);
> > +             /*
> > +              * Create a DMA context; sys_bo is registered in its residency set
> > +              * immediately before the submit below (residency is per-submit).
> > +              */
> > +             dma_ctx = cmd_context_create(device, AMD_IP_DMA, 0, false);
> >               igt_assert_f(dma_ctx, "Failed to create DMA command submission
> > context");
> >
> >               /* Wait for child process to complete with proper signal handling */
> > @@ -3215,6 +3216,7 @@ static void test_signal_handling(amdgpu_device_handle
> > device)
> >               igt_info("Writing 0xdeadbeaf to address 0x%" PRIx64 "\n",
> > sys_mc_address);
> >
> >               /* Now SDMA should write to the correct address since we're using
> > the same BO */
> > +             igt_assert_eq(cmd_context_add_resource(dma_ctx, sys_bo), 0);
> >               r = cmd_submit_write_linear(dma_ctx, sys_mc_address,
> > sizeof(uint32_t), 0xdeadbeaf);
> >               igt_info("cmd_submit_write_linear returned: %d\n", r);
> >               igt_assert_eq(r, 0);
> > @@ -3244,8 +3246,8 @@ static void test_signal_handling(amdgpu_device_handle
> > device)
> >
> >               igt_info("Memory successfully updated to: 0x%08x\n", sys_mem[0]);
> >
> > -             /* Cleanup command context - don't destroy the external BO */
> > -             cmd_context_destroy(dma_ctx, false);
> > +             /* Cleanup command context; sys_bo is owned by the caller. */
> > +             cmd_context_destroy(dma_ctx);
> >               dma_ctx = NULL;
> >       }
> >
> > --
> > 2.34.1
> 

[PATCH i-g-t v1 3/4] lib/amdgpu: source packet operands from params and size the IB from pm4_size

[Junhua Shen]

- Size the legacy IB from pm4_size: the IB carries the PM4 command
  stream, so its byte size derives from pm4_size, not from write_length
  (the data transfer size). amdgpu_test_exec_cs_helper() now computes
  ib_size from pm4_size.
- WRITE_LINEAR/WRITE_ATOMIC/COPY_LINEAR take their operand GPU VAs
  (src/dst) from cmd_packet_params_t, so callers pass virtual addresses
  directly instead of relying on context-internal BOs.

Signed-off-by: Junhua Shen <Junhua.Shen@amd.com>
---
 lib/amdgpu/amd_command_submission.c | 31 ++++++++++++++++++++---------
 1 file changed, 22 insertions(+), 9 deletions(-)

diff --git a/lib/amdgpu/amd_command_submission.c b/lib/amdgpu/amd_command_submission.c
index 26f36256a..261ae096c 100644
--- a/lib/amdgpu/amd_command_submission.c
+++ b/lib/amdgpu/amd_command_submission.c
@@ -46,13 +46,15 @@ int amdgpu_test_exec_cs_helper(amdgpu_device_handle device, unsigned int ip_type
 	bool user_queue = ring_context->user_queue;
 	const struct amdgpu_ip_block_version *ip_block = NULL;
 	amdgpu_bo_handle *all_res;
+	uint64_t ib_size;
 
 	ip_block = get_ip_block(device, ip_type);
 	all_res = alloca(sizeof(ring_context->resources[0]) * (ring_context->res_cnt + 1));
+	ib_size = (uint64_t)ring_context->pm4_size * sizeof(*ring_context->pm4);
 
 	if (expect_failure) {
 		/* allocate IB */
-		r = amdgpu_bo_alloc_and_map_sync(device, ring_context->write_length, 4096,
+		r = amdgpu_bo_alloc_and_map_sync(device, ib_size, 4096,
 						 AMDGPU_GEM_DOMAIN_GTT, 0, AMDGPU_VM_MTYPE_UC,
 						 &ib_result_handle, &ib_result_cpu,
 						 &ib_result_mc_address, &va_handle,
@@ -62,7 +64,7 @@ int amdgpu_test_exec_cs_helper(amdgpu_device_handle device, unsigned int ip_type
 		/* prepare CS */
 		igt_assert(ring_context->pm4_dw <= 1024);
 		/* allocate IB */
-		r = amdgpu_bo_alloc_and_map_sync(device, ring_context->write_length, 4096,
+		r = amdgpu_bo_alloc_and_map_sync(device, ib_size, 4096,
 						 AMDGPU_GEM_DOMAIN_GTT, 0, AMDGPU_VM_MTYPE_UC,
 						 &ib_result_handle, &ib_result_cpu,
 						 &ib_result_mc_address, &va_handle,
@@ -1225,8 +1227,11 @@ int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params)
 		if (!ctx->ip_block->funcs->write_linear)
 			return -ENOTSUP;
 
-		/* TODO: allow user set the dst and data */
-		//ctx->ring_ctx->bo_mc = params->dst_addr;
+		/* Destination operand comes from the caller. */
+		if (params->dst_addr)
+			ctx->ring_ctx->bo_mc = params->dst_addr;
+		igt_assert_f(ctx->ring_ctx->bo_mc,
+			     "WRITE_LINEAR requires a destination address\n");
 		ctx->ring_ctx->write_length = params->size;
 
 		/* Build PM4 packet */
@@ -1239,8 +1244,11 @@ int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params)
 		if (!ctx->ip_block->funcs->write_linear_atomic)
 			return -ENOTSUP;
 
-		/* TODO: allow user set the dst and data */
-		//ctx->ring_ctx->bo_mc = params->dst_addr;
+		/* Destination operand comes from the caller. */
+		if (params->dst_addr)
+			ctx->ring_ctx->bo_mc = params->dst_addr;
+		igt_assert_f(ctx->ring_ctx->bo_mc,
+			     "WRITE_ATOMIC requires a destination address\n");
 		ctx->ring_ctx->write_length = 1; /* Atomic operations typically work on single DWORD */
 
 		result = ctx->ip_block->funcs->write_linear_atomic(ctx->ip_block->funcs,
@@ -1252,9 +1260,14 @@ int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params)
 	    if (!ctx->ip_block->funcs->copy_linear)
 		    return -ENOTSUP;
 
-	    /* For copy operations, we need both source and destination addresses */
-	    /* This would require extending the API to pass both addresses */
-	    /* For now, use the internal buffer as source */
+	    /* Copy takes both operands from the caller: bo_mc = source VA,
+	     * bo_mc2 = destination VA. */
+	    if (params->src_addr)
+		    ctx->ring_ctx->bo_mc = params->src_addr;
+	    if (params->dst_addr)
+		    ctx->ring_ctx->bo_mc2 = params->dst_addr;
+	    igt_assert_f(ctx->ring_ctx->bo_mc && ctx->ring_ctx->bo_mc2,
+			 "COPY_LINEAR requires source and destination addresses\n");
 	    ctx->ring_ctx->write_length = params->size;
 
 	    result = ctx->ip_block->funcs->copy_linear(ctx->ip_block->funcs,
-- 
2.34.1

[PATCH i-g-t v1 4/4] lib/amdgpu: add CONST_FILL packet type and pass caller fill value through

[Junhua Shen]

Add a CMD_PACKET_CONST_FILL packet type with a per-packet size guard, and
pass the caller-supplied fill value (write_data/write_data_valid) through
write_linear and const_fill in the IP block builders.

Signed-off-by: Junhua Shen <Junhua.Shen@amd.com>
---
 lib/amdgpu/amd_command_submission.c | 73 +++++++++++++++++++++++++++++
 lib/amdgpu/amd_command_submission.h |  3 ++
 lib/amdgpu/amd_ip_blocks.c          | 20 +++++---
 lib/amdgpu/amd_ip_blocks.h          |  2 +
 4 files changed, 92 insertions(+), 6 deletions(-)

diff --git a/lib/amdgpu/amd_command_submission.c b/lib/amdgpu/amd_command_submission.c
index 261ae096c..54e101882 100644
--- a/lib/amdgpu/amd_command_submission.c
+++ b/lib/amdgpu/amd_command_submission.c
@@ -1088,6 +1088,8 @@ static void cmd_reset_packet_operands(cmd_context_t *ctx)
 
 	rc->bo_mc = 0;
 	rc->bo_mc2 = 0;
+	rc->write_data = 0;
+	rc->write_data_valid = false;
 	rc->write_length = 0;
 
 	/* Drop the per-submit residency set. */
@@ -1211,6 +1213,38 @@ int cmd_submit_packet(cmd_context_t *ctx)
 	return 0;
 }
 
+static void cmd_assert_size_within_packet_limit(cmd_context_t *ctx, uint32_t size,
+					 const char *op)
+{
+	struct amdgpu_dma_limits limits;
+	uint64_t max_bytes;
+
+	amdgpu_dma_limits_query(ctx->device, &limits);
+	max_bytes = amdgpu_dma_max_bytes(&limits, (unsigned int)ctx->ip_type);
+
+	igt_assert_f(size <= max_bytes,
+		     "%s size %u exceeds single-packet max %llu bytes for this IP; split the transfer\n",
+		     op, size, (unsigned long long)max_bytes);
+}
+
+/*
+ * WRITE_LINEAR inlines the payload directly into the PM4 stream as
+ * write_length/4 dwords (plus a small packet header), so its real limit is the
+ * PM4 buffer capacity, not the DMA engine's per-packet transfer maximum. Reject
+ * transfers whose inlined form would overrun pm4[] before the builder writes it.
+ */
+static void cmd_assert_inline_payload_fits(cmd_context_t *ctx, uint32_t size,
+					   const char *op)
+{
+	/* Upper bound on the header across the SDMA/GFX write_linear encodings. */
+	const uint32_t header_dw = 8;
+	uint64_t need_dw = (uint64_t)header_dw + (size / 4);
+
+	igt_assert_f(need_dw <= ctx->ring_ctx->pm4_size,
+		     "%s size %u needs %llu dw, exceeds PM4 buffer (%u dw); split the transfer\n",
+		     op, size, (unsigned long long)need_dw, ctx->ring_ctx->pm4_size);
+}
+
 int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params)
 {
 	int result = -EINVAL;
@@ -1232,7 +1266,10 @@ int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params)
 			ctx->ring_ctx->bo_mc = params->dst_addr;
 		igt_assert_f(ctx->ring_ctx->bo_mc,
 			     "WRITE_LINEAR requires a destination address\n");
+		cmd_assert_inline_payload_fits(ctx, params->size, "WRITE_LINEAR");
 		ctx->ring_ctx->write_length = params->size;
+		ctx->ring_ctx->write_data = params->data;
+		ctx->ring_ctx->write_data_valid = true;
 
 		/* Build PM4 packet */
 		result = ctx->ip_block->funcs->write_linear(ctx->ip_block->funcs,
@@ -1268,6 +1305,7 @@ int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params)
 		    ctx->ring_ctx->bo_mc2 = params->dst_addr;
 	    igt_assert_f(ctx->ring_ctx->bo_mc && ctx->ring_ctx->bo_mc2,
 			 "COPY_LINEAR requires source and destination addresses\n");
+	    cmd_assert_size_within_packet_limit(ctx, params->size, "COPY_LINEAR");
 	    ctx->ring_ctx->write_length = params->size;
 
 	    result = ctx->ip_block->funcs->copy_linear(ctx->ip_block->funcs,
@@ -1275,6 +1313,26 @@ int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params)
 						      &ctx->ring_ctx->pm4_dw);
 	    return result;
 
+	case CMD_PACKET_CONST_FILL:
+		if (!ctx->ip_block->funcs->const_fill)
+			return -ENOTSUP;
+
+		/* Destination operand comes from the caller; params->data is the
+		 * fill pattern written to every DWORD of the range. */
+		if (params->dst_addr)
+			ctx->ring_ctx->bo_mc = params->dst_addr;
+		igt_assert_f(ctx->ring_ctx->bo_mc,
+			     "CONST_FILL requires a destination address\n");
+		cmd_assert_size_within_packet_limit(ctx, params->size, "CONST_FILL");
+		ctx->ring_ctx->write_length = params->size;
+		ctx->ring_ctx->write_data = params->data;
+		ctx->ring_ctx->write_data_valid = true;
+
+		result = ctx->ip_block->funcs->const_fill(ctx->ip_block->funcs,
+							  ctx->ring_ctx,
+							  &ctx->ring_ctx->pm4_dw);
+		return result;
+
 	case CMD_PACKET_COPY_ATOMIC:
 		/* TODO: Implement atomic copy if supported */
 		igt_info("cmd_place_packet: ATOMIC_COPY not implemented\n");
@@ -1340,6 +1398,21 @@ int cmd_submit_copy_linear(cmd_context_t *ctx, uint64_t src_addr, uint64_t dst_a
 	return cmd_place_and_submit_packet(ctx, &params);
 }
 
+/**
+ * Convenience function for constant fill
+ */
+int cmd_submit_const_fill(cmd_context_t *ctx, uint64_t dst_addr, uint32_t size, uint32_t data)
+{
+	cmd_packet_params_t params = {
+		.type = CMD_PACKET_CONST_FILL,
+		.dst_addr = dst_addr,
+		.size = size,
+		.data = data,
+	};
+
+	return cmd_place_and_submit_packet(ctx, &params);
+}
+
 /**
  * Convenience function for atomic operation
  */
diff --git a/lib/amdgpu/amd_command_submission.h b/lib/amdgpu/amd_command_submission.h
index 8644f25ed..cf20ff457 100644
--- a/lib/amdgpu/amd_command_submission.h
+++ b/lib/amdgpu/amd_command_submission.h
@@ -36,6 +36,7 @@ typedef enum {
     CMD_PACKET_WRITE_ATOMIC,
     CMD_PACKET_COPY_LINEAR,
     CMD_PACKET_COPY_ATOMIC,
+    CMD_PACKET_CONST_FILL,
     CMD_PACKET_FENCE,
     CMD_PACKET_TIMESTAMP,
 } cmd_packet_type_t;
@@ -196,6 +197,8 @@ int cmd_submit_write_linear(cmd_context_t *ctx, uint64_t dst_addr, uint32_t size
 
 int cmd_submit_copy_linear(cmd_context_t *ctx, uint64_t src_addr, uint64_t dst_addr, uint32_t size);
 
+int cmd_submit_const_fill(cmd_context_t *ctx, uint64_t dst_addr, uint32_t size, uint32_t data);
+
 int cmd_submit_atomic(cmd_context_t *ctx, uint64_t dst_addr, uint32_t data);
 
 bool cmd_ring_available(amdgpu_device_handle device,
diff --git a/lib/amdgpu/amd_ip_blocks.c b/lib/amdgpu/amd_ip_blocks.c
index b56fb68b8..8da468988 100644
--- a/lib/amdgpu/amd_ip_blocks.c
+++ b/lib/amdgpu/amd_ip_blocks.c
@@ -32,6 +32,8 @@ sdma_ring_write_linear(const struct amdgpu_ip_funcs *func,
 		       uint32_t *pm4_dw)
 {
 	uint32_t i, j;
+	uint32_t fill = ring_context->write_data_valid ?
+			ring_context->write_data : func->deadbeaf;
 
 	i = 0;
 	j = 0;
@@ -56,7 +58,7 @@ sdma_ring_write_linear(const struct amdgpu_ip_funcs *func,
 		ring_context->pm4[i++] = ring_context->write_length / 4;
 
 	while (j++ < ring_context->write_length / 4)
-		ring_context->pm4[i++] = func->deadbeaf;
+		ring_context->pm4[i++] = fill;
 
 	*pm4_dw = i;
 
@@ -156,20 +158,22 @@ sdma_ring_const_fill(const struct amdgpu_ip_funcs *func,
 		     uint32_t *pm4_dw)
 {
 	uint32_t i;
+	uint32_t fill = context->write_data_valid ?
+			context->write_data : func->deadbeaf;
 
 	i = 0;
 	if (func->family_id == AMDGPU_FAMILY_SI) {
 		context->pm4[i++] = SDMA_PACKET_SI(SDMA_OPCODE_CONSTANT_FILL_SI,
 						   0, 0, 0, context->write_length / 4);
 		context->pm4[i++] = lower_32_bits(context->bo_mc);
-		context->pm4[i++] = 0xdeadbeaf;
+		context->pm4[i++] = fill;
 		context->pm4[i++] = upper_32_bits(context->bo_mc) >> 16;
 	} else {
 		context->pm4[i++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0,
 						SDMA_CONSTANT_FILL_EXTRA_SIZE(2));
 		context->pm4[i++] = lower_32_bits(context->bo_mc);
 		context->pm4[i++] = upper_32_bits(context->bo_mc);
-		context->pm4[i++] = func->deadbeaf;
+		context->pm4[i++] = fill;
 
 		if (func->family_id >= AMDGPU_FAMILY_AI)
 			context->pm4[i++] = context->write_length - 1;
@@ -239,6 +243,8 @@ gfx_ring_write_linear(const struct amdgpu_ip_funcs *func,
 		      uint32_t *pm4_dw)
 {
 	uint32_t i, j;
+	uint32_t fill = ring_context->write_data_valid ?
+			ring_context->write_data : func->deadbeaf;
 
 	i = 0;
 	j = 0;
@@ -258,7 +264,7 @@ gfx_ring_write_linear(const struct amdgpu_ip_funcs *func,
 	ring_context->pm4[i++] = lower_32_bits(ring_context->bo_mc);
 	ring_context->pm4[i++] = upper_32_bits(ring_context->bo_mc);
 	while (j++ < ring_context->write_length / 4)
-		ring_context->pm4[i++] = func->deadbeaf;
+		ring_context->pm4[i++] = fill;
 
 	*pm4_dw = i;
 	if (ring_context->pm4_size > 0)
@@ -357,11 +363,13 @@ gfx_ring_const_fill(const struct amdgpu_ip_funcs *func,
 		     uint32_t *pm4_dw)
 {
 	uint32_t i;
+	uint32_t fill = ring_context->write_data_valid ?
+			ring_context->write_data : func->deadbeaf;
 
 	i = 0;
 	if (func->family_id == AMDGPU_FAMILY_SI) {
 		ring_context->pm4[i++] = PACKET3(PACKET3_DMA_DATA_SI, 4);
-		ring_context->pm4[i++] = func->deadbeaf;
+		ring_context->pm4[i++] = fill;
 		ring_context->pm4[i++] = PACKET3_DMA_DATA_SI_ENGINE(0) |
 					 PACKET3_DMA_DATA_SI_DST_SEL(0) |
 					 PACKET3_DMA_DATA_SI_SRC_SEL(2) |
@@ -375,7 +383,7 @@ gfx_ring_const_fill(const struct amdgpu_ip_funcs *func,
 					 PACKET3_DMA_DATA_DST_SEL(0) |
 					 PACKET3_DMA_DATA_SRC_SEL(2) |
 					 PACKET3_DMA_DATA_CP_SYNC;
-		ring_context->pm4[i++] = func->deadbeaf;
+		ring_context->pm4[i++] = fill;
 		ring_context->pm4[i++] = 0;
 		ring_context->pm4[i++] = lower_32_bits(ring_context->bo_mc);
 		ring_context->pm4[i++] = upper_32_bits(ring_context->bo_mc);
diff --git a/lib/amdgpu/amd_ip_blocks.h b/lib/amdgpu/amd_ip_blocks.h
index 37f38ed44..19d698e91 100644
--- a/lib/amdgpu/amd_ip_blocks.h
+++ b/lib/amdgpu/amd_ip_blocks.h
@@ -307,6 +307,8 @@ struct amdgpu_ring_context {
 	 */
 	uint64_t write_length;
 	uint64_t write_length2; /* IN: transfer size in bytes, second packet */
+	uint32_t write_data;    /* IN: payload for write_linear/const_fill */
+	bool write_data_valid;  /* IN: use write_data; else IP deadbeaf pattern */
 	uint32_t *pm4;		/* INTERNAL: packet buffer (submitter-owned, builder fills) */
 	uint32_t pm4_size;	/* IN: capacity of pm4[] in dwords (required, non-zero) */
 	bool secure;		/* IN: secure or not */
-- 
2.34.1

✓ Xe.CI.BAT: success for lib/amdgpu: refactor cmd_context ownership and packet operands

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1614 bytes --]

== Series Details ==

Series: lib/amdgpu: refactor cmd_context ownership and packet operands
URL   : https://patchwork.freedesktop.org/series/172656/
State : success

== Summary ==

CI Bug Log - changes from XEIGT_9071_BAT -> XEIGTPW_15723_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in XEIGTPW_15723_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - bat-nvls-1:         [DMESG-WARN][1] ([Intel XE#8762]) -> [PASS][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/bat-nvls-1/igt@core_hotunplug@unbind-rebind.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/bat-nvls-1/igt@core_hotunplug@unbind-rebind.html

  
  [Intel XE#8762]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8762


Build changes
-------------

  * IGT: IGT_9071 -> IGTPW_15723
  * Linux: xe-5640-b830d7b865d1dcc0c199feef72cbe7bf7b208762 -> xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad

  IGTPW_15723: 5e22efdff822b9c4f96b2bc5f3237e0931dff9b4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_9071: 9071
  xe-5640-b830d7b865d1dcc0c199feef72cbe7bf7b208762: b830d7b865d1dcc0c199feef72cbe7bf7b208762
  xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad: 15e2ba2fb6d25c03d89519aec46f8d5be3e118ad

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/index.html

[-- Attachment #2: Type: text/html, Size: 2190 bytes --]

✓ i915.CI.BAT: success for lib/amdgpu: refactor cmd_context ownership and packet operands

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2563 bytes --]

== Series Details ==

Series: lib/amdgpu: refactor cmd_context ownership and packet operands
URL   : https://patchwork.freedesktop.org/series/172656/
State : success

== Summary ==

CI Bug Log - changes from IGT_9071 -> IGTPW_15723
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/index.html

Participating hosts (40 -> 38)
------------------------------

  Missing    (2): bat-dg2-13 fi-snb-2520m 

Known issues
------------

  Here are the changes found in IGTPW_15723 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live@sanitycheck:
    - fi-kbl-7567u:       [PASS][1] -> [DMESG-WARN][2] ([i915#13735]) +79 other tests dmesg-warn
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9071/fi-kbl-7567u/igt@i915_selftest@live@sanitycheck.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/fi-kbl-7567u/igt@i915_selftest@live@sanitycheck.html

  * igt@kms_busy@basic@flip:
    - fi-kbl-7567u:       [PASS][3] -> [DMESG-WARN][4] ([i915#13735] / [i915#180])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9071/fi-kbl-7567u/igt@kms_busy@basic@flip.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/fi-kbl-7567u/igt@kms_busy@basic@flip.html

  * igt@kms_pm_rpm@basic-pci-d3-state:
    - fi-kbl-7567u:       [PASS][5] -> [DMESG-WARN][6] ([i915#13735] / [i915#15673] / [i915#180]) +52 other tests dmesg-warn
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9071/fi-kbl-7567u/igt@kms_pm_rpm@basic-pci-d3-state.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/fi-kbl-7567u/igt@kms_pm_rpm@basic-pci-d3-state.html

  
  [i915#13735]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13735
  [i915#15673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15673
  [i915#180]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_9071 -> IGTPW_15723
  * Linux: CI_DRM_19039 -> CI_DRM_19041

  CI-20190529: 20190529
  CI_DRM_19039: b830d7b865d1dcc0c199feef72cbe7bf7b208762 @ git://anongit.freedesktop.org/gfx-ci/linux
  CI_DRM_19041: 15e2ba2fb6d25c03d89519aec46f8d5be3e118ad @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_15723: 5e22efdff822b9c4f96b2bc5f3237e0931dff9b4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_9071: 9071

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/index.html

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✓ Xe.CI.FULL: success for lib/amdgpu: refactor cmd_context ownership and packet operands

[Patchwork]

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== Series Details ==

Series: lib/amdgpu: refactor cmd_context ownership and packet operands
URL   : https://patchwork.freedesktop.org/series/172656/
State : success

== Summary ==

CI Bug Log - changes from XEIGT_9071_FULL -> XEIGTPW_15723_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in XEIGTPW_15723_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@core_hotunplug@unbind-rebind:
    - shard-bmg:          [PASS][1] -> [ABORT][2] ([Intel XE#8007])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/shard-bmg-3/igt@core_hotunplug@unbind-rebind.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-8/igt@core_hotunplug@unbind-rebind.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#2327]) +2 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-10/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#7059] / [Intel XE#7085]) +1 other test skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-6/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#610] / [Intel XE#7387]) +1 other test skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-1/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#1124]) +6 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-10/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180.html

  * igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#7679]) +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-5/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html

  * igt@kms_bw@linear-tiling-1-displays-target-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#367]) +4 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-5/igt@kms_bw@linear-tiling-1-displays-target-2560x1440p.html

  * igt@kms_ccs@bad-aux-stride-yf-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2887]) +12 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-5/igt@kms_ccs@bad-aux-stride-yf-tiled-ccs.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2652]) +17 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-3/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#3432]) +2 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2724] / [Intel XE#7449])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-10/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_chamelium_color@ctm-negative:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2325] / [Intel XE#7358]) +2 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-9/igt@kms_chamelium_color@ctm-negative.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d-ctm3x4-lut1d:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#7358])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-2/igt@kms_chamelium_color_pipeline@plane-lut1d-ctm3x4-lut1d.html

  * igt@kms_chamelium_hpd@dp-hpd-after-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2252]) +8 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-6/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html

  * igt@kms_content_protection@lic-type-0@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][16] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-4/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html

  * igt@kms_content_protection@type1:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#7642])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-10/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@cursor-offscreen-128x42:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2320]) +5 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-1/igt@kms_cursor_crc@cursor-offscreen-128x42.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2321] / [Intel XE#7355]) +2 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-2/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_legacy@cursor-vs-flip-varying-size:
    - shard-bmg:          [PASS][20] -> [INCOMPLETE][21] ([Intel XE#6819] / [Intel XE#8151])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/shard-bmg-9/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-3/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2286] / [Intel XE#6035])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dsc@dsc-basic-bigjoiner:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#8265]) +4 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-9/igt@kms_dsc@dsc-basic-bigjoiner.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#4422] / [Intel XE#7442])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-3/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2375])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-4/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_feature_discovery@dsc:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#8586])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-2/igt@kms_feature_discovery@dsc.html

  * igt@kms_flip@2x-wf_vblank-ts-check:
    - shard-bmg:          [PASS][27] -> [FAIL][28] ([Intel XE#3098]) +1 other test fail
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/shard-bmg-8/igt@kms_flip@2x-wf_vblank-ts-check.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-3/igt@kms_flip@2x-wf_vblank-ts-check.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#7178] / [Intel XE#7349]) +1 other test skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#7178] / [Intel XE#7351]) +2 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-10/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#7179])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-4/igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#4141]) +17 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-shrfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#2311]) +65 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#7061]) +6 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-2/igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2352] / [Intel XE#7399])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#2313]) +65 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#6901]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-2/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_pipe_stress@stress-xrgb8888-yftiled:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#6912] / [Intel XE#7375])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-5/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html

  * igt@kms_plane@pixel-format-4-tiled-modifier@pipe-b-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#8303]) +3 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-1/igt@kms_plane@pixel-format-4-tiled-modifier@pipe-b-plane-5.html

  * igt@kms_plane@pixel-format-y-tiled-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#7283]) +6 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-7/igt@kms_plane@pixel-format-y-tiled-modifier.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#5020] / [Intel XE#7348])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-10/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html

  * igt@kms_pm_dc@dc3co-vpb-framegap:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-10/igt@kms_pm_dc@dc3co-vpb-framegap.html

  * igt@kms_pm_dc@dc3co-vpb-framegap@psr2-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#8396]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-10/igt@kms_pm_dc@dc3co-vpb-framegap@psr2-xrgb8888.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-lnl:          [PASS][46] -> [FAIL][47] ([Intel XE#8399])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/shard-lnl-1/igt@kms_pm_dc@dc5-psr.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-lnl-4/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#2499])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-6/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#1489]) +8 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-4/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr@psr2-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#2234] / [Intel XE#2850]) +13 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-6/igt@kms_psr@psr2-primary-page-flip.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#7795]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-8/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_rotation_crc@bad-tiling:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#3904] / [Intel XE#7342])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-7/igt@kms_rotation_crc@bad-tiling.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#2330] / [Intel XE#5813])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-6/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_setmode@invalid-clone-exclusive-crtc:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#1435] / [Intel XE#8695])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-9/igt@kms_setmode@invalid-clone-exclusive-crtc.html

  * igt@kms_sharpness_filter@filter-basic:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#6503]) +1 other test skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-10/igt@kms_sharpness_filter@filter-basic.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          NOTRUN -> [FAIL][56] ([Intel XE#1729] / [Intel XE#7424])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#1499])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-4/igt@kms_vrr@flip-basic-fastset.html

  * igt@xe_create@multigpu-create-massive-size:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#2504] / [Intel XE#7319] / [Intel XE#7350])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-6/igt@xe_create@multigpu-create-massive-size.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][59] ([Intel XE#6321] / [Intel XE#8355])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-2/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_evict@evict-small-multi-queue-cm:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#8370]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-1/igt@xe_evict@evict-small-multi-queue-cm.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2322] / [Intel XE#7372]) +7 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-10/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue.html

  * igt@xe_exec_fault_mode@atomic-many:
    - shard-bmg:          [PASS][62] -> [FAIL][63] ([Intel XE#8578])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/shard-bmg-10/igt@xe_exec_fault_mode@atomic-many.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-5/igt@xe_exec_fault_mode@atomic-many.html

  * igt@xe_exec_fault_mode@many-multi-queue-rebind-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#8374]) +17 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-5/igt@xe_exec_fault_mode@many-multi-queue-rebind-prefetch.html

  * igt@xe_exec_multi_queue@max-queues-preempt-mode-basic-smem:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#8364]) +31 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-10/igt@xe_exec_multi_queue@max-queues-preempt-mode-basic-smem.html

  * igt@xe_exec_reset@multi-queue-cat-error:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#8369])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-2/igt@xe_exec_reset@multi-queue-cat-error.html

  * igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#8378]) +7 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-5/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr.html

  * igt@xe_gpgpu_fill@offset-4x4:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#7954])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-6/igt@xe_gpgpu_fill@offset-4x4.html

  * igt@xe_live_ktest@xe_eudebug:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#2833])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-4/igt@xe_live_ktest@xe_eudebug.html

  * igt@xe_multigpu_svm@mgpu-coherency-fail-basic:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#6964]) +2 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-5/igt@xe_multigpu_svm@mgpu-coherency-fail-basic.html

  * igt@xe_page_reclaim@binds-null-vma:
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#7793]) +2 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-9/igt@xe_page_reclaim@binds-null-vma.html

  * igt@xe_pat@xa-app-transient-media-off:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#7590])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-10/igt@xe_pat@xa-app-transient-media-off.html

  * igt@xe_peer2peer@read:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-4/igt@xe_peer2peer@read.html

  * igt@xe_pm@s2idle-d3cold-basic-exec:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#2284] / [Intel XE#7370]) +1 other test skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-4/igt@xe_pm@s2idle-d3cold-basic-exec.html

  * igt@xe_pxp@pxp-stale-queue-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][75] ([Intel XE#4733] / [Intel XE#7417]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-4/igt@xe_pxp@pxp-stale-queue-post-suspend.html

  * igt@xe_query@multigpu-query-invalid-extension:
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#944]) +3 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-10/igt@xe_query@multigpu-query-invalid-extension.html

  * igt@xe_sriov_flr@flr-twice:
    - shard-bmg:          NOTRUN -> [FAIL][77] ([Intel XE#6569])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-2/igt@xe_sriov_flr@flr-twice.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unplug-rescan:
    - shard-bmg:          [ABORT][78] ([Intel XE#8007]) -> [PASS][79] +2 other tests pass
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/shard-bmg-1/igt@core_hotunplug@unplug-rescan.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-9/igt@core_hotunplug@unplug-rescan.html

  * igt@kms_atomic_transition@plane-all-transition-fencing:
    - shard-bmg:          [INCOMPLETE][80] ([Intel XE#1727] / [Intel XE#6819] / [Intel XE#8174]) -> [PASS][81]
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/shard-bmg-3/igt@kms_atomic_transition@plane-all-transition-fencing.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-6/igt@kms_atomic_transition@plane-all-transition-fencing.html

  * igt@kms_atomic_transition@plane-all-transition-fencing@pipe-a-hdmi-a-3:
    - shard-bmg:          [DMESG-FAIL][82] ([Intel XE#1727] / [Intel XE#6819]) -> [PASS][83]
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/shard-bmg-3/igt@kms_atomic_transition@plane-all-transition-fencing@pipe-a-hdmi-a-3.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-6/igt@kms_atomic_transition@plane-all-transition-fencing@pipe-a-hdmi-a-3.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
    - shard-lnl:          [FAIL][84] ([Intel XE#1231]) -> [PASS][85]
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/shard-lnl-5/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-lnl-4/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-bmg:          [INCOMPLETE][86] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][87] +1 other test pass
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_cursor_edge_walk@256x256-top-edge@pipe-d-dp-2:
    - shard-bmg:          [FAIL][88] -> [PASS][89] +2 other tests pass
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/shard-bmg-5/igt@kms_cursor_edge_walk@256x256-top-edge@pipe-d-dp-2.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-1/igt@kms_cursor_edge_walk@256x256-top-edge@pipe-d-dp-2.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [FAIL][90] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][91] +1 other test pass
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-bmg:          [SKIP][92] ([Intel XE#7308]) -> [PASS][93]
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/shard-bmg-8/igt@kms_hdmi_inject@inject-audio.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-8/igt@kms_hdmi_inject@inject-audio.html

  
#### Warnings ####

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][94] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][95] ([Intel XE#3544])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9071/shard-bmg-2/igt@kms_hdr@brightness-with-hdr.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/shard-bmg-10/igt@kms_hdr@brightness-with-hdr.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1231]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1231
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
  [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
  [Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
  [Intel XE#2504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2504
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
  [Intel XE#6819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6819
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#6912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6912
  [Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7308
  [Intel XE#7319]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7319
  [Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
  [Intel XE#7350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7350
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7375
  [Intel XE#7387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7387
  [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
  [Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7795]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7795
  [Intel XE#7954]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7954
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
  [Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
  [Intel XE#8151]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8151
  [Intel XE#8174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8174
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8399
  [Intel XE#8578]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8578
  [Intel XE#8586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8586
  [Intel XE#8695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8695
  [Intel XE#8815]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8815
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * IGT: IGT_9071 -> IGTPW_15723
  * Linux: xe-5640-b830d7b865d1dcc0c199feef72cbe7bf7b208762 -> xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad

  IGTPW_15723: 5e22efdff822b9c4f96b2bc5f3237e0931dff9b4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_9071: 9071
  xe-5640-b830d7b865d1dcc0c199feef72cbe7bf7b208762: b830d7b865d1dcc0c199feef72cbe7bf7b208762
  xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad: 15e2ba2fb6d25c03d89519aec46f8d5be3e118ad

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15723/index.html

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✗ i915.CI.Full: failure for lib/amdgpu: refactor cmd_context ownership and packet operands

[Patchwork]

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== Series Details ==

Series: lib/amdgpu: refactor cmd_context ownership and packet operands
URL   : https://patchwork.freedesktop.org/series/172656/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_19041_full -> IGTPW_15723_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_15723_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_15723_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/index.html

Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_15723_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_cursor_edge_walk@256x256-left-edge@pipe-d-hdmi-a-4:
    - shard-dg1:          [PASS][1] -> [ABORT][2] +1 other test abort
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg1-19/igt@kms_cursor_edge_walk@256x256-left-edge@pipe-d-hdmi-a-4.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-16/igt@kms_cursor_edge_walk@256x256-left-edge@pipe-d-hdmi-a-4.html

  
#### Warnings ####

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-1:
    - shard-tglu:         [ABORT][3] ([i915#16837] / [i915#16844]) -> [ABORT][4] +1 other test abort
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-tglu-9/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-1.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-3/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-1.html

  
Known issues
------------

  Here are the changes found in IGTPW_15723_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@device_reset@cold-reset-bound:
    - shard-tglu:         NOTRUN -> [SKIP][5] ([i915#11078])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-8/igt@device_reset@cold-reset-bound.html

  * igt@gem_basic@multigpu-create-close:
    - shard-rkl:          NOTRUN -> [SKIP][6] ([i915#7697])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-5/igt@gem_basic@multigpu-create-close.html
    - shard-dg1:          NOTRUN -> [SKIP][7] ([i915#7697])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-18/igt@gem_basic@multigpu-create-close.html
    - shard-tglu:         NOTRUN -> [SKIP][8] ([i915#7697])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-6/igt@gem_basic@multigpu-create-close.html
    - shard-mtlp:         NOTRUN -> [SKIP][9] ([i915#7697])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-6/igt@gem_basic@multigpu-create-close.html
    - shard-dg2:          NOTRUN -> [SKIP][10] ([i915#7697])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-7/igt@gem_basic@multigpu-create-close.html

  * igt@gem_ccs@block-copy-compressed:
    - shard-rkl:          NOTRUN -> [SKIP][11] ([i915#14544] / [i915#3555] / [i915#9323])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@gem_ccs@block-copy-compressed.html
    - shard-dg1:          NOTRUN -> [SKIP][12] ([i915#3555] / [i915#9323])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-12/igt@gem_ccs@block-copy-compressed.html
    - shard-tglu:         NOTRUN -> [SKIP][13] ([i915#3555] / [i915#9323])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-6/igt@gem_ccs@block-copy-compressed.html
    - shard-mtlp:         NOTRUN -> [SKIP][14] ([i915#3555] / [i915#9323])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-7/igt@gem_ccs@block-copy-compressed.html

  * igt@gem_ccs@block-multicopy-inplace:
    - shard-rkl:          NOTRUN -> [SKIP][15] ([i915#3555] / [i915#9323])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-2/igt@gem_ccs@block-multicopy-inplace.html

  * igt@gem_create@create-ext-set-pat:
    - shard-tglu:         NOTRUN -> [SKIP][16] ([i915#8562])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-10/igt@gem_create@create-ext-set-pat.html

  * igt@gem_ctx_persistence@hang:
    - shard-mtlp:         NOTRUN -> [SKIP][17] ([i915#8555])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-7/igt@gem_ctx_persistence@hang.html
    - shard-dg2:          NOTRUN -> [SKIP][18] ([i915#8555])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-1/igt@gem_ctx_persistence@hang.html
    - shard-snb:          NOTRUN -> [SKIP][19] ([i915#1099])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-snb7/igt@gem_ctx_persistence@hang.html

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt:
    - shard-dg2:          NOTRUN -> [SKIP][20] ([i915#5882]) +7 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-6/igt@gem_ctx_persistence@saturated-hostile-nopreempt.html

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs1:
    - shard-mtlp:         NOTRUN -> [SKIP][21] ([i915#5882]) +6 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-5/igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs1.html

  * igt@gem_eio@hibernate:
    - shard-tglu:         NOTRUN -> [FAIL][22] ([i915#16594])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-9/igt@gem_eio@hibernate.html
    - shard-mtlp:         [PASS][23] -> [FAIL][24] ([i915#16594])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-mtlp-2/igt@gem_eio@hibernate.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-1/igt@gem_eio@hibernate.html

  * igt@gem_eio@kms:
    - shard-rkl:          NOTRUN -> [ABORT][25] ([i915#13363] / [i915#16837])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@gem_eio@kms.html
    - shard-tglu-1:       NOTRUN -> [ABORT][26] ([i915#13363] / [i915#16837])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@gem_eio@kms.html
    - shard-dg1:          NOTRUN -> [ABORT][27] ([i915#16837])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-16/igt@gem_eio@kms.html

  * igt@gem_exec_balancer@bonded-true-hang:
    - shard-dg2:          NOTRUN -> [SKIP][28] ([i915#4812])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-1/igt@gem_exec_balancer@bonded-true-hang.html

  * igt@gem_exec_balancer@parallel-contexts:
    - shard-rkl:          NOTRUN -> [SKIP][29] ([i915#4525]) +1 other test skip
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-7/igt@gem_exec_balancer@parallel-contexts.html
    - shard-tglu:         NOTRUN -> [SKIP][30] ([i915#4525]) +1 other test skip
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-3/igt@gem_exec_balancer@parallel-contexts.html

  * igt@gem_exec_big@single:
    - shard-tglu:         NOTRUN -> [FAIL][31] ([i915#15816])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-9/igt@gem_exec_big@single.html

  * igt@gem_exec_capture@capture-invisible:
    - shard-glk10:        NOTRUN -> [SKIP][32] ([i915#6334]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk10/igt@gem_exec_capture@capture-invisible.html

  * igt@gem_exec_capture@capture@vecs0-lmem0:
    - shard-dg2:          NOTRUN -> [FAIL][33] ([i915#11965]) +4 other tests fail
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-1/igt@gem_exec_capture@capture@vecs0-lmem0.html

  * igt@gem_exec_flush@basic-uc-pro-default:
    - shard-dg2:          NOTRUN -> [SKIP][34] ([i915#3539] / [i915#4852])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-4/igt@gem_exec_flush@basic-uc-pro-default.html

  * igt@gem_exec_flush@basic-wb-set-default:
    - shard-dg1:          NOTRUN -> [SKIP][35] ([i915#3539] / [i915#4852])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-17/igt@gem_exec_flush@basic-wb-set-default.html

  * igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
    - shard-rkl:          NOTRUN -> [SKIP][36] ([i915#3281]) +8 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html

  * igt@gem_exec_reloc@basic-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][37] ([i915#14544] / [i915#3281]) +1 other test skip
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@gem_exec_reloc@basic-gtt.html

  * igt@gem_exec_reloc@basic-gtt-read:
    - shard-dg2:          NOTRUN -> [SKIP][38] ([i915#3281]) +4 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-4/igt@gem_exec_reloc@basic-gtt-read.html
    - shard-dg1:          NOTRUN -> [SKIP][39] ([i915#3281]) +3 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-14/igt@gem_exec_reloc@basic-gtt-read.html
    - shard-mtlp:         NOTRUN -> [SKIP][40] ([i915#3281]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-1/igt@gem_exec_reloc@basic-gtt-read.html

  * igt@gem_linear_blits@interruptible:
    - shard-dg1:          [PASS][41] -> [FAIL][42] ([i915#15391])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg1-12/igt@gem_linear_blits@interruptible.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-14/igt@gem_linear_blits@interruptible.html

  * igt@gem_lmem_swapping@basic:
    - shard-tglu-1:       NOTRUN -> [SKIP][43] ([i915#4613])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@gem_lmem_swapping@basic.html

  * igt@gem_lmem_swapping@heavy-verify-multi-ccs:
    - shard-glk:          NOTRUN -> [SKIP][44] ([i915#4613]) +5 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk2/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html

  * igt@gem_lmem_swapping@parallel-random-verify-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][45] ([i915#4613])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
    - shard-tglu:         NOTRUN -> [SKIP][46] ([i915#4613]) +2 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-9/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
    - shard-mtlp:         NOTRUN -> [SKIP][47] ([i915#4613])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-1/igt@gem_lmem_swapping@parallel-random-verify-ccs.html

  * igt@gem_lmem_swapping@verify-random-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][48] ([i915#12193]) +1 other test skip
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-18/igt@gem_lmem_swapping@verify-random-ccs.html

  * igt@gem_lmem_swapping@verify-random-ccs@lmem0:
    - shard-dg1:          NOTRUN -> [SKIP][49] ([i915#4565]) +1 other test skip
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-18/igt@gem_lmem_swapping@verify-random-ccs@lmem0.html

  * igt@gem_madvise@dontneed-before-pwrite:
    - shard-dg1:          NOTRUN -> [SKIP][50] ([i915#3282]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-19/igt@gem_madvise@dontneed-before-pwrite.html

  * igt@gem_media_vme:
    - shard-rkl:          NOTRUN -> [SKIP][51] ([i915#284])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-5/igt@gem_media_vme.html

  * igt@gem_mmap@big-bo:
    - shard-dg2:          NOTRUN -> [SKIP][52] ([i915#4083]) +3 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@gem_mmap@big-bo.html

  * igt@gem_mmap_gtt@cpuset-medium-copy-xy:
    - shard-dg2:          NOTRUN -> [SKIP][53] ([i915#4077]) +6 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html

  * igt@gem_mmap_gtt@fault-concurrent-x:
    - shard-mtlp:         NOTRUN -> [SKIP][54] ([i915#4077]) +1 other test skip
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-3/igt@gem_mmap_gtt@fault-concurrent-x.html

  * igt@gem_mmap_wc@bad-object:
    - shard-dg1:          NOTRUN -> [SKIP][55] ([i915#4083]) +1 other test skip
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-12/igt@gem_mmap_wc@bad-object.html

  * igt@gem_mmap_wc@read-write:
    - shard-mtlp:         NOTRUN -> [SKIP][56] ([i915#4083])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-6/igt@gem_mmap_wc@read-write.html

  * igt@gem_partial_pwrite_pread@write-snoop:
    - shard-dg2:          NOTRUN -> [SKIP][57] ([i915#3282]) +1 other test skip
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-4/igt@gem_partial_pwrite_pread@write-snoop.html

  * igt@gem_pwrite@basic-random:
    - shard-rkl:          NOTRUN -> [SKIP][58] ([i915#3282]) +3 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@gem_pwrite@basic-random.html

  * igt@gem_pxp@protected-raw-src-copy-not-readible:
    - shard-dg2:          NOTRUN -> [SKIP][59] ([i915#4270]) +2 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-8/igt@gem_pxp@protected-raw-src-copy-not-readible.html
    - shard-dg1:          NOTRUN -> [SKIP][60] ([i915#4270]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-13/igt@gem_pxp@protected-raw-src-copy-not-readible.html

  * igt@gem_pxp@verify-pxp-stale-ctx-execution:
    - shard-glk11:        NOTRUN -> [SKIP][61] +58 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk11/igt@gem_pxp@verify-pxp-stale-ctx-execution.html

  * igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-y-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][62] ([i915#8428]) +1 other test skip
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-4/igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-y-tiled.html

  * igt@gem_render_copy@yf-tiled-ccs-to-x-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][63] ([i915#5190] / [i915#8428]) +3 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-5/igt@gem_render_copy@yf-tiled-ccs-to-x-tiled.html

  * igt@gem_set_tiling_vs_blt@tiled-to-untiled:
    - shard-dg2:          NOTRUN -> [SKIP][64] ([i915#4079])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-4/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html

  * igt@gem_userptr_blits@coherency-unsync:
    - shard-rkl:          NOTRUN -> [SKIP][65] ([i915#3297])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-7/igt@gem_userptr_blits@coherency-unsync.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-tglu:         NOTRUN -> [SKIP][66] ([i915#3297]) +2 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-10/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gem_userptr_blits@map-fixed-invalidate:
    - shard-dg1:          NOTRUN -> [SKIP][67] ([i915#3297] / [i915#4880])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-15/igt@gem_userptr_blits@map-fixed-invalidate.html

  * igt@gem_userptr_blits@sd-probe:
    - shard-dg1:          NOTRUN -> [SKIP][68] ([i915#3297] / [i915#4958])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-14/igt@gem_userptr_blits@sd-probe.html

  * igt@gen7_exec_parse@load-register-reg:
    - shard-mtlp:         NOTRUN -> [SKIP][69] +6 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-8/igt@gen7_exec_parse@load-register-reg.html

  * igt@gen9_exec_parse@bb-start-cmd:
    - shard-tglu-1:       NOTRUN -> [SKIP][70] ([i915#2527] / [i915#2856]) +1 other test skip
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@gen9_exec_parse@bb-start-cmd.html

  * igt@gen9_exec_parse@cmd-crossing-page:
    - shard-tglu:         NOTRUN -> [SKIP][71] ([i915#2527] / [i915#2856]) +1 other test skip
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-9/igt@gen9_exec_parse@cmd-crossing-page.html

  * igt@gen9_exec_parse@unaligned-access:
    - shard-dg2:          NOTRUN -> [SKIP][72] ([i915#2856]) +1 other test skip
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-8/igt@gen9_exec_parse@unaligned-access.html

  * igt@gen9_exec_parse@unaligned-jump:
    - shard-rkl:          NOTRUN -> [SKIP][73] ([i915#2527]) +1 other test skip
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@gen9_exec_parse@unaligned-jump.html

  * igt@i915_drm_fdinfo@most-busy-check-all@vcs1:
    - shard-dg1:          NOTRUN -> [SKIP][74] ([i915#14073]) +5 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-13/igt@i915_drm_fdinfo@most-busy-check-all@vcs1.html

  * igt@i915_drm_fdinfo@virtual-busy-idle:
    - shard-dg2:          NOTRUN -> [SKIP][75] ([i915#14118])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@i915_drm_fdinfo@virtual-busy-idle.html

  * igt@i915_module_load@fault-injection:
    - shard-dg2:          NOTRUN -> [ABORT][76] ([i915#15342] / [i915#15481])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-6/igt@i915_module_load@fault-injection.html
    - shard-dg1:          NOTRUN -> [ABORT][77] ([i915#11814] / [i915#15481]) +1 other test abort
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-17/igt@i915_module_load@fault-injection.html
    - shard-mtlp:         NOTRUN -> [ABORT][78] ([i915#15342] / [i915#15481])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-1/igt@i915_module_load@fault-injection.html

  * igt@i915_module_load@fault-injection@__uc_init:
    - shard-dg2:          NOTRUN -> [ABORT][79] ([i915#15481])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-6/igt@i915_module_load@fault-injection@__uc_init.html
    - shard-tglu-1:       NOTRUN -> [SKIP][80] ([i915#15479]) +4 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@i915_module_load@fault-injection@__uc_init.html
    - shard-mtlp:         NOTRUN -> [ABORT][81] ([i915#15481])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-1/igt@i915_module_load@fault-injection@__uc_init.html

  * igt@i915_module_load@fault-injection@i915_driver_mmio_probe:
    - shard-dg1:          NOTRUN -> [INCOMPLETE][82] ([i915#15481])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-17/igt@i915_module_load@fault-injection@i915_driver_mmio_probe.html

  * igt@i915_module_load@fault-injection@intel_connector_register:
    - shard-snb:          NOTRUN -> [ABORT][83] ([i915#15342]) +1 other test abort
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-snb1/igt@i915_module_load@fault-injection@intel_connector_register.html
    - shard-tglu-1:       NOTRUN -> [ABORT][84] ([i915#15342]) +1 other test abort
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@i915_module_load@fault-injection@intel_connector_register.html
    - shard-mtlp:         NOTRUN -> [DMESG-WARN][85] ([i915#15342])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-1/igt@i915_module_load@fault-injection@intel_connector_register.html
    - shard-dg2:          NOTRUN -> [DMESG-WARN][86] ([i915#15342])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-6/igt@i915_module_load@fault-injection@intel_connector_register.html

  * igt@i915_module_load@fault-injection@intel_guc_ct_init:
    - shard-snb:          NOTRUN -> [SKIP][87] +115 other tests skip
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-snb1/igt@i915_module_load@fault-injection@intel_guc_ct_init.html

  * igt@i915_module_load@reload-no-display:
    - shard-dg1:          [PASS][88] -> [DMESG-WARN][89] ([i915#13029] / [i915#14545])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg1-17/igt@i915_module_load@reload-no-display.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-15/igt@i915_module_load@reload-no-display.html

  * igt@i915_module_load@resize-bar:
    - shard-dg1:          NOTRUN -> [SKIP][90] ([i915#7178])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-14/igt@i915_module_load@resize-bar.html

  * igt@i915_pm_freq_api@freq-reset:
    - shard-rkl:          NOTRUN -> [SKIP][91] ([i915#8399])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-2/igt@i915_pm_freq_api@freq-reset.html

  * igt@i915_pm_freq_api@freq-reset-multiple:
    - shard-tglu-1:       NOTRUN -> [SKIP][92] ([i915#8399])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@i915_pm_freq_api@freq-reset-multiple.html

  * igt@i915_pm_freq_api@freq-suspend:
    - shard-tglu:         NOTRUN -> [SKIP][93] ([i915#8399])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-7/igt@i915_pm_freq_api@freq-suspend.html

  * igt@i915_pm_freq_api@freq-suspend@gt0:
    - shard-dg2:          [PASS][94] -> [INCOMPLETE][95] ([i915#13356] / [i915#13820]) +1 other test incomplete
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg2-1/igt@i915_pm_freq_api@freq-suspend@gt0.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-7/igt@i915_pm_freq_api@freq-suspend@gt0.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-dg2:          NOTRUN -> [FAIL][96] ([i915#12964]) +1 other test fail
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@i915_pm_rc6_residency@rc6-fence:
    - shard-tglu:         [PASS][97] -> [WARN][98] ([i915#13790] / [i915#2681]) +1 other test warn
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-tglu-6/igt@i915_pm_rc6_residency@rc6-fence.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-10/igt@i915_pm_rc6_residency@rc6-fence.html

  * igt@i915_suspend@debugfs-reader:
    - shard-rkl:          [PASS][99] -> [INCOMPLETE][100] ([i915#4817])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-5/igt@i915_suspend@debugfs-reader.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@i915_suspend@debugfs-reader.html

  * igt@i915_suspend@fence-restore-untiled:
    - shard-dg1:          NOTRUN -> [SKIP][101] ([i915#4077]) +2 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-18/igt@i915_suspend@fence-restore-untiled.html

  * igt@intel_hwmon@hwmon-write:
    - shard-rkl:          NOTRUN -> [SKIP][102] ([i915#7707])
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-5/igt@intel_hwmon@hwmon-write.html

  * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
    - shard-mtlp:         NOTRUN -> [SKIP][103] ([i915#4212])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-4/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html
    - shard-dg2:          NOTRUN -> [SKIP][104] ([i915#4212])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-5/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html
    - shard-dg1:          NOTRUN -> [SKIP][105] ([i915#4212])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-17/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [FAIL][106] ([i915#14888]) +2 other tests fail
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk9/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1.html

  * igt@kms_async_flips@async-flip-suspend-resume:
    - shard-rkl:          NOTRUN -> [INCOMPLETE][107] ([i915#12761]) +1 other test incomplete
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_async_flips@async-flip-suspend-resume.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-glk:          NOTRUN -> [SKIP][108] ([i915#1769])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-tglu-1:       NOTRUN -> [SKIP][109] ([i915#1769] / [i915#3555])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-b-hdmi-a-1:
    - shard-tglu:         [PASS][110] -> [ABORT][111] ([i915#16837] / [i915#16844]) +1 other test abort
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-tglu-2/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-b-hdmi-a-1.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-2/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-b-hdmi-a-1.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-0:
    - shard-tglu:         NOTRUN -> [SKIP][112] ([i915#5286]) +5 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-6/igt@kms_big_fb@4-tiled-16bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-addfb-size-overflow:
    - shard-dg1:          NOTRUN -> [SKIP][113] ([i915#5286])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-19/igt@kms_big_fb@4-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-tglu-1:       NOTRUN -> [SKIP][114] ([i915#5286]) +1 other test skip
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-rkl:          NOTRUN -> [SKIP][115] ([i915#5286]) +5 other tests skip
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180:
    - shard-dg1:          NOTRUN -> [SKIP][116] ([i915#4538] / [i915#5286]) +1 other test skip
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-12/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180.html

  * igt@kms_big_fb@linear-32bpp-rotate-90:
    - shard-dg1:          NOTRUN -> [SKIP][117] ([i915#3638]) +2 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-14/igt@kms_big_fb@linear-32bpp-rotate-90.html

  * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-dg1:          NOTRUN -> [SKIP][118] ([i915#3828])
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-18/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-rkl:          NOTRUN -> [SKIP][119] ([i915#14544] / [i915#3828])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-dg2:          NOTRUN -> [SKIP][120] +4 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
    - shard-rkl:          NOTRUN -> [SKIP][121] ([i915#3638]) +4 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-180:
    - shard-dg1:          [PASS][122] -> [DMESG-WARN][123] ([i915#4423]) +1 other test dmesg-warn
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg1-19/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-19/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-dg2:          NOTRUN -> [SKIP][124] ([i915#4538] / [i915#5190]) +5 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-dg2:          NOTRUN -> [SKIP][125] ([i915#5190])
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-dg1:          NOTRUN -> [SKIP][126] ([i915#4538]) +3 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-18/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs@pipe-d-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][127] ([i915#6095]) +14 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-5/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs@pipe-d-edp-1.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][128] ([i915#12313])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-2/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][129] ([i915#14544] / [i915#6095]) +11 other tests skip
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][130] ([i915#12313]) +1 other test skip
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-1/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html
    - shard-rkl:          NOTRUN -> [SKIP][131] ([i915#12313]) +1 other test skip
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][132] ([i915#12313]) +1 other test skip
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-15/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
    - shard-tglu:         NOTRUN -> [SKIP][133] ([i915#12313]) +3 other tests skip
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-10/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-1:
    - shard-tglu-1:       NOTRUN -> [SKIP][134] ([i915#6095]) +29 other tests skip
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][135] ([i915#10307] / [i915#6095]) +82 other tests skip
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-3.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2:
    - shard-glk:          NOTRUN -> [SKIP][136] +434 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk2/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1:
    - shard-dg1:          NOTRUN -> [SKIP][137] ([i915#6095]) +192 other tests skip
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-14/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][138] ([i915#6095]) +13 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-4/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
    - shard-rkl:          NOTRUN -> [INCOMPLETE][139] ([i915#15582]) +1 other test incomplete
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-2:
    - shard-rkl:          [PASS][140] -> [ABORT][141] ([i915#15132]) +1 other test abort
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-7/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-2.html
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-1/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1:
    - shard-glk:          [PASS][142] -> [INCOMPLETE][143] ([i915#15582])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-glk5/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk6/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][144] ([i915#14098] / [i915#14544] / [i915#6095]) +7 other tests skip
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-c-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][145] ([i915#14098] / [i915#6095]) +33 other tests skip
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-c-hdmi-a-1.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc:
    - shard-tglu:         NOTRUN -> [SKIP][146] ([i915#6095]) +49 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-4/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][147] ([i915#6095]) +53 other tests skip
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_cdclk@mode-transition:
    - shard-tglu:         NOTRUN -> [SKIP][148] ([i915#3742])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-3/igt@kms_cdclk@mode-transition.html

  * igt@kms_chamelium_audio@hdmi-audio-edid:
    - shard-dg1:          NOTRUN -> [SKIP][149] ([i915#11151] / [i915#7828]) +1 other test skip
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-18/igt@kms_chamelium_audio@hdmi-audio-edid.html
    - shard-mtlp:         NOTRUN -> [SKIP][150] ([i915#11151] / [i915#7828]) +1 other test skip
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-6/igt@kms_chamelium_audio@hdmi-audio-edid.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d:
    - shard-rkl:          NOTRUN -> [SKIP][151] ([i915#16471])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@kms_chamelium_color_pipeline@plane-lut1d.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d:
    - shard-tglu-1:       NOTRUN -> [SKIP][152] ([i915#16471])
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d-pre-ctm3x4:
    - shard-tglu:         NOTRUN -> [SKIP][153] ([i915#16471]) +3 other tests skip
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-2/igt@kms_chamelium_color_pipeline@plane-lut1d-pre-ctm3x4.html

  * igt@kms_chamelium_color_pipeline@plane-lut3d-green-only:
    - shard-dg2:          NOTRUN -> [SKIP][154] ([i915#16471])
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-1/igt@kms_chamelium_color_pipeline@plane-lut3d-green-only.html
    - shard-rkl:          NOTRUN -> [SKIP][155] ([i915#14544] / [i915#16471])
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_chamelium_color_pipeline@plane-lut3d-green-only.html
    - shard-dg1:          NOTRUN -> [SKIP][156] ([i915#16471])
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-12/igt@kms_chamelium_color_pipeline@plane-lut3d-green-only.html
    - shard-mtlp:         NOTRUN -> [SKIP][157] ([i915#16464] / [i915#16471])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-7/igt@kms_chamelium_color_pipeline@plane-lut3d-green-only.html

  * igt@kms_chamelium_edid@dp-edid-change-during-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][158] ([i915#11151] / [i915#7828]) +4 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-2/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html

  * igt@kms_chamelium_frames@dp-crc-fast:
    - shard-dg2:          NOTRUN -> [SKIP][159] ([i915#11151] / [i915#7828]) +6 other tests skip
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-8/igt@kms_chamelium_frames@dp-crc-fast.html

  * igt@kms_chamelium_frames@hdmi-crc-multiple:
    - shard-rkl:          NOTRUN -> [SKIP][160] ([i915#11151] / [i915#14544] / [i915#7828]) +1 other test skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_chamelium_frames@hdmi-crc-multiple.html

  * igt@kms_chamelium_hpd@dp-hpd-storm:
    - shard-tglu-1:       NOTRUN -> [SKIP][161] ([i915#11151] / [i915#7828]) +1 other test skip
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_chamelium_hpd@dp-hpd-storm.html

  * igt@kms_chamelium_hpd@vga-hpd-without-ddc:
    - shard-tglu:         NOTRUN -> [SKIP][162] ([i915#11151] / [i915#7828]) +8 other tests skip
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-6/igt@kms_chamelium_hpd@vga-hpd-without-ddc.html

  * igt@kms_content_protection@atomic:
    - shard-rkl:          NOTRUN -> [SKIP][163] ([i915#14544] / [i915#15865])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-dg2:          NOTRUN -> [SKIP][164] ([i915#15330] / [i915#3299])
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@dp-mst-type-0-hdcp14:
    - shard-dg2:          NOTRUN -> [SKIP][165] ([i915#15330])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-4/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
    - shard-rkl:          NOTRUN -> [SKIP][166] ([i915#15330])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-7/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
    - shard-dg1:          NOTRUN -> [SKIP][167] ([i915#15330])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-19/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
    - shard-tglu:         NOTRUN -> [SKIP][168] ([i915#15330])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-10/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
    - shard-mtlp:         NOTRUN -> [SKIP][169] ([i915#15330])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-2/igt@kms_content_protection@dp-mst-type-0-hdcp14.html

  * igt@kms_content_protection@legacy-hdcp14:
    - shard-tglu-1:       NOTRUN -> [SKIP][170] ([i915#15865])
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_content_protection@legacy-hdcp14.html

  * igt@kms_content_protection@mei-interface:
    - shard-rkl:          NOTRUN -> [SKIP][171] ([i915#15865]) +1 other test skip
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_content_protection@mei-interface.html

  * igt@kms_content_protection@type1:
    - shard-dg2:          NOTRUN -> [SKIP][172] ([i915#15865]) +1 other test skip
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@kms_content_protection@type1.html
    - shard-tglu:         NOTRUN -> [SKIP][173] ([i915#15865]) +1 other test skip
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-2/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@cursor-offscreen-32x32:
    - shard-dg2:          NOTRUN -> [SKIP][174] ([i915#3555]) +1 other test skip
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@kms_cursor_crc@cursor-offscreen-32x32.html
    - shard-rkl:          NOTRUN -> [SKIP][175] ([i915#14544] / [i915#3555])
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_cursor_crc@cursor-offscreen-32x32.html
    - shard-mtlp:         NOTRUN -> [SKIP][176] ([i915#3555] / [i915#8814]) +1 other test skip
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-8/igt@kms_cursor_crc@cursor-offscreen-32x32.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-rkl:          NOTRUN -> [SKIP][177] ([i915#13049] / [i915#14544])
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_cursor_crc@cursor-offscreen-64x21:
    - shard-mtlp:         NOTRUN -> [SKIP][178] ([i915#8814])
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-2/igt@kms_cursor_crc@cursor-offscreen-64x21.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-rkl:          NOTRUN -> [SKIP][179] ([i915#13049])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_cursor_crc@cursor-onscreen-512x170.html
    - shard-dg1:          NOTRUN -> [SKIP][180] ([i915#13049])
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-16/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [FAIL][181] ([i915#13566])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-2/igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-dg2:          NOTRUN -> [SKIP][182] ([i915#13049])
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-8/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x170:
    - shard-tglu:         NOTRUN -> [SKIP][183] ([i915#13049])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-8/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html

  * igt@kms_cursor_crc@cursor-sliding-max-size:
    - shard-dg1:          NOTRUN -> [SKIP][184] ([i915#3555]) +4 other tests skip
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-15/igt@kms_cursor_crc@cursor-sliding-max-size.html

  * igt@kms_cursor_crc@cursor-suspend:
    - shard-glk:          NOTRUN -> [INCOMPLETE][185] ([i915#12358] / [i915#14152] / [i915#7882])
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk1/igt@kms_cursor_crc@cursor-suspend.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [INCOMPLETE][186] ([i915#12358] / [i915#14152])
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk1/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
    - shard-dg2:          NOTRUN -> [SKIP][187] ([i915#13046] / [i915#5354]) +3 other tests skip
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-5/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html
    - shard-mtlp:         NOTRUN -> [SKIP][188] ([i915#9809]) +1 other test skip
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-4/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-tglu-1:       NOTRUN -> [SKIP][189] +32 other tests skip
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
    - shard-rkl:          NOTRUN -> [SKIP][190] +59 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html

  * igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
    - shard-rkl:          NOTRUN -> [SKIP][191] ([i915#9067])
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-dg1:          NOTRUN -> [SKIP][192] ([i915#13691])
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-16/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-tglu:         NOTRUN -> [SKIP][193] ([i915#13749])
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-2/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dp_link_training@non-uhbr-sst:
    - shard-rkl:          NOTRUN -> [SKIP][194] ([i915#13749])
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-7/igt@kms_dp_link_training@non-uhbr-sst.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-rkl:          NOTRUN -> [SKIP][195] ([i915#16867])
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-2/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback:
    - shard-tglu-1:       NOTRUN -> [SKIP][196] ([i915#16870])
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback.html

  * igt@kms_draw_crc@draw-method-mmap-wc:
    - shard-dg2:          NOTRUN -> [SKIP][197] ([i915#8812])
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-8/igt@kms_draw_crc@draw-method-mmap-wc.html
    - shard-dg1:          NOTRUN -> [SKIP][198] ([i915#8812])
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-17/igt@kms_draw_crc@draw-method-mmap-wc.html

  * igt@kms_dsc@dsc-basic-ultrajoiner:
    - shard-tglu-1:       NOTRUN -> [SKIP][199] ([i915#16361]) +3 other tests skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_dsc@dsc-basic-ultrajoiner.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc-ultrajoiner:
    - shard-dg2:          NOTRUN -> [SKIP][200] ([i915#16361])
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@kms_dsc@dsc-fractional-bpp-with-bpc-ultrajoiner.html
    - shard-rkl:          NOTRUN -> [SKIP][201] ([i915#14544] / [i915#16361])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_dsc@dsc-fractional-bpp-with-bpc-ultrajoiner.html

  * igt@kms_dsc@dsc-with-bpc:
    - shard-tglu:         NOTRUN -> [SKIP][202] ([i915#16361]) +2 other tests skip
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-8/igt@kms_dsc@dsc-with-bpc.html

  * igt@kms_fbcon_fbt@psr:
    - shard-rkl:          NOTRUN -> [SKIP][203] ([i915#16680])
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-5/igt@kms_fbcon_fbt@psr.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-dg1:          NOTRUN -> [SKIP][204] ([i915#16680])
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-15/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@display-2x:
    - shard-rkl:          NOTRUN -> [SKIP][205] ([i915#16081])
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-5/igt@kms_feature_discovery@display-2x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-dg1:          NOTRUN -> [SKIP][206] ([i915#16599])
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-17/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_feature_discovery@psr2:
    - shard-rkl:          NOTRUN -> [SKIP][207] ([i915#658])
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@kms_feature_discovery@psr2.html

  * igt@kms_feature_discovery@vrr:
    - shard-tglu:         NOTRUN -> [SKIP][208] ([i915#16600])
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-3/igt@kms_feature_discovery@vrr.html

  * igt@kms_flip@2x-blocking-wf_vblank:
    - shard-dg2:          NOTRUN -> [SKIP][209] ([i915#9934]) +3 other tests skip
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@kms_flip@2x-blocking-wf_vblank.html
    - shard-dg1:          NOTRUN -> [SKIP][210] ([i915#9934]) +4 other tests skip
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-15/igt@kms_flip@2x-blocking-wf_vblank.html
    - shard-tglu:         NOTRUN -> [SKIP][211] ([i915#3637] / [i915#9934]) +5 other tests skip
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-9/igt@kms_flip@2x-blocking-wf_vblank.html

  * igt@kms_flip@2x-dpms-vs-vblank-race-interruptible:
    - shard-mtlp:         NOTRUN -> [SKIP][212] ([i915#3637] / [i915#9934]) +2 other tests skip
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-7/igt@kms_flip@2x-dpms-vs-vblank-race-interruptible.html

  * igt@kms_flip@2x-flip-vs-panning-vs-hang:
    - shard-tglu-1:       NOTRUN -> [SKIP][213] ([i915#3637] / [i915#9934]) +6 other tests skip
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_flip@2x-flip-vs-panning-vs-hang.html

  * igt@kms_flip@2x-flip-vs-suspend:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][214] ([i915#12745] / [i915#4839])
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk10/igt@kms_flip@2x-flip-vs-suspend.html

  * igt@kms_flip@2x-flip-vs-suspend@ac-hdmi-a1-hdmi-a2:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][215] ([i915#12745])
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk10/igt@kms_flip@2x-flip-vs-suspend@ac-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-plain-flip:
    - shard-rkl:          NOTRUN -> [SKIP][216] ([i915#9934]) +3 other tests skip
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-2/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-glk:          NOTRUN -> [INCOMPLETE][217] ([i915#12314] / [i915#12745] / [i915#4839])
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk8/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1:
    - shard-glk:          NOTRUN -> [INCOMPLETE][218] ([i915#12314] / [i915#12745])
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk8/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling:
    - shard-tglu-1:       NOTRUN -> [SKIP][219] ([i915#15643]) +1 other test skip
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling:
    - shard-mtlp:         NOTRUN -> [SKIP][220] ([i915#15643]) +1 other test skip
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-3/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
    - shard-tglu:         NOTRUN -> [SKIP][221] ([i915#15643]) +5 other tests skip
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-9/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling:
    - shard-rkl:          NOTRUN -> [SKIP][222] ([i915#15643]) +2 other tests skip
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
    - shard-dg2:          NOTRUN -> [SKIP][223] ([i915#15643]) +1 other test skip
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html
    - shard-rkl:          NOTRUN -> [SKIP][224] ([i915#14544] / [i915#15643])
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html
    - shard-dg1:          NOTRUN -> [SKIP][225] ([i915#15643]) +1 other test skip
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-12/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][226] ([i915#15104] / [i915#15990]) +2 other tests skip
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-4/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][227] ([i915#15990] / [i915#8708]) +5 other tests skip
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-17/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt.html
    - shard-mtlp:         NOTRUN -> [SKIP][228] ([i915#15990] / [i915#8708]) +1 other test skip
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][229] ([i915#15991] / [i915#5354]) +11 other tests skip
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html
    - shard-rkl:          NOTRUN -> [SKIP][230] ([i915#14544]) +7 other tests skip
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-glk11:        NOTRUN -> [INCOMPLETE][231] ([i915#10056] / [i915#16593])
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk11/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-rkl:          [PASS][232] -> [SKIP][233] ([i915#15989]) +9 other tests skip
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-1/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-pwrite:
    - shard-tglu:         NOTRUN -> [SKIP][234] ([i915#15989]) +21 other tests skip
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-9/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-cur-indfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][235] ([i915#15990]) +15 other tests skip
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-cur-indfb-draw-mmap-gtt.html
    - shard-dg1:          NOTRUN -> [SKIP][236] ([i915#15990]) +12 other tests skip
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-14/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-shrfb-plflip-blt:
    - shard-tglu:         NOTRUN -> [SKIP][237] +102 other tests skip
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-5/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-spr-indfb-draw-render:
    - shard-glk:          [PASS][238] -> [SKIP][239]
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-glk8/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-spr-indfb-draw-render.html
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk6/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbchdr-rgb101010-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][240] ([i915#15989]) +8 other tests skip
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-7/igt@kms_frontbuffer_tracking@fbchdr-rgb101010-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][241] ([i915#14544] / [i915#1825]) +2 other tests skip
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-rkl:          NOTRUN -> [SKIP][242] ([i915#1825]) +3 other tests skip
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt:
    - shard-dg1:          NOTRUN -> [SKIP][243] +29 other tests skip
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
    - shard-rkl:          NOTRUN -> [SKIP][244] ([i915#15102]) +34 other tests skip
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-dg2:          NOTRUN -> [SKIP][245] ([i915#10055])
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
    - shard-mtlp:         NOTRUN -> [SKIP][246] ([i915#10055])
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-indfb-fliptrack-mmap-gtt:
    - shard-tglu:         NOTRUN -> [SKIP][247] ([i915#15102]) +59 other tests skip
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-10/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-indfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-render:
    - shard-dg1:          NOTRUN -> [SKIP][248] ([i915#15102]) +19 other tests skip
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-indfb-fliptrack-mmap-gtt:
    - shard-glk10:        NOTRUN -> [SKIP][249] +137 other tests skip
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk10/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-indfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-pri-shrfb-draw-blt:
    - shard-mtlp:         NOTRUN -> [SKIP][250] ([i915#15991]) +7 other tests skip
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-farfromfence-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][251] ([i915#15990]) +4 other tests skip
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-farfromfence-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-4:
    - shard-rkl:          NOTRUN -> [SKIP][252] ([i915#5439])
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-4.html

  * igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
    - shard-tglu-1:       NOTRUN -> [SKIP][253] ([i915#15989]) +7 other tests skip
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@hdr-2p-primscrn-spr-indfb-fullscreen:
    - shard-dg2:          NOTRUN -> [SKIP][254] ([i915#15991]) +17 other tests skip
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-8/igt@kms_frontbuffer_tracking@hdr-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@hdr-rgb101010-draw-pwrite:
    - shard-rkl:          NOTRUN -> [SKIP][255] ([i915#15989]) +13 other tests skip
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@kms_frontbuffer_tracking@hdr-rgb101010-draw-pwrite.html
    - shard-dg1:          NOTRUN -> [SKIP][256] ([i915#15989]) +5 other tests skip
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-19/igt@kms_frontbuffer_tracking@hdr-rgb101010-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@hdr-suspend:
    - shard-glk11:        NOTRUN -> [INCOMPLETE][257] ([i915#16056] / [i915#16593])
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk11/igt@kms_frontbuffer_tracking@hdr-suspend.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][258] ([i915#15104] / [i915#15990]) +1 other test skip
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-14/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-gtt.html
    - shard-mtlp:         NOTRUN -> [SKIP][259] ([i915#15104] / [i915#15990])
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-1/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt:
    - shard-tglu-1:       NOTRUN -> [SKIP][260] ([i915#15102]) +20 other tests skip
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][261] ([i915#15102]) +21 other tests skip
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt.html
    - shard-rkl:          NOTRUN -> [SKIP][262] ([i915#14544] / [i915#15102]) +5 other tests skip
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-cpu:
    - shard-mtlp:         NOTRUN -> [SKIP][263] ([i915#15991] / [i915#1825]) +5 other tests skip
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][264] ([i915#15990] / [i915#8708]) +7 other tests skip
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-offscreen-pri-shrfb-draw-mmap-cpu:
    - shard-mtlp:         NOTRUN -> [SKIP][265] ([i915#15989]) +8 other tests skip
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-8/igt@kms_frontbuffer_tracking@psrhdr-1p-offscreen-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-tglu:         NOTRUN -> [SKIP][266] ([i915#3555] / [i915#8228]) +1 other test skip
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-9/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_hdr@invalid-hdr:
    - shard-rkl:          NOTRUN -> [SKIP][267] ([i915#16644] / [i915#3555] / [i915#8228])
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@kms_hdr@invalid-hdr.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][268] ([i915#15460])
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-7/igt@kms_joiner@basic-big-joiner.html
    - shard-rkl:          NOTRUN -> [SKIP][269] ([i915#15460])
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-5/igt@kms_joiner@basic-big-joiner.html
    - shard-tglu:         NOTRUN -> [SKIP][270] ([i915#15460])
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-6/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-tglu:         NOTRUN -> [SKIP][271] ([i915#15459]) +1 other test skip
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-3/igt@kms_joiner@basic-force-big-joiner.html
    - shard-dg1:          NOTRUN -> [SKIP][272] ([i915#15459])
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-19/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][273] ([i915#15458])
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-6/igt@kms_joiner@basic-force-ultra-joiner.html
    - shard-rkl:          NOTRUN -> [SKIP][274] ([i915#15458])
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-2/igt@kms_joiner@basic-force-ultra-joiner.html
    - shard-dg1:          NOTRUN -> [SKIP][275] ([i915#15458])
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-12/igt@kms_joiner@basic-force-ultra-joiner.html
    - shard-mtlp:         NOTRUN -> [SKIP][276] ([i915#15458])
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-5/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_panel_fitting@legacy:
    - shard-rkl:          NOTRUN -> [SKIP][277] ([i915#6301])
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@kms_panel_fitting@legacy.html

  * igt@kms_pipe_stress@stress-xrgb8888-4tiled:
    - shard-tglu-1:       NOTRUN -> [SKIP][278] ([i915#14712])
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_pipe_stress@stress-xrgb8888-4tiled.html

  * igt@kms_pipe_stress@stress-xrgb8888-yftiled:
    - shard-tglu:         NOTRUN -> [SKIP][279] ([i915#14712])
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-4/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
    - shard-glk:          NOTRUN -> [DMESG-FAIL][280] ([i915#118] / [i915#16396])
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk4/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
    - shard-dg2:          NOTRUN -> [SKIP][281] ([i915#14712])
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-8/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier:
    - shard-tglu:         NOTRUN -> [SKIP][282] ([i915#15709]) +3 other tests skip
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-6/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier:
    - shard-rkl:          NOTRUN -> [SKIP][283] ([i915#15709]) +2 other tests skip
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html
    - shard-dg1:          NOTRUN -> [SKIP][284] ([i915#15709])
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-18/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier@pipe-b-plane-5:
    - shard-mtlp:         NOTRUN -> [SKIP][285] ([i915#16386]) +1 other test skip
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-6/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier@pipe-b-plane-5.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping:
    - shard-dg2:          NOTRUN -> [SKIP][286] ([i915#15709]) +2 other tests skip
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-4/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-x-tiled-modifier@pipe-a-plane-7:
    - shard-tglu:         NOTRUN -> [SKIP][287] ([i915#16386]) +1 other test skip
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-4/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-a-plane-7.html

  * igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5:
    - shard-dg2:          NOTRUN -> [SKIP][288] ([i915#16386]) +1 other test skip
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-8/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5.html

  * igt@kms_plane@pixel-format-y-tiled-ccs-modifier:
    - shard-tglu-1:       NOTRUN -> [SKIP][289] ([i915#15709]) +1 other test skip
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html

  * igt@kms_plane@planar-pixel-format-settings@nv12-tile4-src-y:
    - shard-dg1:          NOTRUN -> [SKIP][290] ([i915#16112])
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-15/igt@kms_plane@planar-pixel-format-settings@nv12-tile4-src-y.html

  * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a:
    - shard-glk:          [PASS][291] -> [INCOMPLETE][292] ([i915#13026])
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-glk6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a.html
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a.html

  * igt@kms_plane@plane-position-hole-dpms@pipe-b-plane-5:
    - shard-tglu:         [PASS][293] -> [ABORT][294] ([i915#16844]) +1 other test abort
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-tglu-8/igt@kms_plane@plane-position-hole-dpms@pipe-b-plane-5.html
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-3/igt@kms_plane@plane-position-hole-dpms@pipe-b-plane-5.html

  * igt@kms_plane_alpha_blend@alpha-basic:
    - shard-glk:          NOTRUN -> [FAIL][295] ([i915#12178])
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk1/igt@kms_plane_alpha_blend@alpha-basic.html

  * igt@kms_plane_alpha_blend@alpha-basic@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [FAIL][296] ([i915#7862]) +1 other test fail
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk1/igt@kms_plane_alpha_blend@alpha-basic@pipe-a-hdmi-a-1.html

  * igt@kms_plane_lowres@tiling-y:
    - shard-dg2:          NOTRUN -> [SKIP][297] ([i915#8821])
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-4/igt@kms_plane_lowres@tiling-y.html

  * igt@kms_plane_lowres@tiling-yf:
    - shard-rkl:          NOTRUN -> [SKIP][298] ([i915#3555]) +4 other tests skip
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-7/igt@kms_plane_lowres@tiling-yf.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-tglu:         NOTRUN -> [SKIP][299] ([i915#13958])
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-6/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-rkl:          NOTRUN -> [SKIP][300] ([i915#13958])
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-2/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a:
    - shard-rkl:          NOTRUN -> [SKIP][301] ([i915#15329]) +7 other tests skip
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a.html
    - shard-dg1:          NOTRUN -> [SKIP][302] ([i915#15329]) +9 other tests skip
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-18/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a.html

  * igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-c:
    - shard-tglu:         NOTRUN -> [SKIP][303] ([i915#15329]) +9 other tests skip
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-7/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-c.html

  * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d:
    - shard-tglu-1:       NOTRUN -> [SKIP][304] ([i915#15329]) +4 other tests skip
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-rkl:          NOTRUN -> [SKIP][305] ([i915#12343] / [i915#5354])
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_pm_backlight@bad-brightness.html
    - shard-tglu-1:       NOTRUN -> [SKIP][306] ([i915#12343] / [i915#9812])
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-tglu:         NOTRUN -> [SKIP][307] ([i915#12343] / [i915#9812]) +1 other test skip
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-4/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-dg1:          [PASS][308] -> [SKIP][309] ([i915#15073]) +2 other tests skip
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg1-14/igt@kms_pm_rpm@dpms-lpsp.html
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-13/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@dpms-mode-unset-lpsp:
    - shard-rkl:          NOTRUN -> [SKIP][310] ([i915#15073])
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-tglu-1:       NOTRUN -> [SKIP][311] ([i915#15073])
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-rkl:          [PASS][312] -> [SKIP][313] ([i915#15073]) +1 other test skip
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-3/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_prime@d3hot:
    - shard-tglu:         NOTRUN -> [SKIP][314] ([i915#6524])
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-6/igt@kms_prime@d3hot.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
    - shard-mtlp:         NOTRUN -> [SKIP][315] ([i915#12316]) +2 other tests skip
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-4/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-tglu:         NOTRUN -> [SKIP][316] ([i915#11520]) +9 other tests skip
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-5/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area:
    - shard-rkl:          NOTRUN -> [SKIP][317] ([i915#11520]) +7 other tests skip
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area:
    - shard-dg1:          NOTRUN -> [SKIP][318] ([i915#11520]) +5 other tests skip
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-12/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf:
    - shard-dg2:          NOTRUN -> [SKIP][319] ([i915#11520]) +5 other tests skip
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-7/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
    - shard-snb:          NOTRUN -> [SKIP][320] ([i915#11520]) +2 other tests skip
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-snb5/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
    - shard-tglu-1:       NOTRUN -> [SKIP][321] ([i915#11520]) +2 other tests skip
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-cursor-plane-update-sf:
    - shard-glk11:        NOTRUN -> [SKIP][322] ([i915#11520])
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk11/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-glk10:        NOTRUN -> [SKIP][323] ([i915#11520]) +3 other tests skip
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk10/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area:
    - shard-glk:          NOTRUN -> [SKIP][324] ([i915#11520]) +14 other tests skip
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk1/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-tglu-1:       NOTRUN -> [SKIP][325] ([i915#9683])
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-dg2:          NOTRUN -> [SKIP][326] ([i915#9683])
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-8/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-psr-cursor-blt@edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][327] ([i915#9688]) +4 other tests skip
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-5/igt@kms_psr@fbc-psr-cursor-blt@edp-1.html

  * igt@kms_psr@fbc-psr-cursor-plane-move:
    - shard-tglu-1:       NOTRUN -> [SKIP][328] ([i915#9732]) +7 other tests skip
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_psr@fbc-psr-cursor-plane-move.html

  * igt@kms_psr@fbc-psr-no-drrs:
    - shard-tglu:         NOTRUN -> [SKIP][329] ([i915#9732]) +21 other tests skip
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-6/igt@kms_psr@fbc-psr-no-drrs.html

  * igt@kms_psr@psr-cursor-plane-onoff:
    - shard-dg1:          NOTRUN -> [SKIP][330] ([i915#1072] / [i915#9732]) +8 other tests skip
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-18/igt@kms_psr@psr-cursor-plane-onoff.html

  * igt@kms_psr@psr-cursor-render:
    - shard-dg2:          NOTRUN -> [SKIP][331] ([i915#1072] / [i915#9732]) +7 other tests skip
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-5/igt@kms_psr@psr-cursor-render.html

  * igt@kms_psr@psr2-cursor-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][332] ([i915#1072] / [i915#9732]) +12 other tests skip
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-5/igt@kms_psr@psr2-cursor-mmap-gtt.html

  * igt@kms_psr@psr2-sprite-blt:
    - shard-rkl:          NOTRUN -> [SKIP][333] ([i915#1072] / [i915#14544] / [i915#9732])
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_psr@psr2-sprite-blt.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-0:
    - shard-tglu-1:       NOTRUN -> [SKIP][334] ([i915#5289])
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-dg2:          NOTRUN -> [SKIP][335] ([i915#12755] / [i915#15867])
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-8/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_scaling_modes@scaling-mode-none:
    - shard-tglu-1:       NOTRUN -> [SKIP][336] ([i915#3555]) +3 other tests skip
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_scaling_modes@scaling-mode-none.html

  * igt@kms_selftest@drm_framebuffer:
    - shard-rkl:          NOTRUN -> [ABORT][337] ([i915#13179]) +1 other test abort
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_selftest@drm_framebuffer.html
    - shard-tglu-1:       NOTRUN -> [ABORT][338] ([i915#13179]) +1 other test abort
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-1/igt@kms_selftest@drm_framebuffer.html

  * igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_create:
    - shard-glk:          NOTRUN -> [ABORT][339] ([i915#13179]) +1 other test abort
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk1/igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_create.html

  * igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_free:
    - shard-glk:          NOTRUN -> [DMESG-FAIL][340] ([i915#13179])
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk1/igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_free.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - shard-tglu:         NOTRUN -> [SKIP][341] ([i915#3555]) +6 other tests skip
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-3/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@kms_vblank@ts-continuation-suspend:
    - shard-rkl:          [PASS][342] -> [INCOMPLETE][343] ([i915#12276])
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-8/igt@kms_vblank@ts-continuation-suspend.html
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@kms_vblank@ts-continuation-suspend.html

  * igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [INCOMPLETE][344] ([i915#12276])
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-2.html

  * igt@kms_vrr@flipline:
    - shard-mtlp:         NOTRUN -> [SKIP][345] ([i915#3555] / [i915#8808])
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-4/igt@kms_vrr@flipline.html
    - shard-dg2:          NOTRUN -> [SKIP][346] ([i915#15243] / [i915#3555])
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-3/igt@kms_vrr@flipline.html
    - shard-rkl:          NOTRUN -> [SKIP][347] ([i915#15243] / [i915#3555])
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_vrr@flipline.html

  * igt@kms_vrr@max-min:
    - shard-dg2:          NOTRUN -> [SKIP][348] ([i915#9906]) +1 other test skip
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-5/igt@kms_vrr@max-min.html
    - shard-rkl:          NOTRUN -> [SKIP][349] ([i915#9906])
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@kms_vrr@max-min.html
    - shard-tglu:         NOTRUN -> [SKIP][350] ([i915#9906]) +1 other test skip
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-8/igt@kms_vrr@max-min.html

  * igt@kms_vrr@seamless-rr-switch-drrs:
    - shard-dg1:          NOTRUN -> [SKIP][351] ([i915#9906])
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-12/igt@kms_vrr@seamless-rr-switch-drrs.html
    - shard-mtlp:         NOTRUN -> [SKIP][352] ([i915#8808] / [i915#9906])
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-5/igt@kms_vrr@seamless-rr-switch-drrs.html

  * igt@perf_pmu@frequency:
    - shard-dg2:          [PASS][353] -> [FAIL][354] ([i915#6806]) +1 other test fail
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg2-8/igt@perf_pmu@frequency.html
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-1/igt@perf_pmu@frequency.html

  * igt@perf_pmu@module-unload:
    - shard-glk:          NOTRUN -> [ABORT][355] ([i915#15778])
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk6/igt@perf_pmu@module-unload.html

  * igt@perf_pmu@rc6-suspend:
    - shard-glk:          NOTRUN -> [INCOMPLETE][356] ([i915#13356] / [i915#14242] / [i915#16236])
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk9/igt@perf_pmu@rc6-suspend.html

  * igt@prime_udl@share-import:
    - shard-tglu:         NOTRUN -> [SKIP][357] ([i915#16420])
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-7/igt@prime_udl@share-import.html

  * igt@prime_vgem@basic-fence-read:
    - shard-rkl:          NOTRUN -> [SKIP][358] ([i915#3291] / [i915#3708])
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@prime_vgem@basic-fence-read.html

  * igt@prime_vgem@basic-read:
    - shard-dg2:          NOTRUN -> [SKIP][359] ([i915#3291] / [i915#3708])
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-8/igt@prime_vgem@basic-read.html

  * igt@prime_vgem@coherency-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][360] ([i915#3708] / [i915#4077])
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-1/igt@prime_vgem@coherency-gtt.html

  
#### Possible fixes ####

  * igt@gem_ccs@suspend-resume:
    - shard-dg2:          [INCOMPLETE][361] ([i915#13356] / [i915#16348]) -> [PASS][362] +1 other test pass
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg2-1/igt@gem_ccs@suspend-resume.html
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-8/igt@gem_ccs@suspend-resume.html

  * igt@gem_exec_balancer@individual:
    - shard-mtlp:         [FAIL][363] -> [PASS][364]
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-mtlp-1/igt@gem_exec_balancer@individual.html
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-2/igt@gem_exec_balancer@individual.html

  * igt@gem_exec_suspend@basic-s0:
    - shard-dg2:          [INCOMPLETE][365] ([i915#13356]) -> [PASS][366] +1 other test pass
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg2-3/igt@gem_exec_suspend@basic-s0.html
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-4/igt@gem_exec_suspend@basic-s0.html
    - shard-rkl:          [INCOMPLETE][367] ([i915#13356]) -> [PASS][368] +1 other test pass
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-3/igt@gem_exec_suspend@basic-s0.html
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-7/igt@gem_exec_suspend@basic-s0.html

  * igt@gem_lmem_swapping@massive:
    - shard-dg2:          [FAIL][369] ([i915#16793] / [i915#16869]) -> [PASS][370] +1 other test pass
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg2-6/igt@gem_lmem_swapping@massive.html
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-8/igt@gem_lmem_swapping@massive.html

  * igt@gem_workarounds@suspend-resume:
    - shard-glk:          [INCOMPLETE][371] ([i915#13356] / [i915#14586]) -> [PASS][372]
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-glk3/igt@gem_workarounds@suspend-resume.html
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk2/igt@gem_workarounds@suspend-resume.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-mtlp:         [FAIL][373] ([i915#5956]) -> [PASS][374] +1 other test pass
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-mtlp-1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-4:
    - shard-dg1:          [ABORT][375] -> [PASS][376] +1 other test pass
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg1-16/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-4.html
   [376]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-19/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-4.html

  * igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-b-hdmi-a-1:
    - shard-tglu:         [ABORT][377] ([i915#16844]) -> [PASS][378] +1 other test pass
   [377]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-tglu-2/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-b-hdmi-a-1.html
   [378]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-6/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-b-hdmi-a-1.html

  * igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1:
    - shard-rkl:          [FAIL][379] ([i915#13566]) -> [PASS][380] +1 other test pass
   [379]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-8/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html
   [380]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-5/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-1:
    - shard-tglu:         [FAIL][381] ([i915#13566]) -> [PASS][382] +5 other tests pass
   [381]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-tglu-7/igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-1.html
   [382]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-9/igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-1.html

  * igt@kms_feature_discovery@hdr:
    - shard-rkl:          [SKIP][383] ([i915#16600]) -> [PASS][384]
   [383]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-4/igt@kms_feature_discovery@hdr.html
   [384]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_feature_discovery@hdr.html

  * igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a1:
    - shard-tglu:         [ABORT][385] ([i915#16872]) -> [PASS][386] +1 other test pass
   [385]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-tglu-6/igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a1.html
   [386]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-6/igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a1.html

  * igt@kms_force_connector_basic@force-edid:
    - shard-mtlp:         [SKIP][387] ([i915#15672]) -> [PASS][388]
   [387]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-mtlp-1/igt@kms_force_connector_basic@force-edid.html
   [388]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-mtlp-2/igt@kms_force_connector_basic@force-edid.html

  * igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-onoff:
    - shard-rkl:          [SKIP][389] ([i915#15989]) -> [PASS][390] +9 other tests pass
   [389]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-8/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-onoff.html
   [390]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-pri-shrfb-draw-mmap-gtt:
    - shard-glk:          [SKIP][391] -> [PASS][392] +5 other tests pass
   [391]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-glk9/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html
   [392]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk8/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-rkl:          [SKIP][393] ([i915#16644] / [i915#3555] / [i915#8228]) -> [PASS][394]
   [393]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-5/igt@kms_hdr@invalid-metadata-sizes.html
   [394]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - shard-rkl:          [INCOMPLETE][395] ([i915#12756] / [i915#13476]) -> [PASS][396]
   [395]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_pipe_crc_basic@suspend-read-crc.html
   [396]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-2/igt@kms_pipe_crc_basic@suspend-read-crc.html

  * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b:
    - shard-rkl:          [ABORT][397] ([i915#15132]) -> [PASS][398] +1 other test pass
   [397]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b.html
   [398]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b.html

  * igt@kms_pm_rpm@dpms-non-lpsp:
    - shard-dg1:          [SKIP][399] ([i915#15073]) -> [PASS][400] +1 other test pass
   [399]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg1-14/igt@kms_pm_rpm@dpms-non-lpsp.html
   [400]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-12/igt@kms_pm_rpm@dpms-non-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-rkl:          [SKIP][401] ([i915#15073]) -> [PASS][402] +2 other tests pass
   [401]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-7/igt@kms_pm_rpm@modeset-lpsp-stress.html
   [402]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-5/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-dg2:          [SKIP][403] ([i915#15073]) -> [PASS][404] +2 other tests pass
   [403]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg2-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
   [404]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-1/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@system-suspend-idle:
    - shard-rkl:          [INCOMPLETE][405] ([i915#14419]) -> [PASS][406]
   [405]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_pm_rpm@system-suspend-idle.html
   [406]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@kms_pm_rpm@system-suspend-idle.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
    - shard-rkl:          [ABORT][407] ([i915#16852]) -> [PASS][408]
   [407]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-4/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
   [408]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-7/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html

  * igt@kms_vblank@query-idle-hang:
    - shard-dg1:          [DMESG-WARN][409] ([i915#4423]) -> [PASS][410]
   [409]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg1-18/igt@kms_vblank@query-idle-hang.html
   [410]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-16/igt@kms_vblank@query-idle-hang.html

  * igt@kms_vblank@ts-continuation-dpms-suspend:
    - shard-rkl:          [INCOMPLETE][411] ([i915#12276]) -> [PASS][412]
   [411]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-3/igt@kms_vblank@ts-continuation-dpms-suspend.html
   [412]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@kms_vblank@ts-continuation-dpms-suspend.html

  * igt@perf_pmu@busy-accuracy-98:
    - shard-tglu:         [FAIL][413] ([i915#4349]) -> [PASS][414] +2 other tests pass
   [413]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-tglu-10/igt@perf_pmu@busy-accuracy-98.html
   [414]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-6/igt@perf_pmu@busy-accuracy-98.html

  * igt@perf_pmu@busy-double-start@vecs1:
    - shard-dg2:          [FAIL][415] ([i915#4349]) -> [PASS][416] +4 other tests pass
   [415]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg2-8/igt@perf_pmu@busy-double-start@vecs1.html
   [416]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg2-6/igt@perf_pmu@busy-double-start@vecs1.html

  * igt@perf_pmu@most-busy-idle-check-all:
    - shard-rkl:          [FAIL][417] ([i915#4349]) -> [PASS][418] +3 other tests pass
   [417]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-5/igt@perf_pmu@most-busy-idle-check-all.html
   [418]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-7/igt@perf_pmu@most-busy-idle-check-all.html

  
#### Warnings ####

  * igt@gem_ccs@large-ctrl-surf-copy:
    - shard-rkl:          [SKIP][419] ([i915#13008]) -> [SKIP][420] ([i915#13008] / [i915#14544])
   [419]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-3/igt@gem_ccs@large-ctrl-surf-copy.html
   [420]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@gem_ccs@large-ctrl-surf-copy.html

  * igt@gem_ctx_sseu@engines:
    - shard-rkl:          [SKIP][421] ([i915#280]) -> [SKIP][422] ([i915#14544] / [i915#280])
   [421]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-5/igt@gem_ctx_sseu@engines.html
   [422]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@gem_ctx_sseu@engines.html

  * igt@gem_exec_balancer@parallel-balancer:
    - shard-rkl:          [SKIP][423] ([i915#4525]) -> [SKIP][424] ([i915#14544] / [i915#4525]) +1 other test skip
   [423]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@gem_exec_balancer@parallel-balancer.html
   [424]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@gem_exec_balancer@parallel-balancer.html

  * igt@gem_exec_reloc@basic-wc-gtt:
    - shard-rkl:          [SKIP][425] ([i915#14544] / [i915#3281]) -> [SKIP][426] ([i915#3281])
   [425]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@gem_exec_reloc@basic-wc-gtt.html
   [426]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@gem_exec_reloc@basic-wc-gtt.html

  * igt@gem_exec_reloc@basic-write-read-noreloc:
    - shard-rkl:          [SKIP][427] ([i915#3281]) -> [SKIP][428] ([i915#14544] / [i915#3281]) +5 other tests skip
   [427]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-4/igt@gem_exec_reloc@basic-write-read-noreloc.html
   [428]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@gem_exec_reloc@basic-write-read-noreloc.html

  * igt@gem_huc_copy@huc-copy:
    - shard-rkl:          [SKIP][429] ([i915#14544] / [i915#2190]) -> [SKIP][430] ([i915#2190])
   [429]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@gem_huc_copy@huc-copy.html
   [430]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@parallel-multi:
    - shard-rkl:          [SKIP][431] ([i915#4613]) -> [SKIP][432] ([i915#14544] / [i915#4613]) +1 other test skip
   [431]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@gem_lmem_swapping@parallel-multi.html
   [432]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@gem_lmem_swapping@parallel-multi.html

  * igt@gem_partial_pwrite_pread@reads:
    - shard-rkl:          [SKIP][433] ([i915#3282]) -> [SKIP][434] ([i915#14544] / [i915#3282]) +1 other test skip
   [433]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-5/igt@gem_partial_pwrite_pread@reads.html
   [434]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@gem_partial_pwrite_pread@reads.html

  * igt@gem_pxp@hw-rejects-pxp-buffer:
    - shard-rkl:          [SKIP][435] ([i915#13717] / [i915#14544]) -> [SKIP][436] ([i915#13717])
   [435]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@gem_pxp@hw-rejects-pxp-buffer.html
   [436]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@gem_pxp@hw-rejects-pxp-buffer.html

  * igt@gem_pxp@hw-rejects-pxp-context:
    - shard-rkl:          [SKIP][437] ([i915#13717]) -> [SKIP][438] ([i915#13717] / [i915#14544])
   [437]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@gem_pxp@hw-rejects-pxp-context.html
   [438]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@gem_pxp@hw-rejects-pxp-context.html

  * igt@gem_set_tiling_vs_blt@untiled-to-tiled:
    - shard-rkl:          [SKIP][439] ([i915#14544] / [i915#8411]) -> [SKIP][440] ([i915#8411])
   [439]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html
   [440]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html

  * igt@gem_set_tiling_vs_pwrite:
    - shard-rkl:          [SKIP][441] ([i915#14544] / [i915#3282]) -> [SKIP][442] ([i915#3282])
   [441]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@gem_set_tiling_vs_pwrite.html
   [442]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-7/igt@gem_set_tiling_vs_pwrite.html

  * igt@gem_userptr_blits@coherency-sync:
    - shard-rkl:          [SKIP][443] ([i915#14544] / [i915#3297]) -> [SKIP][444] ([i915#3297])
   [443]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@gem_userptr_blits@coherency-sync.html
   [444]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-5/igt@gem_userptr_blits@coherency-sync.html

  * igt@gem_userptr_blits@relocations:
    - shard-rkl:          [SKIP][445] ([i915#3281] / [i915#3297]) -> [SKIP][446] ([i915#14544] / [i915#3281] / [i915#3297])
   [445]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-4/igt@gem_userptr_blits@relocations.html
   [446]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@gem_userptr_blits@relocations.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-rkl:          [ABORT][447] ([i915#15131]) -> [INCOMPLETE][448] ([i915#13356])
   [447]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-1/igt@gem_workarounds@suspend-resume-context.html
   [448]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-7/igt@gem_workarounds@suspend-resume-context.html

  * igt@gen9_exec_parse@basic-rejected:
    - shard-rkl:          [SKIP][449] ([i915#2527]) -> [SKIP][450] ([i915#14544] / [i915#2527])
   [449]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-4/igt@gen9_exec_parse@basic-rejected.html
   [450]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@gen9_exec_parse@basic-rejected.html

  * igt@gen9_exec_parse@bb-start-param:
    - shard-rkl:          [SKIP][451] ([i915#14544] / [i915#2527]) -> [SKIP][452] ([i915#2527]) +1 other test skip
   [451]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@gen9_exec_parse@bb-start-param.html
   [452]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@gen9_exec_parse@bb-start-param.html

  * igt@i915_query@query-topology-unsupported:
    - shard-rkl:          [SKIP][453] ([i915#14544] / [i915#16079]) -> [SKIP][454] ([i915#16079])
   [453]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@i915_query@query-topology-unsupported.html
   [454]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-2/igt@i915_query@query-topology-unsupported.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-0:
    - shard-rkl:          [SKIP][455] ([i915#5286]) -> [SKIP][456] ([i915#14544] / [i915#5286]) +2 other tests skip
   [455]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html
   [456]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-rkl:          [SKIP][457] ([i915#14544] / [i915#5286]) -> [SKIP][458] ([i915#5286]) +1 other test skip
   [457]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html
   [458]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@linear-64bpp-rotate-270:
    - shard-rkl:          [SKIP][459] ([i915#3638]) -> [SKIP][460] ([i915#14544] / [i915#3638])
   [459]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-7/igt@kms_big_fb@linear-64bpp-rotate-270.html
   [460]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_big_fb@linear-64bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-270:
    - shard-rkl:          [SKIP][461] ([i915#14544] / [i915#3638]) -> [SKIP][462] ([i915#3638])
   [461]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html
   [462]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html

  * igt@kms_ccs@bad-rotation-90-y-tiled-ccs@pipe-c-hdmi-a-2:
    - shard-rkl:          [SKIP][463] ([i915#14098] / [i915#6095]) -> [SKIP][464] ([i915#14098] / [i915#14544] / [i915#6095]) +7 other tests skip
   [463]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-1/igt@kms_ccs@bad-rotation-90-y-tiled-ccs@pipe-c-hdmi-a-2.html
   [464]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_ccs@bad-rotation-90-y-tiled-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
    - shard-rkl:          [SKIP][465] ([i915#12313]) -> [SKIP][466] ([i915#12313] / [i915#14544])
   [465]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
   [466]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          [SKIP][467] ([i915#6095]) -> [SKIP][468] ([i915#14544] / [i915#6095]) +3 other tests skip
   [467]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-7/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-2.html
   [468]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-2:
    - shard-rkl:          [SKIP][469] ([i915#14544] / [i915#6095]) -> [SKIP][470] ([i915#6095]) +4 other tests skip
   [469]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-2.html
   [470]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2:
    - shard-rkl:          [SKIP][471] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][472] ([i915#14098] / [i915#6095]) +7 other tests skip
   [471]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2.html
   [472]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_chamelium_edid@hdmi-edid-read:
    - shard-rkl:          [SKIP][473] ([i915#11151] / [i915#7828]) -> [SKIP][474] ([i915#11151] / [i915#14544] / [i915#7828]) +3 other tests skip
   [473]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-7/igt@kms_chamelium_edid@hdmi-edid-read.html
   [474]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_chamelium_edid@hdmi-edid-read.html

  * igt@kms_chamelium_hpd@dp-hpd-after-suspend:
    - shard-rkl:          [SKIP][475] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][476] ([i915#11151] / [i915#7828]) +2 other tests skip
   [475]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html
   [476]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-rkl:          [SKIP][477] ([i915#15330] / [i915#3116]) -> [SKIP][478] ([i915#14544] / [i915#15330] / [i915#3116])
   [477]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@kms_content_protection@dp-mst-lic-type-1.html
   [478]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-rkl:          [SKIP][479] ([i915#13049]) -> [SKIP][480] ([i915#13049] / [i915#14544])
   [479]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@kms_cursor_crc@cursor-offscreen-512x170.html
   [480]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x170:
    - shard-rkl:          [SKIP][481] ([i915#13049] / [i915#14544]) -> [SKIP][482] ([i915#13049])
   [481]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
   [482]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-rkl:          [SKIP][483] ([i915#3555]) -> [SKIP][484] ([i915#14544] / [i915#3555]) +1 other test skip
   [483]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-5/igt@kms_cursor_crc@cursor-sliding-32x10.html
   [484]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
    - shard-rkl:          [SKIP][485] ([i915#4103]) -> [SKIP][486] ([i915#14544] / [i915#4103])
   [485]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
   [486]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html

  * igt@kms_dsc@dsc-basic-ultrajoiner:
    - shard-rkl:          [SKIP][487] ([i915#14544] / [i915#16361]) -> [SKIP][488] ([i915#16361])
   [487]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_dsc@dsc-basic-ultrajoiner.html
   [488]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_dsc@dsc-basic-ultrajoiner.html

  * igt@kms_dsc@dsc-fractional-bpp-ultrajoiner:
    - shard-rkl:          [SKIP][489] ([i915#16361]) -> [SKIP][490] ([i915#14544] / [i915#16361])
   [489]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-3/igt@kms_dsc@dsc-fractional-bpp-ultrajoiner.html
   [490]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_dsc@dsc-fractional-bpp-ultrajoiner.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-rkl:          [SKIP][491] ([i915#16680]) -> [SKIP][492] ([i915#14544] / [i915#16680])
   [491]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-3/igt@kms_fbcon_fbt@psr-suspend.html
   [492]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@chamelium:
    - shard-rkl:          [SKIP][493] ([i915#14544] / [i915#16084]) -> [SKIP][494] ([i915#16084])
   [493]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_feature_discovery@chamelium.html
   [494]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@dsc:
    - shard-rkl:          [SKIP][495] ([i915#16600]) -> [SKIP][496] ([i915#14544] / [i915#16600])
   [495]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-8/igt@kms_feature_discovery@dsc.html
   [496]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_feature_discovery@dsc.html

  * igt@kms_flip@2x-flip-vs-dpms:
    - shard-rkl:          [SKIP][497] ([i915#14544] / [i915#9934]) -> [SKIP][498] ([i915#9934]) +1 other test skip
   [497]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_flip@2x-flip-vs-dpms.html
   [498]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_flip@2x-flip-vs-dpms.html

  * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
    - shard-rkl:          [SKIP][499] ([i915#9934]) -> [SKIP][500] ([i915#14544] / [i915#9934]) +1 other test skip
   [499]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
   [500]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-glk:          [INCOMPLETE][501] ([i915#12745] / [i915#4839] / [i915#6113]) -> [INCOMPLETE][502] ([i915#12314] / [i915#12745] / [i915#4839])
   [501]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-glk3/igt@kms_flip@flip-vs-suspend.html
   [502]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk8/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend@a-hdmi-a1:
    - shard-glk:          [INCOMPLETE][503] ([i915#12745] / [i915#6113]) -> [INCOMPLETE][504] ([i915#12314] / [i915#12745])
   [503]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-glk3/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html
   [504]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-glk8/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-rkl:          [SKIP][505] ([i915#15643]) -> [SKIP][506] ([i915#14544] / [i915#15643]) +1 other test skip
   [505]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-5/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
   [506]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling:
    - shard-rkl:          [SKIP][507] ([i915#14544] / [i915#15643]) -> [SKIP][508] ([i915#15643])
   [507]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html
   [508]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html

  * igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-spr-indfb-draw-render:
    - shard-rkl:          [SKIP][509] ([i915#14544]) -> [SKIP][510] +24 other tests skip
   [509]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-spr-indfb-draw-render.html
   [510]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-4/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbchdr-tiling-4:
    - shard-rkl:          [SKIP][511] ([i915#5439]) -> [SKIP][512] ([i915#14544] / [i915#5439])
   [511]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@kms_frontbuffer_tracking@fbchdr-tiling-4.html
   [512]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_frontbuffer_tracking@fbchdr-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-rkl:          [SKIP][513] ([i915#14544] / [i915#1825]) -> [SKIP][514] ([i915#1825]) +1 other test skip
   [513]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt.html
   [514]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-gtt:
    - shard-rkl:          [SKIP][515] ([i915#1825]) -> [SKIP][516] ([i915#14544] / [i915#1825]) +1 other test skip
   [515]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-gtt.html
   [516]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-blt:
    - shard-rkl:          [SKIP][517] ([i915#14544] / [i915#15102]) -> [SKIP][518] ([i915#15102]) +11 other tests skip
   [517]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-blt.html
   [518]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-move:
    - shard-rkl:          [SKIP][519] ([i915#15102]) -> [SKIP][520] ([i915#14544] / [i915#15102]) +16 other tests skip
   [519]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-move.html
   [520]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-fullscreen:
    - shard-dg1:          [SKIP][521] ([i915#15102]) -> [SKIP][522] ([i915#15102] / [i915#4423])
   [521]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg1-13/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-fullscreen.html
   [522]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-19/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-move:
    - shard-rkl:          [SKIP][523] -> [SKIP][524] ([i915#14544]) +44 other tests skip
   [523]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-5/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-move.html
   [524]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-move.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-tglu:         [SKIP][525] ([i915#12713]) -> [SKIP][526] ([i915#1187] / [i915#12713])
   [525]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-tglu-9/igt@kms_hdr@brightness-with-hdr.html
   [526]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-2/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-rkl:          [SKIP][527] ([i915#15460]) -> [SKIP][528] ([i915#14544] / [i915#15460])
   [527]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@kms_joiner@invalid-modeset-big-joiner.html
   [528]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier-source-clamping:
    - shard-rkl:          [SKIP][529] ([i915#14544] / [i915#15709]) -> [SKIP][530] ([i915#15709]) +1 other test skip
   [529]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier-source-clamping.html
   [530]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier:
    - shard-rkl:          [SKIP][531] ([i915#15709]) -> [SKIP][532] ([i915#14544] / [i915#15709])
   [531]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-4/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier.html
   [532]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier.html

  * igt@kms_plane_lowres@tiling-4:
    - shard-rkl:          [SKIP][533] ([i915#14544] / [i915#3555]) -> [SKIP][534] ([i915#3555]) +2 other tests skip
   [533]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_plane_lowres@tiling-4.html
   [534]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-8/igt@kms_plane_lowres@tiling-4.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-rkl:          [SKIP][535] ([i915#14259]) -> [SKIP][536] ([i915#14259] / [i915#14544])
   [535]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-3/igt@kms_plane_multiple@tiling-yf.html
   [536]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_pm_backlight@fade:
    - shard-rkl:          [SKIP][537] ([i915#12343] / [i915#14544] / [i915#5354]) -> [SKIP][538] ([i915#12343] / [i915#5354])
   [537]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_pm_backlight@fade.html
   [538]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-5/igt@kms_pm_backlight@fade.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-rkl:          [SKIP][539] ([i915#14544] / [i915#3828]) -> [SKIP][540] ([i915#3828])
   [539]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_pm_dc@dc5-retention-flops.html
   [540]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-2/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-tglu:         [SKIP][541] ([i915#15128]) -> [SKIP][542] ([i915#15739])
   [541]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-tglu-6/igt@kms_pm_dc@dc9-dpms.html
   [542]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-tglu-2/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-rkl:          [SKIP][543] ([i915#3828]) -> [SKIP][544] ([i915#14544] / [i915#9340])
   [543]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@kms_pm_lpsp@kms-lpsp.html
   [544]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_rpm@package-g7:
    - shard-rkl:          [SKIP][545] ([i915#15403]) -> [SKIP][546] ([i915#14544] / [i915#15403])
   [545]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@kms_pm_rpm@package-g7.html
   [546]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_pm_rpm@package-g7.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf:
    - shard-rkl:          [SKIP][547] ([i915#11520] / [i915#14544]) -> [SKIP][548] ([i915#11520]) +2 other tests skip
   [547]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html
   [548]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-5/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area:
    - shard-rkl:          [SKIP][549] ([i915#11520]) -> [SKIP][550] ([i915#11520] / [i915#14544]) +2 other tests skip
   [549]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-5/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html
   [550]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr@fbc-psr-cursor-plane-move:
    - shard-rkl:          [SKIP][551] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][552] ([i915#1072] / [i915#9732]) +5 other tests skip
   [551]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_psr@fbc-psr-cursor-plane-move.html
   [552]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_psr@fbc-psr-cursor-plane-move.html

  * igt@kms_psr@fbc-psr-primary-blt:
    - shard-rkl:          [SKIP][553] ([i915#1072] / [i915#9732]) -> [SKIP][554] ([i915#1072] / [i915#14544] / [i915#9732]) +9 other tests skip
   [553]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-5/igt@kms_psr@fbc-psr-primary-blt.html
   [554]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_psr@fbc-psr-primary-blt.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-rkl:          [SKIP][555] ([i915#14544] / [i915#15949]) -> [SKIP][556] ([i915#15949])
   [555]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
   [556]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-2/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
    - shard-rkl:          [SKIP][557] ([i915#5289]) -> [SKIP][558] ([i915#14544] / [i915#5289])
   [557]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
   [558]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-rkl:          [SKIP][559] ([i915#14544] / [i915#5289]) -> [SKIP][560] ([i915#5289])
   [559]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
   [560]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-rkl:          [SKIP][561] ([i915#14544] / [i915#8623]) -> [SKIP][562] ([i915#8623])
   [561]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_tiled_display@basic-test-pattern.html
   [562]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-3/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-rkl:          [SKIP][563] ([i915#8623]) -> [SKIP][564] ([i915#14544] / [i915#8623])
   [563]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [564]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_vrr@lobf:
    - shard-rkl:          [SKIP][565] ([i915#11920] / [i915#14544]) -> [SKIP][566] ([i915#11920])
   [565]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@kms_vrr@lobf.html
   [566]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-2/igt@kms_vrr@lobf.html

  * igt@perf_pmu@module-unload:
    - shard-dg1:          [ABORT][567] ([i915#15778]) -> [ABORT][568] ([i915#13029] / [i915#15778])
   [567]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-dg1-17/igt@perf_pmu@module-unload.html
   [568]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-dg1-13/igt@perf_pmu@module-unload.html

  * igt@prime_udl@share-import-addfb:
    - shard-rkl:          [SKIP][569] ([i915#14544] / [i915#16420]) -> [SKIP][570] ([i915#16420])
   [569]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-6/igt@prime_udl@share-import-addfb.html
   [570]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-7/igt@prime_udl@share-import-addfb.html

  * igt@prime_vgem@fence-read-hang:
    - shard-rkl:          [SKIP][571] ([i915#3708]) -> [SKIP][572] ([i915#14544] / [i915#3708])
   [571]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19041/shard-rkl-5/igt@prime_vgem@fence-read-hang.html
   [572]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/shard-rkl-6/igt@prime_vgem@fence-read-hang.html

  
  [i915#10055]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10055
  [i915#10056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10056
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#1099]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1099
  [i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
  [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/118
  [i915#11814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11814
  [i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
  [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
  [i915#11965]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11965
  [i915#12178]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12178
  [i915#12193]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12193
  [i915#12276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12276
  [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
  [i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
  [i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
  [i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
  [i915#12358]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12358
  [i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
  [i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
  [i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
  [i915#12756]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12756
  [i915#12761]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12761
  [i915#12964]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12964
  [i915#13008]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13008
  [i915#13026]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13026
  [i915#13029]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13029
  [i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
  [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
  [i915#13179]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13179
  [i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
  [i915#13363]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13363
  [i915#13476]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13476
  [i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
  [i915#13691]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13691
  [i915#13717]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13717
  [i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
  [i915#13790]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13790
  [i915#13820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13820
  [i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
  [i915#14073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14073
  [i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
  [i915#14118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14118
  [i915#14152]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14152
  [i915#14242]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14242
  [i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259
  [i915#14419]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14419
  [i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
  [i915#14545]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14545
  [i915#14586]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14586
  [i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712
  [i915#14888]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14888
  [i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
  [i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
  [i915#15104]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15104
  [i915#15128]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15128
  [i915#15131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15131
  [i915#15132]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15132
  [i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243
  [i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
  [i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330
  [i915#15342]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15342
  [i915#15391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15391
  [i915#15403]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15403
  [i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458
  [i915#15459]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15459
  [i915#15460]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15460
  [i915#15479]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15479
  [i915#15481]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15481
  [i915#15582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15582
  [i915#15643]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15643
  [i915#15672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15672
  [i915#15709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15709
  [i915#15739]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15739
  [i915#15778]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15778
  [i915#15816]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15816
  [i915#15865]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15865
  [i915#15867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15867
  [i915#15949]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15949
  [i915#15989]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15989
  [i915#15990]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15990
  [i915#15991]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15991
  [i915#16056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16056
  [i915#16079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16079
  [i915#16081]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16081
  [i915#16084]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16084
  [i915#16112]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16112
  [i915#16236]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16236
  [i915#16348]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16348
  [i915#16361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16361
  [i915#16386]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16386
  [i915#16396]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16396
  [i915#16420]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16420
  [i915#16464]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16464
  [i915#16471]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16471
  [i915#16593]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16593
  [i915#16594]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16594
  [i915#16599]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16599
  [i915#16600]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16600
  [i915#16644]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16644
  [i915#16680]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16680
  [i915#16793]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16793
  [i915#16837]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16837
  [i915#16844]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16844
  [i915#16852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16852
  [i915#16867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16867
  [i915#16869]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16869
  [i915#16870]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16870
  [i915#16872]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16872
  [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2681
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4565]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4565
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
  [i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
  [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
  [i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
  [i915#4958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4958
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
  [i915#5882]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5882
  [i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6113]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6113
  [i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
  [i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
  [i915#6806]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6806
  [i915#7178]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7178
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7862]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7862
  [i915#7882]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7882
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
  [i915#8562]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8562
  [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8808
  [i915#8812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8812
  [i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
  [i915#8821]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8821
  [i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
  [i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_9071 -> IGTPW_15723
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_19041: 15e2ba2fb6d25c03d89519aec46f8d5be3e118ad @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_15723: 5e22efdff822b9c4f96b2bc5f3237e0931dff9b4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_9071: 9071
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15723/index.html

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