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From: "Sundaresan, Sujaritha" <sujaritha.sundaresan@intel.com>
To: Riana Tauro <riana.tauro@intel.com>, <igt-dev@lists.freedesktop.org>
Cc: badal.nilawar@intel.com
Subject: Re: [igt-dev] [PATCH i-g-t 1/2] tests/xe: Add GT id to C6 assertions
Date: Tue, 5 Sep 2023 13:10:24 +0530	[thread overview]
Message-ID: <63cd35a0-a6fb-2d0a-7004-786ad4910e3a@intel.com> (raw)
In-Reply-To: <20230905052058.2216763-2-riana.tauro@intel.com>


On 9/5/2023 10:50 AM, Riana Tauro wrote:
> Add GT id to igt assertions in xe_pm_residency that
> checks if a GT is in a required C State.
> This helps to identify which GT is causing a failure.
>
> No functional changes.
>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
>   tests/intel/xe_pm_residency.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/tests/intel/xe_pm_residency.c b/tests/intel/xe_pm_residency.c
> index bf8230114..a538d1917 100644
> --- a/tests/intel/xe_pm_residency.c
> +++ b/tests/intel/xe_pm_residency.c
> @@ -100,7 +100,7 @@ static void test_idle_residency(int fd, int gt, enum test_type flag)
>   {
>   	unsigned long elapsed_ms, residency_start, residency_end;
>   
> -	igt_assert_f(igt_wait(xe_is_gt_in_c6(fd, gt), 1000, 1), "GT not in C6\n");
> +	igt_assert_f(igt_wait(xe_is_gt_in_c6(fd, gt), 1000, 1), "GT %d not in C6\n", gt);
>   
>   	if (flag == TEST_S2IDLE) {
>   		/*
> @@ -156,7 +156,7 @@ static void toggle_gt_c6(int fd, int n)
>   		/* check if all gts are in C0 after forcewake is acquired */
>   		xe_for_each_gt(fd, gt)
>   			igt_assert_f(!xe_is_gt_in_c6(fd, gt),
> -				     "Forcewake acquired, GT should be in C0\n");
> +				     "Forcewake acquired, GT %d should be in C0\n", gt);
>   
>   		if (n == NUM_REPS)
>   			measure_power(&gpu, &gt_c0_power);
> @@ -165,7 +165,7 @@ static void toggle_gt_c6(int fd, int n)
>   		/* check if all gts are in C6 after forcewake is released */
>   		xe_for_each_gt(fd, gt)
>   			igt_assert_f(igt_wait(xe_is_gt_in_c6(fd, gt), 1000, 1),
> -				     "Forcewake released, GT should be in C6\n");
> +				     "Forcewake released, GT %d should be in C6\n", gt);
>   
>   		if (n == NUM_REPS)
>   			measure_power(&gpu, &gt_c6_power);
> @@ -194,7 +194,7 @@ igt_main
>   	igt_describe("Validate GT C6 on idle");
>   	igt_subtest("gt-c6-on-idle")
>   		xe_for_each_gt(fd, gt)
> -			igt_assert_f(igt_wait(xe_is_gt_in_c6(fd, gt), 1000, 1), "GT not in C6\n");
> +			igt_assert_f(igt_wait(xe_is_gt_in_c6(fd, gt), 1000, 1), "GT %d not in C6\n", gt);
>   
>   	igt_describe("Validate idle residency measured over suspend cycle is within the tolerance");
>   	igt_subtest("gt-c6-freeze") {

The pre merge failures don't seem to be related. lgtm,

Reviewed-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>

  reply	other threads:[~2023-09-05  7:40 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-05  5:20 [igt-dev] [PATCH i-g-t 0/2] Add GT id to identify failures Riana Tauro
2023-09-05  5:20 ` [igt-dev] [PATCH i-g-t 1/2] tests/xe: Add GT id to C6 assertions Riana Tauro
2023-09-05  7:40   ` Sundaresan, Sujaritha [this message]
2023-09-05  5:20 ` [igt-dev] [PATCH i-g-t 2/2] tests/xe: Add GT id to identify failures Riana Tauro
2023-09-05  7:41   ` Sundaresan, Sujaritha
2023-09-05  5:44 ` [igt-dev] ✗ GitLab.Pipeline: warning for " Patchwork
2023-09-05  6:16 ` [igt-dev] [PATCH i-g-t 0/2] " Gupta, Anshuman
2023-09-05  6:51   ` Riana Tauro
2023-09-05  6:54     ` Gupta, Anshuman
2023-09-05  6:16 ` [igt-dev] ✗ CI.xeBAT: failure for " Patchwork
2023-09-05 10:56   ` Tauro, Riana
2023-09-06  7:56     ` Yedireswarapu, SaiX Nandan
2023-09-05  6:25 ` [igt-dev] ✗ Fi.CI.BAT: " Patchwork
2023-09-06  7:36 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2023-09-06 10:10 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork

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