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* [PATCH i-g-t] tests/amdgpu: fix secure bounce test failure on APUs
@ 2024-08-15  2:01 Tim Huang
  2024-08-15  2:12 ` vitaly prosyak
                   ` (4 more replies)
  0 siblings, 5 replies; 6+ messages in thread
From: Tim Huang @ 2024-08-15  2:01 UTC (permalink / raw)
  To: igt-dev; +Cc: vitaly.prosyak, alexander.deucher, jie1zhan, Tim Huang

Some APUs have address tweak secure mechanisms that encrypt
destination data preventing it from matching the original data.

Rework the test case to ensure compatibility with these APUs.

Signed-off-by: Tim Huang <tim.huang@amd.com>
---
 tests/amdgpu/amd_security.c | 28 ++++++----------------------
 1 file changed, 6 insertions(+), 22 deletions(-)

diff --git a/tests/amdgpu/amd_security.c b/tests/amdgpu/amd_security.c
index ec6883d3d..024cadc05 100644
--- a/tests/amdgpu/amd_security.c
+++ b/tests/amdgpu/amd_security.c
@@ -147,8 +147,6 @@ amdgpu_bo_move(amdgpu_device_handle device, int fd,
  */
 static const uint8_t secure_pattern[] = { 0x5A, 0xFE, 0x05, 0xEC };
 
-static const uint8_t secure_pattern2[] = { 0xDE, 0xAD, 0xBE, 0xEF };
-
 static void
 amdgpu_secure_bounce(amdgpu_device_handle device_handle, int fd,
 		struct drm_amdgpu_info_hw_ip  *sdma_info,
@@ -209,27 +207,13 @@ amdgpu_secure_bounce(amdgpu_device_handle device_handle, int fd,
 	amdgpu_bo_lcopy(device_handle, ring_context, ip_block, SECURE_BUFFER_SIZE,
 			secure == true ? 1 : 0);
 
-	/* Verify the contents of Bob. */
-	for (pp = (__typeof__(pp))ring_context->bo2_cpu;
-	     pp < (__typeof__(pp)) ring_context->bo2_cpu + SECURE_BUFFER_SIZE;
-	     pp += sizeof(secure_pattern)) {
-		r = memcmp(pp, secure_pattern, sizeof(secure_pattern));
-		if (r) {
-			// test failure
-			igt_assert(false);
-			break;
-		}
-	}
-	/* Fill Bob with a pattern2 */
-	for (pp = (__typeof__(pp))ring_context->bo2_cpu;
-		pp < (__typeof__(pp)) ring_context->bo2_cpu + SECURE_BUFFER_SIZE;
-		pp += sizeof(secure_pattern2))
-		memcpy(pp, secure_pattern2, sizeof(secure_pattern2));
-
 	/* Move Bob to the GTT domain. */
 	amdgpu_bo_move(device_handle, fd, ring_context, ip_block,
 			AMDGPU_GEM_DOMAIN_GTT, 0);
 
+	/* Clean Alice first before do the copy from bob. */
+	memset((void *)ring_context->bo_cpu, 0, SECURE_BUFFER_SIZE);
+
 	/* sDMA TMZ copy from Bob to Alice.
 	 * bo is a source ,bo2 is destination
 	 */
@@ -250,11 +234,11 @@ amdgpu_secure_bounce(amdgpu_device_handle device_handle, int fd,
 	amdgpu_bo_lcopy(device_handle, ring_context, ip_block, SECURE_BUFFER_SIZE,
 			secure == true ? 1 : 0);
 
-	/* Verify the content of Alice if it matches to pattern2*/
+	/* Verify the content of Alice if it matches to pattern */
 	for (pp = (__typeof__(pp))ring_context->bo_cpu;
 	     pp < (__typeof__(pp)) ring_context->bo_cpu + SECURE_BUFFER_SIZE;
-	     pp += sizeof(secure_pattern2)) {
-		r = memcmp(pp, secure_pattern2, sizeof(secure_pattern2));
+	     pp += sizeof(secure_pattern)) {
+		r = memcmp(pp, secure_pattern, sizeof(secure_pattern));
 		if (r) {
 			// test failure
 			igt_assert(false);
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2024-08-16  6:06 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-08-15  2:01 [PATCH i-g-t] tests/amdgpu: fix secure bounce test failure on APUs Tim Huang
2024-08-15  2:12 ` vitaly prosyak
2024-08-15  2:40 ` ✓ CI.xeBAT: success for " Patchwork
2024-08-15  2:50 ` ✓ Fi.CI.BAT: " Patchwork
2024-08-15  8:12 ` ✗ CI.xeFULL: failure " Patchwork
2024-08-16  6:05 ` ✗ Fi.CI.IGT: " Patchwork

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