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* [PATCH] tests/intel/xe_exec_system_allocator: Skip reserved PAT madvise indices
@ 2026-11-04  7:51 nishit.sharma
  2026-11-04  9:11 ` ✓ Xe.CI.BAT: success for tests/intel/xe_exec_system_allocator: Skip reserved PAT madvise indices (rev3) Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 9+ messages in thread
From: nishit.sharma @ 2026-11-04  7:51 UTC (permalink / raw)
  To: igt-dev, gustavo.sousa, arvind.yadav; +Cc: kamil.konieczny

From: Nishit Sharma <nishit.sharma@intel.com>

KMD may mark some PAT entries as reserved in the debugfs pat_sw_config
dump (e.g. Wa_14026539277 reserves the 2-way-coherent entries), and
such entries must not be used. Skip the PAT-index madvise subtests when
the selected PAT index is reserved instead of decoding the coherency
bits of the PAT entry.

Always read the PAT software configuration rather than only when a
specific workaround is active, so that any future reservation is
honoured as well. Kernels that don't expose pat_sw_config have no
reserved entries to report, so every index is treated as usable there.

v2:
- Read pat_sw_config unconditionally (Gustavo)
- Don't mention Wa_14026539277 in the skip message (Gustavo)

Signed-off-by: Nishit Sharma <nishit.sharma@intel.com>
---
 tests/intel/xe_exec_system_allocator.c | 32 ++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/tests/intel/xe_exec_system_allocator.c b/tests/intel/xe_exec_system_allocator.c
index 45ec62813..c6a8872b4 100644
--- a/tests/intel/xe_exec_system_allocator.c
+++ b/tests/intel/xe_exec_system_allocator.c
@@ -1216,6 +1216,16 @@ xe_vm_madvixe_pat_attr(int fd, uint32_t vm, uint64_t addr, uint64_t range,
 		      DRM_XE_MEM_RANGE_ATTR_PAT, pat_index, 0, 0);
 }
 
+static bool pat_idx_is_reserved(const struct intel_pat_cache *pat_sw_config,
+				int32_t num_pat_entries,
+				uint8_t pat_idx)
+{
+	if (pat_idx >= num_pat_entries)
+		return false;
+
+	return pat_sw_config->entries[pat_idx].rsvd;
+}
+
 static void
 xe_vm_madvise_atomic_attr(int fd, uint32_t vm, uint64_t addr, uint64_t range,
 			  int mem_attr)
@@ -2647,6 +2657,8 @@ int igt_main()
 
 	int fd, svm_compute_loops = getenv_int("IGT_SVM_COMPUTE_LOOPS", 1);
 	uint16_t dev_id;
+	struct intel_pat_cache pat_sw_config = {};
+	int32_t num_pat_entries = 0;
 
 	igt_fixture() {
 		struct xe_device *xe;
@@ -2658,6 +2670,19 @@ int igt_main()
 		va_bits = xe->va_bits;
 		open_sync_file();
 		dev_id = intel_get_drm_devid(fd);
+
+		/*
+		 * KMD may mark PAT entries as reserved for various reasons
+		 * (e.g. workarounds). Older kernels without the debugfs
+		 * pat_sw_config entry don't expose that information, so
+		 * treat every index as usable in that case.
+		 */
+		num_pat_entries = xe_get_pat_sw_config(fd, &pat_sw_config, 0);
+		if (num_pat_entries <= 0) {
+			igt_debug("Couldn't get Xe PAT software configuration (%d)\n",
+				  num_pat_entries);
+			num_pat_entries = 0;
+		}
 	}
 
 	for (const struct section *s = sections; s->name; s++) {
@@ -2879,6 +2904,8 @@ int igt_main()
 
 	for (const struct section *s = intel_get_pat_idx_functions; s->name; s++) {
 		igt_subtest_f("pat-index-%s", s->name) {
+			uint8_t pat_idx;
+
 			if ((strstr(s->name, "madvise-pat-idx-wt-") ||
 			     strstr(s->name, "madvise-pat-idx-uc-comp-")) &&
 			     !xe_has_vram(fd)) {
@@ -2887,6 +2914,11 @@ int igt_main()
 			if (IS_PONTEVECCHIO(dev_id) &&
 			    strstr(s->name, "madvise-pat-idx-uc-comp-"))
 				igt_skip("Skipping compression-related PAT index on PVC\n");
+
+			pat_idx = s->fn(fd);
+			igt_skip_on_f(pat_idx_is_reserved(&pat_sw_config, num_pat_entries,
+							  pat_idx),
+				      "PAT index %u is reserved\n", pat_idx);
 			xe_for_each_engine(fd, hwe)
 				test_exec(fd, hwe, 1, 1, SZ_4M, 0, 0, NULL, NULL, s->flags, s->fn);
 		}
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 9+ messages in thread
* [PATCH] tests/intel/xe_exec_system_allocator: Skip reserved PAT madvise indices
@ 2026-11-02  3:52 nishit.sharma
  2026-11-03 15:14 ` Gustavo Sousa
  0 siblings, 1 reply; 9+ messages in thread
From: nishit.sharma @ 2026-11-02  3:52 UTC (permalink / raw)
  To: igt-dev, gustavo.sousa, arvind.yadav; +Cc: kamil.konieczny

From: Nishit Sharma <nishit.sharma@intel.com>

With Wa_14026539277 active, KMD marks the 2-way-coherent PAT entries as
reserved in the debugfs pat_sw_config dump and they must not be used.
Skip the PAT-index madvise subtests when the selected PAT index is
reserved instead of decoding the coherency bits of the PAT entry.

Signed-off-by: Nishit Sharma <nishit.sharma@intel.com>
---
 tests/intel/xe_exec_system_allocator.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/tests/intel/xe_exec_system_allocator.c b/tests/intel/xe_exec_system_allocator.c
index 45ec62813..2a0b89f7a 100644
--- a/tests/intel/xe_exec_system_allocator.c
+++ b/tests/intel/xe_exec_system_allocator.c
@@ -26,6 +26,7 @@
 #include "xe/xe_gt.h"
 #include "xe/xe_ioctl.h"
 #include "xe/xe_query.h"
+#include "xe/xe_wa.h"
 #include <string.h>
 
 #define USER_FENCE_VALUE	0xdeadbeefdeadbeefull
@@ -1216,6 +1217,16 @@ xe_vm_madvixe_pat_attr(int fd, uint32_t vm, uint64_t addr, uint64_t range,
 		      DRM_XE_MEM_RANGE_ATTR_PAT, pat_index, 0, 0);
 }
 
+static bool pat_idx_is_reserved(const struct intel_pat_cache *pat_sw_config,
+				int32_t num_pat_entries,
+				uint8_t pat_idx)
+{
+	if (pat_idx >= num_pat_entries)
+		return false;
+
+	return pat_sw_config->entries[pat_idx].rsvd;
+}
+
 static void
 xe_vm_madvise_atomic_attr(int fd, uint32_t vm, uint64_t addr, uint64_t range,
 			  int mem_attr)
@@ -2647,6 +2658,8 @@ int igt_main()
 
 	int fd, svm_compute_loops = getenv_int("IGT_SVM_COMPUTE_LOOPS", 1);
 	uint16_t dev_id;
+	struct intel_pat_cache pat_sw_config = {};
+	int32_t num_pat_entries = 0;
 
 	igt_fixture() {
 		struct xe_device *xe;
@@ -2658,6 +2671,11 @@ int igt_main()
 		va_bits = xe->va_bits;
 		open_sync_file();
 		dev_id = intel_get_drm_devid(fd);
+		if (xe_wa(fd, "14026539277")) {
+			num_pat_entries = xe_get_pat_sw_config(fd, &pat_sw_config, 0);
+			igt_assert_f(num_pat_entries > 0,
+				     "Couldn't get Xe PAT software configuration\n");
+		}
 	}
 
 	for (const struct section *s = sections; s->name; s++) {
@@ -2887,6 +2905,10 @@ int igt_main()
 			if (IS_PONTEVECCHIO(dev_id) &&
 			    strstr(s->name, "madvise-pat-idx-uc-comp-"))
 				igt_skip("Skipping compression-related PAT index on PVC\n");
+
+			igt_skip_on_f(pat_idx_is_reserved(&pat_sw_config, num_pat_entries,
+							  s->fn(fd)),
+				      "PAT index reserved by Wa_14026539277\n");
 			xe_for_each_engine(fd, hwe)
 				test_exec(fd, hwe, 1, 1, SZ_4M, 0, 0, NULL, NULL, s->flags, s->fn);
 		}
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 9+ messages in thread
* [PATCH] tests/intel/xe_exec_system_allocator: Skip reserved PAT madvise indices
@ 2026-10-29  6:36 nishit.sharma
  2026-10-30 23:04 ` Gustavo Sousa
  0 siblings, 1 reply; 9+ messages in thread
From: nishit.sharma @ 2026-10-29  6:36 UTC (permalink / raw)
  To: igt-dev, arvind.yadav; +Cc: kamil.konieczny, gustavo.sousa

From: Nishit Sharma <nishit.sharma@intel.com>

With Wa_14026539277 active, KMD marks the 2-way-coherent PAT entries as
reserved in the debugfs pat_sw_config dump and they must not be used.
Skip the PAT-index madvise subtests when the selected PAT index is
reserved instead of decoding the coherency bits of the PAT entry.

Signed-off-by: Nishit Sharma <nishit.sharma@intel.com>
---
 tests/intel/xe_exec_system_allocator.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/tests/intel/xe_exec_system_allocator.c b/tests/intel/xe_exec_system_allocator.c
index 45ec62813..38e550896 100644
--- a/tests/intel/xe_exec_system_allocator.c
+++ b/tests/intel/xe_exec_system_allocator.c
@@ -26,6 +26,7 @@
 #include "xe/xe_gt.h"
 #include "xe/xe_ioctl.h"
 #include "xe/xe_query.h"
+#include "xe/xe_wa.h"
 #include <string.h>
 
 #define USER_FENCE_VALUE	0xdeadbeefdeadbeefull
@@ -1216,6 +1217,24 @@ xe_vm_madvixe_pat_attr(int fd, uint32_t vm, uint64_t addr, uint64_t range,
 		      DRM_XE_MEM_RANGE_ATTR_PAT, pat_index, 0, 0);
 }
 
+static bool pat_idx_is_reserved(int fd, uint8_t pat_idx)
+{
+	struct intel_pat_cache pat_sw_config = {};
+	int32_t num_pat_entries;
+
+	if (!xe_wa(fd, "14026539277"))
+		return false;
+
+	num_pat_entries = xe_get_pat_sw_config(fd, &pat_sw_config, 0);
+	igt_assert_f(num_pat_entries > 0,
+		     "Couldn't get Xe PAT software configuration\n");
+
+	if (pat_idx >= num_pat_entries)
+		return false;
+
+	return pat_sw_config.entries[pat_idx].rsvd;
+}
+
 static void
 xe_vm_madvise_atomic_attr(int fd, uint32_t vm, uint64_t addr, uint64_t range,
 			  int mem_attr)
@@ -2887,6 +2906,9 @@ int igt_main()
 			if (IS_PONTEVECCHIO(dev_id) &&
 			    strstr(s->name, "madvise-pat-idx-uc-comp-"))
 				igt_skip("Skipping compression-related PAT index on PVC\n");
+
+			igt_skip_on_f(pat_idx_is_reserved(fd, s->fn(fd)),
+				      "PAT index reserved by Wa_14026539277\n");
 			xe_for_each_engine(fd, hwe)
 				test_exec(fd, hwe, 1, 1, SZ_4M, 0, 0, NULL, NULL, s->flags, s->fn);
 		}
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 9+ messages in thread
end of thread, other threads:[~2026-11-04 23:57 UTC | newest]

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2026-11-04  7:51 [PATCH] tests/intel/xe_exec_system_allocator: Skip reserved PAT madvise indices nishit.sharma
2026-11-04  9:11 ` ✓ Xe.CI.BAT: success for tests/intel/xe_exec_system_allocator: Skip reserved PAT madvise indices (rev3) Patchwork
2026-11-04  9:30 ` ✓ i915.CI.BAT: " Patchwork
2026-11-04 21:00 ` [PATCH] tests/intel/xe_exec_system_allocator: Skip reserved PAT madvise indices Gustavo Sousa
2026-11-04 23:56 ` ✓ Xe.CI.FULL: success for tests/intel/xe_exec_system_allocator: Skip reserved PAT madvise indices (rev3) Patchwork
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2026-11-02  3:52 [PATCH] tests/intel/xe_exec_system_allocator: Skip reserved PAT madvise indices nishit.sharma
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2026-10-29  6:36 nishit.sharma
2026-10-30 23:04 ` Gustavo Sousa

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