[PATCH i-g-t 0/8] intel_vbt_decode: Sync intel_vbt_defs.h with latest changes

[PATCH i-g-t 0/8] intel_vbt_decode: Sync intel_vbt_defs.h with latest changes

[Ankit Nautiyal]

Add VBT bits for:
 - eDP Data override:
   - 4d33c77cf2c3 ("drm/i915/vbt: Add eDP Data rate overrride field in VBT")
 - eDP Pipe Joiner Feature:
   - 1b85a9b04681 ("drm/i915/vbt: Add edp pipe joiner enable/disable bits")

Note :
 - The commit:
   f3c65a8e9b09 ("drm/i915/vbt: split up DSI VBT defs to a separate file")
   only moved MIPI definitions to intel_dsi_vbt_defs.h which are already
   synced with definitions in IGT.

Rev2:
 - Use the commit ID which actually changes intel_vbt_defs.h (Kamil)

Rev3:
 - Split patches for header sync. (Ville)

Rev4:
 - Use pipe_joiner_enable to match with kernel variable name. (Karthik)

Rev5:
 - Use the script shared by Jani [1], to synchronize the intel_vbt_defs.h
   instead of hand rolled version. (Ville, Jani).
 - Add the commit that introduced `dedicated_external` and
   `dyn_port_over_tc`.
 - Add macros required by the intel_vbt_defs.h in
   include/linux_scaffolding.h and include this in intel_vbt_decode.c
 - Dump the `dedicated_external` and `dyn_port_over_tc` in
   intel_vbt_decode.c.

[1] https://lore.kernel.org/igt-dev/da72e919b7cbd787e793f0141697f7c37957f998@intel.com/

Ankit Nautiyal (8):
  include/linux_scaffold: Add BIT_U{8,16,32} macros
  tools/intel_vbt_decode.c: Include linux_scaffold.h
  tools/intel_vbt_defs: sync intel_vbt_defs.h with kernel commit
    4d33c77cf2c3
  tools/intel_vbt_defs: sync intel_vbt_defs.h with kernel commit
    203c7904f2d8
  tools/intel_vbt_defs: sync intel_vbt_defs.h with kernel commit
    1b85a9b04681
  tools/intel_vbt_decode: dump eDP data rate override field
  tools/intel_vbt_decode: dump eDP joiner enable field
  tools/intel_vbt_decode: Dump dedicated_external and dyn_port_over_tc
    fields

 include/linux_scaffold.h |  4 +++
 tools/intel_vbt_decode.c | 53 +++++++++++++++++++++++++++++++++++-----
 tools/intel_vbt_defs.h   | 22 ++++++++++++++++-
 3 files changed, 72 insertions(+), 7 deletions(-)

-- 
2.45.2

[PATCH i-g-t 1/8] include/linux_scaffold: Add BIT_U{8,16,32} macros

[Ankit Nautiyal]

Add macros to accommodate the kernel macros BIT_U8, BIT_U16, BIT_U32
in the header file `intel_vbt_defs.h` copied from the kernel.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 include/linux_scaffold.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/linux_scaffold.h b/include/linux_scaffold.h
index 281aa5e730ed..a3acaa16117c 100644
--- a/include/linux_scaffold.h
+++ b/include/linux_scaffold.h
@@ -57,4 +57,8 @@ static inline s64 sign_extend64(u64 value, int index)
 #define FIELD_GET(mask, reg) \
 	(typeof(mask))(((reg) & (mask)) >> __bf_shf(mask))
 
+#define BIT_U8(n) ((u8)(1U << (n)))
+#define BIT_U16(n) ((u16)(1U << (n)))
+#define BIT_U32(n) ((u32)(1U << (n)))
+
 #endif /* _INTEL_GPU_COMMANDS_SCAFFOLD_H_ */
-- 
2.45.2

[PATCH i-g-t 2/8] tools/intel_vbt_decode.c: Include linux_scaffold.h

[Ankit Nautiyal]

linux_scaffold.h provides kernel compat macros including GENMASK and
BIT_U32, which will be needed by intel_vbt_defs.h in subsequent changes.
Include it in intel_vbt_decode.c and remove the now duplicate typedefs
for u8, u16, u32, and u64.

While at it, move drmtest.h in asciibetical order.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 tools/intel_vbt_decode.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index d4aada743e42..7785e9e82b1f 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -38,17 +38,13 @@
 #include <sys/stat.h>
 #include <sys/types.h>
 
+#include "drmtest.h"
 #include "igt_aux.h"
 #include "igt_halffloat.h"
 #include "intel_chipset.h"
 #include "intel_io.h"
-#include "drmtest.h"
+#include "linux_scaffold.h"
 
-/* kernel types for intel_vbt_defs.h */
-typedef uint8_t u8;
-typedef uint16_t u16;
-typedef uint32_t u32;
-typedef uint64_t u64;
 #define __packed __attribute__ ((packed))
 
 #define _INTEL_BIOS_PRIVATE
-- 
2.45.2

[PATCH i-g-t 3/8] tools/intel_vbt_defs: sync intel_vbt_defs.h with kernel commit 4d33c77cf2c3

[Ankit Nautiyal]

Synchronize intel_vbt_defs.h with kernel commit:

4d33c77cf2c3 ("drm/i915/vbt: Add eDP Data rate overrride field in VBT")

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 tools/intel_vbt_defs.h | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/tools/intel_vbt_defs.h b/tools/intel_vbt_defs.h
index 6612d3a4ec49..70e31520c560 100644
--- a/tools/intel_vbt_defs.h
+++ b/tools/intel_vbt_defs.h
@@ -437,6 +437,22 @@ enum vbt_gmbus_ddi {
 #define BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5	6
 #define BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20	7
 
+/* EDP link rate 263+ */
+#define BDB_263_VBT_EDP_LINK_RATE_1_62		BIT_U32(0)
+#define BDB_263_VBT_EDP_LINK_RATE_2_16		BIT_U32(1)
+#define BDB_263_VBT_EDP_LINK_RATE_2_43		BIT_U32(2)
+#define BDB_263_VBT_EDP_LINK_RATE_2_7		BIT_U32(3)
+#define BDB_263_VBT_EDP_LINK_RATE_3_24		BIT_U32(4)
+#define BDB_263_VBT_EDP_LINK_RATE_4_32		BIT_U32(5)
+#define BDB_263_VBT_EDP_LINK_RATE_5_4		BIT_U32(6)
+#define BDB_263_VBT_EDP_LINK_RATE_6_75		BIT_U32(7)
+#define BDB_263_VBT_EDP_LINK_RATE_8_1		BIT_U32(8)
+#define BDB_263_VBT_EDP_LINK_RATE_10		BIT_U32(9)
+#define BDB_263_VBT_EDP_LINK_RATE_13_5		BIT_U32(10)
+#define BDB_263_VBT_EDP_LINK_RATE_20		BIT_U32(11)
+#define BDB_263_VBT_EDP_NUM_RATES		12
+#define BDB_263_VBT_EDP_RATES_MASK		GENMASK(BDB_263_VBT_EDP_NUM_RATES - 1, 0)
+
 /*
  * The child device config, aka the display device data structure, provides a
  * description of a port and its configuration on the platform.
@@ -547,6 +563,8 @@ struct child_device_config {
 	u8 dp_max_link_rate:3;					/* 216+ */
 	u8 dp_max_link_rate_reserved:5;				/* 216+ */
 	u8 efp_index;						/* 256+ */
+	u32 edp_data_rate_override:12;				/* 263+ */
+	u32 edp_data_rate_override_reserved:20;			/* 263+ */
 } __packed;
 
 struct bdb_general_definitions {
-- 
2.45.2

[PATCH i-g-t 4/8] tools/intel_vbt_defs: sync intel_vbt_defs.h with kernel commit 203c7904f2d8

[Ankit Nautiyal]

Synchronize intel_vbt_defs.h with kernel commit:

203c7904f2d8 ("drm/i915/vbt: Add fields dedicated_external and dyn_port_over_tc")

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 tools/intel_vbt_defs.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/intel_vbt_defs.h b/tools/intel_vbt_defs.h
index 70e31520c560..57fda5824c9c 100644
--- a/tools/intel_vbt_defs.h
+++ b/tools/intel_vbt_defs.h
@@ -554,7 +554,8 @@ struct child_device_config {
 	u8 dvo_function;
 	u8 dp_usb_type_c:1;					/* 195+ */
 	u8 tbt:1;						/* 209+ */
-	u8 flags2_reserved:2;					/* 195+ */
+	u8 dedicated_external:1;				/* 264+ */
+	u8 dyn_port_over_tc:1;					/* 264+ */
 	u8 dp_port_trace_length:4;				/* 209+ */
 	u8 dp_gpio_index;					/* 195+ */
 	u16 dp_gpio_pin_num;					/* 195+ */
-- 
2.45.2

[PATCH i-g-t 5/8] tools/intel_vbt_defs: sync intel_vbt_defs.h with kernel commit 1b85a9b04681

[Ankit Nautiyal]

Synchronize intel_vbt_defs.h with kernel commit:

1b85a9b04681 ("drm/i915/vbt: Add edp pipe joiner enable/disable bits")

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 tools/intel_vbt_defs.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/intel_vbt_defs.h b/tools/intel_vbt_defs.h
index 57fda5824c9c..0dc13d080e8a 100644
--- a/tools/intel_vbt_defs.h
+++ b/tools/intel_vbt_defs.h
@@ -1109,6 +1109,7 @@ struct bdb_edp {
 	u16 edp_dsc_disable;					/* 251+ */
 	u16 t6_delay_support;					/* 260+ */
 	u16 link_idle_time[16];					/* 260+ */
+	u16 pipe_joiner_enable;					/* 261+ */
 } __packed;
 
 /*
-- 
2.45.2

[PATCH i-g-t 6/8] tools/intel_vbt_decode: dump eDP data rate override field

[Ankit Nautiyal]

Add decoding support for the eDP data rate override field introduced
in VBT version 263+.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 tools/intel_vbt_decode.c | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index 7785e9e82b1f..6c0273aeecfc 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -1121,6 +1121,39 @@ static const char * const hdmi_frl_rate_str[] = {
 	[5] = "12 GT/s",
 };
 
+static void dump_edp_data_rate_override(uint32_t edp_data_rate_override)
+{
+	int i;
+	static const uint32_t link_rates[BDB_263_VBT_EDP_NUM_RATES][2] = {
+		{ BDB_263_VBT_EDP_LINK_RATE_1_62, 162000 },
+		{ BDB_263_VBT_EDP_LINK_RATE_2_16, 216000 },
+		{ BDB_263_VBT_EDP_LINK_RATE_2_43, 243000 },
+		{ BDB_263_VBT_EDP_LINK_RATE_2_7, 270000 },
+		{ BDB_263_VBT_EDP_LINK_RATE_3_24, 324000 },
+		{ BDB_263_VBT_EDP_LINK_RATE_4_32, 432000 },
+		{ BDB_263_VBT_EDP_LINK_RATE_5_4, 540000 },
+		{ BDB_263_VBT_EDP_LINK_RATE_6_75, 675000 },
+		{ BDB_263_VBT_EDP_LINK_RATE_8_1, 810000 },
+		{ BDB_263_VBT_EDP_LINK_RATE_10, 1000000 },
+		{ BDB_263_VBT_EDP_LINK_RATE_13_5, 1350000 },
+		{ BDB_263_VBT_EDP_LINK_RATE_20, 2000000},
+	};
+
+	edp_data_rate_override &= BDB_263_VBT_EDP_RATES_MASK;
+
+	printf("\t\teDP data rate override:");
+
+	if (!edp_data_rate_override) {
+		printf("(none)\n");
+		return;
+	}
+	printf("\n");
+
+	for (i = 0; i < BDB_263_VBT_EDP_NUM_RATES; i++)
+		if (link_rates[i][0] & edp_data_rate_override)
+			printf("\t\t\t%d kbps\n", link_rates[i][1]);
+}
+
 static void dump_child_device(struct context *context,
 			      const struct child_device_config *child)
 {
@@ -1281,6 +1314,9 @@ static void dump_child_device(struct context *context,
 
 	if (context->bdb->version >= 256)
 		printf("\t\tEFP panel index: %d\n", child->efp_index);
+
+	if (context->bdb->version >= 263)
+		dump_edp_data_rate_override(child->edp_data_rate_override);
 }
 
 static void dump_child_devices(struct context *context, const uint8_t *devices,
-- 
2.45.2

[PATCH i-g-t 7/8] tools/intel_vbt_decode: dump eDP joiner enable field

[Ankit Nautiyal]

Add decoding support for the eDP joiner enable field introduced
in VBT version 261+.

v2: Use pipe_joiner_enable to match with kernel variable name. (Karthik)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
---
 tools/intel_vbt_decode.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index 6c0273aeecfc..dbc92e12a39a 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -2515,6 +2515,10 @@ static void dump_edp(struct context *context,
 		if (context->bdb->version >= 251)
 			printf("\t\teDP DSC disable: %s\n",
 			       YESNO(panel_bool(edp->edp_dsc_disable, i)));
+
+		if (context->bdb->version >= 261)
+			printf("\t\teDP Joiner Enable: %s\n",
+			       YESNO(panel_bool(edp->pipe_joiner_enable, i)));
 	}
 }
 
-- 
2.45.2

[PATCH i-g-t 8/8] tools/intel_vbt_decode: Dump dedicated_external and dyn_port_over_tc fields

[Ankit Nautiyal]

VBT version 264 adds two new child device fields: dedicated_external
and dyn_port_over_tc. The dedicated_external field indicates TC ports
connected to PHYs outside the Type-C subsystem, while dyn_port_over_tc
indicates that a TC port supports dynamic DDI allocation in TCSS.

Dump these fields in the VBT decode tool.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 tools/intel_vbt_decode.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index dbc92e12a39a..1f4545c8e10c 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -1317,6 +1317,11 @@ static void dump_child_device(struct context *context,
 
 	if (context->bdb->version >= 263)
 		dump_edp_data_rate_override(child->edp_data_rate_override);
+
+	if (context->bdb->version >= 264) {
+		printf("\t\tDedicated External TC Port: %s\n", YESNO(child->dedicated_external));
+		printf("\t\tPort supports dynamic DDI allocation in TCSS: %s\n", YESNO(child->dyn_port_over_tc));
+	}
 }
 
 static void dump_child_devices(struct context *context, const uint8_t *devices,
-- 
2.45.2

✓ Xe.CI.BAT: success for intel_vbt_decode: Sync intel_vbt_defs.h with latest changes (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 3388 bytes --]

== Series Details ==

Series: intel_vbt_decode: Sync intel_vbt_defs.h with latest changes (rev5)
URL   : https://patchwork.freedesktop.org/series/160285/
State : success

== Summary ==

CI Bug Log - changes from XEIGT_8865_BAT -> XEIGTPW_15032_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 13)
------------------------------

  Additional (1): bat-ptl-vm 

Known issues
------------

  Here are the changes found in XEIGTPW_15032_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_evict@evict-beng-small-cm:
    - bat-ptl-vm:         NOTRUN -> [SKIP][1] ([Intel XE#5764]) +10 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/bat-ptl-vm/igt@xe_evict@evict-beng-small-cm.html

  * igt@xe_exec_balancer@twice-parallel-basic:
    - bat-ptl-vm:         NOTRUN -> [SKIP][2] ([Intel XE#7482]) +17 other tests skip
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/bat-ptl-vm/igt@xe_exec_balancer@twice-parallel-basic.html

  * igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
    - bat-ptl-vm:         NOTRUN -> [SKIP][3] ([Intel XE#5775])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/bat-ptl-vm/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html

  * igt@xe_mmap@vram:
    - bat-ptl-vm:         NOTRUN -> [SKIP][4] ([Intel XE#5776])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/bat-ptl-vm/igt@xe_mmap@vram.html

  * igt@xe_pat@pat-index-xehpc:
    - bat-ptl-vm:         NOTRUN -> [SKIP][5] ([Intel XE#5777] / [Intel XE#7590])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/bat-ptl-vm/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@pat-index-xelp:
    - bat-ptl-vm:         NOTRUN -> [SKIP][6] ([Intel XE#5771] / [Intel XE#7590])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/bat-ptl-vm/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pat@pat-index-xelpg:
    - bat-ptl-vm:         NOTRUN -> [SKIP][7] ([Intel XE#5780] / [Intel XE#7590])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/bat-ptl-vm/igt@xe_pat@pat-index-xelpg.html

  
  [Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
  [Intel XE#5771]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5771
  [Intel XE#5775]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5775
  [Intel XE#5776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5776
  [Intel XE#5777]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5777
  [Intel XE#5780]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5780
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590


Build changes
-------------

  * IGT: IGT_8865 -> IGTPW_15032
  * Linux: xe-4921-898b5aa235c5b269d6c745fd84270b296aa75469 -> xe-4924-84de0c4efa971d100d339d4b4aef24676b86c58e

  IGTPW_15032: 15032
  IGT_8865: 1c23bc1bdf01bf0ded2344cb217d7fe88de3b726 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4921-898b5aa235c5b269d6c745fd84270b296aa75469: 898b5aa235c5b269d6c745fd84270b296aa75469
  xe-4924-84de0c4efa971d100d339d4b4aef24676b86c58e: 84de0c4efa971d100d339d4b4aef24676b86c58e

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/index.html

[-- Attachment #2: Type: text/html, Size: 4247 bytes --]

✗ i915.CI.BAT: failure for intel_vbt_decode: Sync intel_vbt_defs.h with latest changes (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 7864 bytes --]

== Series Details ==

Series: intel_vbt_decode: Sync intel_vbt_defs.h with latest changes (rev5)
URL   : https://patchwork.freedesktop.org/series/160285/
State : failure

== Summary ==

CI Bug Log - changes from IGT_8865 -> IGTPW_15032
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_15032 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_15032, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/index.html

Participating hosts (40 -> 39)
------------------------------

  Additional (1): bat-adls-6 
  Missing    (2): fi-hsw-4770 bat-dg2-13 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_15032:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_module_load@reload:
    - bat-arlh-3:         [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8865/bat-arlh-3/igt@i915_module_load@reload.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-arlh-3/igt@i915_module_load@reload.html

  
Known issues
------------

  Here are the changes found in IGTPW_15032 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@dmabuf@all-tests:
    - bat-adls-6:         NOTRUN -> [SKIP][3] ([i915#15931])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-adls-6/igt@dmabuf@all-tests.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - bat-adls-6:         NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-adls-6/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@gem_tiled_pread_basic@basic:
    - bat-adls-6:         NOTRUN -> [SKIP][5] ([i915#15656])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-adls-6/igt@gem_tiled_pread_basic@basic.html

  * igt@i915_selftest@live:
    - bat-mtlp-8:         [PASS][6] -> [DMESG-FAIL][7] ([i915#12061]) +1 other test dmesg-fail
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8865/bat-mtlp-8/igt@i915_selftest@live.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-mtlp-8/igt@i915_selftest@live.html

  * igt@i915_selftest@live@sanitycheck:
    - bat-apl-1:          [PASS][8] -> [DMESG-WARN][9] ([i915#13735]) +77 other tests dmesg-warn
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8865/bat-apl-1/igt@i915_selftest@live@sanitycheck.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-apl-1/igt@i915_selftest@live@sanitycheck.html

  * igt@i915_selftest@live@workarounds:
    - bat-arls-5:         [PASS][10] -> [DMESG-FAIL][11] ([i915#12061]) +1 other test dmesg-fail
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8865/bat-arls-5/igt@i915_selftest@live@workarounds.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-arls-5/igt@i915_selftest@live@workarounds.html

  * igt@intel_hwmon@hwmon-read:
    - bat-adls-6:         NOTRUN -> [SKIP][12] ([i915#7707]) +1 other test skip
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-adls-6/igt@intel_hwmon@hwmon-read.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - bat-adls-6:         NOTRUN -> [SKIP][13] ([i915#4103]) +1 other test skip
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-adls-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
    - bat-adls-6:         NOTRUN -> [SKIP][14] ([i915#3555] / [i915#3840])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-adls-6/igt@kms_dsc@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-adls-6:         NOTRUN -> [SKIP][15]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-adls-6/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_pm_backlight@basic-brightness:
    - bat-adls-6:         NOTRUN -> [SKIP][16] ([i915#5354])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-adls-6/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_pm_rpm@basic-pci-d3-state:
    - bat-apl-1:          [PASS][17] -> [DMESG-WARN][18] ([i915#13735] / [i915#180]) +49 other tests dmesg-warn
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8865/bat-apl-1/igt@kms_pm_rpm@basic-pci-d3-state.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-apl-1/igt@kms_pm_rpm@basic-pci-d3-state.html

  * igt@kms_psr@psr-primary-mmap-gtt:
    - bat-adls-6:         NOTRUN -> [SKIP][19] ([i915#1072] / [i915#9732]) +3 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-adls-6/igt@kms_psr@psr-primary-mmap-gtt.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-adls-6:         NOTRUN -> [SKIP][20] ([i915#3555])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-adls-6/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-read:
    - bat-adls-6:         NOTRUN -> [SKIP][21] ([i915#3291]) +2 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-adls-6/igt@prime_vgem@basic-fence-read.html

  
#### Possible fixes ####

  * igt@i915_selftest@live:
    - fi-bsw-n3050:       [DMESG-FAIL][22] ([i915#14808]) -> [PASS][23] +1 other test pass
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8865/fi-bsw-n3050/igt@i915_selftest@live.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/fi-bsw-n3050/igt@i915_selftest@live.html

  * igt@i915_selftest@live@workarounds:
    - bat-dg2-9:          [DMESG-FAIL][24] ([i915#12061]) -> [PASS][25] +1 other test pass
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8865/bat-dg2-9/igt@i915_selftest@live@workarounds.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/bat-dg2-9/igt@i915_selftest@live@workarounds.html

  
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#13735]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13735
  [i915#14808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14808
  [i915#15656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15656
  [i915#15931]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15931
  [i915#180]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_8865 -> IGTPW_15032
  * Linux: CI_DRM_18350 -> CI_DRM_18353

  CI-20190529: 20190529
  CI_DRM_18350: 898b5aa235c5b269d6c745fd84270b296aa75469 @ git://anongit.freedesktop.org/gfx-ci/linux
  CI_DRM_18353: 84de0c4efa971d100d339d4b4aef24676b86c58e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_15032: 15032
  IGT_8865: 1c23bc1bdf01bf0ded2344cb217d7fe88de3b726 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15032/index.html

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✓ Xe.CI.FULL: success for intel_vbt_decode: Sync intel_vbt_defs.h with latest changes (rev5)

[Patchwork]

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== Series Details ==

Series: intel_vbt_decode: Sync intel_vbt_defs.h with latest changes (rev5)
URL   : https://patchwork.freedesktop.org/series/160285/
State : success

== Summary ==

CI Bug Log - changes from XEIGT_8865_FULL -> XEIGTPW_15032_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in XEIGTPW_15032_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@4-tiled-32bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][1] ([Intel XE#2327]) +7 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][2] ([Intel XE#607] / [Intel XE#7361])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-8/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#1124]) +7 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_bw@linear-tiling-3-displays-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#367] / [Intel XE#7354]) +1 other test skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-3/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html

  * igt@kms_ccs@bad-aux-stride-yf-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#2887]) +9 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@kms_ccs@bad-aux-stride-yf-tiled-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#3432])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html

  * igt@kms_chamelium_frames@dp-crc-single:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2252]) +5 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-7/igt@kms_chamelium_frames@dp-crc-single.html

  * igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][8] ([Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-1/igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2.html

  * igt@kms_content_protection@dp-mst-type-1-suspend-resume:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#6974])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html

  * igt@kms_content_protection@lic-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#7642]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@suspend-resume@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][11] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +3 other tests fail
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@kms_content_protection@suspend-resume@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-random-64x21:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2320])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@kms_cursor_crc@cursor-random-64x21.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2321] / [Intel XE#7355])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-3/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          [PASS][14] -> [DMESG-WARN][15] ([Intel XE#5354]) +1 other test dmesg-warn
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-10/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-9/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-bmg:          [PASS][16] -> [FAIL][17] ([Intel XE#7571])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#4331] / [Intel XE#7227])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-9/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_dsc@dsc-fractional-bpp:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2244]) +1 other test skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-7/igt@kms_dsc@dsc-fractional-bpp.html

  * igt@kms_fbcon_fbt@psr:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#6126] / [Intel XE#776])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@kms_fbcon_fbt@psr.html

  * igt@kms_flip@2x-plain-flip-ts-check:
    - shard-bmg:          NOTRUN -> [FAIL][21] ([Intel XE#6266]) +1 other test fail
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@kms_flip@2x-plain-flip-ts-check.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#7178] / [Intel XE#7349])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#7179])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-8/igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x.html

  * igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2311]) +19 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-9/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#4141]) +15 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#7061] / [Intel XE#7356]) +3 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2313]) +17 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html

  * igt@kms_frontbuffer_tracking@plane-fbc-rte:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#2350] / [Intel XE#7503])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-1/igt@kms_frontbuffer_tracking@plane-fbc-rte.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#4090] / [Intel XE#7443])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#7283]) +1 other test skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#5020] / [Intel XE#7348])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-1/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#7376] / [Intel XE#870])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#7794])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2499])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-3/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#1489]) +5 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-7/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2387] / [Intel XE#7429])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-3/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-pr-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#2234] / [Intel XE#2850]) +9 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@kms_psr@fbc-pr-primary-page-flip.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#7795])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-3/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@sprite-rotation-270:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#3904] / [Intel XE#7342])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-9/igt@kms_rotation_crc@sprite-rotation-270.html

  * igt@kms_sharpness_filter@invalid-filter-with-scaling-mode:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#6503]) +2 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-7/igt@kms_sharpness_filter@invalid-filter-with-scaling-mode.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          NOTRUN -> [FAIL][44] ([Intel XE#1729] / [Intel XE#7424])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#1499])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@kms_vrr@flip-suspend.html

  * igt@xe_eudebug_online@pagefault-write:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#7636]) +8 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@xe_eudebug_online@pagefault-write.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate-race:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#2322] / [Intel XE#7372]) +4 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate-race.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-imm:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#7136]) +10 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-3/igt@xe_exec_fault_mode@many-execqueues-multi-queue-imm.html

  * igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#6874]) +21 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#7138]) +6 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-9/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-rebind.html

  * igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#6281] / [Intel XE#7426])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72]) -> ([DMESG-WARN][73], [PASS][74], [PASS][75], [DMESG-WARN][76], [DMESG-WARN][77], [DMESG-WARN][78], [DMESG-WARN][79], [DMESG-WARN][80], [DMESG-WARN][81], [DMESG-WARN][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97]) ([Intel XE#7725])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-9/igt@xe_module_load@load.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-8/igt@xe_module_load@load.html
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-3/igt@xe_module_load@load.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-1/igt@xe_module_load@load.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-3/igt@xe_module_load@load.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-1/igt@xe_module_load@load.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-1/igt@xe_module_load@load.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-5/igt@xe_module_load@load.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-10/igt@xe_module_load@load.html
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-10/igt@xe_module_load@load.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-10/igt@xe_module_load@load.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-2/igt@xe_module_load@load.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-8/igt@xe_module_load@load.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-7/igt@xe_module_load@load.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-2/igt@xe_module_load@load.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-5/igt@xe_module_load@load.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-5/igt@xe_module_load@load.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-6/igt@xe_module_load@load.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-6/igt@xe_module_load@load.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-7/igt@xe_module_load@load.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-9/igt@xe_module_load@load.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-6/igt@xe_module_load@load.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-8/igt@xe_module_load@load.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-3/igt@xe_module_load@load.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-6/igt@xe_module_load@load.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-6/igt@xe_module_load@load.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-6/igt@xe_module_load@load.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-6/igt@xe_module_load@load.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-6/igt@xe_module_load@load.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-6/igt@xe_module_load@load.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-6/igt@xe_module_load@load.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@xe_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-7/igt@xe_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@xe_module_load@load.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@xe_module_load@load.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-8/igt@xe_module_load@load.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-1/igt@xe_module_load@load.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-1/igt@xe_module_load@load.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@xe_module_load@load.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@xe_module_load@load.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-3/igt@xe_module_load@load.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-7/igt@xe_module_load@load.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-9/igt@xe_module_load@load.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@xe_module_load@load.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@xe_module_load@load.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@xe_module_load@load.html

  * igt@xe_non_msix@walker-interrupt-notification-non-msix:
    - shard-bmg:          NOTRUN -> [SKIP][98] ([Intel XE#7622])
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-1/igt@xe_non_msix@walker-interrupt-notification-non-msix.html

  * igt@xe_page_reclaim@pat-index-xd:
    - shard-bmg:          NOTRUN -> [SKIP][99] ([Intel XE#7793]) +1 other test skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@xe_page_reclaim@pat-index-xd.html

  * igt@xe_pat@pat-sw-hw-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][100] ([Intel XE#7590])
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@xe_pat@pat-sw-hw-suspend.html

  * igt@xe_pm@d3cold-basic:
    - shard-bmg:          NOTRUN -> [SKIP][101] ([Intel XE#2284] / [Intel XE#7370])
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@xe_pm@d3cold-basic.html

  * igt@xe_prefetch_fault@prefetch-fault-svm:
    - shard-bmg:          NOTRUN -> [SKIP][102] ([Intel XE#7599])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-2/igt@xe_prefetch_fault@prefetch-fault-svm.html

  * igt@xe_pxp@pxp-termination-key-update-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][103] ([Intel XE#4733] / [Intel XE#7417]) +2 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@xe_pxp@pxp-termination-key-update-post-suspend.html

  * igt@xe_query@multigpu-query-uc-fw-version-guc:
    - shard-bmg:          NOTRUN -> [SKIP][104] ([Intel XE#944])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@xe_query@multigpu-query-uc-fw-version-guc.html

  * igt@xe_wedged@wedged-at-any-timeout:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][105] ([Intel XE#5545])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-8/igt@xe_wedged@wedged-at-any-timeout.html

  
#### Possible fixes ####

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [FAIL][106] ([Intel XE#7571]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-7/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-bmg:          [SKIP][108] ([Intel XE#7308]) -> [PASS][109]
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-1/igt@kms_hdmi_inject@inject-audio.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-10/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][110] ([Intel XE#1503]) -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-6/igt@kms_hdr@invalid-hdr.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-5/igt@kms_hdr@invalid-hdr.html

  
#### Warnings ####

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-bmg:          [INCOMPLETE][112] ([Intel XE#2594] / [Intel XE#5643]) -> [SKIP][113] ([Intel XE#1124])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8865/shard-bmg-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/shard-bmg-7/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2350
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
  [Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4090]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4090
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5643]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5643
  [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
  [Intel XE#6126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6126
  [Intel XE#6266]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6266
  [Intel XE#6281]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6281
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7227
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7308
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7354
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7361
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7426
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7443]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7443
  [Intel XE#7503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7503
  [Intel XE#7571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7571
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
  [Intel XE#7622]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7622
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7725]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7725
  [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7794
  [Intel XE#7795]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7795
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * IGT: IGT_8865 -> IGTPW_15032
  * Linux: xe-4921-898b5aa235c5b269d6c745fd84270b296aa75469 -> xe-4924-84de0c4efa971d100d339d4b4aef24676b86c58e

  IGTPW_15032: 15032
  IGT_8865: 1c23bc1bdf01bf0ded2344cb217d7fe88de3b726 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4921-898b5aa235c5b269d6c745fd84270b296aa75469: 898b5aa235c5b269d6c745fd84270b296aa75469
  xe-4924-84de0c4efa971d100d339d4b4aef24676b86c58e: 84de0c4efa971d100d339d4b4aef24676b86c58e

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15032/index.html

[-- Attachment #2: Type: text/html, Size: 32544 bytes --]

Re: [PATCH i-g-t 1/8] include/linux_scaffold: Add BIT_U{8,16,32} macros

[Karthik B S]

Hi Ankit,

On 4/22/2026 9:13 AM, Ankit Nautiyal wrote:
> Add macros to accommodate the kernel macros BIT_U8, BIT_U16, BIT_U32
> in the header file `intel_vbt_defs.h` copied from the kernel.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>   include/linux_scaffold.h | 4 ++++
>   1 file changed, 4 insertions(+)
>
> diff --git a/include/linux_scaffold.h b/include/linux_scaffold.h
> index 281aa5e730ed..a3acaa16117c 100644
> --- a/include/linux_scaffold.h
> +++ b/include/linux_scaffold.h
> @@ -57,4 +57,8 @@ static inline s64 sign_extend64(u64 value, int index)
>   #define FIELD_GET(mask, reg) \
>   	(typeof(mask))(((reg) & (mask)) >> __bf_shf(mask))
>   
> +#define BIT_U8(n) ((u8)(1U << (n)))
> +#define BIT_U16(n) ((u16)(1U << (n)))
> +#define BIT_U32(n) ((u32)(1U << (n)))

Should the BIT_U64 also be added to maintain consistency with the kernel 
definitions here?

Thanks and Regards,
Karthik.B.S
> +
>   #endif /* _INTEL_GPU_COMMANDS_SCAFFOLD_H_ */

Re: [PATCH i-g-t 2/8] tools/intel_vbt_decode.c: Include linux_scaffold.h

[Karthik B S]

On 4/22/2026 9:13 AM, Ankit Nautiyal wrote:
> linux_scaffold.h provides kernel compat macros including GENMASK and
> BIT_U32, which will be needed by intel_vbt_defs.h in subsequent changes.
> Include it in intel_vbt_decode.c and remove the now duplicate typedefs
> for u8, u16, u32, and u64.
>
> While at it, move drmtest.h in asciibetical order.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
> ---
>   tools/intel_vbt_decode.c | 8 ++------
>   1 file changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
> index d4aada743e42..7785e9e82b1f 100644
> --- a/tools/intel_vbt_decode.c
> +++ b/tools/intel_vbt_decode.c
> @@ -38,17 +38,13 @@
>   #include <sys/stat.h>
>   #include <sys/types.h>
>   
> +#include "drmtest.h"
>   #include "igt_aux.h"
>   #include "igt_halffloat.h"
>   #include "intel_chipset.h"
>   #include "intel_io.h"
> -#include "drmtest.h"
> +#include "linux_scaffold.h"
>   
> -/* kernel types for intel_vbt_defs.h */
> -typedef uint8_t u8;
> -typedef uint16_t u16;
> -typedef uint32_t u32;
> -typedef uint64_t u64;
>   #define __packed __attribute__ ((packed))
>   
>   #define _INTEL_BIOS_PRIVATE

Re: [PATCH i-g-t 3/8] tools/intel_vbt_defs: sync intel_vbt_defs.h with kernel commit 4d33c77cf2c3

[Karthik B S]

On 4/22/2026 9:13 AM, Ankit Nautiyal wrote:
> Synchronize intel_vbt_defs.h with kernel commit:
>
> 4d33c77cf2c3 ("drm/i915/vbt: Add eDP Data rate overrride field in VBT")
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
> ---
>   tools/intel_vbt_defs.h | 18 ++++++++++++++++++
>   1 file changed, 18 insertions(+)
>
> diff --git a/tools/intel_vbt_defs.h b/tools/intel_vbt_defs.h
> index 6612d3a4ec49..70e31520c560 100644
> --- a/tools/intel_vbt_defs.h
> +++ b/tools/intel_vbt_defs.h
> @@ -437,6 +437,22 @@ enum vbt_gmbus_ddi {
>   #define BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5	6
>   #define BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20	7
>   
> +/* EDP link rate 263+ */
> +#define BDB_263_VBT_EDP_LINK_RATE_1_62		BIT_U32(0)
> +#define BDB_263_VBT_EDP_LINK_RATE_2_16		BIT_U32(1)
> +#define BDB_263_VBT_EDP_LINK_RATE_2_43		BIT_U32(2)
> +#define BDB_263_VBT_EDP_LINK_RATE_2_7		BIT_U32(3)
> +#define BDB_263_VBT_EDP_LINK_RATE_3_24		BIT_U32(4)
> +#define BDB_263_VBT_EDP_LINK_RATE_4_32		BIT_U32(5)
> +#define BDB_263_VBT_EDP_LINK_RATE_5_4		BIT_U32(6)
> +#define BDB_263_VBT_EDP_LINK_RATE_6_75		BIT_U32(7)
> +#define BDB_263_VBT_EDP_LINK_RATE_8_1		BIT_U32(8)
> +#define BDB_263_VBT_EDP_LINK_RATE_10		BIT_U32(9)
> +#define BDB_263_VBT_EDP_LINK_RATE_13_5		BIT_U32(10)
> +#define BDB_263_VBT_EDP_LINK_RATE_20		BIT_U32(11)
> +#define BDB_263_VBT_EDP_NUM_RATES		12
> +#define BDB_263_VBT_EDP_RATES_MASK		GENMASK(BDB_263_VBT_EDP_NUM_RATES - 1, 0)
> +
>   /*
>    * The child device config, aka the display device data structure, provides a
>    * description of a port and its configuration on the platform.
> @@ -547,6 +563,8 @@ struct child_device_config {
>   	u8 dp_max_link_rate:3;					/* 216+ */
>   	u8 dp_max_link_rate_reserved:5;				/* 216+ */
>   	u8 efp_index;						/* 256+ */
> +	u32 edp_data_rate_override:12;				/* 263+ */
> +	u32 edp_data_rate_override_reserved:20;			/* 263+ */
>   } __packed;
>   
>   struct bdb_general_definitions {

Re: [PATCH i-g-t 4/8] tools/intel_vbt_defs: sync intel_vbt_defs.h with kernel commit 203c7904f2d8

[Karthik B S]

On 4/22/2026 9:13 AM, Ankit Nautiyal wrote:
> Synchronize intel_vbt_defs.h with kernel commit:
>
> 203c7904f2d8 ("drm/i915/vbt: Add fields dedicated_external and dyn_port_over_tc")
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
> ---
>   tools/intel_vbt_defs.h | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/tools/intel_vbt_defs.h b/tools/intel_vbt_defs.h
> index 70e31520c560..57fda5824c9c 100644
> --- a/tools/intel_vbt_defs.h
> +++ b/tools/intel_vbt_defs.h
> @@ -554,7 +554,8 @@ struct child_device_config {
>   	u8 dvo_function;
>   	u8 dp_usb_type_c:1;					/* 195+ */
>   	u8 tbt:1;						/* 209+ */
> -	u8 flags2_reserved:2;					/* 195+ */
> +	u8 dedicated_external:1;				/* 264+ */
> +	u8 dyn_port_over_tc:1;					/* 264+ */
>   	u8 dp_port_trace_length:4;				/* 209+ */
>   	u8 dp_gpio_index;					/* 195+ */
>   	u16 dp_gpio_pin_num;					/* 195+ */

Re: [PATCH i-g-t 5/8] tools/intel_vbt_defs: sync intel_vbt_defs.h with kernel commit 1b85a9b04681

[Karthik B S]

On 4/22/2026 9:13 AM, Ankit Nautiyal wrote:
> Synchronize intel_vbt_defs.h with kernel commit:
>
> 1b85a9b04681 ("drm/i915/vbt: Add edp pipe joiner enable/disable bits")
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
> ---
>   tools/intel_vbt_defs.h | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/tools/intel_vbt_defs.h b/tools/intel_vbt_defs.h
> index 57fda5824c9c..0dc13d080e8a 100644
> --- a/tools/intel_vbt_defs.h
> +++ b/tools/intel_vbt_defs.h
> @@ -1109,6 +1109,7 @@ struct bdb_edp {
>   	u16 edp_dsc_disable;					/* 251+ */
>   	u16 t6_delay_support;					/* 260+ */
>   	u16 link_idle_time[16];					/* 260+ */
> +	u16 pipe_joiner_enable;					/* 261+ */
>   } __packed;
>   
>   /*

Re: [PATCH i-g-t 6/8] tools/intel_vbt_decode: dump eDP data rate override field

[Karthik B S]

On 4/22/2026 9:13 AM, Ankit Nautiyal wrote:
> Add decoding support for the eDP data rate override field introduced
> in VBT version 263+.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>   tools/intel_vbt_decode.c | 36 ++++++++++++++++++++++++++++++++++++
>   1 file changed, 36 insertions(+)
>
> diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
> index 7785e9e82b1f..6c0273aeecfc 100644
> --- a/tools/intel_vbt_decode.c
> +++ b/tools/intel_vbt_decode.c
> @@ -1121,6 +1121,39 @@ static const char * const hdmi_frl_rate_str[] = {
>   	[5] = "12 GT/s",
>   };
>   
> +static void dump_edp_data_rate_override(uint32_t edp_data_rate_override)
> +{
> +	int i;
> +	static const uint32_t link_rates[BDB_263_VBT_EDP_NUM_RATES][2] = {
> +		{ BDB_263_VBT_EDP_LINK_RATE_1_62, 162000 },
> +		{ BDB_263_VBT_EDP_LINK_RATE_2_16, 216000 },
> +		{ BDB_263_VBT_EDP_LINK_RATE_2_43, 243000 },
> +		{ BDB_263_VBT_EDP_LINK_RATE_2_7, 270000 },
> +		{ BDB_263_VBT_EDP_LINK_RATE_3_24, 324000 },
> +		{ BDB_263_VBT_EDP_LINK_RATE_4_32, 432000 },
> +		{ BDB_263_VBT_EDP_LINK_RATE_5_4, 540000 },
> +		{ BDB_263_VBT_EDP_LINK_RATE_6_75, 675000 },
> +		{ BDB_263_VBT_EDP_LINK_RATE_8_1, 810000 },
> +		{ BDB_263_VBT_EDP_LINK_RATE_10, 1000000 },
> +		{ BDB_263_VBT_EDP_LINK_RATE_13_5, 1350000 },
> +		{ BDB_263_VBT_EDP_LINK_RATE_20, 2000000},
> +	};
> +
> +	edp_data_rate_override &= BDB_263_VBT_EDP_RATES_MASK;
> +
> +	printf("\t\teDP data rate override:");
> +
> +	if (!edp_data_rate_override) {
> +		printf("(none)\n");
Nit: Add a space before (none)?
> +		return;
> +	}
> +	printf("\n");
> +
> +	for (i = 0; i < BDB_263_VBT_EDP_NUM_RATES; i++)
> +		if (link_rates[i][0] & edp_data_rate_override)
> +			printf("\t\t\t%d kbps\n", link_rates[i][1]);

Nit: '%d' -> '%u' ?

Both can be fixed during merge. With this,

Reviewed-by: Karthik B S <karthik.b.s@intel.com>

> +}
> +
>   static void dump_child_device(struct context *context,
>   			      const struct child_device_config *child)
>   {
> @@ -1281,6 +1314,9 @@ static void dump_child_device(struct context *context,
>   
>   	if (context->bdb->version >= 256)
>   		printf("\t\tEFP panel index: %d\n", child->efp_index);
> +
> +	if (context->bdb->version >= 263)
> +		dump_edp_data_rate_override(child->edp_data_rate_override);
>   }
>   
>   static void dump_child_devices(struct context *context, const uint8_t *devices,

Re: [PATCH i-g-t 8/8] tools/intel_vbt_decode: Dump dedicated_external and dyn_port_over_tc fields

[Karthik B S]

On 4/22/2026 9:13 AM, Ankit Nautiyal wrote:
> VBT version 264 adds two new child device fields: dedicated_external
> and dyn_port_over_tc. The dedicated_external field indicates TC ports
> connected to PHYs outside the Type-C subsystem, while dyn_port_over_tc
> indicates that a TC port supports dynamic DDI allocation in TCSS.
>
> Dump these fields in the VBT decode tool.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
> ---
>   tools/intel_vbt_decode.c | 5 +++++
>   1 file changed, 5 insertions(+)
>
> diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
> index dbc92e12a39a..1f4545c8e10c 100644
> --- a/tools/intel_vbt_decode.c
> +++ b/tools/intel_vbt_decode.c
> @@ -1317,6 +1317,11 @@ static void dump_child_device(struct context *context,
>   
>   	if (context->bdb->version >= 263)
>   		dump_edp_data_rate_override(child->edp_data_rate_override);
> +
> +	if (context->bdb->version >= 264) {
> +		printf("\t\tDedicated External TC Port: %s\n", YESNO(child->dedicated_external));
> +		printf("\t\tPort supports dynamic DDI allocation in TCSS: %s\n", YESNO(child->dyn_port_over_tc));
> +	}
>   }
>   
>   static void dump_child_devices(struct context *context, const uint8_t *devices,

Re: [PATCH i-g-t 1/8] include/linux_scaffold: Add BIT_U{8,16,32} macros

[Nautiyal, Ankit K]

On 4/27/2026 10:37 AM, Karthik B S wrote:
> Hi Ankit,
>
> On 4/22/2026 9:13 AM, Ankit Nautiyal wrote:
>> Add macros to accommodate the kernel macros BIT_U8, BIT_U16, BIT_U32
>> in the header file `intel_vbt_defs.h` copied from the kernel.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   include/linux_scaffold.h | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/include/linux_scaffold.h b/include/linux_scaffold.h
>> index 281aa5e730ed..a3acaa16117c 100644
>> --- a/include/linux_scaffold.h
>> +++ b/include/linux_scaffold.h
>> @@ -57,4 +57,8 @@ static inline s64 sign_extend64(u64 value, int index)
>>   #define FIELD_GET(mask, reg) \
>>       (typeof(mask))(((reg) & (mask)) >> __bf_shf(mask))
>>   +#define BIT_U8(n) ((u8)(1U << (n)))
>> +#define BIT_U16(n) ((u16)(1U << (n)))
>> +#define BIT_U32(n) ((u32)(1U << (n)))
>
> Should the BIT_U64 also be added to maintain consistency with the 
> kernel definitions here?


Fair enough. Makes sense to add BIT_U64

I will add this and send again.


Thanks,

Ankit


>
> Thanks and Regards,
> Karthik.B.S
>> +
>>   #endif /* _INTEL_GPU_COMMANDS_SCAFFOLD_H_ */

Re: [PATCH i-g-t 6/8] tools/intel_vbt_decode: dump eDP data rate override field

[Nautiyal, Ankit K]

On 4/27/2026 10:47 AM, Karthik B S wrote:
>
> On 4/22/2026 9:13 AM, Ankit Nautiyal wrote:
>> Add decoding support for the eDP data rate override field introduced
>> in VBT version 263+.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   tools/intel_vbt_decode.c | 36 ++++++++++++++++++++++++++++++++++++
>>   1 file changed, 36 insertions(+)
>>
>> diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
>> index 7785e9e82b1f..6c0273aeecfc 100644
>> --- a/tools/intel_vbt_decode.c
>> +++ b/tools/intel_vbt_decode.c
>> @@ -1121,6 +1121,39 @@ static const char * const hdmi_frl_rate_str[] = {
>>       [5] = "12 GT/s",
>>   };
>>   +static void dump_edp_data_rate_override(uint32_t 
>> edp_data_rate_override)
>> +{
>> +    int i;
>> +    static const uint32_t link_rates[BDB_263_VBT_EDP_NUM_RATES][2] = {
>> +        { BDB_263_VBT_EDP_LINK_RATE_1_62, 162000 },
>> +        { BDB_263_VBT_EDP_LINK_RATE_2_16, 216000 },
>> +        { BDB_263_VBT_EDP_LINK_RATE_2_43, 243000 },
>> +        { BDB_263_VBT_EDP_LINK_RATE_2_7, 270000 },
>> +        { BDB_263_VBT_EDP_LINK_RATE_3_24, 324000 },
>> +        { BDB_263_VBT_EDP_LINK_RATE_4_32, 432000 },
>> +        { BDB_263_VBT_EDP_LINK_RATE_5_4, 540000 },
>> +        { BDB_263_VBT_EDP_LINK_RATE_6_75, 675000 },
>> +        { BDB_263_VBT_EDP_LINK_RATE_8_1, 810000 },
>> +        { BDB_263_VBT_EDP_LINK_RATE_10, 1000000 },
>> +        { BDB_263_VBT_EDP_LINK_RATE_13_5, 1350000 },
>> +        { BDB_263_VBT_EDP_LINK_RATE_20, 2000000},
>> +    };
>> +
>> +    edp_data_rate_override &= BDB_263_VBT_EDP_RATES_MASK;
>> +
>> +    printf("\t\teDP data rate override:");
>> +
>> +    if (!edp_data_rate_override) {
>> +        printf("(none)\n");
> Nit: Add a space before (none)?


Thanks for catching this. I will add the extra space.

>> +        return;
>> +    }
>> +    printf("\n");
>> +
>> +    for (i = 0; i < BDB_263_VBT_EDP_NUM_RATES; i++)
>> +        if (link_rates[i][0] & edp_data_rate_override)
>> +            printf("\t\t\t%d kbps\n", link_rates[i][1]);
>
> Nit: '%d' -> '%u' ?

Makes sense since the array is uint32_t.

Will change this as well.


Thanks,

Ankit


>
> Both can be fixed during merge. With this,
>
> Reviewed-by: Karthik B S <karthik.b.s@intel.com>
>
>> +}
>> +
>>   static void dump_child_device(struct context *context,
>>                     const struct child_device_config *child)
>>   {
>> @@ -1281,6 +1314,9 @@ static void dump_child_device(struct context 
>> *context,
>>         if (context->bdb->version >= 256)
>>           printf("\t\tEFP panel index: %d\n", child->efp_index);
>> +
>> +    if (context->bdb->version >= 263)
>> + dump_edp_data_rate_override(child->edp_data_rate_override);
>>   }
>>     static void dump_child_devices(struct context *context, const 
>> uint8_t *devices,

[PATCH i-g-t 1/8] include/linux_scaffold: Add BIT_U{8,16,32} macros

[Ankit Nautiyal]

Add macros to accommodate the kernel macros BIT_U8, BIT_U16, BIT_U32
in the header file `intel_vbt_defs.h` copied from the kernel.

v2: Add BIT_U64 for completeness. (Karthik)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 include/linux_scaffold.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/linux_scaffold.h b/include/linux_scaffold.h
index 281aa5e730ed..0c970c86079a 100644
--- a/include/linux_scaffold.h
+++ b/include/linux_scaffold.h
@@ -57,4 +57,9 @@ static inline s64 sign_extend64(u64 value, int index)
 #define FIELD_GET(mask, reg) \
 	(typeof(mask))(((reg) & (mask)) >> __bf_shf(mask))
 
+#define BIT_U8(n) ((u8)(1U << (n)))
+#define BIT_U16(n) ((u16)(1U << (n)))
+#define BIT_U32(n) ((u32)(1U << (n)))
+#define BIT_U64(n) ((u64)(1ULL << (n)))
+
 #endif /* _INTEL_GPU_COMMANDS_SCAFFOLD_H_ */
-- 
2.45.2

Re: [PATCH i-g-t 1/8] include/linux_scaffold: Add BIT_U{8,16,32} macros

[Karthik B S]

On 4/27/2026 6:16 PM, Ankit Nautiyal wrote:
> Add macros to accommodate the kernel macros BIT_U8, BIT_U16, BIT_U32
> in the header file `intel_vbt_defs.h` copied from the kernel.
>
> v2: Add BIT_U64 for completeness. (Karthik)
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
> ---
>   include/linux_scaffold.h | 5 +++++
>   1 file changed, 5 insertions(+)
>
> diff --git a/include/linux_scaffold.h b/include/linux_scaffold.h
> index 281aa5e730ed..0c970c86079a 100644
> --- a/include/linux_scaffold.h
> +++ b/include/linux_scaffold.h
> @@ -57,4 +57,9 @@ static inline s64 sign_extend64(u64 value, int index)
>   #define FIELD_GET(mask, reg) \
>   	(typeof(mask))(((reg) & (mask)) >> __bf_shf(mask))
>   
> +#define BIT_U8(n) ((u8)(1U << (n)))
> +#define BIT_U16(n) ((u16)(1U << (n)))
> +#define BIT_U32(n) ((u32)(1U << (n)))
> +#define BIT_U64(n) ((u64)(1ULL << (n)))
> +
>   #endif /* _INTEL_GPU_COMMANDS_SCAFFOLD_H_ */