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* [PATCH i-g-t 0/7] tools/intel_display_poller: Various things
@ 2025-09-22 16:09 Ville Syrjala
  2025-09-22 16:09 ` [PATCH i-g-t 1/7] lib/gt: Fix IGT_NO_FORCEWAKE handling Ville Syrjala
                   ` (10 more replies)
  0 siblings, 11 replies; 22+ messages in thread
From: Ville Syrjala @ 2025-09-22 16:09 UTC (permalink / raw)
  To: igt-dev

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Various things for tools/intel_display_poller:
- Fix IGT_NO_FORCEWAKE (also for other igt tools)
- scanline offset handling to make life easier
- DSB status bit polling

Ville Syrjälä (7):
  lib/gt: Fix IGT_NO_FORCEWAKE handling
  tools/intel_display_poller: Fix long opts
  tools/intel_display_poller: Use intel_display_ver() instead of
    intel_gen()
  tools/intel_display_poller: Add --scanline-offset/-o command line
    option
  tools/intel_display_poller: Add --auto-scanline-offset/-O comamnd line
    option
  tools/intel_display_poller: Add dsb-status-live test
  tools/intel_display_poller: Add --dsb-id/-d command line option

 lib/igt_gt.c                 |   3 +
 lib/intel_reg.h              |   5 +
 tools/intel_display_poller.c | 332 +++++++++++++++++++++--------------
 3 files changed, 212 insertions(+), 128 deletions(-)

-- 
2.49.1


^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH i-g-t 1/7] lib/gt: Fix IGT_NO_FORCEWAKE handling
  2025-09-22 16:09 [PATCH i-g-t 0/7] tools/intel_display_poller: Various things Ville Syrjala
@ 2025-09-22 16:09 ` Ville Syrjala
  2025-09-24 13:22   ` Lucas De Marchi
  2025-10-02 19:52   ` Michał Grzelak
  2025-09-22 16:09 ` [PATCH i-g-t 2/7] tools/intel_display_poller: Fix long opts Ville Syrjala
                   ` (9 subsequent siblings)
  10 siblings, 2 replies; 22+ messages in thread
From: Ville Syrjala @ 2025-09-22 16:09 UTC (permalink / raw)
  To: igt-dev; +Cc: Lucas De Marchi

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

igt_open_forcewake_handle_for_pcidev() forgets to check for
the IGT_NO_FORCEWAKE environment variable, which is a real
problem when one wants to frob the registers without forcing
power state changes in the hardware (eg. to observe display
low power watermark residencies/etc.)

Add the missing IGT_NO_FORCEWAKE check.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Fixes: 114b9ff31d19 ("lib/igt_gt: Add igt_open_forcewake_handle_for_pcidev()")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 lib/igt_gt.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/igt_gt.c b/lib/igt_gt.c
index d3421b3d7f0d..bec50e38833c 100644
--- a/lib/igt_gt.c
+++ b/lib/igt_gt.c
@@ -528,6 +528,9 @@ int igt_open_forcewake_handle_for_pcidev(const struct pci_device *pci_dev)
 	char path[PATH_MAX];
 	int dirlen, ret;
 
+	if (getenv("IGT_NO_FORCEWAKE"))
+		return -1;
+
 	if (!debugfs_root)
 		return -ENOENT;
 
-- 
2.49.1


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH i-g-t 2/7] tools/intel_display_poller: Fix long opts
  2025-09-22 16:09 [PATCH i-g-t 0/7] tools/intel_display_poller: Various things Ville Syrjala
  2025-09-22 16:09 ` [PATCH i-g-t 1/7] lib/gt: Fix IGT_NO_FORCEWAKE handling Ville Syrjala
@ 2025-09-22 16:09 ` Ville Syrjala
  2025-10-02 19:54   ` Michał Grzelak
  2025-09-22 16:09 ` [PATCH i-g-t 3/7] tools/intel_display_poller: Use intel_display_ver() instead of intel_gen() Ville Syrjala
                   ` (8 subsequent siblings)
  10 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2025-09-22 16:09 UTC (permalink / raw)
  To: igt-dev

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Fix the long option handling by providing a .val for each that
matches the short option.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 tools/intel_display_poller.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
index 6089be3f1ffa..69906d557a37 100644
--- a/tools/intel_display_poller.c
+++ b/tools/intel_display_poller.c
@@ -1352,14 +1352,14 @@ int main(int argc, char *argv[])
 
 	for (;;) {
 		static const struct option long_options[] = {
-			{ .name = "test", .has_arg = required_argument, },
-			{ .name = "pipe", .has_arg = required_argument, },
-			{ .name = "bit", .has_arg = required_argument, },
-			{ .name = "line", .has_arg = required_argument, },
-			{ .name = "fuzz", .has_arg = required_argument, },
-			{ .name = "pixel", .has_arg = no_argument, },
-			{ .name = "async", .has_arg = no_argument, },
-			{ .name = "vrr-push", .has_arg = required_argument, },
+			{ .name = "test", .has_arg = required_argument, .val = 't', },
+			{ .name = "pipe", .has_arg = required_argument, .val = 'b', },
+			{ .name = "bit", .has_arg = required_argument, .val = 'b', },
+			{ .name = "line", .has_arg = required_argument, .val = 'l', },
+			{ .name = "fuzz", .has_arg = required_argument, .val = 'f', },
+			{ .name = "pixel", .has_arg = no_argument, .val = 'x', },
+			{ .name = "async", .has_arg = no_argument, .val = 'a', },
+			{ .name = "vrr-push", .has_arg = required_argument, .val = 'v', },
 			{ },
 		};
 
-- 
2.49.1


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH i-g-t 3/7] tools/intel_display_poller: Use intel_display_ver() instead of intel_gen()
  2025-09-22 16:09 [PATCH i-g-t 0/7] tools/intel_display_poller: Various things Ville Syrjala
  2025-09-22 16:09 ` [PATCH i-g-t 1/7] lib/gt: Fix IGT_NO_FORCEWAKE handling Ville Syrjala
  2025-09-22 16:09 ` [PATCH i-g-t 2/7] tools/intel_display_poller: Fix long opts Ville Syrjala
@ 2025-09-22 16:09 ` Ville Syrjala
  2025-10-02 19:54   ` Michał Grzelak
  2025-09-22 16:09 ` [PATCH i-g-t 4/7] tools/intel_display_poller: Add --scanline-offset/-o command line option Ville Syrjala
                   ` (7 subsequent siblings)
  10 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2025-09-22 16:09 UTC (permalink / raw)
  To: igt-dev

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Use intel_display_ver() instead of intel_gen() for the display
hardware version checks. These two can return different numbers
on the more modern platforms, and using the wrong number could
lead us down invalid paths.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 tools/intel_display_poller.c | 42 ++++++++++++++++++------------------
 1 file changed, 21 insertions(+), 21 deletions(-)

diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
index 69906d557a37..e02506128e04 100644
--- a/tools/intel_display_poller.c
+++ b/tools/intel_display_poller.c
@@ -102,7 +102,7 @@ static char pipe_name(int pipe)
 
 static int pipe_to_plane(uint32_t devid, int pipe)
 {
-	if (intel_gen(devid) >= 4)
+	if (intel_display_ver(devid) >= 4)
 		return pipe;
 
 	switch (pipe) {
@@ -134,9 +134,9 @@ static uint32_t dspoffset_reg(uint32_t devid, int pipe)
 	bool use_tileoff;
 	int plane = pipe_to_plane(devid, pipe);
 
-	if (intel_gen(devid) < 4)
+	if (intel_display_ver(devid) < 4)
 		use_tileoff = false;
-	else if (IS_HASWELL(devid) || IS_BROADWELL(devid) || intel_gen(devid) >= 9)
+	else if (IS_HASWELL(devid) || IS_BROADWELL(devid) || intel_display_ver(devid) >= 9)
 		use_tileoff = true;
 	else
 		use_tileoff = read_reg(PIPE_REG(plane, DSPACNTR)) & DISPLAY_PLANE_TILED;
@@ -154,7 +154,7 @@ static uint32_t dspsurf_reg(uint32_t devid, int pipe, bool async)
 	if (async && (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)))
 		return PIPE_REG(plane, DSPAADDR_VLV);
 
-	if (intel_gen(devid) < 4)
+	if (intel_display_ver(devid) < 4)
 		return PIPE_REG(plane, DSPABASE);
 	else
 		return PIPE_REG(plane, DSPASURF);
@@ -162,10 +162,10 @@ static uint32_t dspsurf_reg(uint32_t devid, int pipe, bool async)
 
 static int pipe_to_transcoder(uint32_t devid, int pipe)
 {
-	int gen = intel_gen(devid);
+	int display_ver = intel_display_ver(devid);
 
 	if (IS_HASWELL(devid) || IS_BROADWELL(devid) ||
-	    gen == 9 || gen == 10 || gen == 11) {
+	    display_ver == 9 || display_ver == 10 || display_ver == 11) {
 		/* FIXME not 100% robust */
 		if (read_reg(PIPE_REG(pipe, PIPEACONF)) & PIPEACONF_ENABLE)
 			return pipe;
@@ -600,7 +600,7 @@ static void poll_dsl_deiir(uint32_t devid, int pipe, int bit,
 	bit = 1 << bit;
 	dsl = PIPE_REG(pipe, PIPEA_DSL);
 
-	if (intel_gen(devid) >= 8) {
+	if (intel_display_ver(devid) >= 8) {
 		iir = GEN8_DE_PIPE_IIR(pipe);
 		ier = GEN8_DE_PIPE_IER(pipe);
 		imr = GEN8_DE_PIPE_IMR(pipe);
@@ -832,9 +832,9 @@ static void poll_dsl_frametimestamp(uint32_t devid, int pipe,
 
 static uint32_t timestamp_reg(uint32_t devid)
 {
-	if (intel_gen(devid) >= 7)
+	if (intel_display_ver(devid) >= 7)
 		return IVB_TIMESTAMP_CTR;
-	else if (intel_gen(devid) >= 5)
+	else if (intel_display_ver(devid) >= 5)
 		return ILK_TIMESTAMP_HI;
 	else
 		return TIMESTAMP_QW + 4;
@@ -1020,19 +1020,19 @@ static void poll_dsl_flipdone_deiir(uint32_t devid, int pipe, int target_scanlin
 	dsl = PIPE_REG(pipe, PIPEA_DSL);
 	surf = dspsurf_reg(devid, pipe, async);
 
-	if (intel_gen(devid) >= 9)
+	if (intel_display_ver(devid) >= 9)
 		bit = 3;
-	else if (intel_gen(devid) >= 8)
+	else if (intel_display_ver(devid) >= 8)
 		bit = 4;
-	else if (intel_gen(devid) >= 7)
+	else if (intel_display_ver(devid) >= 7)
 		bit = 3 + 5 * pipe;
-	else if (intel_gen(devid) >= 5)
+	else if (intel_display_ver(devid) >= 5)
 		bit = 26 + pipe;
 	else
 		abort();
 	bit = 1 << bit;
 
-	if (intel_gen(devid) >= 8) {
+	if (intel_display_ver(devid) >= 8) {
 		iir = GEN8_DE_PIPE_IIR(pipe);
 		ier = GEN8_DE_PIPE_IER(pipe);
 		imr = GEN8_DE_PIPE_IMR(pipe);
@@ -1448,7 +1448,7 @@ int main(int argc, char *argv[])
 	 * check if the requires registers are
 	 * avilable on the current platform.
 	 */
-	if (intel_gen(devid) == 2) {
+	if (intel_display_ver(devid) == 2) {
 		if (pipe > 1)
 			usage(argv[0]);
 
@@ -1474,7 +1474,7 @@ int main(int argc, char *argv[])
 		default:
 			usage(argv[0]);
 		}
-	} else if (intel_gen(devid) < 5 && !IS_G4X(devid)) {
+	} else if (intel_display_ver(devid) < 5 && !IS_G4X(devid)) {
 		if (pipe > 1)
 			usage(argv[0]);
 
@@ -1497,7 +1497,7 @@ int main(int argc, char *argv[])
 		case TEST_FIELD:
 			break;
 		case TEST_FLIP:
-			if (intel_gen(devid) == 3)
+			if (intel_display_ver(devid) == 3)
 				test = TEST_PAN;
 			break;
 		default:
@@ -1554,9 +1554,9 @@ int main(int argc, char *argv[])
 			usage(argv[0]);
 		}
 	} else {
-		if (pipe > 1 && intel_gen(devid) < 7)
+		if (pipe > 1 && intel_display_ver(devid) < 7)
 			usage(argv[0]);
-		if (pipe > 2 && intel_gen(devid) < 12)
+		if (pipe > 2 && intel_display_ver(devid) < 12)
 			usage(argv[0]);
 		if (pipe > 3)
 			usage(argv[0]);
@@ -1564,7 +1564,7 @@ int main(int argc, char *argv[])
 		if (test_pixelcount)
 			usage(argv[0]);
 
-		if (vrr_push_scanline >= 0 && intel_gen(devid) < 11)
+		if (vrr_push_scanline >= 0 && intel_display_ver(devid) < 11)
 			usage(argv[0]);
 
 		switch (test) {
@@ -1580,7 +1580,7 @@ int main(int argc, char *argv[])
 		case TEST_VRR_PUSH:
 			if (vrr_push_scanline < 0)
 				usage(argv[0]);
-			if (intel_gen(devid) < 11)
+			if (intel_display_ver(devid) < 11)
 				usage(argv[0]);
 			break;
 		case TEST_FLIPCOUNT:
-- 
2.49.1


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH i-g-t 4/7] tools/intel_display_poller: Add --scanline-offset/-o command line option
  2025-09-22 16:09 [PATCH i-g-t 0/7] tools/intel_display_poller: Various things Ville Syrjala
                   ` (2 preceding siblings ...)
  2025-09-22 16:09 ` [PATCH i-g-t 3/7] tools/intel_display_poller: Use intel_display_ver() instead of intel_gen() Ville Syrjala
@ 2025-09-22 16:09 ` Ville Syrjala
  2025-10-02 19:54   ` Michał Grzelak
  2025-09-22 16:09 ` [PATCH i-g-t 5/7] tools/intel_display_poller: Add --auto-scanline-offset/-O comamnd " Ville Syrjala
                   ` (6 subsequent siblings)
  10 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2025-09-22 16:09 UTC (permalink / raw)
  To: igt-dev

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Our hardware has a slightly warped view of scanline numbers.
Eg. on most platforms it reports DSL=vblank_start-1 when the
start of vblank actaully occurs.

On the kernel side we have helpers to convert between the hardware
and software scanline numbers. Add the same for intel_display_poller
in the form of a new --scanline-offset/-o command line option. With
this one doesn't constantly have to waste brarin power to convert the
hardware numbers into something more sensible.

Caveat: unlike the kernel side we don't do the appropriate %vtotal
on the adjusted values (since figuring out the actual vtotal would take
quite a bit of work due to VRR/etc.). So when using --scanline-offset
one has to keep in mind that we might see slightly funky scanline
numbers. Eg. scanline >= vtotal when the scanline offset of positive,
and negative value (due to a negative scanline offset) we just
saturate to 0. Howver for most interesting hardware events the
scanline tends to be in a range where this issue doesn't matter.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 tools/intel_display_poller.c | 155 ++++++++++++++---------------------
 1 file changed, 62 insertions(+), 93 deletions(-)

diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
index e02506128e04..24ed28ccf7da 100644
--- a/tools/intel_display_poller.c
+++ b/tools/intel_display_poller.c
@@ -65,6 +65,7 @@ enum test {
 
 static uint32_t vlv_offset;
 static uint16_t pipe_offset[4] = { 0, 0x1000, 0x2000, 0x3000, };
+static int scanline_offset = 0;
 
 #define PIPE_REG(pipe, reg_a) (pipe_offset[(pipe)] + (reg_a))
 
@@ -85,6 +86,29 @@ static uint32_t read_reg(uint32_t reg)
 	return INREG(vlv_offset + reg);
 }
 
+static uint32_t read_scanline(uint32_t reg, bool *field)
+{
+	uint32_t dsl;
+	int scanline;
+
+	dsl = INREG(vlv_offset + reg);
+
+	*field = dsl & 0x80000000;
+	scanline = dsl & ~0x80000000;
+
+	/*
+	 * FIXME would need to know vtotal to make
+	 * this wrap around properly. For now just
+	 * avoid reporting negative numbers and just
+	 * potentially report sligtly incorrect numbers
+	 * near the wraparound point.
+	 *
+	 * scanline_offset==0 by default to avoid people
+	 * shooting themselves in the foot with this.
+	 */
+	return max(scanline + scanline_offset, 0);
+}
+
 static void write_reg_16(uint32_t reg, uint16_t val)
 {
 	OUTREG16(vlv_offset + reg, val);
@@ -203,6 +227,7 @@ static void push_vrr(uint32_t devid, int pipe, int vrr_push_scanline)
 {
 	uint32_t dsl = PIPE_REG(pipe, PIPEA_DSL);
 	uint32_t push = trans_reg(devid, pipe, TRANS_PUSH_A);
+	bool field;
 
 	if (vrr_push_scanline < 0)
 		return;
@@ -211,7 +236,7 @@ static void push_vrr(uint32_t devid, int pipe, int vrr_push_scanline)
 		return;
 
 	while (!quit) {
-		uint32_t dsl1 = read_reg(dsl) & ~0x80000000;
+		uint32_t dsl1 = read_scanline(dsl, &field);
 		if (dsl1 == vrr_push_scanline)
 			break;
 	}
@@ -224,8 +249,7 @@ static int wait_scanline(int pipe, int target_scanline, bool *field)
 	uint32_t dsl_reg = PIPE_REG(pipe, PIPEA_DSL);
 
 	while (!quit) {
-		uint32_t dsl = read_reg(dsl_reg);
-		*field = dsl & 0x80000000;
+		uint32_t dsl = read_scanline(dsl_reg, field);
 		dsl &= ~0x80000000;
 		if (dsl == target_scanline)
 			return dsl;
@@ -457,15 +481,10 @@ static void poll_dsl_pipestat(int pipe, int bit,
 	write_reg(iir, iir_mask | iir_bit);
 
 	while (!quit) {
-		dsl1 = read_reg(dsl);
+		dsl1 = read_scanline(dsl, &field1);
 		iir1 = read_reg(iir);
 		iir2 = read_reg(iir);
-		dsl2 = read_reg(dsl);
-
-		field1 = dsl1 & 0x80000000;
-		field2 = dsl2 & 0x80000000;
-		dsl1 &= ~0x80000000;
-		dsl2 &= ~0x80000000;
+		dsl2 = read_scanline(dsl, &field2);
 
 		if (!(iir2 & iir_bit))
 			continue;
@@ -505,15 +524,10 @@ static void poll_dsl_iir_gen2(int pipe, int bit,
 	write_reg_16(IIR, bit);
 
 	while (!quit) {
-		dsl1 = read_reg(dsl);
+		dsl1 = read_scanline(dsl, &field1);
 		iir1 = read_reg_16(IIR);
 		iir2 = read_reg_16(IIR);
-		dsl2 = read_reg(dsl);
-
-		field1 = dsl1 & 0x80000000;
-		field2 = dsl2 & 0x80000000;
-		dsl1 &= ~0x80000000;
-		dsl2 &= ~0x80000000;
+		dsl2 = read_scanline(dsl, &field2);
 
 		if (!(iir2 & bit))
 			continue;
@@ -556,15 +570,10 @@ static void poll_dsl_iir_gen3(int pipe, int bit,
 	write_reg(IIR, bit);
 
 	while (!quit) {
-		dsl1 = read_reg(dsl);
+		dsl1 = read_scanline(dsl, &field1);
 		iir1 = read_reg(IIR);
 		iir2 = read_reg(IIR);
-		dsl2 = read_reg(dsl);
-
-		field1 = dsl1 & 0x80000000;
-		field2 = dsl2 & 0x80000000;
-		dsl1 &= ~0x80000000;
-		dsl2 &= ~0x80000000;
+		dsl2 = read_scanline(dsl, &field2);
 
 		if (!(iir2 & bit))
 			continue;
@@ -622,15 +631,10 @@ static void poll_dsl_deiir(uint32_t devid, int pipe, int bit,
 		push_vrr(devid, pipe, vrr_push_scanline);
 
 		while (!quit) {
-			dsl1 = read_reg(dsl);
+			dsl1 = read_scanline(dsl, &field1);
 			iir1 = read_reg(iir);
 			iir2 = read_reg(iir);
-			dsl2 = read_reg(dsl);
-
-			field1 = dsl1 & 0x80000000;
-			field2 = dsl2 & 0x80000000;
-			dsl1 &= ~0x80000000;
-			dsl2 &= ~0x80000000;
+			dsl2 = read_scanline(dsl, &field2);
 
 			if (iir2 & bit)
 				break;
@@ -670,15 +674,10 @@ static void poll_dsl_framecount_g4x(uint32_t devid, int pipe,
 		push_vrr(devid, pipe, vrr_push_scanline);
 
 		while (!quit) {
-			dsl1 = read_reg(dsl);
+			dsl1 = read_scanline(dsl, &field1);
 			frm1 = read_reg(frm);
 			frm2 = read_reg(frm);
-			dsl2 = read_reg(dsl);
-
-			field1 = dsl1 & 0x80000000;
-			field2 = dsl2 & 0x80000000;
-			dsl1 &= ~0x80000000;
-			dsl2 &= ~0x80000000;
+			dsl2 = read_scanline(dsl, &field2);
 
 			if (frm1 + 1 == frm2)
 				break;
@@ -709,14 +708,9 @@ static void poll_dsl_flipcount_g4x(uint32_t devid, int pipe,
 
 	while (!quit) {
 		usleep(10);
-		dsl1 = read_reg(dsl);
+		dsl1 = read_scanline(dsl, &field1);
 		flp1 = read_reg(flp);
-		dsl2 = read_reg(dsl);
-
-		field1 = dsl1 & 0x80000000;
-		field2 = dsl2 & 0x80000000;
-		dsl1 &= ~0x80000000;
-		dsl2 &= ~0x80000000;
+		dsl2 = read_scanline(dsl, &field2);
 
 		if (field1 != field2)
 			printf("fields are different (%u:%u -> %u:%u)\n",
@@ -765,15 +759,10 @@ static void poll_dsl_framecount_gen3(int pipe, uint32_t *min, uint32_t *max, con
 	dsl = PIPE_REG(pipe, PIPEA_DSL);
 
 	while (!quit) {
-		dsl1 = read_reg(dsl);
+		dsl1 = read_scanline(dsl, &field1);
 		frm1 = read_reg(frm) >> 24;
 		frm2 = read_reg(frm) >> 24;
-		dsl2 = read_reg(dsl);
-
-		field1 = dsl1 & 0x80000000;
-		field2 = dsl2 & 0x80000000;
-		dsl1 &= ~0x80000000;
-		dsl2 &= ~0x80000000;
+		dsl2 = read_scanline(dsl, &field2);
 
 		if (frm1 + 1 != frm2)
 			continue;
@@ -805,15 +794,10 @@ static void poll_dsl_frametimestamp(uint32_t devid, int pipe,
 		push_vrr(devid, pipe, vrr_push_scanline);
 
 		while (!quit) {
-			dsl1 = read_reg(dsl);
+			dsl1 = read_scanline(dsl, &field1);
 			frm1 = read_reg(frm);
 			frm2 = read_reg(frm);
-			dsl2 = read_reg(dsl);
-
-			field1 = dsl1 & 0x80000000;
-			field2 = dsl2 & 0x80000000;
-			dsl1 &= ~0x80000000;
-			dsl2 &= ~0x80000000;
+			dsl2 = read_scanline(dsl, &field2);
 
 			if (frm1 != frm2)
 				break;
@@ -859,9 +843,6 @@ static void poll_dsl_timestamp(uint32_t devid, int pipe, int target_scanline,
 		frm1 = read_reg(frm);
 		ts1 = read_reg(ts);
 
-		field1 = dsl1 & 0x80000000;
-		dsl1 &= ~0x80000000;
-
 		min[field1*count+i[field1]] = dsl1;
 		max[field1*count+i[field1]] = ts1 - frm1;
 		if (++i[field1] >= count)
@@ -980,10 +961,7 @@ static void poll_dsl_flipdone_pipestat(uint32_t devid, int pipe, int target_scan
 
 		while (!quit) {
 			pipestat2 = read_reg(pipestat);
-			dsl2 = read_reg(dsl);
-
-			field2 = dsl2 & 0x80000000;
-			dsl2 &= ~0x80000000;
+			dsl2 = read_scanline(dsl, &field2);
 
 			if (pipestat2 & bit)
 				break;
@@ -1065,10 +1043,7 @@ static void poll_dsl_flipdone_deiir(uint32_t devid, int pipe, int target_scanlin
 
 		while (!quit) {
 			iir2 = read_reg(iir);
-			dsl2 = read_reg(dsl);
-
-			field2 = dsl2 & 0x80000000;
-			dsl2 &= ~0x80000000;
+			dsl2 = read_scanline(dsl, &field2);
 
 			if (iir2 & bit)
 				break;
@@ -1116,15 +1091,10 @@ static void poll_dsl_surflive(uint32_t devid, int pipe,
 		push_vrr(devid, pipe, vrr_push_scanline);
 
 		while (!quit) {
-			dsl1 = read_reg(dsl);
+			dsl1 = read_scanline(dsl, &field1);
 			surfl1 = read_reg(surflive) & ~0xfff;
 			surfl2 = read_reg(surflive) & ~0xfff;
-			dsl2 = read_reg(dsl);
-
-			field1 = dsl1 & 0x80000000;
-			field2 = dsl2 & 0x80000000;
-			dsl1 &= ~0x80000000;
-			dsl2 &= ~0x80000000;
+			dsl2 = read_scanline(dsl, &field2);
 
 			if (surfl2 == surf2)
 				break;
@@ -1164,6 +1134,10 @@ static void poll_dsl_wrap(uint32_t devid, int pipe,
 		push_vrr(devid, pipe, vrr_push_scanline);
 
 		while (!quit) {
+			/*
+			 * raw read_reg() instead of read_scanline()
+			 * to avoid scanline_offset screwing this up.
+			 */
 			dsl1 = read_reg(dsl);
 			dsl2 = read_reg(dsl);
 
@@ -1196,13 +1170,8 @@ static void poll_dsl_field(int pipe, uint32_t *min, uint32_t *max, const int cou
 	dsl = PIPE_REG(pipe, PIPEA_DSL);
 
 	while (!quit) {
-		dsl1 = read_reg(dsl);
-		dsl2 = read_reg(dsl);
-
-		field1 = dsl1 & 0x80000000;
-		field2 = dsl2 & 0x80000000;
-		dsl1 &= ~0x80000000;
-		dsl2 &= ~0x80000000;
+		dsl1 = read_scanline(dsl, &field1);
+		dsl2 = read_scanline(dsl, &field2);
 
 		if (field1 == field2)
 			continue;
@@ -1230,15 +1199,10 @@ static void poll_dsl_vrr_push(uint32_t devid, int pipe,
 		push_vrr(devid, pipe, vrr_push_scanline);
 
 		while (!quit) {
-			dsl1 = read_reg(dsl);
+			dsl1 = read_scanline(dsl, &field1);
 			vrr1 = read_reg(vrr);
 			vrr2 = read_reg(vrr);
-			dsl2 = read_reg(dsl);
-
-			field1 = dsl1 & 0x80000000;
-			field2 = dsl2 & 0x80000000;
-			dsl1 &= ~0x80000000;
-			dsl2 &= ~0x80000000;
+			dsl2 = read_scanline(dsl, &field2);
 
 			if (!(vrr2 & 0x40000000))
 				break;
@@ -1330,7 +1294,8 @@ static void __attribute__((noreturn)) usage(const char *name)
 		" -f,--fuzz <target fuzz>\n"
 		" -x,--pixel\n"
 		" -a,--async\n"
-		" -v,--vrr-push <push scanline>\n",
+		" -v,--vrr-push <push scanline>\n"
+		" -o,--scanline-offset <offset>\n",
 		name);
 	exit(1);
 }
@@ -1360,10 +1325,11 @@ int main(int argc, char *argv[])
 			{ .name = "pixel", .has_arg = no_argument, .val = 'x', },
 			{ .name = "async", .has_arg = no_argument, .val = 'a', },
 			{ .name = "vrr-push", .has_arg = required_argument, .val = 'v', },
+			{ .name = "scanline-offset", .has_arg = required_argument, .val = 'o', },
 			{ },
 		};
 
-		int opt = getopt_long(argc, argv, "t:p:b:l:f:xav:", long_options, NULL);
+		int opt = getopt_long(argc, argv, "t:p:b:l:f:xav:o:", long_options, NULL);
 		if (opt == -1)
 			break;
 
@@ -1439,6 +1405,9 @@ int main(int argc, char *argv[])
 			if (vrr_push_scanline < 0)
 				usage(argv[0]);
 			break;
+		case 'o':
+			scanline_offset = atoi(optarg);
+			break;
 		}
 	}
 
-- 
2.49.1


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH i-g-t 5/7] tools/intel_display_poller: Add --auto-scanline-offset/-O comamnd line option
  2025-09-22 16:09 [PATCH i-g-t 0/7] tools/intel_display_poller: Various things Ville Syrjala
                   ` (3 preceding siblings ...)
  2025-09-22 16:09 ` [PATCH i-g-t 4/7] tools/intel_display_poller: Add --scanline-offset/-o command line option Ville Syrjala
@ 2025-09-22 16:09 ` Ville Syrjala
  2025-10-02 19:54   ` Michał Grzelak
  2025-09-22 16:09 ` [PATCH i-g-t 6/7] tools/intel_display_poller: Add dsb-status-live test Ville Syrjala
                   ` (5 subsequent siblings)
  10 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2025-09-22 16:09 UTC (permalink / raw)
  To: igt-dev

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Using the --scanline-offset/-o option to manually specify the scanline
offset can be a bit error prone since the appropriate offset depends
not only on the hardware generation, but sometimes also on the output
type (HDMI vs. not). Add a --auto-scanline-offset/-O option that tries
to automagically determin the correct offset by examinign the current
hardware state.

Note that DSI outputs aren't really handled properly by
hsw_ddi_is_hdmi(), or even by trans_reg() in general. So this
might give the wrong answer there.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 lib/intel_reg.h              |  1 +
 tools/intel_display_poller.c | 45 ++++++++++++++++++++++++++++++++++--
 2 files changed, 44 insertions(+), 2 deletions(-)

diff --git a/lib/intel_reg.h b/lib/intel_reg.h
index 66911d015bd5..57d4420cf605 100644
--- a/lib/intel_reg.h
+++ b/lib/intel_reg.h
@@ -3531,6 +3531,7 @@ typedef enum {
 /* Those bits are ignored by pipe EDP since it can only connect to DDI A */
 #define  PIPE_DDI_PORT_MASK		(0xf<<28)
 #define  PIPE_DDI_SELECT_PORT(x)	((x)<<28)
+#define  PIPE_DDI_MODE_SELECT_MASK	(7<<24)
 #define  PIPE_DDI_MODE_SELECT_HDMI	(0<<24)
 #define  PIPE_DDI_MODE_SELECT_DVI	(1<<24)
 #define  PIPE_DDI_MODE_SELECT_DP_SST	(2<<24)
diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
index 24ed28ccf7da..b077390d14a1 100644
--- a/tools/intel_display_poller.c
+++ b/tools/intel_display_poller.c
@@ -207,6 +207,37 @@ static uint32_t trans_reg(uint32_t devid, int pipe, uint32_t reg)
 	return PIPE_REG(trans, reg);
 }
 
+static bool hsw_ddi_is_hdmi(uint32_t devid, int pipe)
+{
+	uint32_t tmp = read_reg(trans_reg(devid, pipe, PIPE_DDI_FUNC_CTL_A));
+
+	if (!(tmp & PIPE_DDI_FUNC_ENABLE))
+		return false;
+
+	switch (tmp & PIPE_DDI_MODE_SELECT_MASK) {
+	case PIPE_DDI_MODE_SELECT_HDMI:
+	case PIPE_DDI_MODE_SELECT_DVI:
+		return true;
+	default:
+		return false;
+	}
+}
+
+static int default_scanline_offset(uint32_t devid, int pipe)
+{
+	int display_ver = intel_display_ver(devid);
+
+	if (display_ver >= 20 || IS_BATTLEMAGE(devid))
+		return 1;
+	else if (display_ver >= 9 ||
+		 IS_BROADWELL(devid) || IS_HASWELL(devid))
+		return hsw_ddi_is_hdmi(devid, pipe) ? 2 : 1;
+	else if (display_ver >= 3)
+		return 1;
+	else
+		return -1;
+}
+
 static void enable_async_flip(uint32_t devid, int pipe, bool enable)
 {
 	int plane = pipe_to_plane(devid, pipe);
@@ -1295,7 +1326,8 @@ static void __attribute__((noreturn)) usage(const char *name)
 		" -x,--pixel\n"
 		" -a,--async\n"
 		" -v,--vrr-push <push scanline>\n"
-		" -o,--scanline-offset <offset>\n",
+		" -o,--scanline-offset <offset>\n"
+		" -O,--auto-scanline-offset\n",
 		name);
 	exit(1);
 }
@@ -1314,6 +1346,7 @@ int main(int argc, char *argv[])
 	uint32_t a, b;
 	enum test test = TEST_INVALID;
 	const int count = ARRAY_SIZE(min)/2;
+	bool auto_scanline_offset = false;
 
 	for (;;) {
 		static const struct option long_options[] = {
@@ -1326,10 +1359,11 @@ int main(int argc, char *argv[])
 			{ .name = "async", .has_arg = no_argument, .val = 'a', },
 			{ .name = "vrr-push", .has_arg = required_argument, .val = 'v', },
 			{ .name = "scanline-offset", .has_arg = required_argument, .val = 'o', },
+			{ .name = "auto-scanline-offset", .has_arg = no_argument, .val = 'O', },
 			{ },
 		};
 
-		int opt = getopt_long(argc, argv, "t:p:b:l:f:xav:o:", long_options, NULL);
+		int opt = getopt_long(argc, argv, "t:p:b:l:f:xav:o:O", long_options, NULL);
 		if (opt == -1)
 			break;
 
@@ -1406,8 +1440,12 @@ int main(int argc, char *argv[])
 				usage(argv[0]);
 			break;
 		case 'o':
+			auto_scanline_offset = false;
 			scanline_offset = atoi(optarg);
 			break;
+		case 'O':
+			auto_scanline_offset = true;
+			break;
 		}
 	}
 
@@ -1578,6 +1616,9 @@ int main(int argc, char *argv[])
 
 	intel_register_access_init(&mmio_data, intel_get_pci_device(), 0);
 
+	if (auto_scanline_offset)
+		scanline_offset = default_scanline_offset(devid, pipe);
+
 	printf("%s?\n", test_name(test, pipe, bit, test_pixelcount));
 
 	signal(SIGHUP, sighandler);
-- 
2.49.1


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH i-g-t 6/7] tools/intel_display_poller: Add dsb-status-live test
  2025-09-22 16:09 [PATCH i-g-t 0/7] tools/intel_display_poller: Various things Ville Syrjala
                   ` (4 preceding siblings ...)
  2025-09-22 16:09 ` [PATCH i-g-t 5/7] tools/intel_display_poller: Add --auto-scanline-offset/-O comamnd " Ville Syrjala
@ 2025-09-22 16:09 ` Ville Syrjala
  2025-10-02 19:55   ` Michał Grzelak
  2025-09-22 16:09 ` [PATCH i-g-t 7/7] tools/intel_display_poller: Add --dsb-id/-d command line option Ville Syrjala
                   ` (4 subsequent siblings)
  10 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2025-09-22 16:09 UTC (permalink / raw)
  To: igt-dev

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add a dsb-status-live test that can be used to poll for live
status bits in the DSB_STATUS register.

Eg.
intel_display_poller --pipe a --test dsb-status-live --bit 26
will look for the DSB safe window rising edge.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 lib/intel_reg.h              |  4 +++
 tools/intel_display_poller.c | 57 +++++++++++++++++++++++++++++++++++-
 2 files changed, 60 insertions(+), 1 deletion(-)

diff --git a/lib/intel_reg.h b/lib/intel_reg.h
index 57d4420cf605..fd35e4bb366a 100644
--- a/lib/intel_reg.h
+++ b/lib/intel_reg.h
@@ -2275,6 +2275,10 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define FW_BLC2		0x020dc
 #define FW_BLC_SELF	0x020e0 /* 915+ only */
 
+#define DSB_STATUS_0_A			0x70B24
+#define   DSB_SAFE_WINDOW_LIVE		(1 << 26)
+#define   DSB_SAFE_WINDOW_STICKY	(1 << 19)
+
 #define DSPARB			0x70030
 #define   DSPARB_CSTART_SHIFT	7
 #define   DSPARB_BSTART_SHIFT	0
diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
index b077390d14a1..21e4e847a6b6 100644
--- a/tools/intel_display_poller.c
+++ b/tools/intel_display_poller.c
@@ -61,6 +61,7 @@ enum test {
 	TEST_WRAP,
 	TEST_FIELD,
 	TEST_VRR_PUSH,
+	TEST_DSB_STATUS_LIVE,
 };
 
 static uint32_t vlv_offset;
@@ -1253,6 +1254,46 @@ static void poll_dsl_vrr_push(uint32_t devid, int pipe,
 	}
 }
 
+static void poll_dsl_dsb_status_live(uint32_t devid, int pipe, int bit,
+				     uint32_t *min, uint32_t *max, const int count,
+				     int vrr_push_scanline)
+{
+	uint32_t dsl, dsl1, dsl2;
+	uint32_t dsb, dsb1, dsb2;
+	bool field1, field2;
+	int i[2] = {};
+
+	bit = 1 << bit;
+	dsl = PIPE_REG(pipe, PIPEA_DSL);
+	dsb = PIPE_REG(pipe, DSB_STATUS_0_A);
+
+	while (!quit) {
+		push_vrr(devid, pipe, vrr_push_scanline);
+
+		while (!quit) {
+			dsl1 = read_scanline(dsl, &field1);
+			dsb1 = read_reg(dsb);
+			dsb2 = read_reg(dsb);
+			dsl2 = read_scanline(dsl, &field2);
+
+			if (dsb2 & bit)
+				break;
+		}
+
+		if (dsb1 & bit)
+			continue;
+
+		if (field1 != field2)
+			printf("fields are different (%u:%u -> %u:%u)\n",
+			       field1, dsl1, field2, dsl2);
+
+		min[field1*count+i[field1]] = dsl1;
+		max[field1*count+i[field1]] = dsl2;
+		if (++i[field1] >= count)
+			break;
+	}
+}
+
 static const char *test_name(enum test test, int pipe, int bit, bool test_pixel_count)
 {
 	static char str[64];
@@ -1310,6 +1351,9 @@ static const char *test_name(enum test test, int pipe, int bit, bool test_pixel_
 	case TEST_VRR_PUSH:
 		snprintf(str, sizeof str, "%s / pipe %c / VRR push", type, pipe_name(pipe));
 		return str;
+	case TEST_DSB_STATUS_LIVE:
+		snprintf(str, sizeof str, "%s / pipe %c / DSB_STATUS[%d]", type, pipe_name(pipe), bit);
+		return str;
 	default:
 		return "";
 	}
@@ -1318,8 +1362,9 @@ static const char *test_name(enum test test, int pipe, int bit, bool test_pixel_
 static void __attribute__((noreturn)) usage(const char *name)
 {
 	fprintf(stderr, "Usage: %s [options]\n"
-		" -t,--test <pipestat|iir|framecount|flipcount|frametimestamp|timestamp|pan|flip|flipdone|surflive|wrap|field|vrr-push>\n"
+		" -t,--test <pipestat|iir|framecount|flipcount|frametimestamp|timestamp|pan|flip|flipdone|surflive|wrap|field|vrr-push|dsb-status>\n"
 		" -p,--pipe <pipe>\n"
+		" -d,--dsb-id <dsb id>\n"
 		" -b,--bit <bit>\n"
 		" -l,--line <target scanline/pixel>\n"
 		" -f,--fuzz <target fuzz>\n"
@@ -1352,6 +1397,7 @@ int main(int argc, char *argv[])
 		static const struct option long_options[] = {
 			{ .name = "test", .has_arg = required_argument, .val = 't', },
 			{ .name = "pipe", .has_arg = required_argument, .val = 'b', },
+			{ .name = "dsb-id", .has_arg = required_argument, .val = 'd', },
 			{ .name = "bit", .has_arg = required_argument, .val = 'b', },
 			{ .name = "line", .has_arg = required_argument, .val = 'l', },
 			{ .name = "fuzz", .has_arg = required_argument, .val = 'f', },
@@ -1395,6 +1441,8 @@ int main(int argc, char *argv[])
 				test = TEST_FIELD;
 			else if (!strcmp(optarg, "vrr-push"))
 				test = TEST_VRR_PUSH;
+			else if (!strcmp(optarg, "dsb-status-live"))
+				test = TEST_DSB_STATUS_LIVE;
 			else
 				usage(argv[0]);
 			break;
@@ -1590,6 +1638,10 @@ int main(int argc, char *argv[])
 			if (intel_display_ver(devid) < 11)
 				usage(argv[0]);
 			break;
+		case TEST_DSB_STATUS_LIVE:
+			if (intel_display_ver(devid) < 12)
+				usage(argv[0]);
+			break;
 		case TEST_FLIPCOUNT:
 		case TEST_PAN:
 		case TEST_FLIP:
@@ -1707,6 +1759,9 @@ int main(int argc, char *argv[])
 	case TEST_VRR_PUSH:
 		poll_dsl_vrr_push(devid, pipe, min, max, count, vrr_push_scanline);
 		break;
+	case TEST_DSB_STATUS_LIVE:
+		poll_dsl_dsb_status_live(devid, pipe, bit, min, max, count, vrr_push_scanline);
+		break;
 	default:
 		assert(0);
 	}
-- 
2.49.1


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH i-g-t 7/7] tools/intel_display_poller: Add --dsb-id/-d command line option
  2025-09-22 16:09 [PATCH i-g-t 0/7] tools/intel_display_poller: Various things Ville Syrjala
                   ` (5 preceding siblings ...)
  2025-09-22 16:09 ` [PATCH i-g-t 6/7] tools/intel_display_poller: Add dsb-status-live test Ville Syrjala
@ 2025-09-22 16:09 ` Ville Syrjala
  2025-10-02 19:55   ` Michał Grzelak
  2025-09-22 18:41 ` ✓ i915.CI.BAT: success for tools/intel_display_poller: Various things Patchwork
                   ` (3 subsequent siblings)
  10 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjala @ 2025-09-22 16:09 UTC (permalink / raw)
  To: igt-dev

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add a new command line option (--dsb-id/-d) to select the
DSB engine (0-2) for DSB related tests.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 tools/intel_display_poller.c | 31 +++++++++++++++++++++----------
 1 file changed, 21 insertions(+), 10 deletions(-)

diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
index 21e4e847a6b6..ecdef21609cb 100644
--- a/tools/intel_display_poller.c
+++ b/tools/intel_display_poller.c
@@ -208,6 +208,11 @@ static uint32_t trans_reg(uint32_t devid, int pipe, uint32_t reg)
 	return PIPE_REG(trans, reg);
 }
 
+static uint32_t dsb_reg(int pipe, int dsb_id, uint32_t reg)
+{
+	return PIPE_REG(pipe, reg + dsb_id * 0x100);
+}
+
 static bool hsw_ddi_is_hdmi(uint32_t devid, int pipe)
 {
 	uint32_t tmp = read_reg(trans_reg(devid, pipe, PIPE_DDI_FUNC_CTL_A));
@@ -1254,7 +1259,7 @@ static void poll_dsl_vrr_push(uint32_t devid, int pipe,
 	}
 }
 
-static void poll_dsl_dsb_status_live(uint32_t devid, int pipe, int bit,
+static void poll_dsl_dsb_status_live(uint32_t devid, int pipe, int dsb_id, int bit,
 				     uint32_t *min, uint32_t *max, const int count,
 				     int vrr_push_scanline)
 {
@@ -1265,7 +1270,7 @@ static void poll_dsl_dsb_status_live(uint32_t devid, int pipe, int bit,
 
 	bit = 1 << bit;
 	dsl = PIPE_REG(pipe, PIPEA_DSL);
-	dsb = PIPE_REG(pipe, DSB_STATUS_0_A);
+	dsb = dsb_reg(pipe, dsb_id, DSB_STATUS_0_A);
 
 	while (!quit) {
 		push_vrr(devid, pipe, vrr_push_scanline);
@@ -1294,7 +1299,7 @@ static void poll_dsl_dsb_status_live(uint32_t devid, int pipe, int bit,
 	}
 }
 
-static const char *test_name(enum test test, int pipe, int bit, bool test_pixel_count)
+static const char *test_name(enum test test, int pipe, int dsb_id, int bit, bool test_pixel_count)
 {
 	static char str[64];
 	const char *type = test_pixel_count ? "pixel" : "dsl";
@@ -1352,7 +1357,7 @@ static const char *test_name(enum test test, int pipe, int bit, bool test_pixel_
 		snprintf(str, sizeof str, "%s / pipe %c / VRR push", type, pipe_name(pipe));
 		return str;
 	case TEST_DSB_STATUS_LIVE:
-		snprintf(str, sizeof str, "%s / pipe %c / DSB_STATUS[%d]", type, pipe_name(pipe), bit);
+		snprintf(str, sizeof str, "%s / pipe %c / DSB%d / DSB_STATUS[%d]", type, pipe_name(pipe), dsb_id, bit);
 		return str;
 	default:
 		return "";
@@ -1381,7 +1386,8 @@ int main(int argc, char *argv[])
 {
 	struct intel_mmio_data mmio_data;
 	int i;
-	int pipe = 0, bit = 0, target_scanline = 0, target_fuzz = 1;
+	int pipe = 0, dsb_id = 0, bit = 0;
+	int target_scanline = 0, target_fuzz = 1;
 	bool test_pixelcount = false;
 	bool test_async_flip = false;
 	int vrr_push_scanline = -1;
@@ -1409,7 +1415,7 @@ int main(int argc, char *argv[])
 			{ },
 		};
 
-		int opt = getopt_long(argc, argv, "t:p:b:l:f:xav:o:O", long_options, NULL);
+		int opt = getopt_long(argc, argv, "t:p:d:b:l:f:xav:o:O", long_options, NULL);
 		if (opt == -1)
 			break;
 
@@ -1461,6 +1467,11 @@ int main(int argc, char *argv[])
 			if (pipe < 0 || pipe > 3)
 				usage(argv[0]);
 			break;
+		case 'd':
+			dsb_id = atoi(optarg);
+			if (dsb_id < 0 || dsb_id > 2)
+				usage(argv[0]);
+			break;
 		case 'b':
 			bit = atoi(optarg);
 			if (bit < 0 || bit > 31)
@@ -1671,7 +1682,7 @@ int main(int argc, char *argv[])
 	if (auto_scanline_offset)
 		scanline_offset = default_scanline_offset(devid, pipe);
 
-	printf("%s?\n", test_name(test, pipe, bit, test_pixelcount));
+	printf("%s?\n", test_name(test, pipe, dsb_id, bit, test_pixelcount));
 
 	signal(SIGHUP, sighandler);
 	signal(SIGINT, sighandler);
@@ -1760,7 +1771,7 @@ int main(int argc, char *argv[])
 		poll_dsl_vrr_push(devid, pipe, min, max, count, vrr_push_scanline);
 		break;
 	case TEST_DSB_STATUS_LIVE:
-		poll_dsl_dsb_status_live(devid, pipe, bit, min, max, count, vrr_push_scanline);
+		poll_dsl_dsb_status_live(devid, pipe, dsb_id, bit, min, max, count, vrr_push_scanline);
 		break;
 	default:
 		assert(0);
@@ -1793,7 +1804,7 @@ int main(int argc, char *argv[])
 		b = min(b, max[0*count+i]);
 	}
 
-	printf("%s: [%u] %6u - %6u\n", test_name(test, pipe, bit, test_pixelcount), 0, a, b);
+	printf("%s: [%u] %6u - %6u\n", test_name(test, pipe, dsb_id, bit, test_pixelcount), 0, a, b);
 
 	a = 0;
 	b = 0xffffffff;
@@ -1804,7 +1815,7 @@ int main(int argc, char *argv[])
 		b = min(b, max[1*count+i]);
 	}
 
-	printf("%s: [%u] %6u - %6u\n", test_name(test, pipe, bit, test_pixelcount), 1, a, b);
+	printf("%s: [%u] %6u - %6u\n", test_name(test, pipe, dsb_id, bit, test_pixelcount), 1, a, b);
 
 	return 0;
 }
-- 
2.49.1


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* ✓ i915.CI.BAT: success for tools/intel_display_poller: Various things
  2025-09-22 16:09 [PATCH i-g-t 0/7] tools/intel_display_poller: Various things Ville Syrjala
                   ` (6 preceding siblings ...)
  2025-09-22 16:09 ` [PATCH i-g-t 7/7] tools/intel_display_poller: Add --dsb-id/-d command line option Ville Syrjala
@ 2025-09-22 18:41 ` Patchwork
  2025-09-22 18:50 ` ✓ Xe.CI.BAT: " Patchwork
                   ` (2 subsequent siblings)
  10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2025-09-22 18:41 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 1123 bytes --]

== Series Details ==

Series: tools/intel_display_poller: Various things
URL   : https://patchwork.freedesktop.org/series/154853/
State : success

== Summary ==

CI Bug Log - changes from IGT_8547 -> IGTPW_13796
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/index.html

Participating hosts (39 -> 38)
------------------------------

  Missing    (1): bat-adls-6 


Changes
-------

  No changes found


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_8547 -> IGTPW_13796
  * Linux: CI_DRM_17253 -> CI_DRM_17254

  CI-20190529: 20190529
  CI_DRM_17253: c4d19320a0e2f7d8dec97d4a59309349a3a63ec0 @ git://anongit.freedesktop.org/gfx-ci/linux
  CI_DRM_17254: 3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_13796: bdc7bb7c338b0c00eed2d5258e2e997533da9813 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8547: 8547

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/index.html

[-- Attachment #2: Type: text/html, Size: 1703 bytes --]

^ permalink raw reply	[flat|nested] 22+ messages in thread

* ✓ Xe.CI.BAT: success for tools/intel_display_poller: Various things
  2025-09-22 16:09 [PATCH i-g-t 0/7] tools/intel_display_poller: Various things Ville Syrjala
                   ` (7 preceding siblings ...)
  2025-09-22 18:41 ` ✓ i915.CI.BAT: success for tools/intel_display_poller: Various things Patchwork
@ 2025-09-22 18:50 ` Patchwork
  2025-09-22 20:45 ` ✗ i915.CI.Full: failure " Patchwork
  2025-09-22 23:21 ` ✓ Xe.CI.Full: success " Patchwork
  10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2025-09-22 18:50 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 1925 bytes --]

== Series Details ==

Series: tools/intel_display_poller: Various things
URL   : https://patchwork.freedesktop.org/series/154853/
State : success

== Summary ==

CI Bug Log - changes from XEIGT_8547_BAT -> XEIGTPW_13796_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in XEIGTPW_13796_BAT:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_force_connector_basic@force-connector-state:
    - {bat-ptl-1}:        [ABORT][1] ([Intel XE#6201]) -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8547/bat-ptl-1/igt@kms_force_connector_basic@force-connector-state.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13796/bat-ptl-1/igt@kms_force_connector_basic@force-connector-state.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#6201]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6201


Build changes
-------------

  * IGT: IGT_8547 -> IGTPW_13796
  * Linux: xe-3812-c4d19320a0e2f7d8dec97d4a59309349a3a63ec0 -> xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1

  IGTPW_13796: bdc7bb7c338b0c00eed2d5258e2e997533da9813 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8547: 8547
  xe-3812-c4d19320a0e2f7d8dec97d4a59309349a3a63ec0: c4d19320a0e2f7d8dec97d4a59309349a3a63ec0
  xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1: 3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13796/index.html

[-- Attachment #2: Type: text/html, Size: 2514 bytes --]

^ permalink raw reply	[flat|nested] 22+ messages in thread

* ✗ i915.CI.Full: failure for tools/intel_display_poller: Various things
  2025-09-22 16:09 [PATCH i-g-t 0/7] tools/intel_display_poller: Various things Ville Syrjala
                   ` (8 preceding siblings ...)
  2025-09-22 18:50 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-09-22 20:45 ` Patchwork
  2025-09-22 23:21 ` ✓ Xe.CI.Full: success " Patchwork
  10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2025-09-22 20:45 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 24996 bytes --]

== Series Details ==

Series: tools/intel_display_poller: Various things
URL   : https://patchwork.freedesktop.org/series/154853/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_17254_full -> IGTPW_13796_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_13796_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_13796_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/index.html

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_13796_full:

### IGT changes ###

#### Possible regressions ####

  * igt@core_setmaster@master-drop-set-root:
    - shard-dg2:          NOTRUN -> [FAIL][1] +1 other test fail
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-dg2-11/igt@core_setmaster@master-drop-set-root.html

  * igt@i915_drm_fdinfo@basics:
    - shard-dg2:          NOTRUN -> [SKIP][2] +142 other tests skip
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-dg2-11/igt@i915_drm_fdinfo@basics.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_async_flips@async-flip-hang}:
    - shard-dg2:          NOTRUN -> [SKIP][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-dg2-11/igt@kms_async_flips@async-flip-hang.html

  
Known issues
------------

  Here are the changes found in IGTPW_13796_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_allocator@two-level-inception:
    - shard-dg2:          NOTRUN -> [SKIP][4] +120 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-dg2-11/igt@api_intel_allocator@two-level-inception.html

  * igt@api_intel_bb@object-reloc-purge-cache:
    - shard-rkl:          NOTRUN -> [SKIP][5] ([i915#14544] / [i915#8411])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@api_intel_bb@object-reloc-purge-cache.html

  * igt@fbdev@unaligned-read:
    - shard-dg2:          NOTRUN -> [SKIP][6] ([i915#2582]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-dg2-11/igt@fbdev@unaligned-read.html

  * igt@fbdev@unaligned-write:
    - shard-rkl:          NOTRUN -> [SKIP][7] ([i915#14544] / [i915#2582])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@fbdev@unaligned-write.html

  * igt@gem_ccs@block-multicopy-inplace:
    - shard-rkl:          NOTRUN -> [SKIP][8] ([i915#14544] / [i915#3555] / [i915#9323])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@gem_ccs@block-multicopy-inplace.html

  * igt@gem_close_race@multigpu-basic-process:
    - shard-rkl:          NOTRUN -> [SKIP][9] ([i915#14544] / [i915#7697])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@gem_close_race@multigpu-basic-process.html

  * igt@gem_ctx_exec@basic-nohangcheck:
    - shard-dg2:          NOTRUN -> [SKIP][10] ([i915#2575]) +124 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-dg2-11/igt@gem_ctx_exec@basic-nohangcheck.html

  * igt@gem_exec_balancer@parallel:
    - shard-rkl:          NOTRUN -> [SKIP][11] ([i915#14544] / [i915#4525])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@gem_exec_balancer@parallel.html

  * igt@gem_exec_reloc@basic-gtt-read-noreloc:
    - shard-rkl:          NOTRUN -> [SKIP][12] ([i915#14544] / [i915#3281]) +4 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@gem_exec_reloc@basic-gtt-read-noreloc.html

  * igt@gem_exec_schedule@fairslice:
    - shard-rkl:          [PASS][13] -> [DMESG-WARN][14] ([i915#12964]) +2 other tests dmesg-warn
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17254/shard-rkl-6/igt@gem_exec_schedule@fairslice.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@gem_exec_schedule@fairslice.html

  * igt@gem_lmem_swapping@verify-random:
    - shard-rkl:          NOTRUN -> [SKIP][15] ([i915#14544] / [i915#4613]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@gem_lmem_swapping@verify-random.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-glk10:        NOTRUN -> [WARN][16] ([i915#14702] / [i915#2658])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk10/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_pxp@protected-encrypted-src-copy-not-readible:
    - shard-rkl:          NOTRUN -> [TIMEOUT][17] ([i915#12917] / [i915#12964]) +2 other tests timeout
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html

  * igt@gem_readwrite@read-bad-handle:
    - shard-rkl:          NOTRUN -> [SKIP][18] ([i915#14544] / [i915#3282]) +2 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@gem_readwrite@read-bad-handle.html

  * igt@gem_render_copy@yf-tiled-to-vebox-yf-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][19] ([i915#2575] / [i915#5190]) +4 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-dg2-11/igt@gem_render_copy@yf-tiled-to-vebox-yf-tiled.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-rkl:          NOTRUN -> [SKIP][20] ([i915#14544] / [i915#3297])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gen9_exec_parse@batch-invalid-length:
    - shard-rkl:          NOTRUN -> [SKIP][21] ([i915#14544] / [i915#2527]) +2 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@gen9_exec_parse@batch-invalid-length.html

  * igt@i915_module_load@resize-bar:
    - shard-rkl:          NOTRUN -> [SKIP][22] ([i915#14544] / [i915#6412])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@i915_module_load@resize-bar.html

  * igt@i915_pm_freq_api@freq-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][23] ([i915#14544] / [i915#8399])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@i915_pm_freq_api@freq-suspend.html

  * igt@i915_query@test-query-geometry-subslices:
    - shard-rkl:          NOTRUN -> [SKIP][24] ([i915#14544] / [i915#5723])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@i915_query@test-query-geometry-subslices.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][25] ([i915#4817])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk10/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@intel_hwmon@hwmon-write:
    - shard-rkl:          NOTRUN -> [SKIP][26] ([i915#14544] / [i915#7707])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@intel_hwmon@hwmon-write.html

  * igt@kms_addfb_basic@addfb25-bad-modifier:
    - shard-dg2:          NOTRUN -> [SKIP][27] ([i915#14958]) +3 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-dg2-11/igt@kms_addfb_basic@addfb25-bad-modifier.html

  * igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
    - shard-dg2:          NOTRUN -> [SKIP][28] ([i915#5190]) +12 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-dg2-11/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html

  * igt@kms_chamelium_hpd@dp-hpd:
    - shard-rkl:          NOTRUN -> [SKIP][29] ([i915#11151] / [i915#14544] / [i915#7828]) +3 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_chamelium_hpd@dp-hpd.html

  * igt@kms_color@ctm-max:
    - shard-rkl:          NOTRUN -> [SKIP][30] ([i915#12655] / [i915#14544]) +2 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_color@ctm-max.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-rkl:          NOTRUN -> [SKIP][31] ([i915#14544]) +77 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
    - shard-rkl:          NOTRUN -> [SKIP][32] ([i915#11190] / [i915#14544]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][33] ([i915#14544] / [i915#3955])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@display-1x:
    - shard-rkl:          NOTRUN -> [SKIP][34] ([i915#14544] / [i915#9738])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_feature_discovery@display-1x.html

  * igt@kms_flip@2x-flip-vs-panning-vs-hang:
    - shard-rkl:          NOTRUN -> [SKIP][35] ([i915#14544] / [i915#9934]) +3 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_flip@2x-flip-vs-panning-vs-hang.html

  * igt@kms_flip@flip-vs-panning-interruptible:
    - shard-rkl:          NOTRUN -> [SKIP][36] ([i915#14544] / [i915#3637]) +5 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_flip@flip-vs-panning-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling:
    - shard-rkl:          NOTRUN -> [SKIP][37] ([i915#14544] / [i915#3555]) +4 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][38] ([i915#14544] / [i915#1849] / [i915#5354]) +47 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_invalid_mode@bad-htotal:
    - shard-rkl:          NOTRUN -> [SKIP][39] ([i915#14544] / [i915#3555] / [i915#8826]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_invalid_mode@bad-htotal.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][40] ([i915#12394] / [i915#14544])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12:
    - shard-glk10:        NOTRUN -> [SKIP][41] ([i915#11190])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk10/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12.html

  * igt@kms_plane@plane-panning-top-left:
    - shard-rkl:          NOTRUN -> [SKIP][42] ([i915#14544] / [i915#8825]) +1 other test skip
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_plane@plane-panning-top-left.html

  * igt@kms_plane_scaling@invalid-num-scalers:
    - shard-rkl:          NOTRUN -> [SKIP][43] ([i915#14544] / [i915#3555] / [i915#6953] / [i915#8152])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_plane_scaling@invalid-num-scalers.html

  * igt@kms_plane_scaling@plane-upscale-20x20-with-pixel-format:
    - shard-rkl:          NOTRUN -> [SKIP][44] ([i915#14544] / [i915#8152]) +1 other test skip
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_plane_scaling@plane-upscale-20x20-with-pixel-format.html

  * igt@kms_plane_scaling@plane-upscale-20x20-with-pixel-format@pipe-a:
    - shard-rkl:          NOTRUN -> [SKIP][45] ([i915#12247] / [i915#14544]) +3 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_plane_scaling@plane-upscale-20x20-with-pixel-format@pipe-a.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-75:
    - shard-rkl:          NOTRUN -> [SKIP][46] ([i915#12247] / [i915#14544] / [i915#3555] / [i915#6953] / [i915#8152])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_plane_scaling@planes-downscale-factor-0-75.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5:
    - shard-dg2:          NOTRUN -> [SKIP][47] ([i915#9423]) +3 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-dg2-11/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75:
    - shard-rkl:          NOTRUN -> [SKIP][48] ([i915#12247] / [i915#14544] / [i915#6953] / [i915#8152])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-b:
    - shard-rkl:          NOTRUN -> [SKIP][49] ([i915#12247] / [i915#14544] / [i915#8152]) +3 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-b.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-rkl:          NOTRUN -> [SKIP][50] ([i915#14544] / [i915#9519]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_prime@d3hot:
    - shard-rkl:          NOTRUN -> [SKIP][51] ([i915#14544] / [i915#6524]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_prime@d3hot.html

  * igt@kms_properties@plane-properties-legacy:
    - shard-rkl:          NOTRUN -> [SKIP][52] ([i915#11521] / [i915#14544])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_properties@plane-properties-legacy.html

  * igt@kms_psr2_sf@psr2-cursor-plane-update-sf:
    - shard-rkl:          NOTRUN -> [SKIP][53] ([i915#11520] / [i915#14544]) +6 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-rkl:          NOTRUN -> [SKIP][54] ([i915#14544] / [i915#9683])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@pr-sprite-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][55] ([i915#1072] / [i915#14544] / [i915#9732]) +11 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@kms_psr@pr-sprite-mmap-gtt.html

  * igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_free:
    - shard-glk10:        NOTRUN -> [ABORT][56] ([i915#13179]) +1 other test abort
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk10/igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_free.html

  * igt@kms_writeback@writeback-check-output-xrgb2101010:
    - shard-glk10:        NOTRUN -> [SKIP][57] +61 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk10/igt@kms_writeback@writeback-check-output-xrgb2101010.html

  * igt@perf_pmu@busy-accuracy-50@vecs0:
    - shard-rkl:          NOTRUN -> [DMESG-WARN][58] ([i915#12964]) +9 other tests dmesg-warn
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@perf_pmu@busy-accuracy-50@vecs0.html

  * igt@perf_pmu@rc6@other-idle-gt0:
    - shard-rkl:          NOTRUN -> [SKIP][59] ([i915#8516])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@perf_pmu@rc6@other-idle-gt0.html

  * igt@sriov_basic@bind-unbind-vf:
    - shard-rkl:          NOTRUN -> [SKIP][60] ([i915#14544] / [i915#9917])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@sriov_basic@bind-unbind-vf.html

  
#### Possible fixes ####

  * igt@gem_fenced_exec_thrash@no-spare-fences-interruptible:
    - shard-rkl:          [DMESG-WARN][61] ([i915#12964]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17254/shard-rkl-6/igt@gem_fenced_exec_thrash@no-spare-fences-interruptible.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-rkl-6/igt@gem_fenced_exec_thrash@no-spare-fences-interruptible.html

  
#### Warnings ####

  * igt@i915_module_load@load:
    - shard-glk:          ([ABORT][63], [ABORT][64], [ABORT][65], [PASS][66], [ABORT][67], [ABORT][68], [ABORT][69], [ABORT][70], [ABORT][71], [ABORT][72], [ABORT][73], [ABORT][74]) ([i915#15020]) -> ([ABORT][75], [ABORT][76], [ABORT][77], [ABORT][78], [ABORT][79], [ABORT][80], [ABORT][81], [ABORT][82], [ABORT][83], [ABORT][84], [ABORT][85], [ABORT][86], [ABORT][87], [ABORT][88], [ABORT][89], [ABORT][90]) ([i915#15020])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17254/shard-glk5/igt@i915_module_load@load.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17254/shard-glk6/igt@i915_module_load@load.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17254/shard-glk5/igt@i915_module_load@load.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17254/shard-glk6/igt@i915_module_load@load.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17254/shard-glk6/igt@i915_module_load@load.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17254/shard-glk5/igt@i915_module_load@load.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17254/shard-glk1/igt@i915_module_load@load.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17254/shard-glk8/igt@i915_module_load@load.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17254/shard-glk1/igt@i915_module_load@load.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17254/shard-glk8/igt@i915_module_load@load.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17254/shard-glk1/igt@i915_module_load@load.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17254/shard-glk1/igt@i915_module_load@load.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk6/igt@i915_module_load@load.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk8/igt@i915_module_load@load.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk5/igt@i915_module_load@load.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk5/igt@i915_module_load@load.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk1/igt@i915_module_load@load.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk6/igt@i915_module_load@load.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk1/igt@i915_module_load@load.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk1/igt@i915_module_load@load.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk1/igt@i915_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk6/igt@i915_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk5/igt@i915_module_load@load.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk8/igt@i915_module_load@load.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk6/igt@i915_module_load@load.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk8/igt@i915_module_load@load.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk5/igt@i915_module_load@load.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/shard-glk8/igt@i915_module_load@load.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
  [i915#11190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11190
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#11521]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11521
  [i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
  [i915#12394]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12394
  [i915#12655]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12655
  [i915#12917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12917
  [i915#12964]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12964
  [i915#13179]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13179
  [i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
  [i915#14702]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14702
  [i915#14958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14958
  [i915#15020]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15020
  [i915#1849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1849
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
  [i915#2582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2582
  [i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3955]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3955
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5723
  [i915#6412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6412
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#8152]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8152
  [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
  [i915#8825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8825
  [i915#8826]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8826
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
  [i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9738]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9738
  [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_8547 -> IGTPW_13796
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_17254: 3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_13796: bdc7bb7c338b0c00eed2d5258e2e997533da9813 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8547: 8547
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13796/index.html

[-- Attachment #2: Type: text/html, Size: 32055 bytes --]

^ permalink raw reply	[flat|nested] 22+ messages in thread

* ✓ Xe.CI.Full: success for tools/intel_display_poller: Various things
  2025-09-22 16:09 [PATCH i-g-t 0/7] tools/intel_display_poller: Various things Ville Syrjala
                   ` (9 preceding siblings ...)
  2025-09-22 20:45 ` ✗ i915.CI.Full: failure " Patchwork
@ 2025-09-22 23:21 ` Patchwork
  10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2025-09-22 23:21 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 1061 bytes --]

== Series Details ==

Series: tools/intel_display_poller: Various things
URL   : https://patchwork.freedesktop.org/series/154853/
State : success

== Summary ==

CI Bug Log - changes from XEIGT_8547_FULL -> XEIGTPW_13796_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (4 -> 3)
------------------------------

  Missing    (1): shard-adlp 


Changes
-------

  No changes found


Build changes
-------------

  * IGT: IGT_8547 -> IGTPW_13796
  * Linux: xe-3812-c4d19320a0e2f7d8dec97d4a59309349a3a63ec0 -> xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1

  IGTPW_13796: bdc7bb7c338b0c00eed2d5258e2e997533da9813 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8547: 8547
  xe-3812-c4d19320a0e2f7d8dec97d4a59309349a3a63ec0: c4d19320a0e2f7d8dec97d4a59309349a3a63ec0
  xe-3813-3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1: 3ff214d6c6a86025aa3feadcb5bba4abfc2dd8f1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13796/index.html

[-- Attachment #2: Type: text/html, Size: 1620 bytes --]

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH i-g-t 1/7] lib/gt: Fix IGT_NO_FORCEWAKE handling
  2025-09-22 16:09 ` [PATCH i-g-t 1/7] lib/gt: Fix IGT_NO_FORCEWAKE handling Ville Syrjala
@ 2025-09-24 13:22   ` Lucas De Marchi
  2025-09-29 18:11     ` Ville Syrjälä
  2025-10-02 19:52   ` Michał Grzelak
  1 sibling, 1 reply; 22+ messages in thread
From: Lucas De Marchi @ 2025-09-24 13:22 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: igt-dev

On Mon, Sep 22, 2025 at 07:09:43PM +0300, Ville Syrjälä wrote:
>From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
>igt_open_forcewake_handle_for_pcidev() forgets to check for
>the IGT_NO_FORCEWAKE environment variable, which is a real
>problem when one wants to frob the registers without forcing
>power state changes in the hardware (eg. to observe display
>low power watermark residencies/etc.)
>
>Add the missing IGT_NO_FORCEWAKE check.
>
>Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>Fixes: 114b9ff31d19 ("lib/igt_gt: Add igt_open_forcewake_handle_for_pcidev()")
>Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

We should also probably update this comment in lib/intel_mmio.c:

        /* Find where the forcewake lock is. Forcewake doesn't exist
         * gen < 6, but the debugfs should do the right things for us.
         */
        ret = igt_open_forcewake_handle_for_pcidev(pci_dev);
        if (ret < 0)
                mmio_data->key = FAKEKEY;

because it's not only about gen < 6, but rather that it can also be
bypassed.

Also odd that there's no way to differentiate a real error from a fake
forcewake.

Lucas De Marchi

>---
> lib/igt_gt.c | 3 +++
> 1 file changed, 3 insertions(+)
>
>diff --git a/lib/igt_gt.c b/lib/igt_gt.c
>index d3421b3d7f0d..bec50e38833c 100644
>--- a/lib/igt_gt.c
>+++ b/lib/igt_gt.c
>@@ -528,6 +528,9 @@ int igt_open_forcewake_handle_for_pcidev(const struct pci_device *pci_dev)
> 	char path[PATH_MAX];
> 	int dirlen, ret;
>
>+	if (getenv("IGT_NO_FORCEWAKE"))
>+		return -1;
>+
> 	if (!debugfs_root)
> 		return -ENOENT;
>
>-- 
>2.49.1
>

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH i-g-t 1/7] lib/gt: Fix IGT_NO_FORCEWAKE handling
  2025-09-24 13:22   ` Lucas De Marchi
@ 2025-09-29 18:11     ` Ville Syrjälä
  0 siblings, 0 replies; 22+ messages in thread
From: Ville Syrjälä @ 2025-09-29 18:11 UTC (permalink / raw)
  To: Lucas De Marchi; +Cc: igt-dev

On Wed, Sep 24, 2025 at 08:22:22AM -0500, Lucas De Marchi wrote:
> On Mon, Sep 22, 2025 at 07:09:43PM +0300, Ville Syrjälä wrote:
> >From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> >igt_open_forcewake_handle_for_pcidev() forgets to check for
> >the IGT_NO_FORCEWAKE environment variable, which is a real
> >problem when one wants to frob the registers without forcing
> >power state changes in the hardware (eg. to observe display
> >low power watermark residencies/etc.)
> >
> >Add the missing IGT_NO_FORCEWAKE check.
> >
> >Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> >Fixes: 114b9ff31d19 ("lib/igt_gt: Add igt_open_forcewake_handle_for_pcidev()")
> >Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
> 
> We should also probably update this comment in lib/intel_mmio.c:
> 
>         /* Find where the forcewake lock is. Forcewake doesn't exist
>          * gen < 6, but the debugfs should do the right things for us.
>          */
>         ret = igt_open_forcewake_handle_for_pcidev(pci_dev);
>         if (ret < 0)
>                 mmio_data->key = FAKEKEY;
> 
> because it's not only about gen < 6, but rather that it can also be
> bypassed.
> 
> Also odd that there's no way to differentiate a real error from a fake
> forcewake.

Are there real errors? I suppose in some cases you might consider the
lack of a driver to be an error, but for me it basically never is.

I suppose one way we could deal with this is to have the caller of
intel_register_access_init() specify whether it wants forcewake or
not. For display stuff we'd never want it, wheras gt stuff (is
presume there is some?) would perhaps always want it.

intel_reg is a much harder problem because sometimes you want
forcewake and sometimes you don't. That could be the case even
for registers that need forcewake because you may want to see
how the hw behaves when you don't have the required forcewake.

And I typically use both intel_reg and other display specific
tools simultaneously so the env variable takes care of everything
for me. Even if we changed the display tools to not take forcewake
I'd still need to set the env variable for intel_reg.

-- 
Ville Syrjälä
Intel

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH i-g-t 1/7] lib/gt: Fix IGT_NO_FORCEWAKE handling
  2025-09-22 16:09 ` [PATCH i-g-t 1/7] lib/gt: Fix IGT_NO_FORCEWAKE handling Ville Syrjala
  2025-09-24 13:22   ` Lucas De Marchi
@ 2025-10-02 19:52   ` Michał Grzelak
  1 sibling, 0 replies; 22+ messages in thread
From: Michał Grzelak @ 2025-10-02 19:52 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: igt-dev, Lucas De Marchi

[-- Attachment #1: Type: text/plain, Size: 692 bytes --]

On Mon, 22 Sep 2025, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> igt_open_forcewake_handle_for_pcidev() forgets to check for
> the IGT_NO_FORCEWAKE environment variable, which is a real
> problem when one wants to frob the registers without forcing
> power state changes in the hardware (eg. to observe display
> low power watermark residencies/etc.)
>
> Add the missing IGT_NO_FORCEWAKE check.
>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Fixes: 114b9ff31d19 ("lib/igt_gt: Add igt_open_forcewake_handle_for_pcidev()")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>

BR,
Michał

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH i-g-t 2/7] tools/intel_display_poller: Fix long opts
  2025-09-22 16:09 ` [PATCH i-g-t 2/7] tools/intel_display_poller: Fix long opts Ville Syrjala
@ 2025-10-02 19:54   ` Michał Grzelak
  2025-10-02 21:22     ` Ville Syrjälä
  0 siblings, 1 reply; 22+ messages in thread
From: Michał Grzelak @ 2025-10-02 19:54 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 1950 bytes --]

On Mon, 22 Sep 2025, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Fix the long option handling by providing a .val for each that
> matches the short option.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> tools/intel_display_poller.c | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
> index 6089be3f1ffa..69906d557a37 100644
> --- a/tools/intel_display_poller.c
> +++ b/tools/intel_display_poller.c
> @@ -1352,14 +1352,14 @@ int main(int argc, char *argv[])
>
> 	for (;;) {
> 		static const struct option long_options[] = {
> -			{ .name = "test", .has_arg = required_argument, },
> -			{ .name = "pipe", .has_arg = required_argument, },
> -			{ .name = "bit", .has_arg = required_argument, },
> -			{ .name = "line", .has_arg = required_argument, },
> -			{ .name = "fuzz", .has_arg = required_argument, },
> -			{ .name = "pixel", .has_arg = no_argument, },
> -			{ .name = "async", .has_arg = no_argument, },
> -			{ .name = "vrr-push", .has_arg = required_argument, },
> +			{ .name = "test", .has_arg = required_argument, .val = 't', },
> +			{ .name = "pipe", .has_arg = required_argument, .val = 'b', },

I'm unsure about this since I can't find the definition for struct
option, but shouldn't be here a .val = 'p'? Seems like it will clash
with --bit option. Otherwise,

Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>

> +			{ .name = "bit", .has_arg = required_argument, .val = 'b', },
> +			{ .name = "line", .has_arg = required_argument, .val = 'l', },
> +			{ .name = "fuzz", .has_arg = required_argument, .val = 'f', },
> +			{ .name = "pixel", .has_arg = no_argument, .val = 'x', },
> +			{ .name = "async", .has_arg = no_argument, .val = 'a', },
> +			{ .name = "vrr-push", .has_arg = required_argument, .val = 'v', },
> 			{ },
> 		};
>
> -- 
> 2.49.1
>
>

BR,
Michał

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH i-g-t 3/7] tools/intel_display_poller: Use intel_display_ver() instead of intel_gen()
  2025-09-22 16:09 ` [PATCH i-g-t 3/7] tools/intel_display_poller: Use intel_display_ver() instead of intel_gen() Ville Syrjala
@ 2025-10-02 19:54   ` Michał Grzelak
  0 siblings, 0 replies; 22+ messages in thread
From: Michał Grzelak @ 2025-10-02 19:54 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 444 bytes --]

On Mon, 22 Sep 2025, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Use intel_display_ver() instead of intel_gen() for the display
> hardware version checks. These two can return different numbers
> on the more modern platforms, and using the wrong number could
> lead us down invalid paths.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH i-g-t 4/7] tools/intel_display_poller: Add --scanline-offset/-o command line option
  2025-09-22 16:09 ` [PATCH i-g-t 4/7] tools/intel_display_poller: Add --scanline-offset/-o command line option Ville Syrjala
@ 2025-10-02 19:54   ` Michał Grzelak
  0 siblings, 0 replies; 22+ messages in thread
From: Michał Grzelak @ 2025-10-02 19:54 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 1266 bytes --]

On Mon, 22 Sep 2025, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Our hardware has a slightly warped view of scanline numbers.
> Eg. on most platforms it reports DSL=vblank_start-1 when the
> start of vblank actaully occurs.
>
> On the kernel side we have helpers to convert between the hardware
> and software scanline numbers. Add the same for intel_display_poller
> in the form of a new --scanline-offset/-o command line option. With
> this one doesn't constantly have to waste brarin power to convert the
> hardware numbers into something more sensible.
>
> Caveat: unlike the kernel side we don't do the appropriate %vtotal
> on the adjusted values (since figuring out the actual vtotal would take
> quite a bit of work due to VRR/etc.). So when using --scanline-offset
> one has to keep in mind that we might see slightly funky scanline
> numbers. Eg. scanline >= vtotal when the scanline offset of positive,
> and negative value (due to a negative scanline offset) we just
> saturate to 0. Howver for most interesting hardware events the
> scanline tends to be in a range where this issue doesn't matter.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH i-g-t 5/7] tools/intel_display_poller: Add --auto-scanline-offset/-O comamnd line option
  2025-09-22 16:09 ` [PATCH i-g-t 5/7] tools/intel_display_poller: Add --auto-scanline-offset/-O comamnd " Ville Syrjala
@ 2025-10-02 19:54   ` Michał Grzelak
  0 siblings, 0 replies; 22+ messages in thread
From: Michał Grzelak @ 2025-10-02 19:54 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 758 bytes --]

On Mon, 22 Sep 2025, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Using the --scanline-offset/-o option to manually specify the scanline
> offset can be a bit error prone since the appropriate offset depends
> not only on the hardware generation, but sometimes also on the output
> type (HDMI vs. not). Add a --auto-scanline-offset/-O option that tries
> to automagically determin the correct offset by examinign the current
> hardware state.
>
> Note that DSI outputs aren't really handled properly by
> hsw_ddi_is_hdmi(), or even by trans_reg() in general. So this
> might give the wrong answer there.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH i-g-t 6/7] tools/intel_display_poller: Add dsb-status-live test
  2025-09-22 16:09 ` [PATCH i-g-t 6/7] tools/intel_display_poller: Add dsb-status-live test Ville Syrjala
@ 2025-10-02 19:55   ` Michał Grzelak
  0 siblings, 0 replies; 22+ messages in thread
From: Michał Grzelak @ 2025-10-02 19:55 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 444 bytes --]

On Mon, 22 Sep 2025, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a dsb-status-live test that can be used to poll for live
> status bits in the DSB_STATUS register.
>
> Eg.
> intel_display_poller --pipe a --test dsb-status-live --bit 26
> will look for the DSB safe window rising edge.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH i-g-t 7/7] tools/intel_display_poller: Add --dsb-id/-d command line option
  2025-09-22 16:09 ` [PATCH i-g-t 7/7] tools/intel_display_poller: Add --dsb-id/-d command line option Ville Syrjala
@ 2025-10-02 19:55   ` Michał Grzelak
  0 siblings, 0 replies; 22+ messages in thread
From: Michał Grzelak @ 2025-10-02 19:55 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 320 bytes --]

On Mon, 22 Sep 2025, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a new command line option (--dsb-id/-d) to select the
> DSB engine (0-2) for DSB related tests.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH i-g-t 2/7] tools/intel_display_poller: Fix long opts
  2025-10-02 19:54   ` Michał Grzelak
@ 2025-10-02 21:22     ` Ville Syrjälä
  0 siblings, 0 replies; 22+ messages in thread
From: Ville Syrjälä @ 2025-10-02 21:22 UTC (permalink / raw)
  To: Michał Grzelak; +Cc: igt-dev

On Thu, Oct 02, 2025 at 09:54:07PM +0200, Michał Grzelak wrote:
> On Mon, 22 Sep 2025, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Fix the long option handling by providing a .val for each that
> > matches the short option.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > tools/intel_display_poller.c | 16 ++++++++--------
> > 1 file changed, 8 insertions(+), 8 deletions(-)
> >
> > diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
> > index 6089be3f1ffa..69906d557a37 100644
> > --- a/tools/intel_display_poller.c
> > +++ b/tools/intel_display_poller.c
> > @@ -1352,14 +1352,14 @@ int main(int argc, char *argv[])
> >
> > 	for (;;) {
> > 		static const struct option long_options[] = {
> > -			{ .name = "test", .has_arg = required_argument, },
> > -			{ .name = "pipe", .has_arg = required_argument, },
> > -			{ .name = "bit", .has_arg = required_argument, },
> > -			{ .name = "line", .has_arg = required_argument, },
> > -			{ .name = "fuzz", .has_arg = required_argument, },
> > -			{ .name = "pixel", .has_arg = no_argument, },
> > -			{ .name = "async", .has_arg = no_argument, },
> > -			{ .name = "vrr-push", .has_arg = required_argument, },
> > +			{ .name = "test", .has_arg = required_argument, .val = 't', },
> > +			{ .name = "pipe", .has_arg = required_argument, .val = 'b', },
> 
> I'm unsure about this since I can't find the definition for struct
> option,

"man getopt_long" is probably the fastest way to find it.

> but shouldn't be here a .val = 'p'? Seems like it will clash
> with --bit option. Otherwise,

Aye, good catch. I must have still been using the short option to
specify the pipe when testing this.

> 
> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>

Thanks.

Fixed the 'd' vs. 'p' fumble while pushing. And I also noticed
that a few hunks from the --dsb-id patch ended up in the 
previous patch, so I moved those over as well.

> 
> > +			{ .name = "bit", .has_arg = required_argument, .val = 'b', },
> > +			{ .name = "line", .has_arg = required_argument, .val = 'l', },
> > +			{ .name = "fuzz", .has_arg = required_argument, .val = 'f', },
> > +			{ .name = "pixel", .has_arg = no_argument, .val = 'x', },
> > +			{ .name = "async", .has_arg = no_argument, .val = 'a', },
> > +			{ .name = "vrr-push", .has_arg = required_argument, .val = 'v', },
> > 			{ },
> > 		};
> >
> > -- 
> > 2.49.1
> >
> >
> 
> BR,
> Michał


-- 
Ville Syrjälä
Intel

^ permalink raw reply	[flat|nested] 22+ messages in thread

end of thread, other threads:[~2025-10-02 21:22 UTC | newest]

Thread overview: 22+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-09-22 16:09 [PATCH i-g-t 0/7] tools/intel_display_poller: Various things Ville Syrjala
2025-09-22 16:09 ` [PATCH i-g-t 1/7] lib/gt: Fix IGT_NO_FORCEWAKE handling Ville Syrjala
2025-09-24 13:22   ` Lucas De Marchi
2025-09-29 18:11     ` Ville Syrjälä
2025-10-02 19:52   ` Michał Grzelak
2025-09-22 16:09 ` [PATCH i-g-t 2/7] tools/intel_display_poller: Fix long opts Ville Syrjala
2025-10-02 19:54   ` Michał Grzelak
2025-10-02 21:22     ` Ville Syrjälä
2025-09-22 16:09 ` [PATCH i-g-t 3/7] tools/intel_display_poller: Use intel_display_ver() instead of intel_gen() Ville Syrjala
2025-10-02 19:54   ` Michał Grzelak
2025-09-22 16:09 ` [PATCH i-g-t 4/7] tools/intel_display_poller: Add --scanline-offset/-o command line option Ville Syrjala
2025-10-02 19:54   ` Michał Grzelak
2025-09-22 16:09 ` [PATCH i-g-t 5/7] tools/intel_display_poller: Add --auto-scanline-offset/-O comamnd " Ville Syrjala
2025-10-02 19:54   ` Michał Grzelak
2025-09-22 16:09 ` [PATCH i-g-t 6/7] tools/intel_display_poller: Add dsb-status-live test Ville Syrjala
2025-10-02 19:55   ` Michał Grzelak
2025-09-22 16:09 ` [PATCH i-g-t 7/7] tools/intel_display_poller: Add --dsb-id/-d command line option Ville Syrjala
2025-10-02 19:55   ` Michał Grzelak
2025-09-22 18:41 ` ✓ i915.CI.BAT: success for tools/intel_display_poller: Various things Patchwork
2025-09-22 18:50 ` ✓ Xe.CI.BAT: " Patchwork
2025-09-22 20:45 ` ✗ i915.CI.Full: failure " Patchwork
2025-09-22 23:21 ` ✓ Xe.CI.Full: success " Patchwork

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