From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Andi Shyti <andi.shyti@intel.com>
Cc: igt-dev@lists.freedesktop.org, Intel-gfx@lists.freedesktop.org,
Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Subject: Re: [igt-dev] [PATCH i-g-t 24/25] gem_wsim: Discover engines
Date: Fri, 17 May 2019 13:19:18 +0100 [thread overview]
Message-ID: <c12ac60c-78f5-376d-7c2d-cbfe8f5d05ea@linux.intel.com> (raw)
In-Reply-To: <20190517121034.GE2556@intel.intel>
On 17/05/2019 13:10, Andi Shyti wrote:
> On Fri, May 17, 2019 at 12:25:25PM +0100, Tvrtko Ursulin wrote:
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> Instead of hardcoding the VCS balancing engines, discover, both with the
>> new engines query, or with the legacy get_param in the fallback case, so
>> class based addressing always works.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> ---
>> benchmarks/gem_wsim.c | 180 ++++++++++++++++++++++++++++++++++++++++--
>> 1 file changed, 173 insertions(+), 7 deletions(-)
>>
>> diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
>> index d43e7c767801..539de243f6e8 100644
>> --- a/benchmarks/gem_wsim.c
>> +++ b/benchmarks/gem_wsim.c
>> @@ -365,34 +365,198 @@ static int str_to_engine(const char *str)
>> return -1;
>> }
>>
>> +static bool __engines_queried;
>> +static unsigned int __num_engines;
>> +static struct i915_engine_class_instance *__engines;
>> +
>> +static int
>> +__i915_query(int i915, struct drm_i915_query *q)
>> +{
>> + if (igt_ioctl(i915, DRM_IOCTL_I915_QUERY, q))
>> + return -errno;
>> + return 0;
>> +}
>> +
>> +static int
>> +__i915_query_items(int i915, struct drm_i915_query_item *items, uint32_t n_items)
>> +{
>> + struct drm_i915_query q = {
>> + .num_items = n_items,
>> + .items_ptr = to_user_pointer(items),
>> + };
>> + return __i915_query(i915, &q);
>> +}
>> +
>> +static void
>> +i915_query_items(int i915, struct drm_i915_query_item *items, uint32_t n_items)
>> +{
>> + igt_assert_eq(__i915_query_items(i915, items, n_items), 0);
>> +}
>> +
>> +static bool has_query(int i915)
>> +{
>> + struct drm_i915_query query = {};
>> +
>> + return __i915_query(i915, &query) == 0;
>> +}
>> +
>> +static bool has_engine_query(int i915)
>> +{
>> + struct drm_i915_query_item item = {
>> + .query_id = DRM_I915_QUERY_ENGINE_INFO,
>> + };
>> +
>> + return __i915_query_items(i915, &item, 1) == 0 && item.length > 0;
>> +}
>> +
>> +static void query_engines(void)
>> +{
>> + struct i915_engine_class_instance *engines;
>> + unsigned int num;
>> +
>> + if (__engines_queried)
>> + return;
>> +
>> + __engines_queried = true;
>> +
>> + if (!has_query(fd) || !has_engine_query(fd)) {
>
> One question, still. What is the real use of this check and
> 'has_query' that is used only here.
>
> I mean... here you want to check whether the "ioctl is not
> implemented" or "ioctl is not implemented and length is 0".
>
> Wouldn't in this case just '!has_engine_query()' be enough? or
> have I missed any case?
You haven't missed anything. I have been pointlessly verbose and a bit
lazy by copy-pasting a lot.
has_engine_query is a superset of has_query for the purpose of ioctl
detection.
>
>> + unsigned int num_bsd = gem_has_bsd(fd) + gem_has_bsd2(fd);
>> + unsigned int i = 0;
>> +
>> + igt_assert(num);
>> +
>> + num = 1 + num_bsd;
>
> did you mean the above two lines swapped?
No, I want to avoid running on platforms with no vcs engines since no
one ever tested gem_wsim there.
>> +
>> + if (gem_has_blt(fd))
>> + num++;
>> +
>> + if (gem_has_vebox(fd))
>> + num++;
>> +
>> + engines = calloc(num,
>> + sizeof(struct i915_engine_class_instance));
>> + igt_assert(engines);
>> +
>> + engines[i].engine_class = I915_ENGINE_CLASS_RENDER;
>> + engines[i].engine_instance = 0;
>> + i++;
>> +
>> + if (gem_has_blt(fd)) {
>> + engines[i].engine_class = I915_ENGINE_CLASS_COPY;
>> + engines[i].engine_instance = 0;
>> + i++;
>> + }
>> +
>> + if (gem_has_bsd(fd)) {
>> + engines[i].engine_class = I915_ENGINE_CLASS_VIDEO;
>> + engines[i].engine_instance = 0;
>> + i++;
>> + }
>> +
>> + if (gem_has_bsd2(fd)) {
>> + engines[i].engine_class = I915_ENGINE_CLASS_VIDEO;
>> + engines[i].engine_instance = 1;
>> + i++;
>> + }
>> +
>> + if (gem_has_vebox(fd)) {
>> + engines[i].engine_class =
>> + I915_ENGINE_CLASS_VIDEO_ENHANCE;
>> + engines[i].engine_instance = 0;
>> + i++;
>> + }
>
> mmhhh... isn't this the intel_execution_engine2[]? Yet another
> way for having engine list... in the long run, updating here (as
> well) won't be easy to remember.
Not here, gem_wsim uses some of the IGT libraries, but should keep it at
minimum. So I think we don't want to pull in the engine array etc.
Regards,
Tvrtko
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
next prev parent reply other threads:[~2019-05-17 12:19 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-17 11:25 [igt-dev] [PATCH i-g-t 00/25] Media scalability tooling Tvrtko Ursulin
2019-05-17 11:25 ` [Intel-gfx] [PATCH i-g-t 01/25] scripts/trace.pl: Fix after intel_engine_notify removal Tvrtko Ursulin
2019-05-17 11:25 ` [Intel-gfx] [PATCH i-g-t 02/25] trace.pl: Ignore signaling on non i915 fences Tvrtko Ursulin
2019-05-17 19:20 ` [igt-dev] " Chris Wilson
2019-05-20 10:30 ` Tvrtko Ursulin
2019-05-20 12:04 ` [igt-dev] [PATCH v2 " Tvrtko Ursulin
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 03/25] headers: bump Tvrtko Ursulin
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 04/25] trace.pl: Virtual engine support Tvrtko Ursulin
2019-05-17 19:23 ` Chris Wilson
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 05/25] trace.pl: Virtual engine preemption support Tvrtko Ursulin
2019-05-17 19:24 ` Chris Wilson
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 06/25] wsim/media-bench: i915 balancing Tvrtko Ursulin
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 07/25] gem_wsim: Use IGT uapi headers Tvrtko Ursulin
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 08/25] gem_wsim: Factor out common error handling Tvrtko Ursulin
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 09/25] gem_wsim: More wsim_err Tvrtko Ursulin
2019-05-17 11:25 ` [Intel-gfx] [PATCH i-g-t 10/25] gem_wsim: Submit fence support Tvrtko Ursulin
2019-05-17 11:25 ` [Intel-gfx] [PATCH i-g-t 11/25] gem_wsim: Extract str to engine lookup Tvrtko Ursulin
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 12/25] gem_wsim: Engine map support Tvrtko Ursulin
2019-05-17 19:35 ` Chris Wilson
2019-05-20 10:49 ` Tvrtko Ursulin
2019-05-20 10:59 ` Chris Wilson
2019-05-20 11:10 ` Tvrtko Ursulin
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 13/25] gem_wsim: Save some lines by changing to implicit NULL checking Tvrtko Ursulin
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 14/25] gem_wsim: Compact int command parsing with a macro Tvrtko Ursulin
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 15/25] gem_wsim: Engine map load balance command Tvrtko Ursulin
2019-05-17 11:38 ` Chris Wilson
2019-05-17 11:52 ` Tvrtko Ursulin
2019-05-17 13:19 ` Chris Wilson
2019-05-17 19:36 ` Chris Wilson
2019-05-20 10:27 ` Tvrtko Ursulin
2019-05-17 11:25 ` [Intel-gfx] [PATCH i-g-t 16/25] gem_wsim: Engine bond command Tvrtko Ursulin
2019-05-17 19:41 ` [igt-dev] " Chris Wilson
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 17/25] gem_wsim: Some more example workloads Tvrtko Ursulin
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 18/25] gem_wsim: Infinite batch support Tvrtko Ursulin
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 19/25] gem_wsim: Command line switch for specifying low slice count workloads Tvrtko Ursulin
2019-05-17 19:43 ` Chris Wilson
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 20/25] gem_wsim: Per context SSEU control Tvrtko Ursulin
2019-05-17 19:44 ` Chris Wilson
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 21/25] gem_wsim: Allow RCS virtual engine with " Tvrtko Ursulin
2019-05-17 19:45 ` Chris Wilson
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 22/25] tests/i915_query: Engine discovery tests Tvrtko Ursulin
2019-05-17 11:25 ` [Intel-gfx] [PATCH i-g-t 23/25] gem_wsim: Consolidate engine assignments into helpers Tvrtko Ursulin
2019-05-17 11:25 ` [igt-dev] [PATCH i-g-t 24/25] gem_wsim: Discover engines Tvrtko Ursulin
2019-05-17 11:39 ` Andi Shyti
2019-05-17 11:51 ` Tvrtko Ursulin
2019-05-17 11:55 ` Andi Shyti
2019-05-17 19:50 ` Chris Wilson
2019-05-17 12:10 ` Andi Shyti
2019-05-17 12:19 ` Tvrtko Ursulin [this message]
2019-05-17 13:02 ` Andi Shyti
2019-05-17 13:05 ` Tvrtko Ursulin
2019-05-17 11:25 ` [Intel-gfx] [PATCH i-g-t 25/25] gem_wsim: Support Icelake parts Tvrtko Ursulin
2019-05-17 19:51 ` [igt-dev] " Chris Wilson
2019-05-17 12:18 ` [igt-dev] ✓ Fi.CI.BAT: success for Media scalability tooling (rev3) Patchwork
2019-05-17 17:33 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
2019-05-20 13:30 ` [igt-dev] ✓ Fi.CI.BAT: success for Media scalability tooling (rev4) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=c12ac60c-78f5-376d-7c2d-cbfe8f5d05ea@linux.intel.com \
--to=tvrtko.ursulin@linux.intel.com \
--cc=Intel-gfx@lists.freedesktop.org \
--cc=andi.shyti@intel.com \
--cc=igt-dev@lists.freedesktop.org \
--cc=tvrtko.ursulin@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox