* [igt-dev] [PATCH i-g-t 0/4] Introduce blt_cmd_info struct
@ 2022-12-19 11:49 Karolina Stolarek
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats Karolina Stolarek
` (7 more replies)
0 siblings, 8 replies; 22+ messages in thread
From: Karolina Stolarek @ 2022-12-19 11:49 UTC (permalink / raw)
To: igt-dev
This patch series introduces a new way of checking if a specific
tiling format and/or blitter copy command is supported on
the current platform. Instead of using functions with hardcoded
devices, now we store information about available features in
blt_cmd_info struct, per gen or platform. We have two groups of
predicates that internally use blt_supports_command() and
blt_cmd_supports_tiling() that check a matching blt_cmd_info
instance and say if a feature is supported or not.
In addition to this, the patchset adds a simple fast-copy test
that uses the aforementioned predicates, and refactors block-copy
test to use them as well. Two other patches are a prep work for
the fast-copy test -- extracting needed functions and updating
fill_data() to support TileYF (available only for Pre-gen12).
As this is quite a big patch series, I decided to send it early,
i.e. without doc comments. The plan is to add them in v2 (which
is bound to happen, given the scope of the series). Some of the
patches have my comments/thoughts on the solution I propose,
consulting them before the review will be very much appreciated.
Karolina Stolarek (4):
lib: Describe supported blitter commands and tiling formats
lib/i915_blt: Check for Tile-YF in fast_copy
lib/i915_blt: Extract init functions for blt_copy_object
tests/gem_exercise_blt: Add fast-copy test
lib/i915/blt_tiling.c | 371 +++++++++++++++++++++++++++++++++
lib/i915/blt_tiling.h | 64 ++++++
lib/i915/i915_blt.c | 150 ++++++++-----
lib/i915/i915_blt.h | 36 +++-
lib/meson.build | 1 +
tests/i915/gem_ccs.c | 96 +--------
tests/i915/gem_exercise_blt.c | 216 +++++++++++++++++++
tests/i915/gem_lmem_swapping.c | 36 ----
tests/meson.build | 1 +
9 files changed, 780 insertions(+), 191 deletions(-)
create mode 100644 lib/i915/blt_tiling.c
create mode 100644 lib/i915/blt_tiling.h
create mode 100644 tests/i915/gem_exercise_blt.c
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread
* [igt-dev] [PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats
2022-12-19 11:49 [igt-dev] [PATCH i-g-t 0/4] Introduce blt_cmd_info struct Karolina Stolarek
@ 2022-12-19 11:49 ` Karolina Stolarek
2022-12-20 11:49 ` Zbigniew Kempczyński
2022-12-21 18:31 ` Kamil Konieczny
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 2/4] lib/i915_blt: Check for Tile-YF in fast_copy Karolina Stolarek
` (6 subsequent siblings)
7 siblings, 2 replies; 22+ messages in thread
From: Karolina Stolarek @ 2022-12-19 11:49 UTC (permalink / raw)
To: igt-dev
Add structs to describe what blitter commands and tiling formats are
supported per platform. Introduce functions that check which blitter
commands are supported, update the tests to reflect that change.
Use new enum tiling_format in i915_blt lib and block copy tests.
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
---
lib/i915/blt_tiling.c | 371 +++++++++++++++++++++++++++++++++
lib/i915/blt_tiling.h | 64 ++++++
lib/i915/i915_blt.c | 60 +-----
lib/i915/i915_blt.h | 14 +-
lib/meson.build | 1 +
tests/i915/gem_ccs.c | 19 +-
tests/i915/gem_lmem_swapping.c | 2 +-
7 files changed, 456 insertions(+), 75 deletions(-)
create mode 100644 lib/i915/blt_tiling.c
create mode 100644 lib/i915/blt_tiling.h
diff --git a/lib/i915/blt_tiling.c b/lib/i915/blt_tiling.c
new file mode 100644
index 00000000..41a3fe25
--- /dev/null
+++ b/lib/i915/blt_tiling.c
@@ -0,0 +1,371 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2022 Intel Corporation
+ */
+
+#include "blt_tiling.h"
+
+#define BLT_STR_MAX 200
+#define TILE_STR_MAX 60
+
+static bool matches_gen12_atsm(uint16_t devid)
+{
+ return IS_DG2(devid) && intel_display_ver(devid) == 0;
+}
+
+static bool matches_gen12_dg2(uint16_t devid)
+{
+ return IS_DG2(devid);
+}
+
+static bool matches_gen12_generic(uint16_t devid)
+{
+ return !(matches_gen12_dg2(devid) || matches_gen12_atsm(devid));
+}
+
+static const struct blt_cmd_info generic_info = {
+ .gen_max = -1
+};
+
+/* No blitter-specific commands available */
+static const struct blt_cmd_info pre_gen6_info = {
+ .gen_max = 5,
+};
+
+static const struct blt_cmd_info pre_gen8_info = {
+ .gen_min = 6,
+ .gen_max = 7,
+ .cmd_num = 2,
+ .supported_blt_cmds = SRC_COPY | XY_SRC_COPY,
+ .supported_tiling = {
+ (struct blt_tiling_info){
+ .blt_cmd_type = SRC_COPY,
+ .supported_tiling = T_LINEAR
+ },
+ (struct blt_tiling_info){
+ .blt_cmd_type = XY_SRC_COPY,
+ .supported_tiling = T_LINEAR | T_XMAJOR
+ }
+ }
+};
+
+static const struct blt_cmd_info gen8_info = {
+ .gen_min = 8,
+ .gen_max = 8,
+ .cmd_num = 1,
+ .supported_blt_cmds = XY_SRC_COPY,
+ .supported_tiling = {
+ (struct blt_tiling_info){
+ .blt_cmd_type = XY_SRC_COPY,
+ .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
+ }
+ }
+};
+
+static const struct blt_cmd_info gen11_info = {
+ .gen_min = 9,
+ .gen_max = 11,
+ .cmd_num = 2,
+ .supported_blt_cmds = XY_SRC_COPY | XY_FAST_COPY,
+ .supported_tiling = {
+ (struct blt_tiling_info){
+ .blt_cmd_type = XY_SRC_COPY,
+ .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
+ },
+ (struct blt_tiling_info){
+ .blt_cmd_type = XY_FAST_COPY,
+ .supported_tiling = T_LINEAR | T_YMAJOR | T_YFMAJOR | T_TILE64
+ }
+ }
+};
+
+#define GEN12_FIELDS \
+ .gen_min = 12, \
+ .gen_max = 12, \
+ .cmd_num = 3, \
+ .supported_blt_cmds = XY_SRC_COPY | XY_FAST_COPY | XY_BLOCK_COPY
+
+static const struct blt_cmd_info gen12_info = {
+ GEN12_FIELDS,
+ .matches_platform = matches_gen12_generic,
+ .supported_tiling = {
+ (struct blt_tiling_info){
+ .blt_cmd_type = XY_SRC_COPY,
+ .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
+ },
+ (struct blt_tiling_info){
+ .blt_cmd_type = XY_FAST_COPY,
+ .supported_tiling = T_LINEAR | T_YMAJOR | T_TILE4 | T_TILE64
+ },
+ (struct blt_tiling_info){
+ .blt_cmd_type = XY_BLOCK_COPY,
+ .supported_tiling = T_LINEAR | T_YMAJOR
+ }
+ }
+};
+
+static const struct blt_cmd_info gen12_dg2_info = {
+ GEN12_FIELDS,
+ .matches_platform = matches_gen12_dg2,
+ .supported_tiling = {
+ (struct blt_tiling_info){
+ .blt_cmd_type = XY_SRC_COPY,
+ .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
+ },
+ (struct blt_tiling_info){
+ .blt_cmd_type = XY_FAST_COPY,
+ .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
+ },
+ (struct blt_tiling_info){
+ .blt_cmd_type = XY_BLOCK_COPY,
+ .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
+ }
+ }
+};
+
+static const struct blt_cmd_info gen12_atsm_info = {
+ GEN12_FIELDS,
+ .matches_platform = matches_gen12_atsm,
+ .supported_tiling = {
+ (struct blt_tiling_info){
+ .blt_cmd_type = XY_SRC_COPY,
+ .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
+ },
+ (struct blt_tiling_info){
+ .blt_cmd_type = XY_FAST_COPY,
+ .supported_tiling = T_LINEAR | T_TILE4 | T_TILE64
+ },
+ (struct blt_tiling_info){
+ .blt_cmd_type = XY_BLOCK_COPY,
+ .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
+ }
+ }
+};
+
+static const struct blt_cmd_info blt_gen_configs[] = {
+ pre_gen6_info,
+ pre_gen8_info,
+ gen8_info,
+ gen11_info,
+ generic_info
+};
+
+static const struct blt_cmd_info blt_devid_configs[] = {
+ gen12_info,
+ gen12_dg2_info,
+ gen12_atsm_info,
+ generic_info
+};
+
+static const struct blt_cmd_info *get_devid_config(uint16_t devid)
+{
+ for (int i = 0; blt_devid_configs[i].gen_max != -1; i++)
+ if (blt_devid_configs[i].matches_platform(devid))
+ return &blt_devid_configs[i];
+ return NULL;
+}
+
+static const struct blt_cmd_info *get_gen_config(uint16_t devid)
+{
+ unsigned int gen = intel_gen(devid);
+
+ for (int i = 0; blt_gen_configs[i].gen_max != -1; i++)
+ if (gen >= blt_gen_configs[i].gen_min &&
+ gen <= blt_gen_configs[i].gen_max)
+ return &blt_gen_configs[i];
+ return NULL;
+}
+
+static const struct blt_cmd_info *get_blt_cmd_config(uint16_t devid)
+{
+ if (IS_GEN12(devid))
+ return get_devid_config(devid);
+ else
+ return get_gen_config(devid);
+}
+
+static const struct blt_tiling_info
+ *get_tiling_config(const struct blt_cmd_info *info, enum blt_cmd_type type)
+{
+ igt_require_f(info, "No config found for the platform\n");
+
+ for (int i = 0; i < BLT_CMD_MAX; i++)
+ if (info->supported_tiling[i].blt_cmd_type == type)
+ return &info->supported_tiling[i];
+
+ return NULL;
+}
+
+static const char *blt_cmd_name(enum blt_cmd_type cmd)
+{
+ switch (cmd) {
+ case SRC_COPY: return "SRC_COPY_BLT";
+ case XY_SRC_COPY: return "XY_SRC_COPY_BLT";
+ case XY_FAST_COPY: return "XY_FAST_COPY_BLT";
+ case XY_BLOCK_COPY: return "XY_BLOCK_COPY_BLT";
+ }
+
+ return NULL;
+}
+
+const char *blt_tiling_name(enum tiling_type tiling)
+{
+ switch (tiling) {
+ case T_LINEAR: return "linear";
+ case T_XMAJOR: return "xmajor";
+ case T_YMAJOR: return "ymajor";
+ case T_TILE4: return "tile4";
+ case T_TILE64: return "tile64";
+ case T_YFMAJOR: return "yfmajor";
+ }
+
+ return NULL;
+}
+
+static bool blt_cmd_supports_tiling(int i915, enum blt_cmd_type type, enum tiling_type tiling)
+{
+ uint16_t devid = intel_get_drm_devid(i915);
+ struct blt_cmd_info const *info = get_blt_cmd_config(devid);
+ struct blt_tiling_info const *tile_config = get_tiling_config(info, type);
+
+ /* no config means no support for that tiling */
+ if (!tile_config)
+ return false;
+
+ return tile_config->supported_tiling & tiling;
+}
+
+bool block_copy_supports_tiling(int i915, enum tiling_type tiling)
+{
+ return blt_cmd_supports_tiling(i915, XY_BLOCK_COPY, tiling);
+}
+
+bool fast_copy_supports_tiling(int i915, enum tiling_type tiling)
+{
+ return blt_cmd_supports_tiling(i915, XY_FAST_COPY, tiling);
+}
+
+bool xy_src_copy_supports_tiling(int i915, enum tiling_type tiling)
+{
+ return blt_cmd_supports_tiling(i915, XY_SRC_COPY, tiling);
+}
+
+bool src_copy_supports_tiling(int i915, enum tiling_type tiling)
+{
+ return blt_cmd_supports_tiling(i915, SRC_COPY, tiling);
+}
+
+static bool blt_supports_command(int i915, enum blt_cmd_type type)
+{
+ uint16_t devid = intel_get_drm_devid(i915);
+ struct blt_cmd_info const *info = get_blt_cmd_config(devid);
+
+ igt_require_f(info, "No config found for the platform\n");
+
+ return info->supported_blt_cmds & type;
+}
+
+/*
+ * A general check per platform. As the block copy support is defined per engine,
+ * the more detailed check should use gem_engine_can_block_copy()
+ */
+bool can_block_copy(int i915)
+{
+ return blt_supports_command(i915, XY_BLOCK_COPY);
+}
+
+bool can_fast_copy(int i915)
+{
+ return blt_supports_command(i915, XY_FAST_COPY);
+}
+
+bool can_xy_src_copy(int i915)
+{
+ return blt_supports_command(i915, XY_SRC_COPY);
+}
+
+bool can_src_copy(int i915)
+{
+ /* quickly rule out higher gens */
+ if (intel_gen(intel_get_drm_devid(i915)) > 8)
+ return false;
+
+ return blt_supports_command(i915, SRC_COPY);
+}
+
+/* Info dump functions */
+static void append_tile(uint32_t tile, char *tile_str)
+{
+ char const *tile_name;
+
+ if (tile) {
+ tile_name = blt_tiling_name(tile);
+ snprintf(tile_str + strlen(tile_str), strlen(tile_name) + 2, "%s ", tile_name);
+ }
+}
+
+static void get_tiling_info(struct blt_cmd_info const *info, enum blt_cmd_type type, char *tile_str)
+{
+ uint32_t mask;
+ struct blt_tiling_info const *tiling = get_tiling_config(info, type);
+
+ if (tiling) {
+ for (int i = 0; i < T_MAX_SHIFT; i++) {
+ mask = 1 << i;
+ append_tile(tiling->supported_tiling & mask, tile_str);
+ }
+ }
+
+ tile_str[strlen(tile_str) - 1] = '\0';
+}
+
+static const char *extract_cmd(const struct blt_cmd_info *info, uint32_t mask)
+{
+ return blt_cmd_name(info->supported_blt_cmds & mask);
+}
+
+void dump_devid_blt_info(uint16_t devid)
+{
+ uint32_t cmd_mask;
+ char tiling_str[TILE_STR_MAX];
+ char ln_str[BLT_STR_MAX];
+ char const *blt_type_str;
+ const char *ln_intro = " * ";
+ struct blt_cmd_info const *info;
+
+ info = get_blt_cmd_config(devid);
+
+ if (!info) {
+ igt_warn("No config available\n");
+ return;
+ }
+
+ igt_info("Supported blitter commands:\n");
+
+ for (int i = 0; i < BLT_CMD_MAX; i++) {
+ cmd_mask = 1 << i;
+ blt_type_str = extract_cmd(info, cmd_mask);
+
+ if (blt_type_str) {
+ memset(ln_str, '\0', sizeof(char) * BLT_STR_MAX);
+ memset(tiling_str, '\0', sizeof(char) * TILE_STR_MAX);
+
+ snprintf(ln_str,
+ strlen(ln_intro) + strlen(blt_type_str) + 1,
+ "%s%s", ln_intro, blt_type_str);
+
+ get_tiling_info(info, cmd_mask, tiling_str);
+
+ snprintf(ln_str + strlen(ln_str),
+ strlen(tiling_str) + 5,
+ " [%s]", tiling_str);
+
+ igt_info("%s\n", ln_str);
+ }
+ }
+}
+
+void dump_current_blt_info(int i915)
+{
+ dump_devid_blt_info(intel_get_drm_devid(i915));
+}
diff --git a/lib/i915/blt_tiling.h b/lib/i915/blt_tiling.h
new file mode 100644
index 00000000..44ef45ca
--- /dev/null
+++ b/lib/i915/blt_tiling.h
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2022 Intel Corporation
+ */
+
+#ifndef BLT_TILING_H
+#define BLT_TILING_H
+
+#include "igt.h"
+
+#define BLT_CMD_MAX 3
+#define T_MAX_SHIFT 6
+#define PLATFORMS_MAX 5
+
+enum tiling_type {
+ T_LINEAR = (1),
+ T_XMAJOR = (1 << 1),
+ T_YMAJOR = (1 << 2),
+ T_TILE4 = (1 << 3),
+ T_TILE64 = (1 << 4),
+ T_YFMAJOR = (1 << 5),
+};
+
+#define for_each_tiling(__tiling) \
+ for (__tiling = T_LINEAR; __tiling <= T_YFMAJOR; __tiling = __tiling << 1)
+
+enum blt_cmd_type {
+ SRC_COPY = (1),
+ XY_SRC_COPY = (1 << 1),
+ XY_FAST_COPY = (1 << 2),
+ XY_BLOCK_COPY = (1 << 3),
+};
+
+struct blt_tiling_info {
+ enum blt_cmd_type blt_cmd_type;
+ uint32_t supported_tiling;
+};
+
+struct blt_cmd_info {
+ uint32_t supported_blt_cmds;
+ struct blt_tiling_info supported_tiling[BLT_CMD_MAX];
+ uint32_t cmd_num;
+
+ uint32_t gen_min;
+ uint32_t gen_max;
+
+ bool (*matches_platform)(uint16_t devid);
+};
+
+void dump_current_blt_info(int i915);
+void dump_devid_blt_info(uint16_t devid);
+
+bool can_block_copy(int i915);
+bool can_fast_copy(int i915);
+bool can_xy_src_copy(int i915);
+bool can_src_copy(int i915);
+
+bool block_copy_supports_tiling(int i915, enum tiling_type tiling);
+bool fast_copy_supports_tiling(int i915, enum tiling_type tiling);
+bool xy_src_copy_supports_tiling(int i915, enum tiling_type tiling);
+bool src_copy_supports_tiling(int i915, enum tiling_type tiling);
+
+const char *blt_tiling_name(enum tiling_type tiling);
+#endif // BLT_TILING_H
diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
index 54193565..9b291862 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/i915/i915_blt.c
@@ -207,59 +207,7 @@ bool blt_supports_compression(int i915)
return HAS_FLATCCS(devid);
}
-/**
- * blt_supports_tiling:
- * @i915: drm fd
- * @tiling: tiling id
- *
- * Function checks if blitter supports @tiling on @i915 device.
- *
- * Returns:
- * true if it does, false otherwise.
- */
-bool blt_supports_tiling(int i915, enum blt_tiling tiling)
-{
- uint32_t devid = intel_get_drm_devid(i915);
-
- if (tiling == T_XMAJOR) {
- if (IS_TIGERLAKE(devid) || IS_DG1(devid))
- return false;
- else
- return true;
- }
-
- if (tiling == T_YMAJOR) {
- if (IS_TIGERLAKE(devid) || IS_DG1(devid))
- return true;
- else
- return false;
- }
-
- return true;
-}
-
-/**
- * blt_tiling_name:
- * @tiling: tiling id
- *
- * Returns:
- * name of @tiling passed. Useful to build test names.
- */
-const char *blt_tiling_name(enum blt_tiling tiling)
-{
- switch (tiling) {
- case T_LINEAR: return "linear";
- case T_XMAJOR: return "xmajor";
- case T_YMAJOR: return "ymajor";
- case T_TILE4: return "tile4";
- case T_TILE64: return "tile64";
- }
-
- igt_warn("invalid tiling passed: %d\n", tiling);
- return NULL;
-}
-
-static int __block_tiling(enum blt_tiling tiling)
+static int __block_tiling(enum tiling_type tiling)
{
switch (tiling) {
case T_LINEAR: return 0;
@@ -267,6 +215,9 @@ static int __block_tiling(enum blt_tiling tiling)
case T_YMAJOR: return 1;
case T_TILE4: return 2;
case T_TILE64: return 3;
+ /* type only supported in gen9 fast copy */
+ case T_YFMAJOR:
+ break;
}
igt_warn("invalid tiling passed: %d\n", tiling);
@@ -891,13 +842,14 @@ struct gen12_fast_copy_data {
} dw09;
};
-static int __fast_tiling(enum blt_tiling tiling)
+static int __fast_tiling(enum tiling_type tiling)
{
switch (tiling) {
case T_LINEAR: return 0;
case T_XMAJOR: return 1;
case T_YMAJOR: return 2;
case T_TILE4: return 2;
+ case T_YFMAJOR: return 2;
case T_TILE64: return 3;
}
return 0;
diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
index 34db9bb9..f1cf5408 100644
--- a/lib/i915/i915_blt.h
+++ b/lib/i915/i915_blt.h
@@ -47,6 +47,7 @@
#include <malloc.h>
#include "drm.h"
#include "igt.h"
+#include "blt_tiling.h"
#define CCS_RATIO 256
@@ -59,14 +60,6 @@ enum blt_color_depth {
CD_128bit,
};
-enum blt_tiling {
- T_LINEAR,
- T_XMAJOR,
- T_YMAJOR,
- T_TILE4,
- T_TILE64,
-};
-
enum blt_compression {
COMPRESSION_DISABLED,
COMPRESSION_ENABLED,
@@ -83,7 +76,7 @@ struct blt_copy_object {
uint32_t region;
uint64_t size;
uint8_t mocs;
- enum blt_tiling tiling;
+ enum tiling_type tiling;
enum blt_compression compression; /* BC only */
enum blt_compression_type compression_type; /* BC only */
uint32_t pitch;
@@ -165,8 +158,7 @@ struct blt_ctrl_surf_copy_data {
};
bool blt_supports_compression(int i915);
-bool blt_supports_tiling(int i915, enum blt_tiling tiling);
-const char *blt_tiling_name(enum blt_tiling tiling);
+bool blt_supports_tiling(int i915, enum tiling_type tiling);
uint64_t emit_blt_block_copy(int i915,
uint64_t ahnd,
diff --git a/lib/meson.build b/lib/meson.build
index c79e3e95..33c8daad 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -3,6 +3,7 @@ lib_sources = [
'dmabuf_sync_file.c',
'huc_copy.c',
'i915/gem.c',
+ 'i915/blt_tiling.c',
'i915/gem_context.c',
'i915/gem_create.c',
'i915/gem_engine_topology.c',
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index 751f65e6..4c137c94 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -46,7 +46,7 @@ struct test_config {
static void set_object(struct blt_copy_object *obj,
uint32_t handle, uint64_t size, uint32_t region,
- uint8_t mocs, enum blt_tiling tiling,
+ uint8_t mocs, enum tiling_type tiling,
enum blt_compression compression,
enum blt_compression_type compression_type)
{
@@ -108,7 +108,7 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
static struct blt_copy_object *
create_object(int i915, uint32_t region,
uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
- enum blt_tiling tiling,
+ enum tiling_type tiling,
enum blt_compression compression,
enum blt_compression_type compression_type,
bool create_mapping)
@@ -374,7 +374,7 @@ static void block_copy(int i915,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint32_t region1, uint32_t region2,
- enum blt_tiling mid_tiling,
+ enum tiling_type mid_tiling,
const struct test_config *config)
{
struct blt_copy_data blt = {};
@@ -492,7 +492,7 @@ static void block_multicopy(int i915,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint32_t region1, uint32_t region2,
- enum blt_tiling mid_tiling,
+ enum tiling_type mid_tiling,
const struct test_config *config)
{
struct blt_copy3_data blt3 = {};
@@ -581,7 +581,7 @@ static const struct {
const char *suffix;
void (*copyfn)(int, const intel_ctx_t *,
const struct intel_execution_engine2 *,
- uint32_t, uint32_t, enum blt_tiling,
+ uint32_t, uint32_t, enum tiling_type,
const struct test_config *);
} copyfns[] = {
[BLOCK_COPY] = { "", block_copy },
@@ -596,6 +596,7 @@ static void block_copy_test(int i915,
{
struct igt_collection *regions;
const struct intel_execution_engine2 *e;
+ int tiling;
if (config->compression && !blt_supports_compression(i915))
return;
@@ -603,8 +604,8 @@ static void block_copy_test(int i915,
if (config->inplace && !config->compression)
return;
- for (int tiling = T_LINEAR; tiling <= T_TILE64; tiling++) {
- if (!blt_supports_tiling(i915, tiling) ||
+ for_each_tiling(tiling) {
+ if (!block_copy_supports_tiling(i915, tiling) ||
(param.tiling >= 0 && param.tiling != tiling))
continue;
@@ -663,7 +664,7 @@ static int opt_handler(int opt, int opt_index, void *data)
igt_debug("Print surface info: %d\n", param.print_surface_info);
break;
case 't':
- param.tiling = atoi(optarg);
+ param.tiling = 1 << atoi(optarg);
igt_debug("Tiling: %d\n", param.tiling);
break;
case 'W':
@@ -702,7 +703,7 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
igt_fixture {
i915 = drm_open_driver(DRIVER_INTEL);
igt_require_gem(i915);
- igt_require(AT_LEAST_GEN(intel_get_drm_devid(i915), 12) > 0);
+ igt_require(can_block_copy(i915));
query_info = gem_get_query_memory_regions(i915);
igt_require(query_info);
diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
index 75121d41..8cff35d5 100644
--- a/tests/i915/gem_lmem_swapping.c
+++ b/tests/i915/gem_lmem_swapping.c
@@ -78,7 +78,7 @@ struct object {
static void set_object(struct blt_copy_object *obj,
uint32_t handle, uint64_t size, uint32_t region,
- uint8_t mocs, enum blt_tiling tiling,
+ uint8_t mocs, enum tiling_type tiling,
enum blt_compression compression,
enum blt_compression_type compression_type)
{
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [igt-dev] [PATCH i-g-t 2/4] lib/i915_blt: Check for Tile-YF in fast_copy
2022-12-19 11:49 [igt-dev] [PATCH i-g-t 0/4] Introduce blt_cmd_info struct Karolina Stolarek
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats Karolina Stolarek
@ 2022-12-19 11:49 ` Karolina Stolarek
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 3/4] lib/i915_blt: Extract init functions for blt_copy_object Karolina Stolarek
` (5 subsequent siblings)
7 siblings, 0 replies; 22+ messages in thread
From: Karolina Stolarek @ 2022-12-19 11:49 UTC (permalink / raw)
To: igt-dev
In older gens Tile4 is not available, we have Tile-YF instead. Check for
both tilings when setting up the fast_copy command.
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
---
lib/i915/i915_blt.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
index 9b291862..2513dfc0 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/i915/i915_blt.c
@@ -257,6 +257,11 @@ static enum blt_aux_mode __aux_mode(const struct blt_copy_object *obj)
return AM_AUX_NONE;
}
+static bool __new_tile_y_type(enum tiling_type tiling)
+{
+ return tiling == T_TILE4 || tiling == T_YFMAJOR;
+}
+
static void fill_data(struct gen12_block_copy_data *data,
const struct blt_copy_data *blt,
uint64_t src_offset, uint64_t dst_offset,
@@ -943,8 +948,8 @@ uint64_t emit_blt_fast_copy(int i915,
data.dw01.color_depth = __fast_color_depth(blt->color_depth);
data.dw01.dst_memory = __memory_type(blt->dst.region);
data.dw01.src_memory = __memory_type(blt->src.region);
- data.dw01.dst_type_y = blt->dst.tiling == T_TILE4 ? 1 : 0;
- data.dw01.src_type_y = blt->src.tiling == T_TILE4 ? 1 : 0;
+ data.dw01.dst_type_y = __new_tile_y_type(blt->dst.tiling) ? 1 : 0;
+ data.dw01.src_type_y = __new_tile_y_type(blt->src.tiling) ? 1 : 0;
data.dw02.dst_x1 = blt->dst.x1;
data.dw02.dst_y1 = blt->dst.y1;
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [igt-dev] [PATCH i-g-t 3/4] lib/i915_blt: Extract init functions for blt_copy_object
2022-12-19 11:49 [igt-dev] [PATCH i-g-t 0/4] Introduce blt_cmd_info struct Karolina Stolarek
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats Karolina Stolarek
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 2/4] lib/i915_blt: Check for Tile-YF in fast_copy Karolina Stolarek
@ 2022-12-19 11:49 ` Karolina Stolarek
2022-12-20 11:51 ` Zbigniew Kempczyński
2022-12-21 13:59 ` Kamil Konieczny
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 4/4] tests/gem_exercise_blt: Add fast-copy test Karolina Stolarek
` (4 subsequent siblings)
7 siblings, 2 replies; 22+ messages in thread
From: Karolina Stolarek @ 2022-12-19 11:49 UTC (permalink / raw)
To: igt-dev
gem_ccs and gem_lmem_swapping share a couple of functions. Extract them
to i915_blt so they are accessible for both tests. Delete local
definitions.
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
---
Karolina's comment: I'm not convinced it's the best place for them.
These functions are more specific to the tests
than lib functions. So, I'd appreciate
suggestions on where I can move them to.
lib/i915/i915_blt.c | 81 ++++++++++++++++++++++++++++++++++
lib/i915/i915_blt.h | 22 +++++++++
tests/i915/gem_ccs.c | 81 ----------------------------------
tests/i915/gem_lmem_swapping.c | 36 ---------------
4 files changed, 103 insertions(+), 117 deletions(-)
diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
index 2513dfc0..0f9f7265 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/i915/i915_blt.c
@@ -1053,6 +1053,87 @@ int blt_fast_copy(int i915,
return ret;
}
+void set_geom(struct blt_copy_object *obj, uint32_t pitch,
+ int16_t x1, int16_t y1, int16_t x2, int16_t y2,
+ uint16_t x_offset, uint16_t y_offset)
+{
+ obj->pitch = pitch;
+ obj->x1 = x1;
+ obj->y1 = y1;
+ obj->x2 = x2;
+ obj->y2 = y2;
+ obj->x_offset = x_offset;
+ obj->y_offset = y_offset;
+}
+
+void set_batch(struct blt_copy_batch *batch,
+ uint32_t handle, uint64_t size, uint32_t region)
+{
+ batch->handle = handle;
+ batch->size = size;
+ batch->region = region;
+}
+
+struct blt_copy_object *
+create_object(int i915, uint32_t region,
+ uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
+ enum tiling_type tiling,
+ enum blt_compression compression,
+ enum blt_compression_type compression_type,
+ bool create_mapping)
+{
+ struct blt_copy_object *obj;
+ uint64_t size = width * height * bpp / 8;
+ uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
+ uint32_t handle;
+
+ obj = calloc(1, sizeof(*obj));
+
+ obj->size = size;
+ igt_assert(__gem_create_in_memory_regions(i915, &handle,
+ &size, region) == 0);
+
+ set_object(obj, handle, size, region, mocs, tiling,
+ compression, compression_type);
+ set_geom(obj, stride, 0, 0, width, height, 0, 0);
+
+ if (create_mapping)
+ obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
+ PROT_READ | PROT_WRITE);
+
+ return obj;
+}
+
+void destroy_object(int i915, struct blt_copy_object *obj)
+{
+ if (obj->ptr)
+ munmap(obj->ptr, obj->size);
+
+ gem_close(i915, obj->handle);
+ free(obj);
+}
+
+void set_object(struct blt_copy_object *obj,
+ uint32_t handle, uint64_t size, uint32_t region,
+ uint8_t mocs, enum tiling_type tiling,
+ enum blt_compression compression,
+ enum blt_compression_type compression_type)
+{
+ obj->handle = handle;
+ obj->size = size;
+ obj->region = region;
+ obj->mocs = mocs;
+ obj->tiling = tiling;
+ obj->compression = compression;
+ obj->compression_type = compression_type;
+}
+
+void set_blt_object(struct blt_copy_object *obj,
+ const struct blt_copy_object *orig)
+{
+ memcpy(obj, orig, sizeof(*obj));
+}
+
/**
* blt_surface_fill_rect:
* @i915: drm fd
diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
index f1cf5408..1ef459c8 100644
--- a/lib/i915/i915_blt.h
+++ b/lib/i915/i915_blt.h
@@ -198,6 +198,28 @@ int blt_fast_copy(int i915,
uint64_t ahnd,
const struct blt_copy_data *blt);
+void set_geom(struct blt_copy_object *obj, uint32_t pitch,
+ int16_t x1, int16_t y1, int16_t x2, int16_t y2,
+ uint16_t x_offset, uint16_t y_offset);
+void set_batch(struct blt_copy_batch *batch,
+ uint32_t handle, uint64_t size, uint32_t region);
+
+struct blt_copy_object *
+create_object(int i915, uint32_t region,
+ uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
+ enum tiling_type tiling,
+ enum blt_compression compression,
+ enum blt_compression_type compression_type,
+ bool create_mapping);
+void destroy_object(int i915, struct blt_copy_object *obj);
+void set_object(struct blt_copy_object *obj,
+ uint32_t handle, uint64_t size, uint32_t region,
+ uint8_t mocs, enum tiling_type tiling,
+ enum blt_compression compression,
+ enum blt_compression_type compression_type);
+void set_blt_object(struct blt_copy_object *obj,
+ const struct blt_copy_object *orig);
+
void blt_surface_info(const char *info,
const struct blt_copy_object *obj);
void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index 4c137c94..30ee60fd 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -44,42 +44,6 @@ struct test_config {
bool suspend_resume;
};
-static void set_object(struct blt_copy_object *obj,
- uint32_t handle, uint64_t size, uint32_t region,
- uint8_t mocs, enum tiling_type tiling,
- enum blt_compression compression,
- enum blt_compression_type compression_type)
-{
- obj->handle = handle;
- obj->size = size;
- obj->region = region;
- obj->mocs = mocs;
- obj->tiling = tiling;
- obj->compression = compression;
- obj->compression_type = compression_type;
-}
-
-static void set_geom(struct blt_copy_object *obj, uint32_t pitch,
- int16_t x1, int16_t y1, int16_t x2, int16_t y2,
- uint16_t x_offset, uint16_t y_offset)
-{
- obj->pitch = pitch;
- obj->x1 = x1;
- obj->y1 = y1;
- obj->x2 = x2;
- obj->y2 = y2;
- obj->x_offset = x_offset;
- obj->y_offset = y_offset;
-}
-
-static void set_batch(struct blt_copy_batch *batch,
- uint32_t handle, uint64_t size, uint32_t region)
-{
- batch->handle = handle;
- batch->size = size;
- batch->region = region;
-}
-
static void set_object_ext(struct blt_block_copy_object_ext *obj,
uint8_t compression_format,
uint16_t surface_width, uint16_t surface_height,
@@ -105,51 +69,6 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
obj->access_type = access_type;
}
-static struct blt_copy_object *
-create_object(int i915, uint32_t region,
- uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
- enum tiling_type tiling,
- enum blt_compression compression,
- enum blt_compression_type compression_type,
- bool create_mapping)
-{
- struct blt_copy_object *obj;
- uint64_t size = width * height * bpp / 8;
- uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
- uint32_t handle;
-
- obj = calloc(1, sizeof(*obj));
-
- obj->size = size;
- igt_assert(__gem_create_in_memory_regions(i915, &handle,
- &size, region) == 0);
-
- set_object(obj, handle, size, region, mocs, tiling,
- compression, compression_type);
- set_geom(obj, stride, 0, 0, width, height, 0, 0);
-
- if (create_mapping)
- obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
- PROT_READ | PROT_WRITE);
-
- return obj;
-}
-
-static void destroy_object(int i915, struct blt_copy_object *obj)
-{
- if (obj->ptr)
- munmap(obj->ptr, obj->size);
-
- gem_close(i915, obj->handle);
- free(obj);
-}
-
-static void set_blt_object(struct blt_copy_object *obj,
- const struct blt_copy_object *orig)
-{
- memcpy(obj, orig, sizeof(*obj));
-}
-
#define PRINT_SURFACE_INFO(name, obj) do { \
if (param.print_surface_info) \
blt_surface_info((name), (obj)); } while (0)
diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
index 8cff35d5..746fbf80 100644
--- a/tests/i915/gem_lmem_swapping.c
+++ b/tests/i915/gem_lmem_swapping.c
@@ -76,42 +76,6 @@ struct object {
struct blt_copy_object *blt_obj;
};
-static void set_object(struct blt_copy_object *obj,
- uint32_t handle, uint64_t size, uint32_t region,
- uint8_t mocs, enum tiling_type tiling,
- enum blt_compression compression,
- enum blt_compression_type compression_type)
-{
- obj->handle = handle;
- obj->size = size;
- obj->region = region;
- obj->mocs = mocs;
- obj->tiling = tiling;
- obj->compression = compression;
- obj->compression_type = compression_type;
-}
-
-static void set_geom(struct blt_copy_object *obj, uint32_t pitch,
- int16_t x1, int16_t y1, int16_t x2, int16_t y2,
- uint16_t x_offset, uint16_t y_offset)
-{
- obj->pitch = pitch;
- obj->x1 = x1;
- obj->y1 = y1;
- obj->x2 = x2;
- obj->y2 = y2;
- obj->x_offset = x_offset;
- obj->y_offset = y_offset;
-}
-
-static void set_batch(struct blt_copy_batch *batch,
- uint32_t handle, uint64_t size, uint32_t region)
-{
- batch->handle = handle;
- batch->size = size;
- batch->region = region;
-}
-
static void set_object_ext(struct blt_block_copy_object_ext *obj,
uint8_t compression_format,
uint16_t surface_width, uint16_t surface_height,
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [igt-dev] [PATCH i-g-t 4/4] tests/gem_exercise_blt: Add fast-copy test
2022-12-19 11:49 [igt-dev] [PATCH i-g-t 0/4] Introduce blt_cmd_info struct Karolina Stolarek
` (2 preceding siblings ...)
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 3/4] lib/i915_blt: Extract init functions for blt_copy_object Karolina Stolarek
@ 2022-12-19 11:49 ` Karolina Stolarek
2022-12-19 13:23 ` [igt-dev] ✓ Fi.CI.BAT: success for Introduce blt_cmd_info struct Patchwork
` (3 subsequent siblings)
7 siblings, 0 replies; 22+ messages in thread
From: Karolina Stolarek @ 2022-12-19 11:49 UTC (permalink / raw)
To: igt-dev
Exercise a basic scenario with two block copies in separate batch
buffers.
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
---
Karolina's comment: I'd like to add one-bb test case, but I plan
it in one of the future patches.
tests/i915/gem_exercise_blt.c | 216 ++++++++++++++++++++++++++++++++++
tests/meson.build | 1 +
2 files changed, 217 insertions(+)
create mode 100644 tests/i915/gem_exercise_blt.c
diff --git a/tests/i915/gem_exercise_blt.c b/tests/i915/gem_exercise_blt.c
new file mode 100644
index 00000000..af0efe15
--- /dev/null
+++ b/tests/i915/gem_exercise_blt.c
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2022 Intel Corporation
+ */
+
+#include "igt.h"
+#include "drm.h"
+#include "i915/gem.h"
+#include "i915/gem_create.h"
+#include "lib/intel_chipset.h"
+#include "i915/i915_blt.h"
+#include "i915/intel_mocs.h"
+
+IGT_TEST_DESCRIPTION("Exercise blitter commands");
+
+static struct param {
+ int tiling;
+ bool write_png;
+ bool print_bb;
+ bool print_surface_info;
+ int width;
+ int height;
+} param = {
+ .tiling = -1,
+ .write_png = false,
+ .print_bb = false,
+ .print_surface_info = false,
+ .width = 512,
+ .height = 512,
+};
+
+#define PRINT_SURFACE_INFO(name, obj) do { \
+ if (param.print_surface_info) \
+ blt_surface_info((name), (obj)); } while (0)
+
+#define WRITE_PNG(fd, id, name, obj, w, h) do { \
+ if (param.write_png) \
+ blt_surface_to_png((fd), (id), (name), (obj), (w), (h)); } while (0)
+
+static void fast_copy(int i915, const intel_ctx_t *ctx,
+ const struct intel_execution_engine2 *e,
+ uint32_t region1, uint32_t region2,
+ enum tiling_type mid_tiling)
+{
+ struct blt_copy_data blt = {};
+ struct blt_copy_object *src, *mid, *dst;
+ const uint32_t bpp = 32;
+ uint64_t bb_size = 4096;
+ uint64_t ahnd = intel_allocator_open_full(i915, ctx->id, 0, 0,
+ INTEL_ALLOCATOR_SIMPLE,
+ ALLOC_STRATEGY_LOW_TO_HIGH, 0);
+ uint32_t bb;
+ uint32_t width = param.width, height = param.height;
+ int result;
+
+ igt_assert(__gem_create_in_memory_regions(i915, &bb, &bb_size, region1) == 0);
+
+ src = create_object(i915, region1, width, height, bpp, 0,
+ T_LINEAR, COMPRESSION_DISABLED, 0, true);
+ mid = create_object(i915, region2, width, height, bpp, 0,
+ mid_tiling, COMPRESSION_DISABLED, 0, true);
+ dst = create_object(i915, region1, width, height, bpp, 0,
+ T_LINEAR, COMPRESSION_DISABLED, 0, true);
+ igt_assert(src->size == dst->size);
+
+ blt_surface_fill_rect(i915, src, width, height);
+ WRITE_PNG(i915, mid_tiling, "src", src, width, height);
+
+ memset(&blt, 0, sizeof(blt));
+ blt.color_depth = CD_32bit;
+ blt.print_bb = param.print_bb;
+ set_blt_object(&blt.src, src);
+ set_blt_object(&blt.dst, mid);
+ set_batch(&blt.bb, bb, bb_size, region1);
+
+ blt_fast_copy(i915, ctx, e, ahnd, &blt);
+ gem_sync(i915, mid->handle);
+
+ WRITE_PNG(i915, mid_tiling, "src", &blt.src, width, height);
+ WRITE_PNG(i915, mid_tiling, "mid", &blt.dst, width, height);
+
+ memset(&blt, 0, sizeof(blt));
+ blt.color_depth = CD_32bit;
+ blt.print_bb = param.print_bb;
+ set_blt_object(&blt.src, mid);
+ set_blt_object(&blt.dst, dst);
+ set_batch(&blt.bb, bb, bb_size, region1);
+
+ blt_fast_copy(i915, ctx, e, ahnd, &blt);
+ gem_sync(i915, blt.dst.handle);
+
+ WRITE_PNG(i915, mid_tiling, "dst", &blt.dst, width, height);
+
+ result = memcmp(src->ptr, blt.dst.ptr, src->size);
+
+ destroy_object(i915, src);
+ destroy_object(i915, mid);
+ destroy_object(i915, dst);
+ gem_close(i915, bb);
+ put_ahnd(ahnd);
+
+ igt_assert_f(!result, "source and destination surfaces differs!\n");
+}
+
+static void fast_copy_test(int i915,
+ const intel_ctx_t *ctx,
+ struct igt_collection *set)
+{
+ struct igt_collection *regions;
+ const struct intel_execution_engine2 *e;
+ int tiling;
+
+ for_each_tiling(tiling) {
+ if (!fast_copy_supports_tiling(i915, tiling))
+ continue;
+
+ for_each_ctx_engine(i915, ctx, e) {
+ if (e->class != I915_ENGINE_CLASS_COPY)
+ continue;
+ for_each_variation_r(regions, 2, set) {
+ uint32_t region1, region2;
+ char *regtxt;
+
+ region1 = igt_collection_get_value(regions, 0);
+ region2 = igt_collection_get_value(regions, 1);
+ regtxt = memregion_dynamic_subtest_name(regions);
+
+ igt_dynamic_f("%s-%s",
+ blt_tiling_name(tiling), regtxt) {
+ fast_copy(i915, ctx, e,
+ region1, region2,
+ tiling);
+ }
+
+ free(regtxt);
+ }
+ }
+ }
+}
+
+static int opt_handler(int opt, int opt_index, void *data)
+{
+ switch (opt) {
+ case 'b':
+ param.print_bb = true;
+ igt_debug("Print bb: %d\n", param.print_bb);
+ break;
+ case 'p':
+ param.write_png = true;
+ igt_debug("Write png: %d\n", param.write_png);
+ break;
+ case 's':
+ param.print_surface_info = true;
+ igt_debug("Print surface info: %d\n", param.print_surface_info);
+ break;
+ case 't':
+ param.tiling = 1 << atoi(optarg);
+ igt_debug("Tiling: %d\n", param.tiling);
+ break;
+ case 'W':
+ param.width = atoi(optarg);
+ igt_debug("Width: %d\n", param.width);
+ break;
+ case 'H':
+ param.height = atoi(optarg);
+ igt_debug("Height: %d\n", param.height);
+ break;
+ default:
+ return IGT_OPT_HANDLER_ERROR;
+ }
+
+ return IGT_OPT_HANDLER_SUCCESS;
+}
+
+const char *help_str =
+ " -b\tPrint bb\n"
+ " -p\tWrite PNG\n"
+ " -s\tPrint surface info\n"
+ " -t\tTiling format (0 - linear, 1 - XMAJOR, 2 - YMAJOR, 3 - TILE4, 4 - TILE64, 5 - YFMAJOR)\n"
+ " -W\tWidth (default 512)\n"
+ " -H\tHeight (default 512)"
+ ;
+
+igt_main_args("b:pst:W:H:", NULL, help_str, opt_handler, NULL)
+{
+ struct drm_i915_query_memory_regions *query_info;
+ struct igt_collection *set;
+ const intel_ctx_t *ctx;
+ int i915;
+ igt_hang_t hang;
+
+ igt_fixture {
+ i915 = drm_open_driver(DRIVER_INTEL);
+ igt_require_gem(i915);
+ igt_require(can_fast_copy(i915));
+
+ query_info = gem_get_query_memory_regions(i915);
+ igt_require(query_info);
+
+ set = get_memory_region_set(query_info,
+ I915_SYSTEM_MEMORY,
+ I915_DEVICE_MEMORY);
+ ctx = intel_ctx_create_all_physical(i915);
+ hang = igt_allow_hang(i915, ctx->id, 0);
+ }
+
+ igt_describe("Check fast-copy blit");
+ igt_subtest_with_dynamic("fast-copy") {
+ fast_copy_test(i915, ctx, set);
+ }
+
+ igt_fixture {
+ igt_disallow_hang(i915, hang);
+ close(i915);
+ }
+}
diff --git a/tests/meson.build b/tests/meson.build
index 5d1d4b5e..663dd3ef 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -137,6 +137,7 @@ i915_progs = [
'gem_exec_nop',
'gem_exec_parallel',
'gem_exec_params',
+ 'gem_exercise_blt',
'gen7_exec_parse',
'gen9_exec_parse',
'gem_exec_reloc',
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Introduce blt_cmd_info struct
2022-12-19 11:49 [igt-dev] [PATCH i-g-t 0/4] Introduce blt_cmd_info struct Karolina Stolarek
` (3 preceding siblings ...)
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 4/4] tests/gem_exercise_blt: Add fast-copy test Karolina Stolarek
@ 2022-12-19 13:23 ` Patchwork
2022-12-20 3:12 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
` (2 subsequent siblings)
7 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2022-12-19 13:23 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 4679 bytes --]
== Series Details ==
Series: Introduce blt_cmd_info struct
URL : https://patchwork.freedesktop.org/series/112055/
State : success
== Summary ==
CI Bug Log - changes from IGT_7099 -> IGTPW_8246
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
Participating hosts (42 -> 43)
------------------------------
Additional (1): fi-hsw-4770
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_8246:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_suspend@basic-s0@smem:
- {bat-rplp-1}: [PASS][1] -> [DMESG-WARN][2] +30 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/bat-rplp-1/igt@gem_exec_suspend@basic-s0@smem.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/bat-rplp-1/igt@gem_exec_suspend@basic-s0@smem.html
* igt@i915_pm_rpm@module-reload:
- {bat-rplp-1}: [PASS][3] -> [FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/bat-rplp-1/igt@i915_pm_rpm@module-reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/bat-rplp-1/igt@i915_pm_rpm@module-reload.html
Known issues
------------
Here are the changes found in IGTPW_8246 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_softpin@allocator-basic-reserve:
- fi-hsw-4770: NOTRUN -> [SKIP][5] ([fdo#109271]) +11 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/fi-hsw-4770/igt@gem_softpin@allocator-basic-reserve.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka: [PASS][6] -> [DMESG-FAIL][7] ([i915#5334])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@mman:
- fi-rkl-guc: [PASS][8] -> [TIMEOUT][9] ([i915#6794])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/fi-rkl-guc/igt@i915_selftest@live@mman.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/fi-rkl-guc/igt@i915_selftest@live@mman.html
* igt@kms_chamelium@dp-crc-fast:
- fi-hsw-4770: NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827]) +8 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/fi-hsw-4770/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions:
- fi-bsw-kefka: [PASS][11] -> [FAIL][12] ([i915#6298])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#1072]) +3 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#6257]: https://gitlab.freedesktop.org/drm/intel/issues/6257
[i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
[i915#6794]: https://gitlab.freedesktop.org/drm/intel/issues/6794
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7099 -> IGTPW_8246
CI-20190529: 20190529
CI_DRM_12515: 25905f33e9cb1630d94ce04688d5a6c756f96e9d @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_8246: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
IGT_7099: 62e8be3ca2935a079de4fabd4923df58278a9ed0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Testlist changes
----------------
+igt@gem_exercise_blt@fast-copy
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
[-- Attachment #2: Type: text/html, Size: 5408 bytes --]
^ permalink raw reply [flat|nested] 22+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for Introduce blt_cmd_info struct
2022-12-19 11:49 [igt-dev] [PATCH i-g-t 0/4] Introduce blt_cmd_info struct Karolina Stolarek
` (4 preceding siblings ...)
2022-12-19 13:23 ` [igt-dev] ✓ Fi.CI.BAT: success for Introduce blt_cmd_info struct Patchwork
@ 2022-12-20 3:12 ` Patchwork
2022-12-20 8:11 ` Karolina Stolarek
2022-12-20 11:25 ` [igt-dev] ✓ Fi.CI.IGT: success " Patchwork
2022-12-21 16:56 ` [igt-dev] ✗ GitLab.Pipeline: warning " Patchwork
7 siblings, 1 reply; 22+ messages in thread
From: Patchwork @ 2022-12-20 3:12 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 33155 bytes --]
== Series Details ==
Series: Introduce blt_cmd_info struct
URL : https://patchwork.freedesktop.org/series/112055/
State : failure
== Summary ==
CI Bug Log - changes from IGT_7099_full -> IGTPW_8246_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_8246_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_8246_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
Participating hosts (11 -> 10)
------------------------------
Missing (1): shard-dg10
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_8246_full:
### IGT changes ###
#### Possible regressions ####
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- shard-glk: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk9/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk7/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_ccs@block-multicopy-compressed}:
- {shard-tglu}: NOTRUN -> [SKIP][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-7/igt@gem_ccs@block-multicopy-compressed.html
* igt@i915_selftest@live@gem_contexts:
- {shard-rkl}: [PASS][4] -> [INCOMPLETE][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@i915_selftest@live@gem_contexts.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-3/igt@i915_selftest@live@gem_contexts.html
* igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_dg2_rc_ccs_cc:
- {shard-tglu-10}: NOTRUN -> [INCOMPLETE][6]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-10/igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_dg2_rc_ccs_cc.html
* igt@perf_pmu@most-busy-idle-check-all@rcs0:
- {shard-dg1}: [PASS][7] -> [FAIL][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-13/igt@perf_pmu@most-busy-idle-check-all@rcs0.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-13/igt@perf_pmu@most-busy-idle-check-all@rcs0.html
* {igt@vc4/vc4_tiling@get-bad-flags}:
- {shard-rkl}: NOTRUN -> [SKIP][9] +5 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@vc4/vc4_tiling@get-bad-flags.html
* {igt@vc4/vc4_tiling@set-bad-handle}:
- {shard-dg1}: NOTRUN -> [SKIP][10] +5 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-13/igt@vc4/vc4_tiling@set-bad-handle.html
New tests
---------
New tests have been introduced between IGT_7099_full and IGTPW_8246_full:
### New IGT tests (18) ###
* igt@gem_exercise_blt@fast-copy:
- Statuses : 1 skip(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@linear-lmem0-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@linear-lmem0-smem:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@linear-smem-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@linear-smem-smem:
- Statuses : 5 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile4-lmem0-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile4-lmem0-smem:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile4-smem-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile4-smem-smem:
- Statuses : 3 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile64-lmem0-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile64-lmem0-smem:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile64-smem-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile64-smem-smem:
- Statuses : 5 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@yfmajor-smem-smem:
- Statuses : 2 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@ymajor-lmem0-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@ymajor-lmem0-smem:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@ymajor-smem-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@ymajor-smem-smem:
- Statuses : 5 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in IGTPW_8246_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_caching@read-writes:
- shard-apl: [PASS][11] -> [INCOMPLETE][12] ([i915#7708])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl1/igt@gem_caching@read-writes.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@gem_caching@read-writes.html
* igt@gem_ctx_persistence@legacy-engines-hostile-preempt:
- shard-snb: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#1099]) +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb2/igt@gem_ctx_persistence@legacy-engines-hostile-preempt.html
* igt@gem_lmem_swapping@heavy-verify-random-ccs:
- shard-apl: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4613])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@gem_lmem_swapping@heavy-verify-random-ccs.html
- shard-glk: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#4613])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk5/igt@gem_lmem_swapping@heavy-verify-random-ccs.html
* igt@gem_render_copy@x-tiled-to-vebox-yf-tiled:
- shard-apl: NOTRUN -> [SKIP][16] ([fdo#109271]) +117 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-apl: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#3323])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@gem_userptr_blits@dmabuf-sync.html
- shard-glk: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#3323])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk2/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@input-checking:
- shard-apl: NOTRUN -> [DMESG-WARN][19] ([i915#4991])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@gem_userptr_blits@input-checking.html
* igt@i915_pm_rps@engine-order:
- shard-apl: [PASS][20] -> [FAIL][21] ([i915#6537])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl3/igt@i915_pm_rps@engine-order.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@i915_pm_rps@engine-order.html
* igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
- shard-glk: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#3886]) +2 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk9/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#3886]) +3 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl3/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_chamelium@dp-crc-single:
- shard-apl: NOTRUN -> [SKIP][24] ([fdo#109271] / [fdo#111827]) +8 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl7/igt@kms_chamelium@dp-crc-single.html
* igt@kms_chamelium@hdmi-cmp-planar-formats:
- shard-snb: NOTRUN -> [SKIP][25] ([fdo#109271] / [fdo#111827]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb5/igt@kms_chamelium@hdmi-cmp-planar-formats.html
- shard-glk: NOTRUN -> [SKIP][26] ([fdo#109271] / [fdo#111827]) +1 similar issue
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk3/igt@kms_chamelium@hdmi-cmp-planar-formats.html
* igt@kms_content_protection@atomic@pipe-a-dp-1:
- shard-apl: NOTRUN -> [TIMEOUT][27] ([i915#7173])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@kms_content_protection@atomic@pipe-a-dp-1.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-apl: NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#7205])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: NOTRUN -> [FAIL][29] ([i915#4767])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-blocking-wf_vblank@bc-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][30] -> [FAIL][31] ([i915#2122])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk8/igt@kms_flip@2x-blocking-wf_vblank@bc-hdmi-a1-hdmi-a2.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk4/igt@kms_flip@2x-blocking-wf_vblank@bc-hdmi-a1-hdmi-a2.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-snb: NOTRUN -> [SKIP][32] ([fdo#109271]) +86 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-glk: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#658])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk4/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area:
- shard-apl: NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#658]) +2 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
* igt@kms_vrr@negative-basic:
- shard-glk: NOTRUN -> [SKIP][35] ([fdo#109271]) +38 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk2/igt@kms_vrr@negative-basic.html
* igt@sysfs_clients@fair-1:
- shard-apl: NOTRUN -> [SKIP][36] ([fdo#109271] / [i915#2994]) +2 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@sysfs_clients@fair-1.html
* igt@sysfs_clients@split-10:
- shard-glk: NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#2994])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk9/igt@sysfs_clients@split-10.html
#### Possible fixes ####
* igt@core_hotunplug@unbind-rebind:
- shard-snb: [DMESG-WARN][38] ([i915#4528]) -> [PASS][39]
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-snb2/igt@core_hotunplug@unbind-rebind.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb2/igt@core_hotunplug@unbind-rebind.html
* igt@fbdev@read:
- {shard-rkl}: [SKIP][40] ([i915#2582]) -> [PASS][41]
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-4/igt@fbdev@read.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@fbdev@read.html
* igt@gem_ctx_exec@basic-nohangcheck:
- {shard-rkl}: [FAIL][42] ([i915#6268]) -> [PASS][43]
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_ctx_exec@basic-nohangcheck.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-4/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_ctx_isolation@preservation-s3@bcs0:
- {shard-rkl}: [FAIL][44] ([i915#7673]) -> [PASS][45] +3 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_ctx_isolation@preservation-s3@bcs0.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_ctx_isolation@preservation-s3@bcs0.html
* igt@gem_ctx_persistence@engines-hang@bcs0:
- {shard-rkl}: [SKIP][46] ([i915#6252]) -> [PASS][47]
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@gem_ctx_persistence@engines-hang@bcs0.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-3/igt@gem_ctx_persistence@engines-hang@bcs0.html
* igt@gem_eio@in-flight-suspend:
- {shard-rkl}: [FAIL][48] -> [PASS][49]
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@gem_eio@in-flight-suspend.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-1/igt@gem_eio@in-flight-suspend.html
* igt@gem_exec_fair@basic-deadline:
- {shard-rkl}: [FAIL][50] ([i915#2846]) -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][52] ([i915#2842]) -> [PASS][53] +4 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk2/igt@gem_exec_fair@basic-pace-share@rcs0.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html
- shard-apl: [FAIL][54] ([i915#2842]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl2/igt@gem_exec_fair@basic-pace-share@rcs0.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_reloc@basic-gtt-wc-noreloc:
- {shard-rkl}: [SKIP][56] ([i915#3281]) -> [PASS][57] +6 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-4/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
* igt@gem_mmap_gtt@coherency:
- {shard-rkl}: [SKIP][58] ([fdo#111656]) -> [PASS][59]
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_mmap_gtt@coherency.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_mmap_gtt@coherency.html
* igt@gem_mmap_gtt@hang-user:
- shard-glk: [SKIP][60] ([fdo#109271]) -> [PASS][61]
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk1/igt@gem_mmap_gtt@hang-user.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk3/igt@gem_mmap_gtt@hang-user.html
- shard-apl: [SKIP][62] ([fdo#109271]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl6/igt@gem_mmap_gtt@hang-user.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@gem_mmap_gtt@hang-user.html
* igt@gem_partial_pwrite_pread@writes-after-reads:
- shard-apl: [INCOMPLETE][64] ([i915#7708]) -> [PASS][65] +1 similar issue
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl2/igt@gem_partial_pwrite_pread@writes-after-reads.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl6/igt@gem_partial_pwrite_pread@writes-after-reads.html
* igt@gem_pread@snoop:
- {shard-rkl}: [SKIP][66] ([i915#3282]) -> [PASS][67] +2 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_pread@snoop.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_pread@snoop.html
* igt@gem_softpin@noreloc-s3:
- {shard-rkl}: [FAIL][68] ([fdo#103375]) -> [PASS][69]
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@gem_softpin@noreloc-s3.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-2/igt@gem_softpin@noreloc-s3.html
* igt@gen9_exec_parse@valid-registers:
- {shard-rkl}: [SKIP][70] ([i915#2527]) -> [PASS][71] +2 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-1/igt@gen9_exec_parse@valid-registers.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gen9_exec_parse@valid-registers.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- {shard-dg1}: [FAIL][72] ([i915#3591]) -> [PASS][73] +1 similar issue
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-13/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-19/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- {shard-rkl}: [SKIP][74] ([i915#1845] / [i915#4098]) -> [PASS][75] +2 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
- {shard-dg1}: [FAIL][76] -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-12/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-16/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs:
- {shard-tglu}: [SKIP][78] -> [PASS][79] +7 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-tglu-6/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-1/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs.html
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
- shard-glk: [FAIL][80] ([i915#2346]) -> [PASS][81]
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][82] ([i915#79]) -> [PASS][83]
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite:
- {shard-tglu}: [SKIP][84] ([i915#1849]) -> [PASS][85] +1 similar issue
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-tglu-6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite:
- {shard-rkl}: [SKIP][86] ([i915#1849] / [i915#4098]) -> [PASS][87] +3 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-vga-1:
- shard-snb: [SKIP][88] ([fdo#109271]) -> [PASS][89]
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-snb5/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-vga-1.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb2/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-vga-1.html
* igt@kms_plane@pixel-format@pipe-b-planes:
- {shard-rkl}: [SKIP][90] ([i915#1849] / [i915#3558]) -> [PASS][91] +1 similar issue
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@kms_plane@pixel-format@pipe-b-planes.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@kms_plane@pixel-format@pipe-b-planes.html
* igt@perf_pmu@busy-idle@vcs0:
- {shard-dg1}: [FAIL][92] ([i915#4349]) -> [PASS][93] +2 similar issues
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-17/igt@perf_pmu@busy-idle@vcs0.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-15/igt@perf_pmu@busy-idle@vcs0.html
* igt@sysfs_timeslice_duration@timeout@vecs0:
- {shard-dg1}: [FAIL][94] ([i915#1755]) -> [PASS][95]
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-12/igt@sysfs_timeslice_duration@timeout@vecs0.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-18/igt@sysfs_timeslice_duration@timeout@vecs0.html
#### Warnings ####
* igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1:
- shard-apl: [DMESG-FAIL][96] ([IGT#6]) -> [FAIL][97] ([i915#4573]) +1 similar issue
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl2/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3810]: https://gitlab.freedesktop.org/drm/intel/issues/3810
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#3966]: https://gitlab.freedesktop.org/drm/intel/issues/3966
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4573]: https://gitlab.freedesktop.org/drm/intel/issues/4573
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
[i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/intel/issues/6344
[i915#6412]: https://gitlab.freedesktop.org/drm/intel/issues/6412
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#6537]: https://gitlab.freedesktop.org/drm/intel/issues/6537
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#7052]: https://gitlab.freedesktop.org/drm/intel/issues/7052
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128
[i915#7173]: https://gitlab.freedesktop.org/drm/intel/issues/7173
[i915#7205]: https://gitlab.freedesktop.org/drm/intel/issues/7205
[i915#7276]: https://gitlab.freedesktop.org/drm/intel/issues/7276
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
[i915#7672]: https://gitlab.freedesktop.org/drm/intel/issues/7672
[i915#7673]: https://gitlab.freedesktop.org/drm/intel/issues/7673
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707
[i915#7708]: https://gitlab.freedesktop.org/drm/intel/issues/7708
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7099 -> IGTPW_8246
CI-20190529: 20190529
CI_DRM_12515: 25905f33e9cb1630d94ce04688d5a6c756f96e9d @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_8246: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
IGT_7099: 62e8be3ca2935a079de4fabd4923df58278a9ed0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
[-- Attachment #2: Type: text/html, Size: 30029 bytes --]
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [igt-dev] ✗ Fi.CI.IGT: failure for Introduce blt_cmd_info struct
2022-12-20 3:12 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
@ 2022-12-20 8:11 ` Karolina Stolarek
2022-12-20 12:09 ` Yedireswarapu, SaiX Nandan
0 siblings, 1 reply; 22+ messages in thread
From: Karolina Stolarek @ 2022-12-20 8:11 UTC (permalink / raw)
To: igt-dev; +Cc: Yedireswarapu, SaiX Nandan
On 20.12.2022 04:12, Patchwork wrote:
> *Patch Details*
> *Series:* Introduce blt_cmd_info struct
> *URL:* https://patchwork.freedesktop.org/series/112055/
> <https://patchwork.freedesktop.org/series/112055/>
> *State:* failure
> *Details:*
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html>
>
>
> CI Bug Log - changes from IGT_7099_full -> IGTPW_8246_full
>
>
> Summary
>
> *FAILURE*
>
> Serious unknown changes coming with IGTPW_8246_full absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in IGTPW_8246_full, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
> External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
>
>
> Participating hosts (11 -> 10)
>
> Missing (1): shard-dg10
>
>
> Possible new issues
>
> Here are the unknown changes that may have been introduced in
> IGTPW_8246_full:
>
>
> IGT changes
>
>
> Possible regressions
>
> * igt@i915_pm_rc6_residency@rc6-idle@vcs0:
> o shard-glk: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk9/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html>
> -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk7/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html>
>
Not related to my changes.
Thanks,
Karolina
> Suppressed
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
> *
>
> {igt@gem_ccs@block-multicopy-compressed}:
>
> o {shard-tglu}: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-7/igt@gem_ccs@block-multicopy-compressed.html>
> *
>
> igt@i915_selftest@live@gem_contexts:
>
> o {shard-rkl}: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@i915_selftest@live@gem_contexts.html>
> -> INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-3/igt@i915_selftest@live@gem_contexts.html>
> *
>
> igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_dg2_rc_ccs_cc:
>
> o {shard-tglu-10}: NOTRUN -> INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-10/igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_dg2_rc_ccs_cc.html>
> *
>
> igt@perf_pmu@most-busy-idle-check-all@rcs0:
>
> o {shard-dg1}: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-13/igt@perf_pmu@most-busy-idle-check-all@rcs0.html>
> -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-13/igt@perf_pmu@most-busy-idle-check-all@rcs0.html>
> *
>
> {igt@vc4/vc4_tiling@get-bad-flags}:
>
> o {shard-rkl}: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@vc4/vc4_tiling@get-bad-flags.html>
> +5 similar issues
> *
>
> {igt@vc4/vc4_tiling@set-bad-handle}:
>
> o {shard-dg1}: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-13/igt@vc4/vc4_tiling@set-bad-handle.html>
> +5 similar issues
>
>
> New tests
>
> New tests have been introduced between IGT_7099_full and IGTPW_8246_full:
>
>
> New IGT tests (18)
>
> *
>
> igt@gem_exercise_blt@fast-copy:
>
> o Statuses : 1 skip(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@linear-lmem0-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@linear-lmem0-smem:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@linear-smem-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@linear-smem-smem:
>
> o Statuses : 5 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile4-lmem0-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile4-lmem0-smem:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile4-smem-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile4-smem-smem:
>
> o Statuses : 3 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile64-lmem0-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile64-lmem0-smem:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile64-smem-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile64-smem-smem:
>
> o Statuses : 5 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@yfmajor-smem-smem:
>
> o Statuses : 2 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@ymajor-lmem0-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@ymajor-lmem0-smem:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@ymajor-smem-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@ymajor-smem-smem:
>
> o Statuses : 5 pass(s)
> o Exec time: [0.0] s
>
>
> Known issues
>
> Here are the changes found in IGTPW_8246_full that come from known issues:
>
>
> IGT changes
>
>
> Issues hit
>
> *
>
> igt@gem_caching@read-writes:
>
> o shard-apl: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl1/igt@gem_caching@read-writes.html>
> -> INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@gem_caching@read-writes.html>
> (i915#7708 <https://gitlab.freedesktop.org/drm/intel/issues/7708>)
> *
>
> igt@gem_ctx_persistence@legacy-engines-hostile-preempt:
>
> o shard-snb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb2/igt@gem_ctx_persistence@legacy-engines-hostile-preempt.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#1099
> <https://gitlab.freedesktop.org/drm/intel/issues/1099>) +1
> similar issue
> *
>
> igt@gem_lmem_swapping@heavy-verify-random-ccs:
>
> o
>
> shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@gem_lmem_swapping@heavy-verify-random-ccs.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#4613 <https://gitlab.freedesktop.org/drm/intel/issues/4613>)
>
> o
>
> shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk5/igt@gem_lmem_swapping@heavy-verify-random-ccs.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#4613 <https://gitlab.freedesktop.org/drm/intel/issues/4613>)
>
> *
>
> igt@gem_render_copy@x-tiled-to-vebox-yf-tiled:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +117
> similar issues
> *
>
> igt@gem_userptr_blits@dmabuf-sync:
>
> o
>
> shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@gem_userptr_blits@dmabuf-sync.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#3323 <https://gitlab.freedesktop.org/drm/intel/issues/3323>)
>
> o
>
> shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk2/igt@gem_userptr_blits@dmabuf-sync.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#3323 <https://gitlab.freedesktop.org/drm/intel/issues/3323>)
>
> *
>
> igt@gem_userptr_blits@input-checking:
>
> o shard-apl: NOTRUN -> DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@gem_userptr_blits@input-checking.html>
> (i915#4991 <https://gitlab.freedesktop.org/drm/intel/issues/4991>)
> *
>
> igt@i915_pm_rps@engine-order:
>
> o shard-apl: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl3/igt@i915_pm_rps@engine-order.html>
> -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@i915_pm_rps@engine-order.html>
> (i915#6537 <https://gitlab.freedesktop.org/drm/intel/issues/6537>)
> *
>
> igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
>
> o shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk9/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#3886
> <https://gitlab.freedesktop.org/drm/intel/issues/3886>) +2
> similar issues
> *
>
> igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl3/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#3886
> <https://gitlab.freedesktop.org/drm/intel/issues/3886>) +3
> similar issues
> *
>
> igt@kms_chamelium@dp-crc-single:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl7/igt@kms_chamelium@dp-crc-single.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> fdo#111827
> <https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +8
> similar issues
> *
>
> igt@kms_chamelium@hdmi-cmp-planar-formats:
>
> o
>
> shard-snb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb5/igt@kms_chamelium@hdmi-cmp-planar-formats.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> fdo#111827
> <https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +1
> similar issue
>
> o
>
> shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk3/igt@kms_chamelium@hdmi-cmp-planar-formats.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> fdo#111827
> <https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +1
> similar issue
>
> *
>
> igt@kms_content_protection@atomic@pipe-a-dp-1:
>
> o shard-apl: NOTRUN -> TIMEOUT
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@kms_content_protection@atomic@pipe-a-dp-1.html>
> (i915#7173 <https://gitlab.freedesktop.org/drm/intel/issues/7173>)
> *
>
> igt@kms_dsc@dsc-with-bpc-formats:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@kms_dsc@dsc-with-bpc-formats.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#7205 <https://gitlab.freedesktop.org/drm/intel/issues/7205>)
> *
>
> igt@kms_fbcon_fbt@fbc-suspend:
>
> o shard-apl: NOTRUN -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@kms_fbcon_fbt@fbc-suspend.html>
> (i915#4767 <https://gitlab.freedesktop.org/drm/intel/issues/4767>)
> *
>
> igt@kms_flip@2x-blocking-wf_vblank@bc-hdmi-a1-hdmi-a2:
>
> o shard-glk: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk8/igt@kms_flip@2x-blocking-wf_vblank@bc-hdmi-a1-hdmi-a2.html>
> -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk4/igt@kms_flip@2x-blocking-wf_vblank@bc-hdmi-a1-hdmi-a2.html>
> (i915#2122 <https://gitlab.freedesktop.org/drm/intel/issues/2122>)
> *
>
> igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
>
> o shard-snb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +86
> similar issues
> *
>
> igt@kms_psr2_sf@cursor-plane-update-sf:
>
> o shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk4/igt@kms_psr2_sf@cursor-plane-update-sf.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#658
> <https://gitlab.freedesktop.org/drm/intel/issues/658>)
> *
>
> igt@kms_psr2_sf@plane-move-sf-dmg-area:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@kms_psr2_sf@plane-move-sf-dmg-area.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#658
> <https://gitlab.freedesktop.org/drm/intel/issues/658>) +2
> similar issues
> *
>
> igt@kms_vrr@negative-basic:
>
> o shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk2/igt@kms_vrr@negative-basic.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +38
> similar issues
> *
>
> igt@sysfs_clients@fair-1:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@sysfs_clients@fair-1.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#2994
> <https://gitlab.freedesktop.org/drm/intel/issues/2994>) +2
> similar issues
> *
>
> igt@sysfs_clients@split-10:
>
> o shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk9/igt@sysfs_clients@split-10.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#2994 <https://gitlab.freedesktop.org/drm/intel/issues/2994>)
>
>
> Possible fixes
>
> *
>
> igt@core_hotunplug@unbind-rebind:
>
> o shard-snb: DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-snb2/igt@core_hotunplug@unbind-rebind.html>
> (i915#4528
> <https://gitlab.freedesktop.org/drm/intel/issues/4528>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb2/igt@core_hotunplug@unbind-rebind.html>
> *
>
> igt@fbdev@read:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-4/igt@fbdev@read.html>
> (i915#2582
> <https://gitlab.freedesktop.org/drm/intel/issues/2582>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@fbdev@read.html>
> *
>
> igt@gem_ctx_exec@basic-nohangcheck:
>
> o {shard-rkl}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_ctx_exec@basic-nohangcheck.html>
> (i915#6268
> <https://gitlab.freedesktop.org/drm/intel/issues/6268>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-4/igt@gem_ctx_exec@basic-nohangcheck.html>
> *
>
> igt@gem_ctx_isolation@preservation-s3@bcs0:
>
> o {shard-rkl}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_ctx_isolation@preservation-s3@bcs0.html>
> (i915#7673
> <https://gitlab.freedesktop.org/drm/intel/issues/7673>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_ctx_isolation@preservation-s3@bcs0.html>
> +3 similar issues
> *
>
> igt@gem_ctx_persistence@engines-hang@bcs0:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@gem_ctx_persistence@engines-hang@bcs0.html>
> (i915#6252
> <https://gitlab.freedesktop.org/drm/intel/issues/6252>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-3/igt@gem_ctx_persistence@engines-hang@bcs0.html>
> *
>
> igt@gem_eio@in-flight-suspend:
>
> o {shard-rkl}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@gem_eio@in-flight-suspend.html>
> -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-1/igt@gem_eio@in-flight-suspend.html>
> *
>
> igt@gem_exec_fair@basic-deadline:
>
> o {shard-rkl}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html>
> (i915#2846
> <https://gitlab.freedesktop.org/drm/intel/issues/2846>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_exec_fair@basic-deadline.html>
> *
>
> igt@gem_exec_fair@basic-pace-share@rcs0:
>
> o
>
> shard-glk: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk2/igt@gem_exec_fair@basic-pace-share@rcs0.html>
> (i915#2842
> <https://gitlab.freedesktop.org/drm/intel/issues/2842>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html>
> +4 similar issues
>
> o
>
> shard-apl: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl2/igt@gem_exec_fair@basic-pace-share@rcs0.html>
> (i915#2842
> <https://gitlab.freedesktop.org/drm/intel/issues/2842>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@gem_exec_fair@basic-pace-share@rcs0.html>
>
> *
>
> igt@gem_exec_reloc@basic-gtt-wc-noreloc:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-4/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html>
> (i915#3281
> <https://gitlab.freedesktop.org/drm/intel/issues/3281>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html>
> +6 similar issues
> *
>
> igt@gem_mmap_gtt@coherency:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_mmap_gtt@coherency.html>
> (fdo#111656
> <https://bugs.freedesktop.org/show_bug.cgi?id=111656>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_mmap_gtt@coherency.html>
> *
>
> igt@gem_mmap_gtt@hang-user:
>
> o
>
> shard-glk: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk1/igt@gem_mmap_gtt@hang-user.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk3/igt@gem_mmap_gtt@hang-user.html>
>
> o
>
> shard-apl: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl6/igt@gem_mmap_gtt@hang-user.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@gem_mmap_gtt@hang-user.html>
>
> *
>
> igt@gem_partial_pwrite_pread@writes-after-reads:
>
> o shard-apl: INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl2/igt@gem_partial_pwrite_pread@writes-after-reads.html>
> (i915#7708
> <https://gitlab.freedesktop.org/drm/intel/issues/7708>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl6/igt@gem_partial_pwrite_pread@writes-after-reads.html>
> +1 similar issue
> *
>
> igt@gem_pread@snoop:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_pread@snoop.html>
> (i915#3282
> <https://gitlab.freedesktop.org/drm/intel/issues/3282>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_pread@snoop.html>
> +2 similar issues
> *
>
> igt@gem_softpin@noreloc-s3:
>
> o {shard-rkl}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@gem_softpin@noreloc-s3.html>
> (fdo#103375
> <https://bugs.freedesktop.org/show_bug.cgi?id=103375>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-2/igt@gem_softpin@noreloc-s3.html>
> *
>
> igt@gen9_exec_parse@valid-registers:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-1/igt@gen9_exec_parse@valid-registers.html>
> (i915#2527
> <https://gitlab.freedesktop.org/drm/intel/issues/2527>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gen9_exec_parse@valid-registers.html>
> +2 similar issues
> *
>
> igt@i915_pm_rc6_residency@rc6-idle@vcs0:
>
> o {shard-dg1}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-13/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html>
> (i915#3591
> <https://gitlab.freedesktop.org/drm/intel/issues/3591>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-19/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html>
> +1 similar issue
> *
>
> igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html>
> (i915#1845
> <https://gitlab.freedesktop.org/drm/intel/issues/1845> /
> i915#4098
> <https://gitlab.freedesktop.org/drm/intel/issues/4098>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html>
> +2 similar issues
> *
>
> igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
>
> o {shard-dg1}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-12/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html>
> -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-16/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html>
> *
>
> igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs:
>
> o {shard-tglu}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-tglu-6/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs.html>
> -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-1/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs.html>
> +7 similar issues
> *
>
> igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
>
> o shard-glk: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html>
> (i915#2346
> <https://gitlab.freedesktop.org/drm/intel/issues/2346>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html>
> *
>
> igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2:
>
> o shard-glk: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html>
> (i915#79 <https://gitlab.freedesktop.org/drm/intel/issues/79>)
> -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html>
> *
>
> igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite:
>
> o {shard-tglu}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-tglu-6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html>
> (i915#1849
> <https://gitlab.freedesktop.org/drm/intel/issues/1849>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html>
> +1 similar issue
> *
>
> igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html>
> (i915#1849
> <https://gitlab.freedesktop.org/drm/intel/issues/1849> /
> i915#4098
> <https://gitlab.freedesktop.org/drm/intel/issues/4098>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html>
> +3 similar issues
> *
>
> igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-vga-1:
>
> o shard-snb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-snb5/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-vga-1.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb2/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-vga-1.html>
> *
>
> igt@kms_plane@pixel-format@pipe-b-planes:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@kms_plane@pixel-format@pipe-b-planes.html>
> (i915#1849
> <https://gitlab.freedesktop.org/drm/intel/issues/1849> /
> i915#3558
> <https://gitlab.freedesktop.org/drm/intel/issues/3558>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@kms_plane@pixel-format@pipe-b-planes.html>
> +1 similar issue
> *
>
> igt@perf_pmu@busy-idle@vcs0:
>
> o {shard-dg1}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-17/igt@perf_pmu@busy-idle@vcs0.html>
> (i915#4349
> <https://gitlab.freedesktop.org/drm/intel/issues/4349>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-15/igt@perf_pmu@busy-idle@vcs0.html>
> +2 similar issues
> *
>
> igt@sysfs_timeslice_duration@timeout@vecs0:
>
> o {shard-dg1}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-12/igt@sysfs_timeslice_duration@timeout@vecs0.html>
> (i915#1755
> <https://gitlab.freedesktop.org/drm/intel/issues/1755>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-18/igt@sysfs_timeslice_duration@timeout@vecs0.html>
>
>
> Warnings
>
> * igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1:
> o shard-apl: DMESG-FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl2/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1.html>
> (IGT#6
> <https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6>) ->
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1.html>
> (i915#4573
> <https://gitlab.freedesktop.org/drm/intel/issues/4573>) +1
> similar issue
>
> {name}: This element is suppressed. This means it is ignored when computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
>
>
> Build changes
>
> * CI: CI-20190529 -> None
> * IGT: IGT_7099 -> IGTPW_8246
>
> CI-20190529: 20190529
> CI_DRM_12515: 25905f33e9cb1630d94ce04688d5a6c756f96e9d @
> git://anongit.freedesktop.org/gfx-ci/linux
> IGTPW_8246: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
> IGT_7099: 62e8be3ca2935a079de4fabd4923df58278a9ed0 @
> https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for Introduce blt_cmd_info struct
2022-12-19 11:49 [igt-dev] [PATCH i-g-t 0/4] Introduce blt_cmd_info struct Karolina Stolarek
` (5 preceding siblings ...)
2022-12-20 3:12 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
@ 2022-12-20 11:25 ` Patchwork
2022-12-21 16:56 ` [igt-dev] ✗ GitLab.Pipeline: warning " Patchwork
7 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2022-12-20 11:25 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 32875 bytes --]
== Series Details ==
Series: Introduce blt_cmd_info struct
URL : https://patchwork.freedesktop.org/series/112055/
State : success
== Summary ==
CI Bug Log - changes from IGT_7099_full -> IGTPW_8246_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
Participating hosts (11 -> 10)
------------------------------
Missing (1): shard-dg10
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_8246_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_ccs@block-multicopy-compressed}:
- {shard-tglu}: NOTRUN -> [SKIP][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-7/igt@gem_ccs@block-multicopy-compressed.html
* igt@i915_selftest@live@gem_contexts:
- {shard-rkl}: [PASS][2] -> [INCOMPLETE][3]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@i915_selftest@live@gem_contexts.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-3/igt@i915_selftest@live@gem_contexts.html
* igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_dg2_rc_ccs_cc:
- {shard-tglu-10}: NOTRUN -> [INCOMPLETE][4]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-10/igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_dg2_rc_ccs_cc.html
* igt@perf_pmu@most-busy-idle-check-all@rcs0:
- {shard-dg1}: [PASS][5] -> [FAIL][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-13/igt@perf_pmu@most-busy-idle-check-all@rcs0.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-13/igt@perf_pmu@most-busy-idle-check-all@rcs0.html
* {igt@vc4/vc4_tiling@set-bad-handle}:
- {shard-rkl}: NOTRUN -> [SKIP][7] +4 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-4/igt@vc4/vc4_tiling@set-bad-handle.html
- {shard-dg1}: NOTRUN -> [SKIP][8] +4 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-13/igt@vc4/vc4_tiling@set-bad-handle.html
New tests
---------
New tests have been introduced between IGT_7099_full and IGTPW_8246_full:
### New IGT tests (18) ###
* igt@gem_exercise_blt@fast-copy:
- Statuses : 1 skip(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@linear-lmem0-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@linear-lmem0-smem:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@linear-smem-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@linear-smem-smem:
- Statuses : 5 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile4-lmem0-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile4-lmem0-smem:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile4-smem-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile4-smem-smem:
- Statuses : 3 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile64-lmem0-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile64-lmem0-smem:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile64-smem-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile64-smem-smem:
- Statuses : 5 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@yfmajor-smem-smem:
- Statuses : 2 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@ymajor-lmem0-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@ymajor-lmem0-smem:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@ymajor-smem-lmem0:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@ymajor-smem-smem:
- Statuses : 5 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in IGTPW_8246_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_caching@read-writes:
- shard-apl: [PASS][9] -> [INCOMPLETE][10] ([i915#7708])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl1/igt@gem_caching@read-writes.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@gem_caching@read-writes.html
* igt@gem_ctx_persistence@legacy-engines-hostile-preempt:
- shard-snb: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#1099]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb2/igt@gem_ctx_persistence@legacy-engines-hostile-preempt.html
* igt@gem_lmem_swapping@heavy-verify-random-ccs:
- shard-apl: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#4613])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@gem_lmem_swapping@heavy-verify-random-ccs.html
- shard-glk: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4613])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk5/igt@gem_lmem_swapping@heavy-verify-random-ccs.html
* igt@gem_render_copy@x-tiled-to-vebox-yf-tiled:
- shard-apl: NOTRUN -> [SKIP][14] ([fdo#109271]) +117 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-apl: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#3323])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@gem_userptr_blits@dmabuf-sync.html
- shard-glk: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#3323])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk2/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@input-checking:
- shard-apl: NOTRUN -> [DMESG-WARN][17] ([i915#4991])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@gem_userptr_blits@input-checking.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- shard-glk: [PASS][18] -> [FAIL][19] ([i915#3591])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk9/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk7/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@i915_pm_rps@engine-order:
- shard-apl: [PASS][20] -> [FAIL][21] ([i915#6537])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl3/igt@i915_pm_rps@engine-order.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@i915_pm_rps@engine-order.html
* igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
- shard-glk: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#3886]) +2 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk9/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#3886]) +3 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl3/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_chamelium@dp-crc-single:
- shard-apl: NOTRUN -> [SKIP][24] ([fdo#109271] / [fdo#111827]) +8 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl7/igt@kms_chamelium@dp-crc-single.html
* igt@kms_chamelium@hdmi-cmp-planar-formats:
- shard-snb: NOTRUN -> [SKIP][25] ([fdo#109271] / [fdo#111827]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb5/igt@kms_chamelium@hdmi-cmp-planar-formats.html
- shard-glk: NOTRUN -> [SKIP][26] ([fdo#109271] / [fdo#111827]) +1 similar issue
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk3/igt@kms_chamelium@hdmi-cmp-planar-formats.html
* igt@kms_content_protection@atomic@pipe-a-dp-1:
- shard-apl: NOTRUN -> [TIMEOUT][27] ([i915#7173])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@kms_content_protection@atomic@pipe-a-dp-1.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-apl: NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#7205])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: NOTRUN -> [FAIL][29] ([i915#4767])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-blocking-wf_vblank@bc-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][30] -> [FAIL][31] ([i915#2122])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk8/igt@kms_flip@2x-blocking-wf_vblank@bc-hdmi-a1-hdmi-a2.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk4/igt@kms_flip@2x-blocking-wf_vblank@bc-hdmi-a1-hdmi-a2.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-snb: NOTRUN -> [SKIP][32] ([fdo#109271]) +86 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-glk: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#658])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk4/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area:
- shard-apl: NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#658]) +2 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
* igt@kms_vrr@negative-basic:
- shard-glk: NOTRUN -> [SKIP][35] ([fdo#109271]) +38 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk2/igt@kms_vrr@negative-basic.html
* igt@sysfs_clients@fair-1:
- shard-apl: NOTRUN -> [SKIP][36] ([fdo#109271] / [i915#2994]) +2 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@sysfs_clients@fair-1.html
* igt@sysfs_clients@split-10:
- shard-glk: NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#2994])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk9/igt@sysfs_clients@split-10.html
#### Possible fixes ####
* igt@core_hotunplug@unbind-rebind:
- shard-snb: [DMESG-WARN][38] ([i915#4528]) -> [PASS][39]
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-snb2/igt@core_hotunplug@unbind-rebind.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb2/igt@core_hotunplug@unbind-rebind.html
* igt@fbdev@read:
- {shard-rkl}: [SKIP][40] ([i915#2582]) -> [PASS][41]
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-4/igt@fbdev@read.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@fbdev@read.html
* igt@gem_ctx_exec@basic-nohangcheck:
- {shard-rkl}: [FAIL][42] ([i915#6268]) -> [PASS][43]
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_ctx_exec@basic-nohangcheck.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-4/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_ctx_isolation@preservation-s3@bcs0:
- {shard-rkl}: [FAIL][44] ([i915#7673]) -> [PASS][45] +3 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_ctx_isolation@preservation-s3@bcs0.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_ctx_isolation@preservation-s3@bcs0.html
* igt@gem_ctx_persistence@engines-hang@bcs0:
- {shard-rkl}: [SKIP][46] ([i915#6252]) -> [PASS][47]
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@gem_ctx_persistence@engines-hang@bcs0.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-3/igt@gem_ctx_persistence@engines-hang@bcs0.html
* igt@gem_eio@in-flight-suspend:
- {shard-rkl}: [FAIL][48] -> [PASS][49]
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@gem_eio@in-flight-suspend.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-1/igt@gem_eio@in-flight-suspend.html
* igt@gem_exec_fair@basic-deadline:
- {shard-rkl}: [FAIL][50] ([i915#2846]) -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][52] ([i915#2842]) -> [PASS][53] +4 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk2/igt@gem_exec_fair@basic-pace-share@rcs0.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html
- shard-apl: [FAIL][54] ([i915#2842]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl2/igt@gem_exec_fair@basic-pace-share@rcs0.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_reloc@basic-gtt-wc-noreloc:
- {shard-rkl}: [SKIP][56] ([i915#3281]) -> [PASS][57] +6 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-4/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
* igt@gem_mmap_gtt@coherency:
- {shard-rkl}: [SKIP][58] ([fdo#111656]) -> [PASS][59]
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_mmap_gtt@coherency.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_mmap_gtt@coherency.html
* igt@gem_mmap_gtt@hang-user:
- shard-glk: [SKIP][60] ([fdo#109271]) -> [PASS][61]
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk1/igt@gem_mmap_gtt@hang-user.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk3/igt@gem_mmap_gtt@hang-user.html
- shard-apl: [SKIP][62] ([fdo#109271]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl6/igt@gem_mmap_gtt@hang-user.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@gem_mmap_gtt@hang-user.html
* igt@gem_partial_pwrite_pread@writes-after-reads:
- shard-apl: [INCOMPLETE][64] ([i915#7708]) -> [PASS][65] +1 similar issue
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl2/igt@gem_partial_pwrite_pread@writes-after-reads.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl6/igt@gem_partial_pwrite_pread@writes-after-reads.html
* igt@gem_pread@snoop:
- {shard-rkl}: [SKIP][66] ([i915#3282]) -> [PASS][67] +2 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_pread@snoop.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_pread@snoop.html
* igt@gem_softpin@noreloc-s3:
- {shard-rkl}: [FAIL][68] ([fdo#103375]) -> [PASS][69]
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@gem_softpin@noreloc-s3.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-2/igt@gem_softpin@noreloc-s3.html
* igt@gen9_exec_parse@valid-registers:
- {shard-rkl}: [SKIP][70] ([i915#2527]) -> [PASS][71] +2 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-1/igt@gen9_exec_parse@valid-registers.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gen9_exec_parse@valid-registers.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- {shard-dg1}: [FAIL][72] ([i915#3591]) -> [PASS][73] +1 similar issue
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-13/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-19/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- {shard-rkl}: [SKIP][74] ([i915#1845] / [i915#4098]) -> [PASS][75] +2 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
- {shard-dg1}: [FAIL][76] -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-12/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-16/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs:
- {shard-tglu}: [SKIP][78] ([i915#1845]) -> [PASS][79] +7 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-tglu-6/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-1/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs.html
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
- shard-glk: [FAIL][80] ([i915#2346]) -> [PASS][81]
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][82] ([i915#79]) -> [PASS][83]
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite:
- {shard-tglu}: [SKIP][84] ([i915#1849]) -> [PASS][85] +1 similar issue
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-tglu-6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite:
- {shard-rkl}: [SKIP][86] ([i915#1849] / [i915#4098]) -> [PASS][87] +3 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-vga-1:
- shard-snb: [SKIP][88] ([fdo#109271]) -> [PASS][89]
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-snb5/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-vga-1.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb2/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-vga-1.html
* igt@kms_plane@pixel-format@pipe-b-planes:
- {shard-rkl}: [SKIP][90] ([i915#1849] / [i915#3558]) -> [PASS][91] +1 similar issue
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@kms_plane@pixel-format@pipe-b-planes.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@kms_plane@pixel-format@pipe-b-planes.html
* igt@perf_pmu@busy-idle@vcs0:
- {shard-dg1}: [FAIL][92] ([i915#4349]) -> [PASS][93] +2 similar issues
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-17/igt@perf_pmu@busy-idle@vcs0.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-15/igt@perf_pmu@busy-idle@vcs0.html
* igt@sysfs_timeslice_duration@timeout@vecs0:
- {shard-dg1}: [FAIL][94] ([i915#1755]) -> [PASS][95]
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-12/igt@sysfs_timeslice_duration@timeout@vecs0.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-18/igt@sysfs_timeslice_duration@timeout@vecs0.html
#### Warnings ####
* igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1:
- shard-apl: [DMESG-FAIL][96] ([IGT#6]) -> [FAIL][97] ([i915#4573]) +1 similar issue
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl2/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3810]: https://gitlab.freedesktop.org/drm/intel/issues/3810
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#3966]: https://gitlab.freedesktop.org/drm/intel/issues/3966
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4573]: https://gitlab.freedesktop.org/drm/intel/issues/4573
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
[i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/intel/issues/6344
[i915#6412]: https://gitlab.freedesktop.org/drm/intel/issues/6412
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#6537]: https://gitlab.freedesktop.org/drm/intel/issues/6537
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#7052]: https://gitlab.freedesktop.org/drm/intel/issues/7052
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128
[i915#7173]: https://gitlab.freedesktop.org/drm/intel/issues/7173
[i915#7205]: https://gitlab.freedesktop.org/drm/intel/issues/7205
[i915#7276]: https://gitlab.freedesktop.org/drm/intel/issues/7276
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
[i915#7672]: https://gitlab.freedesktop.org/drm/intel/issues/7672
[i915#7673]: https://gitlab.freedesktop.org/drm/intel/issues/7673
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707
[i915#7708]: https://gitlab.freedesktop.org/drm/intel/issues/7708
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7099 -> IGTPW_8246
CI-20190529: 20190529
CI_DRM_12515: 25905f33e9cb1630d94ce04688d5a6c756f96e9d @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_8246: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
IGT_7099: 62e8be3ca2935a079de4fabd4923df58278a9ed0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
[-- Attachment #2: Type: text/html, Size: 29788 bytes --]
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats Karolina Stolarek
@ 2022-12-20 11:49 ` Zbigniew Kempczyński
2022-12-21 9:09 ` Karolina Stolarek
2022-12-21 17:58 ` Kamil Konieczny
2022-12-21 18:31 ` Kamil Konieczny
1 sibling, 2 replies; 22+ messages in thread
From: Zbigniew Kempczyński @ 2022-12-20 11:49 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
On Mon, Dec 19, 2022 at 12:49:08PM +0100, Karolina Stolarek wrote:
> Add structs to describe what blitter commands and tiling formats are
> supported per platform. Introduce functions that check which blitter
> commands are supported, update the tests to reflect that change.
> Use new enum tiling_format in i915_blt lib and block copy tests.
>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> ---
> lib/i915/blt_tiling.c | 371 +++++++++++++++++++++++++++++++++
> lib/i915/blt_tiling.h | 64 ++++++
> lib/i915/i915_blt.c | 60 +-----
> lib/i915/i915_blt.h | 14 +-
> lib/meson.build | 1 +
> tests/i915/gem_ccs.c | 19 +-
> tests/i915/gem_lmem_swapping.c | 2 +-
> 7 files changed, 456 insertions(+), 75 deletions(-)
> create mode 100644 lib/i915/blt_tiling.c
> create mode 100644 lib/i915/blt_tiling.h
>
> diff --git a/lib/i915/blt_tiling.c b/lib/i915/blt_tiling.c
> new file mode 100644
> index 00000000..41a3fe25
> --- /dev/null
> +++ b/lib/i915/blt_tiling.c
> @@ -0,0 +1,371 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2022 Intel Corporation
> + */
> +
> +#include "blt_tiling.h"
> +
> +#define BLT_STR_MAX 200
> +#define TILE_STR_MAX 60
> +
> +static bool matches_gen12_atsm(uint16_t devid)
> +{
> + return IS_DG2(devid) && intel_display_ver(devid) == 0;
> +}
> +
> +static bool matches_gen12_dg2(uint16_t devid)
> +{
> + return IS_DG2(devid);
> +}
> +
> +static bool matches_gen12_generic(uint16_t devid)
> +{
> + return !(matches_gen12_dg2(devid) || matches_gen12_atsm(devid));
> +}
> +
> +static const struct blt_cmd_info generic_info = {
> + .gen_max = -1
> +};
> +
> +/* No blitter-specific commands available */
> +static const struct blt_cmd_info pre_gen6_info = {
> + .gen_max = 5,
> +};
> +
> +static const struct blt_cmd_info pre_gen8_info = {
> + .gen_min = 6,
> + .gen_max = 7,
> + .cmd_num = 2,
> + .supported_blt_cmds = SRC_COPY | XY_SRC_COPY,
> + .supported_tiling = {
If supported_tiling would point to array of pointers you can add
terminating NULL element. The .cmd_num can be removed and you
decrease of risk of mistake here.
> + (struct blt_tiling_info){
> + .blt_cmd_type = SRC_COPY,
> + .supported_tiling = T_LINEAR
> + },
You may use array initialization:
[SRC_COPY] = &src_copy,
[XY_SRC_COPY] = &xy_src_copy
...
but SRC_COPY, XY_SRC_COPY, ... better should be contigues, not bitflags.
Apart of that some initialization macro would make this code more readable,
like:
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_SRC_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR
> + }
BLT_INFO(XY_SRC_COPY, T_LINEAR | T_XMAJOR)
and instead of gen_min/gen_max I would just inject this directly to
intel_device_info.c, like:
.blt_tiling = pre_gen8_info
For render we might reuse same info definition, like:
.render_tiling = pre_gen8_info
or point to separate if there're tiling differences.
--
Zbigniew
> + }
> +};
> +
> +static const struct blt_cmd_info gen8_info = {
> + .gen_min = 8,
> + .gen_max = 8,
> + .cmd_num = 1,
> + .supported_blt_cmds = XY_SRC_COPY,
> + .supported_tiling = {
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_SRC_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> + }
> + }
> +};
> +
> +static const struct blt_cmd_info gen11_info = {
> + .gen_min = 9,
> + .gen_max = 11,
> + .cmd_num = 2,
> + .supported_blt_cmds = XY_SRC_COPY | XY_FAST_COPY,
> + .supported_tiling = {
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_SRC_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_FAST_COPY,
> + .supported_tiling = T_LINEAR | T_YMAJOR | T_YFMAJOR | T_TILE64
> + }
> + }
> +};
> +
> +#define GEN12_FIELDS \
> + .gen_min = 12, \
> + .gen_max = 12, \
> + .cmd_num = 3, \
> + .supported_blt_cmds = XY_SRC_COPY | XY_FAST_COPY | XY_BLOCK_COPY
> +
> +static const struct blt_cmd_info gen12_info = {
> + GEN12_FIELDS,
> + .matches_platform = matches_gen12_generic,
> + .supported_tiling = {
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_SRC_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_FAST_COPY,
> + .supported_tiling = T_LINEAR | T_YMAJOR | T_TILE4 | T_TILE64
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_BLOCK_COPY,
> + .supported_tiling = T_LINEAR | T_YMAJOR
> + }
> + }
> +};
> +
> +static const struct blt_cmd_info gen12_dg2_info = {
> + GEN12_FIELDS,
> + .matches_platform = matches_gen12_dg2,
> + .supported_tiling = {
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_SRC_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_FAST_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_BLOCK_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
> + }
> + }
> +};
> +
> +static const struct blt_cmd_info gen12_atsm_info = {
> + GEN12_FIELDS,
> + .matches_platform = matches_gen12_atsm,
> + .supported_tiling = {
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_SRC_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_FAST_COPY,
> + .supported_tiling = T_LINEAR | T_TILE4 | T_TILE64
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_BLOCK_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
> + }
> + }
> +};
> +
> +static const struct blt_cmd_info blt_gen_configs[] = {
> + pre_gen6_info,
> + pre_gen8_info,
> + gen8_info,
> + gen11_info,
> + generic_info
> +};
> +
> +static const struct blt_cmd_info blt_devid_configs[] = {
> + gen12_info,
> + gen12_dg2_info,
> + gen12_atsm_info,
> + generic_info
> +};
> +
> +static const struct blt_cmd_info *get_devid_config(uint16_t devid)
> +{
> + for (int i = 0; blt_devid_configs[i].gen_max != -1; i++)
> + if (blt_devid_configs[i].matches_platform(devid))
> + return &blt_devid_configs[i];
> + return NULL;
> +}
> +
> +static const struct blt_cmd_info *get_gen_config(uint16_t devid)
> +{
> + unsigned int gen = intel_gen(devid);
> +
> + for (int i = 0; blt_gen_configs[i].gen_max != -1; i++)
> + if (gen >= blt_gen_configs[i].gen_min &&
> + gen <= blt_gen_configs[i].gen_max)
> + return &blt_gen_configs[i];
> + return NULL;
> +}
> +
> +static const struct blt_cmd_info *get_blt_cmd_config(uint16_t devid)
> +{
> + if (IS_GEN12(devid))
> + return get_devid_config(devid);
> + else
> + return get_gen_config(devid);
> +}
> +
> +static const struct blt_tiling_info
> + *get_tiling_config(const struct blt_cmd_info *info, enum blt_cmd_type type)
> +{
> + igt_require_f(info, "No config found for the platform\n");
> +
> + for (int i = 0; i < BLT_CMD_MAX; i++)
> + if (info->supported_tiling[i].blt_cmd_type == type)
> + return &info->supported_tiling[i];
> +
> + return NULL;
> +}
> +
> +static const char *blt_cmd_name(enum blt_cmd_type cmd)
> +{
> + switch (cmd) {
> + case SRC_COPY: return "SRC_COPY_BLT";
> + case XY_SRC_COPY: return "XY_SRC_COPY_BLT";
> + case XY_FAST_COPY: return "XY_FAST_COPY_BLT";
> + case XY_BLOCK_COPY: return "XY_BLOCK_COPY_BLT";
> + }
> +
> + return NULL;
> +}
> +
> +const char *blt_tiling_name(enum tiling_type tiling)
> +{
> + switch (tiling) {
> + case T_LINEAR: return "linear";
> + case T_XMAJOR: return "xmajor";
> + case T_YMAJOR: return "ymajor";
> + case T_TILE4: return "tile4";
> + case T_TILE64: return "tile64";
> + case T_YFMAJOR: return "yfmajor";
> + }
> +
> + return NULL;
> +}
> +
> +static bool blt_cmd_supports_tiling(int i915, enum blt_cmd_type type, enum tiling_type tiling)
> +{
> + uint16_t devid = intel_get_drm_devid(i915);
> + struct blt_cmd_info const *info = get_blt_cmd_config(devid);
> + struct blt_tiling_info const *tile_config = get_tiling_config(info, type);
> +
> + /* no config means no support for that tiling */
> + if (!tile_config)
> + return false;
> +
> + return tile_config->supported_tiling & tiling;
> +}
> +
> +bool block_copy_supports_tiling(int i915, enum tiling_type tiling)
> +{
> + return blt_cmd_supports_tiling(i915, XY_BLOCK_COPY, tiling);
> +}
> +
> +bool fast_copy_supports_tiling(int i915, enum tiling_type tiling)
> +{
> + return blt_cmd_supports_tiling(i915, XY_FAST_COPY, tiling);
> +}
> +
> +bool xy_src_copy_supports_tiling(int i915, enum tiling_type tiling)
> +{
> + return blt_cmd_supports_tiling(i915, XY_SRC_COPY, tiling);
> +}
> +
> +bool src_copy_supports_tiling(int i915, enum tiling_type tiling)
> +{
> + return blt_cmd_supports_tiling(i915, SRC_COPY, tiling);
> +}
> +
> +static bool blt_supports_command(int i915, enum blt_cmd_type type)
> +{
> + uint16_t devid = intel_get_drm_devid(i915);
> + struct blt_cmd_info const *info = get_blt_cmd_config(devid);
> +
> + igt_require_f(info, "No config found for the platform\n");
> +
> + return info->supported_blt_cmds & type;
> +}
> +
> +/*
> + * A general check per platform. As the block copy support is defined per engine,
> + * the more detailed check should use gem_engine_can_block_copy()
> + */
> +bool can_block_copy(int i915)
> +{
> + return blt_supports_command(i915, XY_BLOCK_COPY);
> +}
> +
> +bool can_fast_copy(int i915)
> +{
> + return blt_supports_command(i915, XY_FAST_COPY);
> +}
> +
> +bool can_xy_src_copy(int i915)
> +{
> + return blt_supports_command(i915, XY_SRC_COPY);
> +}
> +
> +bool can_src_copy(int i915)
> +{
> + /* quickly rule out higher gens */
> + if (intel_gen(intel_get_drm_devid(i915)) > 8)
> + return false;
> +
> + return blt_supports_command(i915, SRC_COPY);
> +}
> +
> +/* Info dump functions */
> +static void append_tile(uint32_t tile, char *tile_str)
> +{
> + char const *tile_name;
> +
> + if (tile) {
> + tile_name = blt_tiling_name(tile);
> + snprintf(tile_str + strlen(tile_str), strlen(tile_name) + 2, "%s ", tile_name);
> + }
> +}
> +
> +static void get_tiling_info(struct blt_cmd_info const *info, enum blt_cmd_type type, char *tile_str)
> +{
> + uint32_t mask;
> + struct blt_tiling_info const *tiling = get_tiling_config(info, type);
> +
> + if (tiling) {
> + for (int i = 0; i < T_MAX_SHIFT; i++) {
> + mask = 1 << i;
> + append_tile(tiling->supported_tiling & mask, tile_str);
> + }
> + }
> +
> + tile_str[strlen(tile_str) - 1] = '\0';
> +}
> +
> +static const char *extract_cmd(const struct blt_cmd_info *info, uint32_t mask)
> +{
> + return blt_cmd_name(info->supported_blt_cmds & mask);
> +}
> +
> +void dump_devid_blt_info(uint16_t devid)
> +{
> + uint32_t cmd_mask;
> + char tiling_str[TILE_STR_MAX];
> + char ln_str[BLT_STR_MAX];
> + char const *blt_type_str;
> + const char *ln_intro = " * ";
> + struct blt_cmd_info const *info;
> +
> + info = get_blt_cmd_config(devid);
> +
> + if (!info) {
> + igt_warn("No config available\n");
> + return;
> + }
> +
> + igt_info("Supported blitter commands:\n");
> +
> + for (int i = 0; i < BLT_CMD_MAX; i++) {
> + cmd_mask = 1 << i;
> + blt_type_str = extract_cmd(info, cmd_mask);
> +
> + if (blt_type_str) {
> + memset(ln_str, '\0', sizeof(char) * BLT_STR_MAX);
> + memset(tiling_str, '\0', sizeof(char) * TILE_STR_MAX);
> +
> + snprintf(ln_str,
> + strlen(ln_intro) + strlen(blt_type_str) + 1,
> + "%s%s", ln_intro, blt_type_str);
> +
> + get_tiling_info(info, cmd_mask, tiling_str);
> +
> + snprintf(ln_str + strlen(ln_str),
> + strlen(tiling_str) + 5,
> + " [%s]", tiling_str);
> +
> + igt_info("%s\n", ln_str);
> + }
> + }
> +}
> +
> +void dump_current_blt_info(int i915)
> +{
> + dump_devid_blt_info(intel_get_drm_devid(i915));
> +}
> diff --git a/lib/i915/blt_tiling.h b/lib/i915/blt_tiling.h
> new file mode 100644
> index 00000000..44ef45ca
> --- /dev/null
> +++ b/lib/i915/blt_tiling.h
> @@ -0,0 +1,64 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2022 Intel Corporation
> + */
> +
> +#ifndef BLT_TILING_H
> +#define BLT_TILING_H
> +
> +#include "igt.h"
> +
> +#define BLT_CMD_MAX 3
> +#define T_MAX_SHIFT 6
> +#define PLATFORMS_MAX 5
> +
> +enum tiling_type {
> + T_LINEAR = (1),
> + T_XMAJOR = (1 << 1),
> + T_YMAJOR = (1 << 2),
> + T_TILE4 = (1 << 3),
> + T_TILE64 = (1 << 4),
> + T_YFMAJOR = (1 << 5),
> +};
> +
> +#define for_each_tiling(__tiling) \
> + for (__tiling = T_LINEAR; __tiling <= T_YFMAJOR; __tiling = __tiling << 1)
> +
> +enum blt_cmd_type {
> + SRC_COPY = (1),
> + XY_SRC_COPY = (1 << 1),
> + XY_FAST_COPY = (1 << 2),
> + XY_BLOCK_COPY = (1 << 3),
> +};
> +
> +struct blt_tiling_info {
> + enum blt_cmd_type blt_cmd_type;
> + uint32_t supported_tiling;
> +};
> +
> +struct blt_cmd_info {
> + uint32_t supported_blt_cmds;
> + struct blt_tiling_info supported_tiling[BLT_CMD_MAX];
> + uint32_t cmd_num;
> +
> + uint32_t gen_min;
> + uint32_t gen_max;
> +
> + bool (*matches_platform)(uint16_t devid);
> +};
> +
> +void dump_current_blt_info(int i915);
> +void dump_devid_blt_info(uint16_t devid);
> +
> +bool can_block_copy(int i915);
> +bool can_fast_copy(int i915);
> +bool can_xy_src_copy(int i915);
> +bool can_src_copy(int i915);
> +
> +bool block_copy_supports_tiling(int i915, enum tiling_type tiling);
> +bool fast_copy_supports_tiling(int i915, enum tiling_type tiling);
> +bool xy_src_copy_supports_tiling(int i915, enum tiling_type tiling);
> +bool src_copy_supports_tiling(int i915, enum tiling_type tiling);
> +
> +const char *blt_tiling_name(enum tiling_type tiling);
> +#endif // BLT_TILING_H
> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
> index 54193565..9b291862 100644
> --- a/lib/i915/i915_blt.c
> +++ b/lib/i915/i915_blt.c
> @@ -207,59 +207,7 @@ bool blt_supports_compression(int i915)
> return HAS_FLATCCS(devid);
> }
>
> -/**
> - * blt_supports_tiling:
> - * @i915: drm fd
> - * @tiling: tiling id
> - *
> - * Function checks if blitter supports @tiling on @i915 device.
> - *
> - * Returns:
> - * true if it does, false otherwise.
> - */
> -bool blt_supports_tiling(int i915, enum blt_tiling tiling)
> -{
> - uint32_t devid = intel_get_drm_devid(i915);
> -
> - if (tiling == T_XMAJOR) {
> - if (IS_TIGERLAKE(devid) || IS_DG1(devid))
> - return false;
> - else
> - return true;
> - }
> -
> - if (tiling == T_YMAJOR) {
> - if (IS_TIGERLAKE(devid) || IS_DG1(devid))
> - return true;
> - else
> - return false;
> - }
> -
> - return true;
> -}
> -
> -/**
> - * blt_tiling_name:
> - * @tiling: tiling id
> - *
> - * Returns:
> - * name of @tiling passed. Useful to build test names.
> - */
> -const char *blt_tiling_name(enum blt_tiling tiling)
> -{
> - switch (tiling) {
> - case T_LINEAR: return "linear";
> - case T_XMAJOR: return "xmajor";
> - case T_YMAJOR: return "ymajor";
> - case T_TILE4: return "tile4";
> - case T_TILE64: return "tile64";
> - }
> -
> - igt_warn("invalid tiling passed: %d\n", tiling);
> - return NULL;
> -}
> -
> -static int __block_tiling(enum blt_tiling tiling)
> +static int __block_tiling(enum tiling_type tiling)
> {
> switch (tiling) {
> case T_LINEAR: return 0;
> @@ -267,6 +215,9 @@ static int __block_tiling(enum blt_tiling tiling)
> case T_YMAJOR: return 1;
> case T_TILE4: return 2;
> case T_TILE64: return 3;
> + /* type only supported in gen9 fast copy */
> + case T_YFMAJOR:
> + break;
> }
>
> igt_warn("invalid tiling passed: %d\n", tiling);
> @@ -891,13 +842,14 @@ struct gen12_fast_copy_data {
> } dw09;
> };
>
> -static int __fast_tiling(enum blt_tiling tiling)
> +static int __fast_tiling(enum tiling_type tiling)
> {
> switch (tiling) {
> case T_LINEAR: return 0;
> case T_XMAJOR: return 1;
> case T_YMAJOR: return 2;
> case T_TILE4: return 2;
> + case T_YFMAJOR: return 2;
> case T_TILE64: return 3;
> }
> return 0;
> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
> index 34db9bb9..f1cf5408 100644
> --- a/lib/i915/i915_blt.h
> +++ b/lib/i915/i915_blt.h
> @@ -47,6 +47,7 @@
> #include <malloc.h>
> #include "drm.h"
> #include "igt.h"
> +#include "blt_tiling.h"
>
> #define CCS_RATIO 256
>
> @@ -59,14 +60,6 @@ enum blt_color_depth {
> CD_128bit,
> };
>
> -enum blt_tiling {
> - T_LINEAR,
> - T_XMAJOR,
> - T_YMAJOR,
> - T_TILE4,
> - T_TILE64,
> -};
> -
> enum blt_compression {
> COMPRESSION_DISABLED,
> COMPRESSION_ENABLED,
> @@ -83,7 +76,7 @@ struct blt_copy_object {
> uint32_t region;
> uint64_t size;
> uint8_t mocs;
> - enum blt_tiling tiling;
> + enum tiling_type tiling;
> enum blt_compression compression; /* BC only */
> enum blt_compression_type compression_type; /* BC only */
> uint32_t pitch;
> @@ -165,8 +158,7 @@ struct blt_ctrl_surf_copy_data {
> };
>
> bool blt_supports_compression(int i915);
> -bool blt_supports_tiling(int i915, enum blt_tiling tiling);
> -const char *blt_tiling_name(enum blt_tiling tiling);
> +bool blt_supports_tiling(int i915, enum tiling_type tiling);
>
> uint64_t emit_blt_block_copy(int i915,
> uint64_t ahnd,
> diff --git a/lib/meson.build b/lib/meson.build
> index c79e3e95..33c8daad 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -3,6 +3,7 @@ lib_sources = [
> 'dmabuf_sync_file.c',
> 'huc_copy.c',
> 'i915/gem.c',
> + 'i915/blt_tiling.c',
> 'i915/gem_context.c',
> 'i915/gem_create.c',
> 'i915/gem_engine_topology.c',
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index 751f65e6..4c137c94 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -46,7 +46,7 @@ struct test_config {
>
> static void set_object(struct blt_copy_object *obj,
> uint32_t handle, uint64_t size, uint32_t region,
> - uint8_t mocs, enum blt_tiling tiling,
> + uint8_t mocs, enum tiling_type tiling,
> enum blt_compression compression,
> enum blt_compression_type compression_type)
> {
> @@ -108,7 +108,7 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
> static struct blt_copy_object *
> create_object(int i915, uint32_t region,
> uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> - enum blt_tiling tiling,
> + enum tiling_type tiling,
> enum blt_compression compression,
> enum blt_compression_type compression_type,
> bool create_mapping)
> @@ -374,7 +374,7 @@ static void block_copy(int i915,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint32_t region1, uint32_t region2,
> - enum blt_tiling mid_tiling,
> + enum tiling_type mid_tiling,
> const struct test_config *config)
> {
> struct blt_copy_data blt = {};
> @@ -492,7 +492,7 @@ static void block_multicopy(int i915,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint32_t region1, uint32_t region2,
> - enum blt_tiling mid_tiling,
> + enum tiling_type mid_tiling,
> const struct test_config *config)
> {
> struct blt_copy3_data blt3 = {};
> @@ -581,7 +581,7 @@ static const struct {
> const char *suffix;
> void (*copyfn)(int, const intel_ctx_t *,
> const struct intel_execution_engine2 *,
> - uint32_t, uint32_t, enum blt_tiling,
> + uint32_t, uint32_t, enum tiling_type,
> const struct test_config *);
> } copyfns[] = {
> [BLOCK_COPY] = { "", block_copy },
> @@ -596,6 +596,7 @@ static void block_copy_test(int i915,
> {
> struct igt_collection *regions;
> const struct intel_execution_engine2 *e;
> + int tiling;
>
> if (config->compression && !blt_supports_compression(i915))
> return;
> @@ -603,8 +604,8 @@ static void block_copy_test(int i915,
> if (config->inplace && !config->compression)
> return;
>
> - for (int tiling = T_LINEAR; tiling <= T_TILE64; tiling++) {
> - if (!blt_supports_tiling(i915, tiling) ||
> + for_each_tiling(tiling) {
> + if (!block_copy_supports_tiling(i915, tiling) ||
> (param.tiling >= 0 && param.tiling != tiling))
> continue;
>
> @@ -663,7 +664,7 @@ static int opt_handler(int opt, int opt_index, void *data)
> igt_debug("Print surface info: %d\n", param.print_surface_info);
> break;
> case 't':
> - param.tiling = atoi(optarg);
> + param.tiling = 1 << atoi(optarg);
> igt_debug("Tiling: %d\n", param.tiling);
> break;
> case 'W':
> @@ -702,7 +703,7 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> igt_fixture {
> i915 = drm_open_driver(DRIVER_INTEL);
> igt_require_gem(i915);
> - igt_require(AT_LEAST_GEN(intel_get_drm_devid(i915), 12) > 0);
> + igt_require(can_block_copy(i915));
>
> query_info = gem_get_query_memory_regions(i915);
> igt_require(query_info);
> diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
> index 75121d41..8cff35d5 100644
> --- a/tests/i915/gem_lmem_swapping.c
> +++ b/tests/i915/gem_lmem_swapping.c
> @@ -78,7 +78,7 @@ struct object {
>
> static void set_object(struct blt_copy_object *obj,
> uint32_t handle, uint64_t size, uint32_t region,
> - uint8_t mocs, enum blt_tiling tiling,
> + uint8_t mocs, enum tiling_type tiling,
> enum blt_compression compression,
> enum blt_compression_type compression_type)
> {
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/4] lib/i915_blt: Extract init functions for blt_copy_object
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 3/4] lib/i915_blt: Extract init functions for blt_copy_object Karolina Stolarek
@ 2022-12-20 11:51 ` Zbigniew Kempczyński
2022-12-21 13:59 ` Kamil Konieczny
1 sibling, 0 replies; 22+ messages in thread
From: Zbigniew Kempczyński @ 2022-12-20 11:51 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
On Mon, Dec 19, 2022 at 12:49:10PM +0100, Karolina Stolarek wrote:
> gem_ccs and gem_lmem_swapping share a couple of functions. Extract them
> to i915_blt so they are accessible for both tests. Delete local
> definitions.
>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> ---
> Karolina's comment: I'm not convinced it's the best place for them.
> These functions are more specific to the tests
> than lib functions. So, I'd appreciate
> suggestions on where I can move them to.
>
> lib/i915/i915_blt.c | 81 ++++++++++++++++++++++++++++++++++
> lib/i915/i915_blt.h | 22 +++++++++
> tests/i915/gem_ccs.c | 81 ----------------------------------
> tests/i915/gem_lmem_swapping.c | 36 ---------------
> 4 files changed, 103 insertions(+), 117 deletions(-)
>
> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
> index 2513dfc0..0f9f7265 100644
> --- a/lib/i915/i915_blt.c
> +++ b/lib/i915/i915_blt.c
> @@ -1053,6 +1053,87 @@ int blt_fast_copy(int i915,
> return ret;
> }
>
> +void set_geom(struct blt_copy_object *obj, uint32_t pitch,
> + int16_t x1, int16_t y1, int16_t x2, int16_t y2,
> + uint16_t x_offset, uint16_t y_offset)
> +{
> + obj->pitch = pitch;
> + obj->x1 = x1;
> + obj->y1 = y1;
> + obj->x2 = x2;
> + obj->y2 = y2;
> + obj->x_offset = x_offset;
> + obj->y_offset = y_offset;
> +}
> +
> +void set_batch(struct blt_copy_batch *batch,
> + uint32_t handle, uint64_t size, uint32_t region)
> +{
> + batch->handle = handle;
> + batch->size = size;
> + batch->region = region;
> +}
> +
> +struct blt_copy_object *
> +create_object(int i915, uint32_t region,
> + uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> + enum tiling_type tiling,
> + enum blt_compression compression,
> + enum blt_compression_type compression_type,
> + bool create_mapping)
> +{
> + struct blt_copy_object *obj;
> + uint64_t size = width * height * bpp / 8;
> + uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
> + uint32_t handle;
> +
> + obj = calloc(1, sizeof(*obj));
> +
> + obj->size = size;
> + igt_assert(__gem_create_in_memory_regions(i915, &handle,
> + &size, region) == 0);
> +
> + set_object(obj, handle, size, region, mocs, tiling,
> + compression, compression_type);
> + set_geom(obj, stride, 0, 0, width, height, 0, 0);
> +
> + if (create_mapping)
> + obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
> + PROT_READ | PROT_WRITE);
> +
> + return obj;
> +}
> +
> +void destroy_object(int i915, struct blt_copy_object *obj)
> +{
> + if (obj->ptr)
> + munmap(obj->ptr, obj->size);
> +
> + gem_close(i915, obj->handle);
> + free(obj);
> +}
> +
> +void set_object(struct blt_copy_object *obj,
> + uint32_t handle, uint64_t size, uint32_t region,
> + uint8_t mocs, enum tiling_type tiling,
> + enum blt_compression compression,
> + enum blt_compression_type compression_type)
> +{
> + obj->handle = handle;
> + obj->size = size;
> + obj->region = region;
> + obj->mocs = mocs;
> + obj->tiling = tiling;
> + obj->compression = compression;
> + obj->compression_type = compression_type;
> +}
> +
> +void set_blt_object(struct blt_copy_object *obj,
> + const struct blt_copy_object *orig)
> +{
> + memcpy(obj, orig, sizeof(*obj));
> +}
> +
I would add some prefix, set_geom() to blt_set_geom(), etc. to minimize
risk of name collision.
But yes, I agree extracting this from test to library makes sense.
--
Zbigniew
> /**
> * blt_surface_fill_rect:
> * @i915: drm fd
> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
> index f1cf5408..1ef459c8 100644
> --- a/lib/i915/i915_blt.h
> +++ b/lib/i915/i915_blt.h
> @@ -198,6 +198,28 @@ int blt_fast_copy(int i915,
> uint64_t ahnd,
> const struct blt_copy_data *blt);
>
> +void set_geom(struct blt_copy_object *obj, uint32_t pitch,
> + int16_t x1, int16_t y1, int16_t x2, int16_t y2,
> + uint16_t x_offset, uint16_t y_offset);
> +void set_batch(struct blt_copy_batch *batch,
> + uint32_t handle, uint64_t size, uint32_t region);
> +
> +struct blt_copy_object *
> +create_object(int i915, uint32_t region,
> + uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> + enum tiling_type tiling,
> + enum blt_compression compression,
> + enum blt_compression_type compression_type,
> + bool create_mapping);
> +void destroy_object(int i915, struct blt_copy_object *obj);
> +void set_object(struct blt_copy_object *obj,
> + uint32_t handle, uint64_t size, uint32_t region,
> + uint8_t mocs, enum tiling_type tiling,
> + enum blt_compression compression,
> + enum blt_compression_type compression_type);
> +void set_blt_object(struct blt_copy_object *obj,
> + const struct blt_copy_object *orig);
> +
> void blt_surface_info(const char *info,
> const struct blt_copy_object *obj);
> void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index 4c137c94..30ee60fd 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -44,42 +44,6 @@ struct test_config {
> bool suspend_resume;
> };
>
> -static void set_object(struct blt_copy_object *obj,
> - uint32_t handle, uint64_t size, uint32_t region,
> - uint8_t mocs, enum tiling_type tiling,
> - enum blt_compression compression,
> - enum blt_compression_type compression_type)
> -{
> - obj->handle = handle;
> - obj->size = size;
> - obj->region = region;
> - obj->mocs = mocs;
> - obj->tiling = tiling;
> - obj->compression = compression;
> - obj->compression_type = compression_type;
> -}
> -
> -static void set_geom(struct blt_copy_object *obj, uint32_t pitch,
> - int16_t x1, int16_t y1, int16_t x2, int16_t y2,
> - uint16_t x_offset, uint16_t y_offset)
> -{
> - obj->pitch = pitch;
> - obj->x1 = x1;
> - obj->y1 = y1;
> - obj->x2 = x2;
> - obj->y2 = y2;
> - obj->x_offset = x_offset;
> - obj->y_offset = y_offset;
> -}
> -
> -static void set_batch(struct blt_copy_batch *batch,
> - uint32_t handle, uint64_t size, uint32_t region)
> -{
> - batch->handle = handle;
> - batch->size = size;
> - batch->region = region;
> -}
> -
> static void set_object_ext(struct blt_block_copy_object_ext *obj,
> uint8_t compression_format,
> uint16_t surface_width, uint16_t surface_height,
> @@ -105,51 +69,6 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
> obj->access_type = access_type;
> }
>
> -static struct blt_copy_object *
> -create_object(int i915, uint32_t region,
> - uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> - enum tiling_type tiling,
> - enum blt_compression compression,
> - enum blt_compression_type compression_type,
> - bool create_mapping)
> -{
> - struct blt_copy_object *obj;
> - uint64_t size = width * height * bpp / 8;
> - uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
> - uint32_t handle;
> -
> - obj = calloc(1, sizeof(*obj));
> -
> - obj->size = size;
> - igt_assert(__gem_create_in_memory_regions(i915, &handle,
> - &size, region) == 0);
> -
> - set_object(obj, handle, size, region, mocs, tiling,
> - compression, compression_type);
> - set_geom(obj, stride, 0, 0, width, height, 0, 0);
> -
> - if (create_mapping)
> - obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
> - PROT_READ | PROT_WRITE);
> -
> - return obj;
> -}
> -
> -static void destroy_object(int i915, struct blt_copy_object *obj)
> -{
> - if (obj->ptr)
> - munmap(obj->ptr, obj->size);
> -
> - gem_close(i915, obj->handle);
> - free(obj);
> -}
> -
> -static void set_blt_object(struct blt_copy_object *obj,
> - const struct blt_copy_object *orig)
> -{
> - memcpy(obj, orig, sizeof(*obj));
> -}
> -
> #define PRINT_SURFACE_INFO(name, obj) do { \
> if (param.print_surface_info) \
> blt_surface_info((name), (obj)); } while (0)
> diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
> index 8cff35d5..746fbf80 100644
> --- a/tests/i915/gem_lmem_swapping.c
> +++ b/tests/i915/gem_lmem_swapping.c
> @@ -76,42 +76,6 @@ struct object {
> struct blt_copy_object *blt_obj;
> };
>
> -static void set_object(struct blt_copy_object *obj,
> - uint32_t handle, uint64_t size, uint32_t region,
> - uint8_t mocs, enum tiling_type tiling,
> - enum blt_compression compression,
> - enum blt_compression_type compression_type)
> -{
> - obj->handle = handle;
> - obj->size = size;
> - obj->region = region;
> - obj->mocs = mocs;
> - obj->tiling = tiling;
> - obj->compression = compression;
> - obj->compression_type = compression_type;
> -}
> -
> -static void set_geom(struct blt_copy_object *obj, uint32_t pitch,
> - int16_t x1, int16_t y1, int16_t x2, int16_t y2,
> - uint16_t x_offset, uint16_t y_offset)
> -{
> - obj->pitch = pitch;
> - obj->x1 = x1;
> - obj->y1 = y1;
> - obj->x2 = x2;
> - obj->y2 = y2;
> - obj->x_offset = x_offset;
> - obj->y_offset = y_offset;
> -}
> -
> -static void set_batch(struct blt_copy_batch *batch,
> - uint32_t handle, uint64_t size, uint32_t region)
> -{
> - batch->handle = handle;
> - batch->size = size;
> - batch->region = region;
> -}
> -
> static void set_object_ext(struct blt_block_copy_object_ext *obj,
> uint8_t compression_format,
> uint16_t surface_width, uint16_t surface_height,
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [igt-dev] ✗ Fi.CI.IGT: failure for Introduce blt_cmd_info struct
2022-12-20 8:11 ` Karolina Stolarek
@ 2022-12-20 12:09 ` Yedireswarapu, SaiX Nandan
0 siblings, 0 replies; 22+ messages in thread
From: Yedireswarapu, SaiX Nandan @ 2022-12-20 12:09 UTC (permalink / raw)
To: Stolarek, Karolina, igt-dev@lists.freedesktop.org
Cc: Naramasetti, LaxminarayanaX, Veesam, RavitejaX,
Illipilli, TejasreeX
Hi,
Issue re-reported, https://patchwork.freedesktop.org/series/112055/
Thanks,
Y Sai Nandan
-----Original Message-----
From: Stolarek, Karolina <karolina.stolarek@intel.com>
Sent: Tuesday, December 20, 2022 1:41 PM
To: igt-dev@lists.freedesktop.org
Cc: Yedireswarapu, SaiX Nandan <saix.nandan.yedireswarapu@intel.com>
Subject: Re: ✗ Fi.CI.IGT: failure for Introduce blt_cmd_info struct
On 20.12.2022 04:12, Patchwork wrote:
> *Patch Details*
> *Series:* Introduce blt_cmd_info struct
> *URL:* https://patchwork.freedesktop.org/series/112055/
> <https://patchwork.freedesktop.org/series/112055/>
> *State:* failure
> *Details:*
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html>
>
>
> CI Bug Log - changes from IGT_7099_full -> IGTPW_8246_full
>
>
> Summary
>
> *FAILURE*
>
> Serious unknown changes coming with IGTPW_8246_full absolutely need to
> be verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in IGTPW_8246_full, please notify your bug team to allow
> them to document this new failure mode, which will reduce false positives in CI.
>
> External URL:
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
>
>
> Participating hosts (11 -> 10)
>
> Missing (1): shard-dg10
>
>
> Possible new issues
>
> Here are the unknown changes that may have been introduced in
> IGTPW_8246_full:
>
>
> IGT changes
>
>
> Possible regressions
>
> * igt@i915_pm_rc6_residency@rc6-idle@vcs0:
> o shard-glk: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk9/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html>
> -> FAIL
>
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk7/igt@i9
> 15_pm_rc6_residency@rc6-idle@vcs0.html>
>
Not related to my changes.
Thanks,
Karolina
> Suppressed
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
> *
>
> {igt@gem_ccs@block-multicopy-compressed}:
>
> o {shard-tglu}: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-7/igt@gem_ccs@block-multicopy-compressed.html>
> *
>
> igt@i915_selftest@live@gem_contexts:
>
> o {shard-rkl}: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@i915_selftest@live@gem_contexts.html>
> -> INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-3/igt@i915_selftest@live@gem_contexts.html>
> *
>
> igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_dg2_rc_ccs_cc:
>
> o {shard-tglu-10}: NOTRUN -> INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-10/igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_dg2_rc_ccs_cc.html>
> *
>
> igt@perf_pmu@most-busy-idle-check-all@rcs0:
>
> o {shard-dg1}: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-13/igt@perf_pmu@most-busy-idle-check-all@rcs0.html>
> -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-13/igt@perf_pmu@most-busy-idle-check-all@rcs0.html>
> *
>
> {igt@vc4/vc4_tiling@get-bad-flags}:
>
> o {shard-rkl}: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@vc4/vc4_tiling@get-bad-flags.html>
> +5 similar issues
> *
>
> {igt@vc4/vc4_tiling@set-bad-handle}:
>
> o {shard-dg1}: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-13/igt@vc4/vc4_tiling@set-bad-handle.html>
> +5 similar issues
>
>
> New tests
>
> New tests have been introduced between IGT_7099_full and IGTPW_8246_full:
>
>
> New IGT tests (18)
>
> *
>
> igt@gem_exercise_blt@fast-copy:
>
> o Statuses : 1 skip(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@linear-lmem0-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@linear-lmem0-smem:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@linear-smem-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@linear-smem-smem:
>
> o Statuses : 5 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile4-lmem0-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile4-lmem0-smem:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile4-smem-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile4-smem-smem:
>
> o Statuses : 3 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile64-lmem0-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile64-lmem0-smem:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile64-smem-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@tile64-smem-smem:
>
> o Statuses : 5 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@yfmajor-smem-smem:
>
> o Statuses : 2 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@ymajor-lmem0-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@ymajor-lmem0-smem:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@ymajor-smem-lmem0:
>
> o Statuses : 1 pass(s)
> o Exec time: [0.0] s
> *
>
> igt@gem_exercise_blt@fast-copy@ymajor-smem-smem:
>
> o Statuses : 5 pass(s)
> o Exec time: [0.0] s
>
>
> Known issues
>
> Here are the changes found in IGTPW_8246_full that come from known issues:
>
>
> IGT changes
>
>
> Issues hit
>
> *
>
> igt@gem_caching@read-writes:
>
> o shard-apl: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl1/igt@gem_caching@read-writes.html>
> -> INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@gem_caching@read-writes.html>
> (i915#7708 <https://gitlab.freedesktop.org/drm/intel/issues/7708>)
> *
>
> igt@gem_ctx_persistence@legacy-engines-hostile-preempt:
>
> o shard-snb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb2/igt@gem_ctx_persistence@legacy-engines-hostile-preempt.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#1099
> <https://gitlab.freedesktop.org/drm/intel/issues/1099>) +1
> similar issue
> *
>
> igt@gem_lmem_swapping@heavy-verify-random-ccs:
>
> o
>
> shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@gem_lmem_swapping@heavy-verify-random-ccs.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#4613
> <https://gitlab.freedesktop.org/drm/intel/issues/4613>)
>
> o
>
> shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk5/igt@gem_lmem_swapping@heavy-verify-random-ccs.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#4613
> <https://gitlab.freedesktop.org/drm/intel/issues/4613>)
>
> *
>
> igt@gem_render_copy@x-tiled-to-vebox-yf-tiled:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +117
> similar issues
> *
>
> igt@gem_userptr_blits@dmabuf-sync:
>
> o
>
> shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@gem_userptr_blits@dmabuf-sync.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#3323
> <https://gitlab.freedesktop.org/drm/intel/issues/3323>)
>
> o
>
> shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk2/igt@gem_userptr_blits@dmabuf-sync.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#3323
> <https://gitlab.freedesktop.org/drm/intel/issues/3323>)
>
> *
>
> igt@gem_userptr_blits@input-checking:
>
> o shard-apl: NOTRUN -> DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@gem_userptr_blits@input-checking.html>
> (i915#4991 <https://gitlab.freedesktop.org/drm/intel/issues/4991>)
> *
>
> igt@i915_pm_rps@engine-order:
>
> o shard-apl: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl3/igt@i915_pm_rps@engine-order.html>
> -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@i915_pm_rps@engine-order.html>
> (i915#6537 <https://gitlab.freedesktop.org/drm/intel/issues/6537>)
> *
>
> igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
>
> o shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk9/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#3886
> <https://gitlab.freedesktop.org/drm/intel/issues/3886>) +2
> similar issues
> *
>
> igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl3/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#3886
> <https://gitlab.freedesktop.org/drm/intel/issues/3886>) +3
> similar issues
> *
>
> igt@kms_chamelium@dp-crc-single:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl7/igt@kms_chamelium@dp-crc-single.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> fdo#111827
> <https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +8
> similar issues
> *
>
> igt@kms_chamelium@hdmi-cmp-planar-formats:
>
> o
>
> shard-snb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb5/igt@kms_chamelium@hdmi-cmp-planar-formats.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> fdo#111827
> <https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +1
> similar issue
>
> o
>
> shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk3/igt@kms_chamelium@hdmi-cmp-planar-formats.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> fdo#111827
> <https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +1
> similar issue
>
> *
>
> igt@kms_content_protection@atomic@pipe-a-dp-1:
>
> o shard-apl: NOTRUN -> TIMEOUT
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@kms_content_protection@atomic@pipe-a-dp-1.html>
> (i915#7173 <https://gitlab.freedesktop.org/drm/intel/issues/7173>)
> *
>
> igt@kms_dsc@dsc-with-bpc-formats:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@kms_dsc@dsc-with-bpc-formats.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#7205 <https://gitlab.freedesktop.org/drm/intel/issues/7205>)
> *
>
> igt@kms_fbcon_fbt@fbc-suspend:
>
> o shard-apl: NOTRUN -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@kms_fbcon_fbt@fbc-suspend.html>
> (i915#4767 <https://gitlab.freedesktop.org/drm/intel/issues/4767>)
> *
>
> igt@kms_flip@2x-blocking-wf_vblank@bc-hdmi-a1-hdmi-a2:
>
> o shard-glk: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk8/igt@kms_flip@2x-blocking-wf_vblank@bc-hdmi-a1-hdmi-a2.html>
> -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk4/igt@kms_flip@2x-blocking-wf_vblank@bc-hdmi-a1-hdmi-a2.html>
> (i915#2122 <https://gitlab.freedesktop.org/drm/intel/issues/2122>)
> *
>
> igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
>
> o shard-snb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +86
> similar issues
> *
>
> igt@kms_psr2_sf@cursor-plane-update-sf:
>
> o shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk4/igt@kms_psr2_sf@cursor-plane-update-sf.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#658
> <https://gitlab.freedesktop.org/drm/intel/issues/658>)
> *
>
> igt@kms_psr2_sf@plane-move-sf-dmg-area:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@kms_psr2_sf@plane-move-sf-dmg-area.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#658
> <https://gitlab.freedesktop.org/drm/intel/issues/658>) +2
> similar issues
> *
>
> igt@kms_vrr@negative-basic:
>
> o shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk2/igt@kms_vrr@negative-basic.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +38
> similar issues
> *
>
> igt@sysfs_clients@fair-1:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl2/igt@sysfs_clients@fair-1.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#2994
> <https://gitlab.freedesktop.org/drm/intel/issues/2994>) +2
> similar issues
> *
>
> igt@sysfs_clients@split-10:
>
> o shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk9/igt@sysfs_clients@split-10.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#2994
> <https://gitlab.freedesktop.org/drm/intel/issues/2994>)
>
>
> Possible fixes
>
> *
>
> igt@core_hotunplug@unbind-rebind:
>
> o shard-snb: DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-snb2/igt@core_hotunplug@unbind-rebind.html>
> (i915#4528
> <https://gitlab.freedesktop.org/drm/intel/issues/4528>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb2/igt@core_hotunplug@unbind-rebind.html>
> *
>
> igt@fbdev@read:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-4/igt@fbdev@read.html>
> (i915#2582
> <https://gitlab.freedesktop.org/drm/intel/issues/2582>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@fbdev@read.html>
> *
>
> igt@gem_ctx_exec@basic-nohangcheck:
>
> o {shard-rkl}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_ctx_exec@basic-nohangcheck.html>
> (i915#6268
> <https://gitlab.freedesktop.org/drm/intel/issues/6268>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-4/igt@gem_ctx_exec@basic-nohangcheck.html>
> *
>
> igt@gem_ctx_isolation@preservation-s3@bcs0:
>
> o {shard-rkl}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_ctx_isolation@preservation-s3@bcs0.html>
> (i915#7673
> <https://gitlab.freedesktop.org/drm/intel/issues/7673>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_ctx_isolation@preservation-s3@bcs0.html>
> +3 similar issues
> *
>
> igt@gem_ctx_persistence@engines-hang@bcs0:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@gem_ctx_persistence@engines-hang@bcs0.html>
> (i915#6252
> <https://gitlab.freedesktop.org/drm/intel/issues/6252>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-3/igt@gem_ctx_persistence@engines-hang@bcs0.html>
> *
>
> igt@gem_eio@in-flight-suspend:
>
> o {shard-rkl}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@gem_eio@in-flight-suspend.html>
> -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-1/igt@gem_eio@in-flight-suspend.html>
> *
>
> igt@gem_exec_fair@basic-deadline:
>
> o {shard-rkl}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html>
> (i915#2846
> <https://gitlab.freedesktop.org/drm/intel/issues/2846>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_exec_fair@basic-deadline.html>
> *
>
> igt@gem_exec_fair@basic-pace-share@rcs0:
>
> o
>
> shard-glk: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk2/igt@gem_exec_fair@basic-pace-share@rcs0.html>
> (i915#2842
> <https://gitlab.freedesktop.org/drm/intel/issues/2842>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html>
> +4 similar issues
>
> o
>
> shard-apl: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl2/igt@gem_exec_fair@basic-pace-share@rcs0.html>
> (i915#2842
> <https://gitlab.freedesktop.org/drm/intel/issues/2842>) -> PASS
>
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl8/igt@ge
> m_exec_fair@basic-pace-share@rcs0.html>
>
> *
>
> igt@gem_exec_reloc@basic-gtt-wc-noreloc:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-4/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html>
> (i915#3281
> <https://gitlab.freedesktop.org/drm/intel/issues/3281>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html>
> +6 similar issues
> *
>
> igt@gem_mmap_gtt@coherency:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_mmap_gtt@coherency.html>
> (fdo#111656
> <https://bugs.freedesktop.org/show_bug.cgi?id=111656>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_mmap_gtt@coherency.html>
> *
>
> igt@gem_mmap_gtt@hang-user:
>
> o
>
> shard-glk: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk1/igt@gem_mmap_gtt@hang-user.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) -> PASS
>
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk3/igt@ge
> m_mmap_gtt@hang-user.html>
>
> o
>
> shard-apl: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl6/igt@gem_mmap_gtt@hang-user.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) -> PASS
>
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@ge
> m_mmap_gtt@hang-user.html>
>
> *
>
> igt@gem_partial_pwrite_pread@writes-after-reads:
>
> o shard-apl: INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl2/igt@gem_partial_pwrite_pread@writes-after-reads.html>
> (i915#7708
> <https://gitlab.freedesktop.org/drm/intel/issues/7708>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl6/igt@gem_partial_pwrite_pread@writes-after-reads.html>
> +1 similar issue
> *
>
> igt@gem_pread@snoop:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@gem_pread@snoop.html>
> (i915#3282
> <https://gitlab.freedesktop.org/drm/intel/issues/3282>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gem_pread@snoop.html>
> +2 similar issues
> *
>
> igt@gem_softpin@noreloc-s3:
>
> o {shard-rkl}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@gem_softpin@noreloc-s3.html>
> (fdo#103375
> <https://bugs.freedesktop.org/show_bug.cgi?id=103375>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-2/igt@gem_softpin@noreloc-s3.html>
> *
>
> igt@gen9_exec_parse@valid-registers:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-1/igt@gen9_exec_parse@valid-registers.html>
> (i915#2527
> <https://gitlab.freedesktop.org/drm/intel/issues/2527>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-5/igt@gen9_exec_parse@valid-registers.html>
> +2 similar issues
> *
>
> igt@i915_pm_rc6_residency@rc6-idle@vcs0:
>
> o {shard-dg1}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-13/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html>
> (i915#3591
> <https://gitlab.freedesktop.org/drm/intel/issues/3591>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-19/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html>
> +1 similar issue
> *
>
> igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html>
> (i915#1845
> <https://gitlab.freedesktop.org/drm/intel/issues/1845> /
> i915#4098
> <https://gitlab.freedesktop.org/drm/intel/issues/4098>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html>
> +2 similar issues
> *
>
> igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
>
> o {shard-dg1}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-12/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html>
> -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-16/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html>
> *
>
> igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs:
>
> o {shard-tglu}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-tglu-6/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs.html>
> -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-1/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs.html>
> +7 similar issues
> *
>
> igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
>
> o shard-glk: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html>
> (i915#2346
> <https://gitlab.freedesktop.org/drm/intel/issues/2346>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html>
> *
>
> igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2:
>
> o shard-glk: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html>
> (i915#79 <https://gitlab.freedesktop.org/drm/intel/issues/79>)
> -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html>
> *
>
> igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite:
>
> o {shard-tglu}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-tglu-6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html>
> (i915#1849
> <https://gitlab.freedesktop.org/drm/intel/issues/1849>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-tglu-2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html>
> +1 similar issue
> *
>
> igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html>
> (i915#1849
> <https://gitlab.freedesktop.org/drm/intel/issues/1849> /
> i915#4098
> <https://gitlab.freedesktop.org/drm/intel/issues/4098>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html>
> +3 similar issues
> *
>
> igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-vga-1:
>
> o shard-snb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-snb5/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-vga-1.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-snb2/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-vga-1.html>
> *
>
> igt@kms_plane@pixel-format@pipe-b-planes:
>
> o {shard-rkl}: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-rkl-5/igt@kms_plane@pixel-format@pipe-b-planes.html>
> (i915#1849
> <https://gitlab.freedesktop.org/drm/intel/issues/1849> /
> i915#3558
> <https://gitlab.freedesktop.org/drm/intel/issues/3558>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-rkl-6/igt@kms_plane@pixel-format@pipe-b-planes.html>
> +1 similar issue
> *
>
> igt@perf_pmu@busy-idle@vcs0:
>
> o {shard-dg1}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-17/igt@perf_pmu@busy-idle@vcs0.html>
> (i915#4349
> <https://gitlab.freedesktop.org/drm/intel/issues/4349>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-15/igt@perf_pmu@busy-idle@vcs0.html>
> +2 similar issues
> *
>
> igt@sysfs_timeslice_duration@timeout@vecs0:
>
> o {shard-dg1}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-dg1-12/igt@sysfs_timeslice_duration@timeout@vecs0.html>
> (i915#1755
> <https://gitlab.freedesktop.org/drm/intel/issues/1755>) -> PASS
>
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-dg1-18/igt@
> sysfs_timeslice_duration@timeout@vecs0.html>
>
>
> Warnings
>
> * igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1:
> o shard-apl: DMESG-FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7099/shard-apl2/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1.html>
> (IGT#6
> <https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6>) ->
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/shard-apl1/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1.html>
> (i915#4573
> <https://gitlab.freedesktop.org/drm/intel/issues/4573>) +1
> similar issue
>
> {name}: This element is suppressed. This means it is ignored when
> computing the status of the difference (SUCCESS, WARNING, or FAILURE).
>
>
> Build changes
>
> * CI: CI-20190529 -> None
> * IGT: IGT_7099 -> IGTPW_8246
>
> CI-20190529: 20190529
> CI_DRM_12515: 25905f33e9cb1630d94ce04688d5a6c756f96e9d @
> git://anongit.freedesktop.org/gfx-ci/linux
> IGTPW_8246:
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8246/index.html
> IGT_7099: 62e8be3ca2935a079de4fabd4923df58278a9ed0 @
> https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats
2022-12-20 11:49 ` Zbigniew Kempczyński
@ 2022-12-21 9:09 ` Karolina Stolarek
2022-12-21 17:58 ` Kamil Konieczny
1 sibling, 0 replies; 22+ messages in thread
From: Karolina Stolarek @ 2022-12-21 9:09 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: igt-dev
On 20.12.2022 12:49, Zbigniew Kempczyński wrote:
> On Mon, Dec 19, 2022 at 12:49:08PM +0100, Karolina Stolarek wrote:
>> Add structs to describe what blitter commands and tiling formats are
>> supported per platform. Introduce functions that check which blitter
>> commands are supported, update the tests to reflect that change.
>> Use new enum tiling_format in i915_blt lib and block copy tests.
>>
>> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
>> ---
>> lib/i915/blt_tiling.c | 371 +++++++++++++++++++++++++++++++++
>> lib/i915/blt_tiling.h | 64 ++++++
>> lib/i915/i915_blt.c | 60 +-----
>> lib/i915/i915_blt.h | 14 +-
>> lib/meson.build | 1 +
>> tests/i915/gem_ccs.c | 19 +-
>> tests/i915/gem_lmem_swapping.c | 2 +-
>> 7 files changed, 456 insertions(+), 75 deletions(-)
>> create mode 100644 lib/i915/blt_tiling.c
>> create mode 100644 lib/i915/blt_tiling.h
>>
>> diff --git a/lib/i915/blt_tiling.c b/lib/i915/blt_tiling.c
>> new file mode 100644
>> index 00000000..41a3fe25
>> --- /dev/null
>> +++ b/lib/i915/blt_tiling.c
>> @@ -0,0 +1,371 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2022 Intel Corporation
>> + */
>> +
>> +#include "blt_tiling.h"
>> +
>> +#define BLT_STR_MAX 200
>> +#define TILE_STR_MAX 60
>> +
>> +static bool matches_gen12_atsm(uint16_t devid)
>> +{
>> + return IS_DG2(devid) && intel_display_ver(devid) == 0;
>> +}
>> +
>> +static bool matches_gen12_dg2(uint16_t devid)
>> +{
>> + return IS_DG2(devid);
>> +}
>> +
>> +static bool matches_gen12_generic(uint16_t devid)
>> +{
>> + return !(matches_gen12_dg2(devid) || matches_gen12_atsm(devid));
>> +}
>> +
>> +static const struct blt_cmd_info generic_info = {
>> + .gen_max = -1
>> +};
>> +
>> +/* No blitter-specific commands available */
>> +static const struct blt_cmd_info pre_gen6_info = {
>> + .gen_max = 5,
>> +};
>> +
>> +static const struct blt_cmd_info pre_gen8_info = {
>> + .gen_min = 6,
>> + .gen_max = 7,
>> + .cmd_num = 2,
>> + .supported_blt_cmds = SRC_COPY | XY_SRC_COPY,
>> + .supported_tiling = {
>
> If supported_tiling would point to array of pointers you can add
> terminating NULL element. The .cmd_num can be removed and you
> decrease of risk of mistake here.
>
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = SRC_COPY,
>> + .supported_tiling = T_LINEAR
>> + },
>
> You may use array initialization:
>
> [SRC_COPY] = &src_copy,
> [XY_SRC_COPY] = &xy_src_copy
> ...
>
> but SRC_COPY, XY_SRC_COPY, ... better should be contigues, not bitflags.
I really like this idea, especially when coupled with what you proposed
below. Will change the definition of that enum.
> Apart of that some initialization macro would make this code more readable,
> like:
>
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_SRC_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR
>> + }
>
> BLT_INFO(XY_SRC_COPY, T_LINEAR | T_XMAJOR)
>
> and instead of gen_min/gen_max I would just inject this directly to
> intel_device_info.c, like:
>
> .blt_tiling = pre_gen8_info
>
> For render we might reuse same info definition, like:
>
> .render_tiling = pre_gen8_info
>
> or point to separate if there're tiling differences.
You've just proposed a solution to one of my pain points, thanks a lot!
As for .render_tiling, I'll just add .blt_tiling for now. The render
part requires some more analysis, and I don't want to blindly make both
of them point to the same thing when it might not be correct.
Many thanks,
Karolina
> --
> Zbigniew
>
>> + }
>> +};
>> +
>> +static const struct blt_cmd_info gen8_info = {
>> + .gen_min = 8,
>> + .gen_max = 8,
>> + .cmd_num = 1,
>> + .supported_blt_cmds = XY_SRC_COPY,
>> + .supported_tiling = {
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_SRC_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>> + }
>> + }
>> +};
>> +
>> +static const struct blt_cmd_info gen11_info = {
>> + .gen_min = 9,
>> + .gen_max = 11,
>> + .cmd_num = 2,
>> + .supported_blt_cmds = XY_SRC_COPY | XY_FAST_COPY,
>> + .supported_tiling = {
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_SRC_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_FAST_COPY,
>> + .supported_tiling = T_LINEAR | T_YMAJOR | T_YFMAJOR | T_TILE64
>> + }
>> + }
>> +};
>> +
>> +#define GEN12_FIELDS \
>> + .gen_min = 12, \
>> + .gen_max = 12, \
>> + .cmd_num = 3, \
>> + .supported_blt_cmds = XY_SRC_COPY | XY_FAST_COPY | XY_BLOCK_COPY
>> +
>> +static const struct blt_cmd_info gen12_info = {
>> + GEN12_FIELDS,
>> + .matches_platform = matches_gen12_generic,
>> + .supported_tiling = {
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_SRC_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_FAST_COPY,
>> + .supported_tiling = T_LINEAR | T_YMAJOR | T_TILE4 | T_TILE64
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_BLOCK_COPY,
>> + .supported_tiling = T_LINEAR | T_YMAJOR
>> + }
>> + }
>> +};
>> +
>> +static const struct blt_cmd_info gen12_dg2_info = {
>> + GEN12_FIELDS,
>> + .matches_platform = matches_gen12_dg2,
>> + .supported_tiling = {
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_SRC_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_FAST_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_BLOCK_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
>> + }
>> + }
>> +};
>> +
>> +static const struct blt_cmd_info gen12_atsm_info = {
>> + GEN12_FIELDS,
>> + .matches_platform = matches_gen12_atsm,
>> + .supported_tiling = {
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_SRC_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_FAST_COPY,
>> + .supported_tiling = T_LINEAR | T_TILE4 | T_TILE64
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_BLOCK_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
>> + }
>> + }
>> +};
>> +
>> +static const struct blt_cmd_info blt_gen_configs[] = {
>> + pre_gen6_info,
>> + pre_gen8_info,
>> + gen8_info,
>> + gen11_info,
>> + generic_info
>> +};
>> +
>> +static const struct blt_cmd_info blt_devid_configs[] = {
>> + gen12_info,
>> + gen12_dg2_info,
>> + gen12_atsm_info,
>> + generic_info
>> +};
>> +
>> +static const struct blt_cmd_info *get_devid_config(uint16_t devid)
>> +{
>> + for (int i = 0; blt_devid_configs[i].gen_max != -1; i++)
>> + if (blt_devid_configs[i].matches_platform(devid))
>> + return &blt_devid_configs[i];
>> + return NULL;
>> +}
>> +
>> +static const struct blt_cmd_info *get_gen_config(uint16_t devid)
>> +{
>> + unsigned int gen = intel_gen(devid);
>> +
>> + for (int i = 0; blt_gen_configs[i].gen_max != -1; i++)
>> + if (gen >= blt_gen_configs[i].gen_min &&
>> + gen <= blt_gen_configs[i].gen_max)
>> + return &blt_gen_configs[i];
>> + return NULL;
>> +}
>> +
>> +static const struct blt_cmd_info *get_blt_cmd_config(uint16_t devid)
>> +{
>> + if (IS_GEN12(devid))
>> + return get_devid_config(devid);
>> + else
>> + return get_gen_config(devid);
>> +}
>> +
>> +static const struct blt_tiling_info
>> + *get_tiling_config(const struct blt_cmd_info *info, enum blt_cmd_type type)
>> +{
>> + igt_require_f(info, "No config found for the platform\n");
>> +
>> + for (int i = 0; i < BLT_CMD_MAX; i++)
>> + if (info->supported_tiling[i].blt_cmd_type == type)
>> + return &info->supported_tiling[i];
>> +
>> + return NULL;
>> +}
>> +
>> +static const char *blt_cmd_name(enum blt_cmd_type cmd)
>> +{
>> + switch (cmd) {
>> + case SRC_COPY: return "SRC_COPY_BLT";
>> + case XY_SRC_COPY: return "XY_SRC_COPY_BLT";
>> + case XY_FAST_COPY: return "XY_FAST_COPY_BLT";
>> + case XY_BLOCK_COPY: return "XY_BLOCK_COPY_BLT";
>> + }
>> +
>> + return NULL;
>> +}
>> +
>> +const char *blt_tiling_name(enum tiling_type tiling)
>> +{
>> + switch (tiling) {
>> + case T_LINEAR: return "linear";
>> + case T_XMAJOR: return "xmajor";
>> + case T_YMAJOR: return "ymajor";
>> + case T_TILE4: return "tile4";
>> + case T_TILE64: return "tile64";
>> + case T_YFMAJOR: return "yfmajor";
>> + }
>> +
>> + return NULL;
>> +}
>> +
>> +static bool blt_cmd_supports_tiling(int i915, enum blt_cmd_type type, enum tiling_type tiling)
>> +{
>> + uint16_t devid = intel_get_drm_devid(i915);
>> + struct blt_cmd_info const *info = get_blt_cmd_config(devid);
>> + struct blt_tiling_info const *tile_config = get_tiling_config(info, type);
>> +
>> + /* no config means no support for that tiling */
>> + if (!tile_config)
>> + return false;
>> +
>> + return tile_config->supported_tiling & tiling;
>> +}
>> +
>> +bool block_copy_supports_tiling(int i915, enum tiling_type tiling)
>> +{
>> + return blt_cmd_supports_tiling(i915, XY_BLOCK_COPY, tiling);
>> +}
>> +
>> +bool fast_copy_supports_tiling(int i915, enum tiling_type tiling)
>> +{
>> + return blt_cmd_supports_tiling(i915, XY_FAST_COPY, tiling);
>> +}
>> +
>> +bool xy_src_copy_supports_tiling(int i915, enum tiling_type tiling)
>> +{
>> + return blt_cmd_supports_tiling(i915, XY_SRC_COPY, tiling);
>> +}
>> +
>> +bool src_copy_supports_tiling(int i915, enum tiling_type tiling)
>> +{
>> + return blt_cmd_supports_tiling(i915, SRC_COPY, tiling);
>> +}
>> +
>> +static bool blt_supports_command(int i915, enum blt_cmd_type type)
>> +{
>> + uint16_t devid = intel_get_drm_devid(i915);
>> + struct blt_cmd_info const *info = get_blt_cmd_config(devid);
>> +
>> + igt_require_f(info, "No config found for the platform\n");
>> +
>> + return info->supported_blt_cmds & type;
>> +}
>> +
>> +/*
>> + * A general check per platform. As the block copy support is defined per engine,
>> + * the more detailed check should use gem_engine_can_block_copy()
>> + */
>> +bool can_block_copy(int i915)
>> +{
>> + return blt_supports_command(i915, XY_BLOCK_COPY);
>> +}
>> +
>> +bool can_fast_copy(int i915)
>> +{
>> + return blt_supports_command(i915, XY_FAST_COPY);
>> +}
>> +
>> +bool can_xy_src_copy(int i915)
>> +{
>> + return blt_supports_command(i915, XY_SRC_COPY);
>> +}
>> +
>> +bool can_src_copy(int i915)
>> +{
>> + /* quickly rule out higher gens */
>> + if (intel_gen(intel_get_drm_devid(i915)) > 8)
>> + return false;
>> +
>> + return blt_supports_command(i915, SRC_COPY);
>> +}
>> +
>> +/* Info dump functions */
>> +static void append_tile(uint32_t tile, char *tile_str)
>> +{
>> + char const *tile_name;
>> +
>> + if (tile) {
>> + tile_name = blt_tiling_name(tile);
>> + snprintf(tile_str + strlen(tile_str), strlen(tile_name) + 2, "%s ", tile_name);
>> + }
>> +}
>> +
>> +static void get_tiling_info(struct blt_cmd_info const *info, enum blt_cmd_type type, char *tile_str)
>> +{
>> + uint32_t mask;
>> + struct blt_tiling_info const *tiling = get_tiling_config(info, type);
>> +
>> + if (tiling) {
>> + for (int i = 0; i < T_MAX_SHIFT; i++) {
>> + mask = 1 << i;
>> + append_tile(tiling->supported_tiling & mask, tile_str);
>> + }
>> + }
>> +
>> + tile_str[strlen(tile_str) - 1] = '\0';
>> +}
>> +
>> +static const char *extract_cmd(const struct blt_cmd_info *info, uint32_t mask)
>> +{
>> + return blt_cmd_name(info->supported_blt_cmds & mask);
>> +}
>> +
>> +void dump_devid_blt_info(uint16_t devid)
>> +{
>> + uint32_t cmd_mask;
>> + char tiling_str[TILE_STR_MAX];
>> + char ln_str[BLT_STR_MAX];
>> + char const *blt_type_str;
>> + const char *ln_intro = " * ";
>> + struct blt_cmd_info const *info;
>> +
>> + info = get_blt_cmd_config(devid);
>> +
>> + if (!info) {
>> + igt_warn("No config available\n");
>> + return;
>> + }
>> +
>> + igt_info("Supported blitter commands:\n");
>> +
>> + for (int i = 0; i < BLT_CMD_MAX; i++) {
>> + cmd_mask = 1 << i;
>> + blt_type_str = extract_cmd(info, cmd_mask);
>> +
>> + if (blt_type_str) {
>> + memset(ln_str, '\0', sizeof(char) * BLT_STR_MAX);
>> + memset(tiling_str, '\0', sizeof(char) * TILE_STR_MAX);
>> +
>> + snprintf(ln_str,
>> + strlen(ln_intro) + strlen(blt_type_str) + 1,
>> + "%s%s", ln_intro, blt_type_str);
>> +
>> + get_tiling_info(info, cmd_mask, tiling_str);
>> +
>> + snprintf(ln_str + strlen(ln_str),
>> + strlen(tiling_str) + 5,
>> + " [%s]", tiling_str);
>> +
>> + igt_info("%s\n", ln_str);
>> + }
>> + }
>> +}
>> +
>> +void dump_current_blt_info(int i915)
>> +{
>> + dump_devid_blt_info(intel_get_drm_devid(i915));
>> +}
>> diff --git a/lib/i915/blt_tiling.h b/lib/i915/blt_tiling.h
>> new file mode 100644
>> index 00000000..44ef45ca
>> --- /dev/null
>> +++ b/lib/i915/blt_tiling.h
>> @@ -0,0 +1,64 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/*
>> + * Copyright © 2022 Intel Corporation
>> + */
>> +
>> +#ifndef BLT_TILING_H
>> +#define BLT_TILING_H
>> +
>> +#include "igt.h"
>> +
>> +#define BLT_CMD_MAX 3
>> +#define T_MAX_SHIFT 6
>> +#define PLATFORMS_MAX 5
>> +
>> +enum tiling_type {
>> + T_LINEAR = (1),
>> + T_XMAJOR = (1 << 1),
>> + T_YMAJOR = (1 << 2),
>> + T_TILE4 = (1 << 3),
>> + T_TILE64 = (1 << 4),
>> + T_YFMAJOR = (1 << 5),
>> +};
>> +
>> +#define for_each_tiling(__tiling) \
>> + for (__tiling = T_LINEAR; __tiling <= T_YFMAJOR; __tiling = __tiling << 1)
>> +
>> +enum blt_cmd_type {
>> + SRC_COPY = (1),
>> + XY_SRC_COPY = (1 << 1),
>> + XY_FAST_COPY = (1 << 2),
>> + XY_BLOCK_COPY = (1 << 3),
>> +};
>> +
>> +struct blt_tiling_info {
>> + enum blt_cmd_type blt_cmd_type;
>> + uint32_t supported_tiling;
>> +};
>> +
>> +struct blt_cmd_info {
>> + uint32_t supported_blt_cmds;
>> + struct blt_tiling_info supported_tiling[BLT_CMD_MAX];
>> + uint32_t cmd_num;
>> +
>> + uint32_t gen_min;
>> + uint32_t gen_max;
>> +
>> + bool (*matches_platform)(uint16_t devid);
>> +};
>> +
>> +void dump_current_blt_info(int i915);
>> +void dump_devid_blt_info(uint16_t devid);
>> +
>> +bool can_block_copy(int i915);
>> +bool can_fast_copy(int i915);
>> +bool can_xy_src_copy(int i915);
>> +bool can_src_copy(int i915);
>> +
>> +bool block_copy_supports_tiling(int i915, enum tiling_type tiling);
>> +bool fast_copy_supports_tiling(int i915, enum tiling_type tiling);
>> +bool xy_src_copy_supports_tiling(int i915, enum tiling_type tiling);
>> +bool src_copy_supports_tiling(int i915, enum tiling_type tiling);
>> +
>> +const char *blt_tiling_name(enum tiling_type tiling);
>> +#endif // BLT_TILING_H
>> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
>> index 54193565..9b291862 100644
>> --- a/lib/i915/i915_blt.c
>> +++ b/lib/i915/i915_blt.c
>> @@ -207,59 +207,7 @@ bool blt_supports_compression(int i915)
>> return HAS_FLATCCS(devid);
>> }
>>
>> -/**
>> - * blt_supports_tiling:
>> - * @i915: drm fd
>> - * @tiling: tiling id
>> - *
>> - * Function checks if blitter supports @tiling on @i915 device.
>> - *
>> - * Returns:
>> - * true if it does, false otherwise.
>> - */
>> -bool blt_supports_tiling(int i915, enum blt_tiling tiling)
>> -{
>> - uint32_t devid = intel_get_drm_devid(i915);
>> -
>> - if (tiling == T_XMAJOR) {
>> - if (IS_TIGERLAKE(devid) || IS_DG1(devid))
>> - return false;
>> - else
>> - return true;
>> - }
>> -
>> - if (tiling == T_YMAJOR) {
>> - if (IS_TIGERLAKE(devid) || IS_DG1(devid))
>> - return true;
>> - else
>> - return false;
>> - }
>> -
>> - return true;
>> -}
>> -
>> -/**
>> - * blt_tiling_name:
>> - * @tiling: tiling id
>> - *
>> - * Returns:
>> - * name of @tiling passed. Useful to build test names.
>> - */
>> -const char *blt_tiling_name(enum blt_tiling tiling)
>> -{
>> - switch (tiling) {
>> - case T_LINEAR: return "linear";
>> - case T_XMAJOR: return "xmajor";
>> - case T_YMAJOR: return "ymajor";
>> - case T_TILE4: return "tile4";
>> - case T_TILE64: return "tile64";
>> - }
>> -
>> - igt_warn("invalid tiling passed: %d\n", tiling);
>> - return NULL;
>> -}
>> -
>> -static int __block_tiling(enum blt_tiling tiling)
>> +static int __block_tiling(enum tiling_type tiling)
>> {
>> switch (tiling) {
>> case T_LINEAR: return 0;
>> @@ -267,6 +215,9 @@ static int __block_tiling(enum blt_tiling tiling)
>> case T_YMAJOR: return 1;
>> case T_TILE4: return 2;
>> case T_TILE64: return 3;
>> + /* type only supported in gen9 fast copy */
>> + case T_YFMAJOR:
>> + break;
>> }
>>
>> igt_warn("invalid tiling passed: %d\n", tiling);
>> @@ -891,13 +842,14 @@ struct gen12_fast_copy_data {
>> } dw09;
>> };
>>
>> -static int __fast_tiling(enum blt_tiling tiling)
>> +static int __fast_tiling(enum tiling_type tiling)
>> {
>> switch (tiling) {
>> case T_LINEAR: return 0;
>> case T_XMAJOR: return 1;
>> case T_YMAJOR: return 2;
>> case T_TILE4: return 2;
>> + case T_YFMAJOR: return 2;
>> case T_TILE64: return 3;
>> }
>> return 0;
>> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
>> index 34db9bb9..f1cf5408 100644
>> --- a/lib/i915/i915_blt.h
>> +++ b/lib/i915/i915_blt.h
>> @@ -47,6 +47,7 @@
>> #include <malloc.h>
>> #include "drm.h"
>> #include "igt.h"
>> +#include "blt_tiling.h"
>>
>> #define CCS_RATIO 256
>>
>> @@ -59,14 +60,6 @@ enum blt_color_depth {
>> CD_128bit,
>> };
>>
>> -enum blt_tiling {
>> - T_LINEAR,
>> - T_XMAJOR,
>> - T_YMAJOR,
>> - T_TILE4,
>> - T_TILE64,
>> -};
>> -
>> enum blt_compression {
>> COMPRESSION_DISABLED,
>> COMPRESSION_ENABLED,
>> @@ -83,7 +76,7 @@ struct blt_copy_object {
>> uint32_t region;
>> uint64_t size;
>> uint8_t mocs;
>> - enum blt_tiling tiling;
>> + enum tiling_type tiling;
>> enum blt_compression compression; /* BC only */
>> enum blt_compression_type compression_type; /* BC only */
>> uint32_t pitch;
>> @@ -165,8 +158,7 @@ struct blt_ctrl_surf_copy_data {
>> };
>>
>> bool blt_supports_compression(int i915);
>> -bool blt_supports_tiling(int i915, enum blt_tiling tiling);
>> -const char *blt_tiling_name(enum blt_tiling tiling);
>> +bool blt_supports_tiling(int i915, enum tiling_type tiling);
>>
>> uint64_t emit_blt_block_copy(int i915,
>> uint64_t ahnd,
>> diff --git a/lib/meson.build b/lib/meson.build
>> index c79e3e95..33c8daad 100644
>> --- a/lib/meson.build
>> +++ b/lib/meson.build
>> @@ -3,6 +3,7 @@ lib_sources = [
>> 'dmabuf_sync_file.c',
>> 'huc_copy.c',
>> 'i915/gem.c',
>> + 'i915/blt_tiling.c',
>> 'i915/gem_context.c',
>> 'i915/gem_create.c',
>> 'i915/gem_engine_topology.c',
>> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
>> index 751f65e6..4c137c94 100644
>> --- a/tests/i915/gem_ccs.c
>> +++ b/tests/i915/gem_ccs.c
>> @@ -46,7 +46,7 @@ struct test_config {
>>
>> static void set_object(struct blt_copy_object *obj,
>> uint32_t handle, uint64_t size, uint32_t region,
>> - uint8_t mocs, enum blt_tiling tiling,
>> + uint8_t mocs, enum tiling_type tiling,
>> enum blt_compression compression,
>> enum blt_compression_type compression_type)
>> {
>> @@ -108,7 +108,7 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
>> static struct blt_copy_object *
>> create_object(int i915, uint32_t region,
>> uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
>> - enum blt_tiling tiling,
>> + enum tiling_type tiling,
>> enum blt_compression compression,
>> enum blt_compression_type compression_type,
>> bool create_mapping)
>> @@ -374,7 +374,7 @@ static void block_copy(int i915,
>> const intel_ctx_t *ctx,
>> const struct intel_execution_engine2 *e,
>> uint32_t region1, uint32_t region2,
>> - enum blt_tiling mid_tiling,
>> + enum tiling_type mid_tiling,
>> const struct test_config *config)
>> {
>> struct blt_copy_data blt = {};
>> @@ -492,7 +492,7 @@ static void block_multicopy(int i915,
>> const intel_ctx_t *ctx,
>> const struct intel_execution_engine2 *e,
>> uint32_t region1, uint32_t region2,
>> - enum blt_tiling mid_tiling,
>> + enum tiling_type mid_tiling,
>> const struct test_config *config)
>> {
>> struct blt_copy3_data blt3 = {};
>> @@ -581,7 +581,7 @@ static const struct {
>> const char *suffix;
>> void (*copyfn)(int, const intel_ctx_t *,
>> const struct intel_execution_engine2 *,
>> - uint32_t, uint32_t, enum blt_tiling,
>> + uint32_t, uint32_t, enum tiling_type,
>> const struct test_config *);
>> } copyfns[] = {
>> [BLOCK_COPY] = { "", block_copy },
>> @@ -596,6 +596,7 @@ static void block_copy_test(int i915,
>> {
>> struct igt_collection *regions;
>> const struct intel_execution_engine2 *e;
>> + int tiling;
>>
>> if (config->compression && !blt_supports_compression(i915))
>> return;
>> @@ -603,8 +604,8 @@ static void block_copy_test(int i915,
>> if (config->inplace && !config->compression)
>> return;
>>
>> - for (int tiling = T_LINEAR; tiling <= T_TILE64; tiling++) {
>> - if (!blt_supports_tiling(i915, tiling) ||
>> + for_each_tiling(tiling) {
>> + if (!block_copy_supports_tiling(i915, tiling) ||
>> (param.tiling >= 0 && param.tiling != tiling))
>> continue;
>>
>> @@ -663,7 +664,7 @@ static int opt_handler(int opt, int opt_index, void *data)
>> igt_debug("Print surface info: %d\n", param.print_surface_info);
>> break;
>> case 't':
>> - param.tiling = atoi(optarg);
>> + param.tiling = 1 << atoi(optarg);
>> igt_debug("Tiling: %d\n", param.tiling);
>> break;
>> case 'W':
>> @@ -702,7 +703,7 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
>> igt_fixture {
>> i915 = drm_open_driver(DRIVER_INTEL);
>> igt_require_gem(i915);
>> - igt_require(AT_LEAST_GEN(intel_get_drm_devid(i915), 12) > 0);
>> + igt_require(can_block_copy(i915));
>>
>> query_info = gem_get_query_memory_regions(i915);
>> igt_require(query_info);
>> diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
>> index 75121d41..8cff35d5 100644
>> --- a/tests/i915/gem_lmem_swapping.c
>> +++ b/tests/i915/gem_lmem_swapping.c
>> @@ -78,7 +78,7 @@ struct object {
>>
>> static void set_object(struct blt_copy_object *obj,
>> uint32_t handle, uint64_t size, uint32_t region,
>> - uint8_t mocs, enum blt_tiling tiling,
>> + uint8_t mocs, enum tiling_type tiling,
>> enum blt_compression compression,
>> enum blt_compression_type compression_type)
>> {
>> --
>> 2.25.1
>>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/4] lib/i915_blt: Extract init functions for blt_copy_object
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 3/4] lib/i915_blt: Extract init functions for blt_copy_object Karolina Stolarek
2022-12-20 11:51 ` Zbigniew Kempczyński
@ 2022-12-21 13:59 ` Kamil Konieczny
2022-12-22 9:50 ` Karolina Stolarek
1 sibling, 1 reply; 22+ messages in thread
From: Kamil Konieczny @ 2022-12-21 13:59 UTC (permalink / raw)
To: igt-dev
Hi Karolina,
please improve commit description,
imho s/Extract init/Add common/
On 2022-12-19 at 12:49:10 +0100, Karolina Stolarek wrote:
> gem_ccs and gem_lmem_swapping share a couple of functions. Extract them
> to i915_blt so they are accessible for both tests. Delete local
---------------------------------------------------- ^
That sentence is not needed here or if you want you can write
about refactoring (you replaced those functions with lib calls).
> definitions.
>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> ---
> Karolina's comment: I'm not convinced it's the best place for them.
> These functions are more specific to the tests
- ^^^
Please avoid huge empty spaces here.
> than lib functions. So, I'd appreciate
> suggestions on where I can move them to.
>
> lib/i915/i915_blt.c | 81 ++++++++++++++++++++++++++++++++++
> lib/i915/i915_blt.h | 22 +++++++++
> tests/i915/gem_ccs.c | 81 ----------------------------------
> tests/i915/gem_lmem_swapping.c | 36 ---------------
> 4 files changed, 103 insertions(+), 117 deletions(-)
>
> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
> index 2513dfc0..0f9f7265 100644
> --- a/lib/i915/i915_blt.c
> +++ b/lib/i915/i915_blt.c
> @@ -1053,6 +1053,87 @@ int blt_fast_copy(int i915,
> return ret;
> }
>
You need to add descriptions to all lib functions you added.
> +void set_geom(struct blt_copy_object *obj, uint32_t pitch,
------- ^
The name was ok inside test, but in lib imho it's better add
some common prefix, maybe blt_ ? For example:
void blt_set_geom(...params here...
> + int16_t x1, int16_t y1, int16_t x2, int16_t y2,
> + uint16_t x_offset, uint16_t y_offset)
> +{
> + obj->pitch = pitch;
> + obj->x1 = x1;
> + obj->y1 = y1;
> + obj->x2 = x2;
> + obj->y2 = y2;
> + obj->x_offset = x_offset;
> + obj->y_offset = y_offset;
> +}
> +
> +void set_batch(struct blt_copy_batch *batch,
------- ^
> + uint32_t handle, uint64_t size, uint32_t region)
> +{
> + batch->handle = handle;
> + batch->size = size;
> + batch->region = region;
> +}
> +
> +struct blt_copy_object *
> +create_object(int i915, uint32_t region,
------- ^
> + uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> + enum tiling_type tiling,
> + enum blt_compression compression,
> + enum blt_compression_type compression_type,
> + bool create_mapping)
> +{
> + struct blt_copy_object *obj;
> + uint64_t size = width * height * bpp / 8;
> + uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
> + uint32_t handle;
> +
> + obj = calloc(1, sizeof(*obj));
> +
> + obj->size = size;
> + igt_assert(__gem_create_in_memory_regions(i915, &handle,
> + &size, region) == 0);
> +
> + set_object(obj, handle, size, region, mocs, tiling,
> + compression, compression_type);
> + set_geom(obj, stride, 0, 0, width, height, 0, 0);
> +
> + if (create_mapping)
> + obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
> + PROT_READ | PROT_WRITE);
> +
> + return obj;
> +}
> +
> +void destroy_object(int i915, struct blt_copy_object *obj)
------- ^
> +{
> + if (obj->ptr)
> + munmap(obj->ptr, obj->size);
> +
> + gem_close(i915, obj->handle);
> + free(obj);
> +}
> +
> +void set_object(struct blt_copy_object *obj,
------- ^
blt_set_object
> + uint32_t handle, uint64_t size, uint32_t region,
> + uint8_t mocs, enum tiling_type tiling,
> + enum blt_compression compression,
> + enum blt_compression_type compression_type)
> +{
> + obj->handle = handle;
> + obj->size = size;
> + obj->region = region;
> + obj->mocs = mocs;
> + obj->tiling = tiling;
> + obj->compression = compression;
> + obj->compression_type = compression_type;
> +}
> +
> +void set_blt_object(struct blt_copy_object *obj,
------- ^
This will clash with above name blt_set_object ?
Maybe blt_set_copy_object ?
Regards,
Kamil
> + const struct blt_copy_object *orig)
> +{
> + memcpy(obj, orig, sizeof(*obj));
> +}
> +
> /**
> * blt_surface_fill_rect:
> * @i915: drm fd
> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
> index f1cf5408..1ef459c8 100644
> --- a/lib/i915/i915_blt.h
> +++ b/lib/i915/i915_blt.h
> @@ -198,6 +198,28 @@ int blt_fast_copy(int i915,
> uint64_t ahnd,
> const struct blt_copy_data *blt);
>
> +void set_geom(struct blt_copy_object *obj, uint32_t pitch,
> + int16_t x1, int16_t y1, int16_t x2, int16_t y2,
> + uint16_t x_offset, uint16_t y_offset);
> +void set_batch(struct blt_copy_batch *batch,
> + uint32_t handle, uint64_t size, uint32_t region);
> +
> +struct blt_copy_object *
> +create_object(int i915, uint32_t region,
> + uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> + enum tiling_type tiling,
> + enum blt_compression compression,
> + enum blt_compression_type compression_type,
> + bool create_mapping);
> +void destroy_object(int i915, struct blt_copy_object *obj);
> +void set_object(struct blt_copy_object *obj,
> + uint32_t handle, uint64_t size, uint32_t region,
> + uint8_t mocs, enum tiling_type tiling,
> + enum blt_compression compression,
> + enum blt_compression_type compression_type);
> +void set_blt_object(struct blt_copy_object *obj,
> + const struct blt_copy_object *orig);
> +
> void blt_surface_info(const char *info,
> const struct blt_copy_object *obj);
> void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index 4c137c94..30ee60fd 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -44,42 +44,6 @@ struct test_config {
> bool suspend_resume;
> };
>
> -static void set_object(struct blt_copy_object *obj,
> - uint32_t handle, uint64_t size, uint32_t region,
> - uint8_t mocs, enum tiling_type tiling,
> - enum blt_compression compression,
> - enum blt_compression_type compression_type)
> -{
> - obj->handle = handle;
> - obj->size = size;
> - obj->region = region;
> - obj->mocs = mocs;
> - obj->tiling = tiling;
> - obj->compression = compression;
> - obj->compression_type = compression_type;
> -}
> -
> -static void set_geom(struct blt_copy_object *obj, uint32_t pitch,
> - int16_t x1, int16_t y1, int16_t x2, int16_t y2,
> - uint16_t x_offset, uint16_t y_offset)
> -{
> - obj->pitch = pitch;
> - obj->x1 = x1;
> - obj->y1 = y1;
> - obj->x2 = x2;
> - obj->y2 = y2;
> - obj->x_offset = x_offset;
> - obj->y_offset = y_offset;
> -}
> -
> -static void set_batch(struct blt_copy_batch *batch,
> - uint32_t handle, uint64_t size, uint32_t region)
> -{
> - batch->handle = handle;
> - batch->size = size;
> - batch->region = region;
> -}
> -
> static void set_object_ext(struct blt_block_copy_object_ext *obj,
> uint8_t compression_format,
> uint16_t surface_width, uint16_t surface_height,
> @@ -105,51 +69,6 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
> obj->access_type = access_type;
> }
>
> -static struct blt_copy_object *
> -create_object(int i915, uint32_t region,
> - uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> - enum tiling_type tiling,
> - enum blt_compression compression,
> - enum blt_compression_type compression_type,
> - bool create_mapping)
> -{
> - struct blt_copy_object *obj;
> - uint64_t size = width * height * bpp / 8;
> - uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
> - uint32_t handle;
> -
> - obj = calloc(1, sizeof(*obj));
> -
> - obj->size = size;
> - igt_assert(__gem_create_in_memory_regions(i915, &handle,
> - &size, region) == 0);
> -
> - set_object(obj, handle, size, region, mocs, tiling,
> - compression, compression_type);
> - set_geom(obj, stride, 0, 0, width, height, 0, 0);
> -
> - if (create_mapping)
> - obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
> - PROT_READ | PROT_WRITE);
> -
> - return obj;
> -}
> -
> -static void destroy_object(int i915, struct blt_copy_object *obj)
> -{
> - if (obj->ptr)
> - munmap(obj->ptr, obj->size);
> -
> - gem_close(i915, obj->handle);
> - free(obj);
> -}
> -
> -static void set_blt_object(struct blt_copy_object *obj,
> - const struct blt_copy_object *orig)
> -{
> - memcpy(obj, orig, sizeof(*obj));
> -}
> -
> #define PRINT_SURFACE_INFO(name, obj) do { \
> if (param.print_surface_info) \
> blt_surface_info((name), (obj)); } while (0)
> diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
> index 8cff35d5..746fbf80 100644
> --- a/tests/i915/gem_lmem_swapping.c
> +++ b/tests/i915/gem_lmem_swapping.c
> @@ -76,42 +76,6 @@ struct object {
> struct blt_copy_object *blt_obj;
> };
>
> -static void set_object(struct blt_copy_object *obj,
> - uint32_t handle, uint64_t size, uint32_t region,
> - uint8_t mocs, enum tiling_type tiling,
> - enum blt_compression compression,
> - enum blt_compression_type compression_type)
> -{
> - obj->handle = handle;
> - obj->size = size;
> - obj->region = region;
> - obj->mocs = mocs;
> - obj->tiling = tiling;
> - obj->compression = compression;
> - obj->compression_type = compression_type;
> -}
> -
> -static void set_geom(struct blt_copy_object *obj, uint32_t pitch,
> - int16_t x1, int16_t y1, int16_t x2, int16_t y2,
> - uint16_t x_offset, uint16_t y_offset)
> -{
> - obj->pitch = pitch;
> - obj->x1 = x1;
> - obj->y1 = y1;
> - obj->x2 = x2;
> - obj->y2 = y2;
> - obj->x_offset = x_offset;
> - obj->y_offset = y_offset;
> -}
> -
> -static void set_batch(struct blt_copy_batch *batch,
> - uint32_t handle, uint64_t size, uint32_t region)
> -{
> - batch->handle = handle;
> - batch->size = size;
> - batch->region = region;
> -}
> -
> static void set_object_ext(struct blt_block_copy_object_ext *obj,
> uint8_t compression_format,
> uint16_t surface_width, uint16_t surface_height,
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* [igt-dev] ✗ GitLab.Pipeline: warning for Introduce blt_cmd_info struct
2022-12-19 11:49 [igt-dev] [PATCH i-g-t 0/4] Introduce blt_cmd_info struct Karolina Stolarek
` (6 preceding siblings ...)
2022-12-20 11:25 ` [igt-dev] ✓ Fi.CI.IGT: success " Patchwork
@ 2022-12-21 16:56 ` Patchwork
7 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2022-12-21 16:56 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
== Series Details ==
Series: Introduce blt_cmd_info struct
URL : https://patchwork.freedesktop.org/series/112055/
State : warning
== Summary ==
Pipeline status: FAILED.
see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/767402 for the overview.
build:tests-fedora-clang has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/33833368):
ninja: build stopped: subcommand failed.
ninja: Entering directory `build'
[1/1223] Generating version.h with a custom command.
[2/1221] Compiling C object 'lib/76b5a35@@igt-i915_blt_tiling_c@sta/i915_blt_tiling.c.o'.
FAILED: lib/76b5a35@@igt-i915_blt_tiling_c@sta/i915_blt_tiling.c.o
clang -Ilib/76b5a35@@igt-i915_blt_tiling_c@sta -Ilib -I../lib -I../include/drm-uapi -I../include/linux-uapi -I../lib/stubs/syscalls -I. -I../ -I/usr/include/cairo -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -I/usr/include/pixman-1 -I/usr/include/freetype2 -I/usr/include/libpng16 -I/usr/include/libdrm -I/usr/include/libdrm/nouveau -I/usr/include/valgrind -Xclang -fcolor-diagnostics -pipe -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -Wextra -std=gnu11 -O2 -g -D_GNU_SOURCE -include config.h -D_FORTIFY_SOURCE=2 -Wbad-function-cast -Wdeclaration-after-statement -Wformat=2 -Wmissing-declarations -Wmissing-format-attribute -Wmissing-noreturn -Wmissing-prototypes -Wnested-externs -Wold-style-definition -Wpointer-arith -Wredundant-decls -Wshadow -Wstrict-prototypes -Wuninitialized -Wunused -Wno-missing-field-initializers -Wno-pointer-arith -Wno-address-of-packed-member -Wno-sign-compare -Wno-type-limits -Wno-unused-parameter -Wno-unused-result -Werror=address -Werror=array-bounds -Werror=implicit -Werror=init-self -Werror=int-to-pointer-cast -Werror=main -Werror=missing-braces -Werror=nonnull -Werror=pointer-to-int-cast -Werror=return-type -Werror=sequence-point -Werror=trigraphs -Werror=write-strings -fno-builtin-malloc -fno-builtin-calloc -fcommon -fPIC -pthread '-DIGT_DATADIR="/usr/local/share/igt-gpu-tools"' '-DIGT_SRCDIR="/builds/gfx-ci/igt-ci-tags/tests"' '-DIGT_LOG_DOMAIN="i915/blt_tiling"' -MD -MQ 'lib/76b5a35@@igt-i915_blt_tiling_c@sta/i915_blt_tiling.c.o' -MF 'lib/76b5a35@@igt-i915_blt_tiling_c@sta/i915_blt_tiling.c.o.d' -o 'lib/76b5a35@@igt-i915_blt_tiling_c@sta/i915_blt_tiling.c.o' -c ../lib/i915/blt_tiling.c
../lib/i915/blt_tiling.c:146:2: error: initializer element is not a compile-time constant
pre_gen6_info,
^~~~~~~~~~~~~
../lib/i915/blt_tiling.c:154:2: error: initializer element is not a compile-time constant
gen12_info,
^~~~~~~~~~
2 errors generated.
ninja: build stopped: subcommand failed.
section_end:1671640863:step_script
section_start:1671640864:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1671640865:cleanup_file_variables
ERROR: Job failed: exit code 1
== Logs ==
For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/767402
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats
2022-12-20 11:49 ` Zbigniew Kempczyński
2022-12-21 9:09 ` Karolina Stolarek
@ 2022-12-21 17:58 ` Kamil Konieczny
2022-12-22 9:51 ` Karolina Stolarek
1 sibling, 1 reply; 22+ messages in thread
From: Kamil Konieczny @ 2022-12-21 17:58 UTC (permalink / raw)
To: igt-dev
Hi,
On 2022-12-20 at 12:49:10 +0100, Zbigniew Kempczyński wrote:
> On Mon, Dec 19, 2022 at 12:49:08PM +0100, Karolina Stolarek wrote:
> > Add structs to describe what blitter commands and tiling formats are
> > supported per platform. Introduce functions that check which blitter
> > commands are supported, update the tests to reflect that change.
> > Use new enum tiling_format in i915_blt lib and block copy tests.
> >
> > Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> > ---
> > lib/i915/blt_tiling.c | 371 +++++++++++++++++++++++++++++++++
> > lib/i915/blt_tiling.h | 64 ++++++
> > lib/i915/i915_blt.c | 60 +-----
> > lib/i915/i915_blt.h | 14 +-
> > lib/meson.build | 1 +
> > tests/i915/gem_ccs.c | 19 +-
> > tests/i915/gem_lmem_swapping.c | 2 +-
> > 7 files changed, 456 insertions(+), 75 deletions(-)
> > create mode 100644 lib/i915/blt_tiling.c
> > create mode 100644 lib/i915/blt_tiling.h
> >
> > diff --git a/lib/i915/blt_tiling.c b/lib/i915/blt_tiling.c
> > new file mode 100644
> > index 00000000..41a3fe25
> > --- /dev/null
> > +++ b/lib/i915/blt_tiling.c
> > @@ -0,0 +1,371 @@
> > +// SPDX-License-Identifier: MIT
> > +/*
> > + * Copyright © 2022 Intel Corporation
> > + */
> > +
> > +#include "blt_tiling.h"
> > +
> > +#define BLT_STR_MAX 200
> > +#define TILE_STR_MAX 60
> > +
> > +static bool matches_gen12_atsm(uint16_t devid)
> > +{
> > + return IS_DG2(devid) && intel_display_ver(devid) == 0;
> > +}
> > +
> > +static bool matches_gen12_dg2(uint16_t devid)
> > +{
> > + return IS_DG2(devid);
> > +}
> > +
> > +static bool matches_gen12_generic(uint16_t devid)
> > +{
> > + return !(matches_gen12_dg2(devid) || matches_gen12_atsm(devid));
> > +}
> > +
> > +static const struct blt_cmd_info generic_info = {
> > + .gen_max = -1
> > +};
> > +
> > +/* No blitter-specific commands available */
> > +static const struct blt_cmd_info pre_gen6_info = {
> > + .gen_max = 5,
> > +};
> > +
> > +static const struct blt_cmd_info pre_gen8_info = {
> > + .gen_min = 6,
> > + .gen_max = 7,
> > + .cmd_num = 2,
> > + .supported_blt_cmds = SRC_COPY | XY_SRC_COPY,
> > + .supported_tiling = {
>
> If supported_tiling would point to array of pointers you can add
> terminating NULL element. The .cmd_num can be removed and you
> decrease of risk of mistake here.
>
> > + (struct blt_tiling_info){
> > + .blt_cmd_type = SRC_COPY,
> > + .supported_tiling = T_LINEAR
> > + },
>
> You may use array initialization:
>
> [SRC_COPY] = &src_copy,
> [XY_SRC_COPY] = &xy_src_copy
> ...
>
> but SRC_COPY, XY_SRC_COPY, ... better should be contigues, not bitflags.
>
> Apart of that some initialization macro would make this code more readable,
> like:
>
> > + (struct blt_tiling_info){
> > + .blt_cmd_type = XY_SRC_COPY,
> > + .supported_tiling = T_LINEAR | T_XMAJOR
> > + }
>
> BLT_INFO(XY_SRC_COPY, T_LINEAR | T_XMAJOR)
>
> and instead of gen_min/gen_max I would just inject this directly to
> intel_device_info.c, like:
This will put more work in creating device info and would
require using bitfields so maybe do not do this ?
Regards,
Kamil
>
> .blt_tiling = pre_gen8_info
>
> For render we might reuse same info definition, like:
>
> .render_tiling = pre_gen8_info
>
> or point to separate if there're tiling differences.
>
> --
> Zbigniew
>
> > + }
> > +};
> > +
> > +static const struct blt_cmd_info gen8_info = {
> > + .gen_min = 8,
> > + .gen_max = 8,
> > + .cmd_num = 1,
> > + .supported_blt_cmds = XY_SRC_COPY,
> > + .supported_tiling = {
> > + (struct blt_tiling_info){
> > + .blt_cmd_type = XY_SRC_COPY,
> > + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> > + }
> > + }
> > +};
> > +
> > +static const struct blt_cmd_info gen11_info = {
> > + .gen_min = 9,
> > + .gen_max = 11,
> > + .cmd_num = 2,
> > + .supported_blt_cmds = XY_SRC_COPY | XY_FAST_COPY,
> > + .supported_tiling = {
> > + (struct blt_tiling_info){
> > + .blt_cmd_type = XY_SRC_COPY,
> > + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> > + },
> > + (struct blt_tiling_info){
> > + .blt_cmd_type = XY_FAST_COPY,
> > + .supported_tiling = T_LINEAR | T_YMAJOR | T_YFMAJOR | T_TILE64
> > + }
> > + }
> > +};
> > +
> > +#define GEN12_FIELDS \
> > + .gen_min = 12, \
> > + .gen_max = 12, \
> > + .cmd_num = 3, \
> > + .supported_blt_cmds = XY_SRC_COPY | XY_FAST_COPY | XY_BLOCK_COPY
> > +
> > +static const struct blt_cmd_info gen12_info = {
> > + GEN12_FIELDS,
> > + .matches_platform = matches_gen12_generic,
> > + .supported_tiling = {
> > + (struct blt_tiling_info){
> > + .blt_cmd_type = XY_SRC_COPY,
> > + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> > + },
> > + (struct blt_tiling_info){
> > + .blt_cmd_type = XY_FAST_COPY,
> > + .supported_tiling = T_LINEAR | T_YMAJOR | T_TILE4 | T_TILE64
> > + },
> > + (struct blt_tiling_info){
> > + .blt_cmd_type = XY_BLOCK_COPY,
> > + .supported_tiling = T_LINEAR | T_YMAJOR
> > + }
> > + }
> > +};
> > +
> > +static const struct blt_cmd_info gen12_dg2_info = {
> > + GEN12_FIELDS,
> > + .matches_platform = matches_gen12_dg2,
> > + .supported_tiling = {
> > + (struct blt_tiling_info){
> > + .blt_cmd_type = XY_SRC_COPY,
> > + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> > + },
> > + (struct blt_tiling_info){
> > + .blt_cmd_type = XY_FAST_COPY,
> > + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
> > + },
> > + (struct blt_tiling_info){
> > + .blt_cmd_type = XY_BLOCK_COPY,
> > + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
> > + }
> > + }
> > +};
> > +
> > +static const struct blt_cmd_info gen12_atsm_info = {
> > + GEN12_FIELDS,
> > + .matches_platform = matches_gen12_atsm,
> > + .supported_tiling = {
> > + (struct blt_tiling_info){
> > + .blt_cmd_type = XY_SRC_COPY,
> > + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> > + },
> > + (struct blt_tiling_info){
> > + .blt_cmd_type = XY_FAST_COPY,
> > + .supported_tiling = T_LINEAR | T_TILE4 | T_TILE64
> > + },
> > + (struct blt_tiling_info){
> > + .blt_cmd_type = XY_BLOCK_COPY,
> > + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
> > + }
> > + }
> > +};
> > +
> > +static const struct blt_cmd_info blt_gen_configs[] = {
> > + pre_gen6_info,
> > + pre_gen8_info,
> > + gen8_info,
> > + gen11_info,
> > + generic_info
> > +};
> > +
> > +static const struct blt_cmd_info blt_devid_configs[] = {
> > + gen12_info,
> > + gen12_dg2_info,
> > + gen12_atsm_info,
> > + generic_info
> > +};
> > +
> > +static const struct blt_cmd_info *get_devid_config(uint16_t devid)
> > +{
> > + for (int i = 0; blt_devid_configs[i].gen_max != -1; i++)
> > + if (blt_devid_configs[i].matches_platform(devid))
> > + return &blt_devid_configs[i];
> > + return NULL;
> > +}
> > +
> > +static const struct blt_cmd_info *get_gen_config(uint16_t devid)
> > +{
> > + unsigned int gen = intel_gen(devid);
> > +
> > + for (int i = 0; blt_gen_configs[i].gen_max != -1; i++)
> > + if (gen >= blt_gen_configs[i].gen_min &&
> > + gen <= blt_gen_configs[i].gen_max)
> > + return &blt_gen_configs[i];
> > + return NULL;
> > +}
> > +
> > +static const struct blt_cmd_info *get_blt_cmd_config(uint16_t devid)
> > +{
> > + if (IS_GEN12(devid))
> > + return get_devid_config(devid);
> > + else
> > + return get_gen_config(devid);
> > +}
> > +
> > +static const struct blt_tiling_info
> > + *get_tiling_config(const struct blt_cmd_info *info, enum blt_cmd_type type)
> > +{
> > + igt_require_f(info, "No config found for the platform\n");
> > +
> > + for (int i = 0; i < BLT_CMD_MAX; i++)
> > + if (info->supported_tiling[i].blt_cmd_type == type)
> > + return &info->supported_tiling[i];
> > +
> > + return NULL;
> > +}
> > +
> > +static const char *blt_cmd_name(enum blt_cmd_type cmd)
> > +{
> > + switch (cmd) {
> > + case SRC_COPY: return "SRC_COPY_BLT";
> > + case XY_SRC_COPY: return "XY_SRC_COPY_BLT";
> > + case XY_FAST_COPY: return "XY_FAST_COPY_BLT";
> > + case XY_BLOCK_COPY: return "XY_BLOCK_COPY_BLT";
> > + }
> > +
> > + return NULL;
> > +}
> > +
> > +const char *blt_tiling_name(enum tiling_type tiling)
> > +{
> > + switch (tiling) {
> > + case T_LINEAR: return "linear";
> > + case T_XMAJOR: return "xmajor";
> > + case T_YMAJOR: return "ymajor";
> > + case T_TILE4: return "tile4";
> > + case T_TILE64: return "tile64";
> > + case T_YFMAJOR: return "yfmajor";
> > + }
> > +
> > + return NULL;
> > +}
> > +
> > +static bool blt_cmd_supports_tiling(int i915, enum blt_cmd_type type, enum tiling_type tiling)
> > +{
> > + uint16_t devid = intel_get_drm_devid(i915);
> > + struct blt_cmd_info const *info = get_blt_cmd_config(devid);
> > + struct blt_tiling_info const *tile_config = get_tiling_config(info, type);
> > +
> > + /* no config means no support for that tiling */
> > + if (!tile_config)
> > + return false;
> > +
> > + return tile_config->supported_tiling & tiling;
> > +}
> > +
> > +bool block_copy_supports_tiling(int i915, enum tiling_type tiling)
> > +{
> > + return blt_cmd_supports_tiling(i915, XY_BLOCK_COPY, tiling);
> > +}
> > +
> > +bool fast_copy_supports_tiling(int i915, enum tiling_type tiling)
> > +{
> > + return blt_cmd_supports_tiling(i915, XY_FAST_COPY, tiling);
> > +}
> > +
> > +bool xy_src_copy_supports_tiling(int i915, enum tiling_type tiling)
> > +{
> > + return blt_cmd_supports_tiling(i915, XY_SRC_COPY, tiling);
> > +}
> > +
> > +bool src_copy_supports_tiling(int i915, enum tiling_type tiling)
> > +{
> > + return blt_cmd_supports_tiling(i915, SRC_COPY, tiling);
> > +}
> > +
> > +static bool blt_supports_command(int i915, enum blt_cmd_type type)
> > +{
> > + uint16_t devid = intel_get_drm_devid(i915);
> > + struct blt_cmd_info const *info = get_blt_cmd_config(devid);
> > +
> > + igt_require_f(info, "No config found for the platform\n");
> > +
> > + return info->supported_blt_cmds & type;
> > +}
> > +
> > +/*
> > + * A general check per platform. As the block copy support is defined per engine,
> > + * the more detailed check should use gem_engine_can_block_copy()
> > + */
> > +bool can_block_copy(int i915)
> > +{
> > + return blt_supports_command(i915, XY_BLOCK_COPY);
> > +}
> > +
> > +bool can_fast_copy(int i915)
> > +{
> > + return blt_supports_command(i915, XY_FAST_COPY);
> > +}
> > +
> > +bool can_xy_src_copy(int i915)
> > +{
> > + return blt_supports_command(i915, XY_SRC_COPY);
> > +}
> > +
> > +bool can_src_copy(int i915)
> > +{
> > + /* quickly rule out higher gens */
> > + if (intel_gen(intel_get_drm_devid(i915)) > 8)
> > + return false;
> > +
> > + return blt_supports_command(i915, SRC_COPY);
> > +}
> > +
> > +/* Info dump functions */
> > +static void append_tile(uint32_t tile, char *tile_str)
> > +{
> > + char const *tile_name;
> > +
> > + if (tile) {
> > + tile_name = blt_tiling_name(tile);
> > + snprintf(tile_str + strlen(tile_str), strlen(tile_name) + 2, "%s ", tile_name);
> > + }
> > +}
> > +
> > +static void get_tiling_info(struct blt_cmd_info const *info, enum blt_cmd_type type, char *tile_str)
> > +{
> > + uint32_t mask;
> > + struct blt_tiling_info const *tiling = get_tiling_config(info, type);
> > +
> > + if (tiling) {
> > + for (int i = 0; i < T_MAX_SHIFT; i++) {
> > + mask = 1 << i;
> > + append_tile(tiling->supported_tiling & mask, tile_str);
> > + }
> > + }
> > +
> > + tile_str[strlen(tile_str) - 1] = '\0';
> > +}
> > +
> > +static const char *extract_cmd(const struct blt_cmd_info *info, uint32_t mask)
> > +{
> > + return blt_cmd_name(info->supported_blt_cmds & mask);
> > +}
> > +
> > +void dump_devid_blt_info(uint16_t devid)
> > +{
> > + uint32_t cmd_mask;
> > + char tiling_str[TILE_STR_MAX];
> > + char ln_str[BLT_STR_MAX];
> > + char const *blt_type_str;
> > + const char *ln_intro = " * ";
> > + struct blt_cmd_info const *info;
> > +
> > + info = get_blt_cmd_config(devid);
> > +
> > + if (!info) {
> > + igt_warn("No config available\n");
> > + return;
> > + }
> > +
> > + igt_info("Supported blitter commands:\n");
> > +
> > + for (int i = 0; i < BLT_CMD_MAX; i++) {
> > + cmd_mask = 1 << i;
> > + blt_type_str = extract_cmd(info, cmd_mask);
> > +
> > + if (blt_type_str) {
> > + memset(ln_str, '\0', sizeof(char) * BLT_STR_MAX);
> > + memset(tiling_str, '\0', sizeof(char) * TILE_STR_MAX);
> > +
> > + snprintf(ln_str,
> > + strlen(ln_intro) + strlen(blt_type_str) + 1,
> > + "%s%s", ln_intro, blt_type_str);
> > +
> > + get_tiling_info(info, cmd_mask, tiling_str);
> > +
> > + snprintf(ln_str + strlen(ln_str),
> > + strlen(tiling_str) + 5,
> > + " [%s]", tiling_str);
> > +
> > + igt_info("%s\n", ln_str);
> > + }
> > + }
> > +}
> > +
> > +void dump_current_blt_info(int i915)
> > +{
> > + dump_devid_blt_info(intel_get_drm_devid(i915));
> > +}
> > diff --git a/lib/i915/blt_tiling.h b/lib/i915/blt_tiling.h
> > new file mode 100644
> > index 00000000..44ef45ca
> > --- /dev/null
> > +++ b/lib/i915/blt_tiling.h
> > @@ -0,0 +1,64 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2022 Intel Corporation
> > + */
> > +
> > +#ifndef BLT_TILING_H
> > +#define BLT_TILING_H
> > +
> > +#include "igt.h"
> > +
> > +#define BLT_CMD_MAX 3
> > +#define T_MAX_SHIFT 6
> > +#define PLATFORMS_MAX 5
> > +
> > +enum tiling_type {
> > + T_LINEAR = (1),
> > + T_XMAJOR = (1 << 1),
> > + T_YMAJOR = (1 << 2),
> > + T_TILE4 = (1 << 3),
> > + T_TILE64 = (1 << 4),
> > + T_YFMAJOR = (1 << 5),
> > +};
> > +
> > +#define for_each_tiling(__tiling) \
> > + for (__tiling = T_LINEAR; __tiling <= T_YFMAJOR; __tiling = __tiling << 1)
> > +
> > +enum blt_cmd_type {
> > + SRC_COPY = (1),
> > + XY_SRC_COPY = (1 << 1),
> > + XY_FAST_COPY = (1 << 2),
> > + XY_BLOCK_COPY = (1 << 3),
> > +};
> > +
> > +struct blt_tiling_info {
> > + enum blt_cmd_type blt_cmd_type;
> > + uint32_t supported_tiling;
> > +};
> > +
> > +struct blt_cmd_info {
> > + uint32_t supported_blt_cmds;
> > + struct blt_tiling_info supported_tiling[BLT_CMD_MAX];
> > + uint32_t cmd_num;
> > +
> > + uint32_t gen_min;
> > + uint32_t gen_max;
> > +
> > + bool (*matches_platform)(uint16_t devid);
> > +};
> > +
> > +void dump_current_blt_info(int i915);
> > +void dump_devid_blt_info(uint16_t devid);
> > +
> > +bool can_block_copy(int i915);
> > +bool can_fast_copy(int i915);
> > +bool can_xy_src_copy(int i915);
> > +bool can_src_copy(int i915);
> > +
> > +bool block_copy_supports_tiling(int i915, enum tiling_type tiling);
> > +bool fast_copy_supports_tiling(int i915, enum tiling_type tiling);
> > +bool xy_src_copy_supports_tiling(int i915, enum tiling_type tiling);
> > +bool src_copy_supports_tiling(int i915, enum tiling_type tiling);
> > +
> > +const char *blt_tiling_name(enum tiling_type tiling);
> > +#endif // BLT_TILING_H
> > diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
> > index 54193565..9b291862 100644
> > --- a/lib/i915/i915_blt.c
> > +++ b/lib/i915/i915_blt.c
> > @@ -207,59 +207,7 @@ bool blt_supports_compression(int i915)
> > return HAS_FLATCCS(devid);
> > }
> >
> > -/**
> > - * blt_supports_tiling:
> > - * @i915: drm fd
> > - * @tiling: tiling id
> > - *
> > - * Function checks if blitter supports @tiling on @i915 device.
> > - *
> > - * Returns:
> > - * true if it does, false otherwise.
> > - */
> > -bool blt_supports_tiling(int i915, enum blt_tiling tiling)
> > -{
> > - uint32_t devid = intel_get_drm_devid(i915);
> > -
> > - if (tiling == T_XMAJOR) {
> > - if (IS_TIGERLAKE(devid) || IS_DG1(devid))
> > - return false;
> > - else
> > - return true;
> > - }
> > -
> > - if (tiling == T_YMAJOR) {
> > - if (IS_TIGERLAKE(devid) || IS_DG1(devid))
> > - return true;
> > - else
> > - return false;
> > - }
> > -
> > - return true;
> > -}
> > -
> > -/**
> > - * blt_tiling_name:
> > - * @tiling: tiling id
> > - *
> > - * Returns:
> > - * name of @tiling passed. Useful to build test names.
> > - */
> > -const char *blt_tiling_name(enum blt_tiling tiling)
> > -{
> > - switch (tiling) {
> > - case T_LINEAR: return "linear";
> > - case T_XMAJOR: return "xmajor";
> > - case T_YMAJOR: return "ymajor";
> > - case T_TILE4: return "tile4";
> > - case T_TILE64: return "tile64";
> > - }
> > -
> > - igt_warn("invalid tiling passed: %d\n", tiling);
> > - return NULL;
> > -}
> > -
> > -static int __block_tiling(enum blt_tiling tiling)
> > +static int __block_tiling(enum tiling_type tiling)
> > {
> > switch (tiling) {
> > case T_LINEAR: return 0;
> > @@ -267,6 +215,9 @@ static int __block_tiling(enum blt_tiling tiling)
> > case T_YMAJOR: return 1;
> > case T_TILE4: return 2;
> > case T_TILE64: return 3;
> > + /* type only supported in gen9 fast copy */
> > + case T_YFMAJOR:
> > + break;
> > }
> >
> > igt_warn("invalid tiling passed: %d\n", tiling);
> > @@ -891,13 +842,14 @@ struct gen12_fast_copy_data {
> > } dw09;
> > };
> >
> > -static int __fast_tiling(enum blt_tiling tiling)
> > +static int __fast_tiling(enum tiling_type tiling)
> > {
> > switch (tiling) {
> > case T_LINEAR: return 0;
> > case T_XMAJOR: return 1;
> > case T_YMAJOR: return 2;
> > case T_TILE4: return 2;
> > + case T_YFMAJOR: return 2;
> > case T_TILE64: return 3;
> > }
> > return 0;
> > diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
> > index 34db9bb9..f1cf5408 100644
> > --- a/lib/i915/i915_blt.h
> > +++ b/lib/i915/i915_blt.h
> > @@ -47,6 +47,7 @@
> > #include <malloc.h>
> > #include "drm.h"
> > #include "igt.h"
> > +#include "blt_tiling.h"
> >
> > #define CCS_RATIO 256
> >
> > @@ -59,14 +60,6 @@ enum blt_color_depth {
> > CD_128bit,
> > };
> >
> > -enum blt_tiling {
> > - T_LINEAR,
> > - T_XMAJOR,
> > - T_YMAJOR,
> > - T_TILE4,
> > - T_TILE64,
> > -};
> > -
> > enum blt_compression {
> > COMPRESSION_DISABLED,
> > COMPRESSION_ENABLED,
> > @@ -83,7 +76,7 @@ struct blt_copy_object {
> > uint32_t region;
> > uint64_t size;
> > uint8_t mocs;
> > - enum blt_tiling tiling;
> > + enum tiling_type tiling;
> > enum blt_compression compression; /* BC only */
> > enum blt_compression_type compression_type; /* BC only */
> > uint32_t pitch;
> > @@ -165,8 +158,7 @@ struct blt_ctrl_surf_copy_data {
> > };
> >
> > bool blt_supports_compression(int i915);
> > -bool blt_supports_tiling(int i915, enum blt_tiling tiling);
> > -const char *blt_tiling_name(enum blt_tiling tiling);
> > +bool blt_supports_tiling(int i915, enum tiling_type tiling);
> >
> > uint64_t emit_blt_block_copy(int i915,
> > uint64_t ahnd,
> > diff --git a/lib/meson.build b/lib/meson.build
> > index c79e3e95..33c8daad 100644
> > --- a/lib/meson.build
> > +++ b/lib/meson.build
> > @@ -3,6 +3,7 @@ lib_sources = [
> > 'dmabuf_sync_file.c',
> > 'huc_copy.c',
> > 'i915/gem.c',
> > + 'i915/blt_tiling.c',
> > 'i915/gem_context.c',
> > 'i915/gem_create.c',
> > 'i915/gem_engine_topology.c',
> > diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> > index 751f65e6..4c137c94 100644
> > --- a/tests/i915/gem_ccs.c
> > +++ b/tests/i915/gem_ccs.c
> > @@ -46,7 +46,7 @@ struct test_config {
> >
> > static void set_object(struct blt_copy_object *obj,
> > uint32_t handle, uint64_t size, uint32_t region,
> > - uint8_t mocs, enum blt_tiling tiling,
> > + uint8_t mocs, enum tiling_type tiling,
> > enum blt_compression compression,
> > enum blt_compression_type compression_type)
> > {
> > @@ -108,7 +108,7 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
> > static struct blt_copy_object *
> > create_object(int i915, uint32_t region,
> > uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> > - enum blt_tiling tiling,
> > + enum tiling_type tiling,
> > enum blt_compression compression,
> > enum blt_compression_type compression_type,
> > bool create_mapping)
> > @@ -374,7 +374,7 @@ static void block_copy(int i915,
> > const intel_ctx_t *ctx,
> > const struct intel_execution_engine2 *e,
> > uint32_t region1, uint32_t region2,
> > - enum blt_tiling mid_tiling,
> > + enum tiling_type mid_tiling,
> > const struct test_config *config)
> > {
> > struct blt_copy_data blt = {};
> > @@ -492,7 +492,7 @@ static void block_multicopy(int i915,
> > const intel_ctx_t *ctx,
> > const struct intel_execution_engine2 *e,
> > uint32_t region1, uint32_t region2,
> > - enum blt_tiling mid_tiling,
> > + enum tiling_type mid_tiling,
> > const struct test_config *config)
> > {
> > struct blt_copy3_data blt3 = {};
> > @@ -581,7 +581,7 @@ static const struct {
> > const char *suffix;
> > void (*copyfn)(int, const intel_ctx_t *,
> > const struct intel_execution_engine2 *,
> > - uint32_t, uint32_t, enum blt_tiling,
> > + uint32_t, uint32_t, enum tiling_type,
> > const struct test_config *);
> > } copyfns[] = {
> > [BLOCK_COPY] = { "", block_copy },
> > @@ -596,6 +596,7 @@ static void block_copy_test(int i915,
> > {
> > struct igt_collection *regions;
> > const struct intel_execution_engine2 *e;
> > + int tiling;
> >
> > if (config->compression && !blt_supports_compression(i915))
> > return;
> > @@ -603,8 +604,8 @@ static void block_copy_test(int i915,
> > if (config->inplace && !config->compression)
> > return;
> >
> > - for (int tiling = T_LINEAR; tiling <= T_TILE64; tiling++) {
> > - if (!blt_supports_tiling(i915, tiling) ||
> > + for_each_tiling(tiling) {
> > + if (!block_copy_supports_tiling(i915, tiling) ||
> > (param.tiling >= 0 && param.tiling != tiling))
> > continue;
> >
> > @@ -663,7 +664,7 @@ static int opt_handler(int opt, int opt_index, void *data)
> > igt_debug("Print surface info: %d\n", param.print_surface_info);
> > break;
> > case 't':
> > - param.tiling = atoi(optarg);
> > + param.tiling = 1 << atoi(optarg);
> > igt_debug("Tiling: %d\n", param.tiling);
> > break;
> > case 'W':
> > @@ -702,7 +703,7 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> > igt_fixture {
> > i915 = drm_open_driver(DRIVER_INTEL);
> > igt_require_gem(i915);
> > - igt_require(AT_LEAST_GEN(intel_get_drm_devid(i915), 12) > 0);
> > + igt_require(can_block_copy(i915));
> >
> > query_info = gem_get_query_memory_regions(i915);
> > igt_require(query_info);
> > diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
> > index 75121d41..8cff35d5 100644
> > --- a/tests/i915/gem_lmem_swapping.c
> > +++ b/tests/i915/gem_lmem_swapping.c
> > @@ -78,7 +78,7 @@ struct object {
> >
> > static void set_object(struct blt_copy_object *obj,
> > uint32_t handle, uint64_t size, uint32_t region,
> > - uint8_t mocs, enum blt_tiling tiling,
> > + uint8_t mocs, enum tiling_type tiling,
> > enum blt_compression compression,
> > enum blt_compression_type compression_type)
> > {
> > --
> > 2.25.1
> >
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats Karolina Stolarek
2022-12-20 11:49 ` Zbigniew Kempczyński
@ 2022-12-21 18:31 ` Kamil Konieczny
2022-12-22 10:00 ` Karolina Stolarek
1 sibling, 1 reply; 22+ messages in thread
From: Kamil Konieczny @ 2022-12-21 18:31 UTC (permalink / raw)
To: igt-dev
Hi Karolina,
please change commit desciption, this is adding new lib,
not only "describe supported ..." so maybe:
"add new lib for blitter and tiling formats"
On 2022-12-19 at 12:49:08 +0100, Karolina Stolarek wrote:
> Add structs to describe what blitter commands and tiling formats are
> supported per platform. Introduce functions that check which blitter
> commands are supported, update the tests to reflect that change.
> Use new enum tiling_format in i915_blt lib and block copy tests.
>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> ---
> lib/i915/blt_tiling.c | 371 +++++++++++++++++++++++++++++++++
----------- ^
> lib/i915/blt_tiling.h | 64 ++++++
----------- ^
It is better to have i915_ here like
lib/i915/i915_blt_tiling.h
> lib/i915/i915_blt.c | 60 +-----
> lib/i915/i915_blt.h | 14 +-
> lib/meson.build | 1 +
> tests/i915/gem_ccs.c | 19 +-
> tests/i915/gem_lmem_swapping.c | 2 +-
> 7 files changed, 456 insertions(+), 75 deletions(-)
> create mode 100644 lib/i915/blt_tiling.c
> create mode 100644 lib/i915/blt_tiling.h
>
> diff --git a/lib/i915/blt_tiling.c b/lib/i915/blt_tiling.c
> new file mode 100644
> index 00000000..41a3fe25
> --- /dev/null
> +++ b/lib/i915/blt_tiling.c
> @@ -0,0 +1,371 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2022 Intel Corporation
> + */
> +
> +#include "blt_tiling.h"
> +
> +#define BLT_STR_MAX 200
> +#define TILE_STR_MAX 60
> +
> +static bool matches_gen12_atsm(uint16_t devid)
> +{
> + return IS_DG2(devid) && intel_display_ver(devid) == 0;
> +}
> +
> +static bool matches_gen12_dg2(uint16_t devid)
> +{
> + return IS_DG2(devid);
> +}
> +
> +static bool matches_gen12_generic(uint16_t devid)
> +{
> + return !(matches_gen12_dg2(devid) || matches_gen12_atsm(devid));
> +}
> +
> +static const struct blt_cmd_info generic_info = {
> + .gen_max = -1
> +};
> +
> +/* No blitter-specific commands available */
> +static const struct blt_cmd_info pre_gen6_info = {
> + .gen_max = 5,
> +};
> +
> +static const struct blt_cmd_info pre_gen8_info = {
> + .gen_min = 6,
> + .gen_max = 7,
> + .cmd_num = 2,
> + .supported_blt_cmds = SRC_COPY | XY_SRC_COPY,
> + .supported_tiling = {
> + (struct blt_tiling_info){
> + .blt_cmd_type = SRC_COPY,
> + .supported_tiling = T_LINEAR
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_SRC_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR
> + }
> + }
> +};
> +
> +static const struct blt_cmd_info gen8_info = {
> + .gen_min = 8,
> + .gen_max = 8,
> + .cmd_num = 1,
> + .supported_blt_cmds = XY_SRC_COPY,
> + .supported_tiling = {
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_SRC_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> + }
> + }
> +};
> +
> +static const struct blt_cmd_info gen11_info = {
> + .gen_min = 9,
> + .gen_max = 11,
> + .cmd_num = 2,
> + .supported_blt_cmds = XY_SRC_COPY | XY_FAST_COPY,
> + .supported_tiling = {
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_SRC_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_FAST_COPY,
> + .supported_tiling = T_LINEAR | T_YMAJOR | T_YFMAJOR | T_TILE64
> + }
> + }
> +};
> +
> +#define GEN12_FIELDS \
---------- ^
BLT_GEN12_FIELDS
> + .gen_min = 12, \
> + .gen_max = 12, \
> + .cmd_num = 3, \
> + .supported_blt_cmds = XY_SRC_COPY | XY_FAST_COPY | XY_BLOCK_COPY
> +
> +static const struct blt_cmd_info gen12_info = {
> + GEN12_FIELDS,
> + .matches_platform = matches_gen12_generic,
> + .supported_tiling = {
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_SRC_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_FAST_COPY,
> + .supported_tiling = T_LINEAR | T_YMAJOR | T_TILE4 | T_TILE64
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_BLOCK_COPY,
> + .supported_tiling = T_LINEAR | T_YMAJOR
> + }
> + }
> +};
> +
> +static const struct blt_cmd_info gen12_dg2_info = {
> + GEN12_FIELDS,
> + .matches_platform = matches_gen12_dg2,
> + .supported_tiling = {
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_SRC_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_FAST_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_BLOCK_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
> + }
> + }
> +};
> +
> +static const struct blt_cmd_info gen12_atsm_info = {
> + GEN12_FIELDS,
> + .matches_platform = matches_gen12_atsm,
> + .supported_tiling = {
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_SRC_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_FAST_COPY,
> + .supported_tiling = T_LINEAR | T_TILE4 | T_TILE64
> + },
> + (struct blt_tiling_info){
> + .blt_cmd_type = XY_BLOCK_COPY,
> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
> + }
> + }
> +};
> +
> +static const struct blt_cmd_info blt_gen_configs[] = {
> + pre_gen6_info,
> + pre_gen8_info,
> + gen8_info,
> + gen11_info,
> + generic_info
> +};
> +
> +static const struct blt_cmd_info blt_devid_configs[] = {
> + gen12_info,
> + gen12_dg2_info,
> + gen12_atsm_info,
> + generic_info
> +};
> +
> +static const struct blt_cmd_info *get_devid_config(uint16_t devid)
> +{
> + for (int i = 0; blt_devid_configs[i].gen_max != -1; i++)
> + if (blt_devid_configs[i].matches_platform(devid))
> + return &blt_devid_configs[i];
> + return NULL;
> +}
> +
> +static const struct blt_cmd_info *get_gen_config(uint16_t devid)
> +{
> + unsigned int gen = intel_gen(devid);
> +
> + for (int i = 0; blt_gen_configs[i].gen_max != -1; i++)
> + if (gen >= blt_gen_configs[i].gen_min &&
> + gen <= blt_gen_configs[i].gen_max)
> + return &blt_gen_configs[i];
> + return NULL;
> +}
> +
> +static const struct blt_cmd_info *get_blt_cmd_config(uint16_t devid)
> +{
> + if (IS_GEN12(devid))
> + return get_devid_config(devid);
> + else
> + return get_gen_config(devid);
> +}
> +
> +static const struct blt_tiling_info
> + *get_tiling_config(const struct blt_cmd_info *info, enum blt_cmd_type type)
> +{
> + igt_require_f(info, "No config found for the platform\n");
> +
> + for (int i = 0; i < BLT_CMD_MAX; i++)
> + if (info->supported_tiling[i].blt_cmd_type == type)
> + return &info->supported_tiling[i];
> +
> + return NULL;
> +}
> +
> +static const char *blt_cmd_name(enum blt_cmd_type cmd)
> +{
> + switch (cmd) {
> + case SRC_COPY: return "SRC_COPY_BLT";
> + case XY_SRC_COPY: return "XY_SRC_COPY_BLT";
> + case XY_FAST_COPY: return "XY_FAST_COPY_BLT";
> + case XY_BLOCK_COPY: return "XY_BLOCK_COPY_BLT";
> + }
> +
> + return NULL;
> +}
> +
You need to describe public functions in lib (here and below).
> +const char *blt_tiling_name(enum tiling_type tiling)
> +{
> + switch (tiling) {
> + case T_LINEAR: return "linear";
> + case T_XMAJOR: return "xmajor";
> + case T_YMAJOR: return "ymajor";
> + case T_TILE4: return "tile4";
> + case T_TILE64: return "tile64";
> + case T_YFMAJOR: return "yfmajor";
> + }
> +
> + return NULL;
> +}
> +
> +static bool blt_cmd_supports_tiling(int i915, enum blt_cmd_type type, enum tiling_type tiling)
> +{
> + uint16_t devid = intel_get_drm_devid(i915);
> + struct blt_cmd_info const *info = get_blt_cmd_config(devid);
> + struct blt_tiling_info const *tile_config = get_tiling_config(info, type);
> +
> + /* no config means no support for that tiling */
> + if (!tile_config)
> + return false;
> +
> + return tile_config->supported_tiling & tiling;
> +}
> +
> +bool block_copy_supports_tiling(int i915, enum tiling_type tiling)
> +{
> + return blt_cmd_supports_tiling(i915, XY_BLOCK_COPY, tiling);
> +}
> +
> +bool fast_copy_supports_tiling(int i915, enum tiling_type tiling)
> +{
> + return blt_cmd_supports_tiling(i915, XY_FAST_COPY, tiling);
> +}
> +
> +bool xy_src_copy_supports_tiling(int i915, enum tiling_type tiling)
> +{
> + return blt_cmd_supports_tiling(i915, XY_SRC_COPY, tiling);
> +}
> +
> +bool src_copy_supports_tiling(int i915, enum tiling_type tiling)
> +{
> + return blt_cmd_supports_tiling(i915, SRC_COPY, tiling);
> +}
> +
> +static bool blt_supports_command(int i915, enum blt_cmd_type type)
> +{
> + uint16_t devid = intel_get_drm_devid(i915);
> + struct blt_cmd_info const *info = get_blt_cmd_config(devid);
> +
> + igt_require_f(info, "No config found for the platform\n");
> +
> + return info->supported_blt_cmds & type;
> +}
> +
> +/*
> + * A general check per platform. As the block copy support is defined per engine,
> + * the more detailed check should use gem_engine_can_block_copy()
> + */
> +bool can_block_copy(int i915)
------- ^
We already use has_ convention so better is has_block_copy
> +{
> + return blt_supports_command(i915, XY_BLOCK_COPY);
> +}
> +
> +bool can_fast_copy(int i915)
----------- ^
Why no 'xy' here like has_xy_fast_copy ?
> +{
> + return blt_supports_command(i915, XY_FAST_COPY);
> +}
> +
> +bool can_xy_src_copy(int i915)
> +{
> + return blt_supports_command(i915, XY_SRC_COPY);
> +}
> +
> +bool can_src_copy(int i915)
> +{
> + /* quickly rule out higher gens */
> + if (intel_gen(intel_get_drm_devid(i915)) > 8)
> + return false;
> +
> + return blt_supports_command(i915, SRC_COPY);
> +}
> +
> +/* Info dump functions */
> +static void append_tile(uint32_t tile, char *tile_str)
> +{
> + char const *tile_name;
> +
> + if (tile) {
> + tile_name = blt_tiling_name(tile);
> + snprintf(tile_str + strlen(tile_str), strlen(tile_name) + 2, "%s ", tile_name);
> + }
> +}
> +
> +static void get_tiling_info(struct blt_cmd_info const *info, enum blt_cmd_type type, char *tile_str)
> +{
> + uint32_t mask;
> + struct blt_tiling_info const *tiling = get_tiling_config(info, type);
> +
> + if (tiling) {
> + for (int i = 0; i < T_MAX_SHIFT; i++) {
> + mask = 1 << i;
> + append_tile(tiling->supported_tiling & mask, tile_str);
> + }
> + }
> +
> + tile_str[strlen(tile_str) - 1] = '\0';
> +}
> +
> +static const char *extract_cmd(const struct blt_cmd_info *info, uint32_t mask)
> +{
> + return blt_cmd_name(info->supported_blt_cmds & mask);
> +}
> +
> +void dump_devid_blt_info(uint16_t devid)
> +{
> + uint32_t cmd_mask;
> + char tiling_str[TILE_STR_MAX];
> + char ln_str[BLT_STR_MAX];
> + char const *blt_type_str;
> + const char *ln_intro = " * ";
> + struct blt_cmd_info const *info;
> +
> + info = get_blt_cmd_config(devid);
> +
> + if (!info) {
> + igt_warn("No config available\n");
> + return;
> + }
> +
> + igt_info("Supported blitter commands:\n");
> +
> + for (int i = 0; i < BLT_CMD_MAX; i++) {
> + cmd_mask = 1 << i;
> + blt_type_str = extract_cmd(info, cmd_mask);
> +
> + if (blt_type_str) {
> + memset(ln_str, '\0', sizeof(char) * BLT_STR_MAX);
> + memset(tiling_str, '\0', sizeof(char) * TILE_STR_MAX);
> +
> + snprintf(ln_str,
> + strlen(ln_intro) + strlen(blt_type_str) + 1,
> + "%s%s", ln_intro, blt_type_str);
> +
> + get_tiling_info(info, cmd_mask, tiling_str);
> +
> + snprintf(ln_str + strlen(ln_str),
> + strlen(tiling_str) + 5,
> + " [%s]", tiling_str);
> +
> + igt_info("%s\n", ln_str);
> + }
> + }
> +}
> +
> +void dump_current_blt_info(int i915)
------------ ^
imho better just dump_dev_blt_info(int i915)
> +{
> + dump_devid_blt_info(intel_get_drm_devid(i915));
> +}
> diff --git a/lib/i915/blt_tiling.h b/lib/i915/blt_tiling.h
> new file mode 100644
> index 00000000..44ef45ca
> --- /dev/null
> +++ b/lib/i915/blt_tiling.h
> @@ -0,0 +1,64 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2022 Intel Corporation
> + */
> +
> +#ifndef BLT_TILING_H
> +#define BLT_TILING_H
> +
> +#include "igt.h"
> +
> +#define BLT_CMD_MAX 3
> +#define T_MAX_SHIFT 6
> +#define PLATFORMS_MAX 5
> +
> +enum tiling_type {
> + T_LINEAR = (1),
> + T_XMAJOR = (1 << 1),
> + T_YMAJOR = (1 << 2),
> + T_TILE4 = (1 << 3),
> + T_TILE64 = (1 << 4),
> + T_YFMAJOR = (1 << 5),
> +};
Please keep it with simple enum, if you need bitfield maybe introduce
new type like enum tiling_bits_type ?
Regards,
Kamil
> +
> +#define for_each_tiling(__tiling) \
> + for (__tiling = T_LINEAR; __tiling <= T_YFMAJOR; __tiling = __tiling << 1)
> +
> +enum blt_cmd_type {
> + SRC_COPY = (1),
> + XY_SRC_COPY = (1 << 1),
> + XY_FAST_COPY = (1 << 2),
> + XY_BLOCK_COPY = (1 << 3),
> +};
> +
> +struct blt_tiling_info {
> + enum blt_cmd_type blt_cmd_type;
> + uint32_t supported_tiling;
> +};
> +
> +struct blt_cmd_info {
> + uint32_t supported_blt_cmds;
> + struct blt_tiling_info supported_tiling[BLT_CMD_MAX];
> + uint32_t cmd_num;
> +
> + uint32_t gen_min;
> + uint32_t gen_max;
> +
> + bool (*matches_platform)(uint16_t devid);
> +};
> +
> +void dump_current_blt_info(int i915);
> +void dump_devid_blt_info(uint16_t devid);
> +
> +bool can_block_copy(int i915);
> +bool can_fast_copy(int i915);
> +bool can_xy_src_copy(int i915);
> +bool can_src_copy(int i915);
> +
> +bool block_copy_supports_tiling(int i915, enum tiling_type tiling);
> +bool fast_copy_supports_tiling(int i915, enum tiling_type tiling);
> +bool xy_src_copy_supports_tiling(int i915, enum tiling_type tiling);
> +bool src_copy_supports_tiling(int i915, enum tiling_type tiling);
> +
> +const char *blt_tiling_name(enum tiling_type tiling);
> +#endif // BLT_TILING_H
> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
> index 54193565..9b291862 100644
> --- a/lib/i915/i915_blt.c
> +++ b/lib/i915/i915_blt.c
> @@ -207,59 +207,7 @@ bool blt_supports_compression(int i915)
> return HAS_FLATCCS(devid);
> }
>
> -/**
> - * blt_supports_tiling:
> - * @i915: drm fd
> - * @tiling: tiling id
> - *
> - * Function checks if blitter supports @tiling on @i915 device.
> - *
> - * Returns:
> - * true if it does, false otherwise.
> - */
> -bool blt_supports_tiling(int i915, enum blt_tiling tiling)
> -{
> - uint32_t devid = intel_get_drm_devid(i915);
> -
> - if (tiling == T_XMAJOR) {
> - if (IS_TIGERLAKE(devid) || IS_DG1(devid))
> - return false;
> - else
> - return true;
> - }
> -
> - if (tiling == T_YMAJOR) {
> - if (IS_TIGERLAKE(devid) || IS_DG1(devid))
> - return true;
> - else
> - return false;
> - }
> -
> - return true;
> -}
> -
> -/**
> - * blt_tiling_name:
> - * @tiling: tiling id
> - *
> - * Returns:
> - * name of @tiling passed. Useful to build test names.
> - */
> -const char *blt_tiling_name(enum blt_tiling tiling)
> -{
> - switch (tiling) {
> - case T_LINEAR: return "linear";
> - case T_XMAJOR: return "xmajor";
> - case T_YMAJOR: return "ymajor";
> - case T_TILE4: return "tile4";
> - case T_TILE64: return "tile64";
> - }
> -
> - igt_warn("invalid tiling passed: %d\n", tiling);
> - return NULL;
> -}
> -
> -static int __block_tiling(enum blt_tiling tiling)
> +static int __block_tiling(enum tiling_type tiling)
> {
> switch (tiling) {
> case T_LINEAR: return 0;
> @@ -267,6 +215,9 @@ static int __block_tiling(enum blt_tiling tiling)
> case T_YMAJOR: return 1;
> case T_TILE4: return 2;
> case T_TILE64: return 3;
> + /* type only supported in gen9 fast copy */
> + case T_YFMAJOR:
> + break;
> }
>
> igt_warn("invalid tiling passed: %d\n", tiling);
> @@ -891,13 +842,14 @@ struct gen12_fast_copy_data {
> } dw09;
> };
>
> -static int __fast_tiling(enum blt_tiling tiling)
> +static int __fast_tiling(enum tiling_type tiling)
> {
> switch (tiling) {
> case T_LINEAR: return 0;
> case T_XMAJOR: return 1;
> case T_YMAJOR: return 2;
> case T_TILE4: return 2;
> + case T_YFMAJOR: return 2;
> case T_TILE64: return 3;
> }
> return 0;
> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
> index 34db9bb9..f1cf5408 100644
> --- a/lib/i915/i915_blt.h
> +++ b/lib/i915/i915_blt.h
> @@ -47,6 +47,7 @@
> #include <malloc.h>
> #include "drm.h"
> #include "igt.h"
> +#include "blt_tiling.h"
>
> #define CCS_RATIO 256
>
> @@ -59,14 +60,6 @@ enum blt_color_depth {
> CD_128bit,
> };
>
> -enum blt_tiling {
> - T_LINEAR,
> - T_XMAJOR,
> - T_YMAJOR,
> - T_TILE4,
> - T_TILE64,
> -};
> -
> enum blt_compression {
> COMPRESSION_DISABLED,
> COMPRESSION_ENABLED,
> @@ -83,7 +76,7 @@ struct blt_copy_object {
> uint32_t region;
> uint64_t size;
> uint8_t mocs;
> - enum blt_tiling tiling;
> + enum tiling_type tiling;
> enum blt_compression compression; /* BC only */
> enum blt_compression_type compression_type; /* BC only */
> uint32_t pitch;
> @@ -165,8 +158,7 @@ struct blt_ctrl_surf_copy_data {
> };
>
> bool blt_supports_compression(int i915);
> -bool blt_supports_tiling(int i915, enum blt_tiling tiling);
> -const char *blt_tiling_name(enum blt_tiling tiling);
> +bool blt_supports_tiling(int i915, enum tiling_type tiling);
>
> uint64_t emit_blt_block_copy(int i915,
> uint64_t ahnd,
> diff --git a/lib/meson.build b/lib/meson.build
> index c79e3e95..33c8daad 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -3,6 +3,7 @@ lib_sources = [
> 'dmabuf_sync_file.c',
> 'huc_copy.c',
> 'i915/gem.c',
> + 'i915/blt_tiling.c',
> 'i915/gem_context.c',
> 'i915/gem_create.c',
> 'i915/gem_engine_topology.c',
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index 751f65e6..4c137c94 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -46,7 +46,7 @@ struct test_config {
>
> static void set_object(struct blt_copy_object *obj,
> uint32_t handle, uint64_t size, uint32_t region,
> - uint8_t mocs, enum blt_tiling tiling,
> + uint8_t mocs, enum tiling_type tiling,
> enum blt_compression compression,
> enum blt_compression_type compression_type)
> {
> @@ -108,7 +108,7 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
> static struct blt_copy_object *
> create_object(int i915, uint32_t region,
> uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> - enum blt_tiling tiling,
> + enum tiling_type tiling,
> enum blt_compression compression,
> enum blt_compression_type compression_type,
> bool create_mapping)
> @@ -374,7 +374,7 @@ static void block_copy(int i915,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint32_t region1, uint32_t region2,
> - enum blt_tiling mid_tiling,
> + enum tiling_type mid_tiling,
> const struct test_config *config)
> {
> struct blt_copy_data blt = {};
> @@ -492,7 +492,7 @@ static void block_multicopy(int i915,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint32_t region1, uint32_t region2,
> - enum blt_tiling mid_tiling,
> + enum tiling_type mid_tiling,
> const struct test_config *config)
> {
> struct blt_copy3_data blt3 = {};
> @@ -581,7 +581,7 @@ static const struct {
> const char *suffix;
> void (*copyfn)(int, const intel_ctx_t *,
> const struct intel_execution_engine2 *,
> - uint32_t, uint32_t, enum blt_tiling,
> + uint32_t, uint32_t, enum tiling_type,
> const struct test_config *);
> } copyfns[] = {
> [BLOCK_COPY] = { "", block_copy },
> @@ -596,6 +596,7 @@ static void block_copy_test(int i915,
> {
> struct igt_collection *regions;
> const struct intel_execution_engine2 *e;
> + int tiling;
>
> if (config->compression && !blt_supports_compression(i915))
> return;
> @@ -603,8 +604,8 @@ static void block_copy_test(int i915,
> if (config->inplace && !config->compression)
> return;
>
> - for (int tiling = T_LINEAR; tiling <= T_TILE64; tiling++) {
> - if (!blt_supports_tiling(i915, tiling) ||
> + for_each_tiling(tiling) {
> + if (!block_copy_supports_tiling(i915, tiling) ||
> (param.tiling >= 0 && param.tiling != tiling))
> continue;
>
> @@ -663,7 +664,7 @@ static int opt_handler(int opt, int opt_index, void *data)
> igt_debug("Print surface info: %d\n", param.print_surface_info);
> break;
> case 't':
> - param.tiling = atoi(optarg);
> + param.tiling = 1 << atoi(optarg);
> igt_debug("Tiling: %d\n", param.tiling);
> break;
> case 'W':
> @@ -702,7 +703,7 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> igt_fixture {
> i915 = drm_open_driver(DRIVER_INTEL);
> igt_require_gem(i915);
> - igt_require(AT_LEAST_GEN(intel_get_drm_devid(i915), 12) > 0);
> + igt_require(can_block_copy(i915));
>
> query_info = gem_get_query_memory_regions(i915);
> igt_require(query_info);
> diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
> index 75121d41..8cff35d5 100644
> --- a/tests/i915/gem_lmem_swapping.c
> +++ b/tests/i915/gem_lmem_swapping.c
> @@ -78,7 +78,7 @@ struct object {
>
> static void set_object(struct blt_copy_object *obj,
> uint32_t handle, uint64_t size, uint32_t region,
> - uint8_t mocs, enum blt_tiling tiling,
> + uint8_t mocs, enum tiling_type tiling,
> enum blt_compression compression,
> enum blt_compression_type compression_type)
> {
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/4] lib/i915_blt: Extract init functions for blt_copy_object
2022-12-21 13:59 ` Kamil Konieczny
@ 2022-12-22 9:50 ` Karolina Stolarek
2022-12-22 10:20 ` Kamil Konieczny
0 siblings, 1 reply; 22+ messages in thread
From: Karolina Stolarek @ 2022-12-22 9:50 UTC (permalink / raw)
To: Kamil Konieczny; +Cc: igt-dev
On 21.12.2022 14:59, Kamil Konieczny wrote:
> Hi Karolina,
>
> please improve commit description,
> imho s/Extract init/Add common/
But we're reusing the code, not adding new one.
> On 2022-12-19 at 12:49:10 +0100, Karolina Stolarek wrote:
>> gem_ccs and gem_lmem_swapping share a couple of functions. Extract them
>> to i915_blt so they are accessible for both tests. Delete local
> ---------------------------------------------------- ^
> That sentence is not needed here or if you want you can write
> about refactoring (you replaced those functions with lib calls).
>
>> definitions.
>
>>
>> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
>> ---
>> Karolina's comment: I'm not convinced it's the best place for them.
>> These functions are more specific to the tests
> - ^^^
> Please avoid huge empty spaces here.
Heh, I should've eyed it in vim before sending. Anyway, everything below
-- is ignored when the patch is applied.
>
>> than lib functions. So, I'd appreciate
>> suggestions on where I can move them to.
>>
>> lib/i915/i915_blt.c | 81 ++++++++++++++++++++++++++++++++++
>> lib/i915/i915_blt.h | 22 +++++++++
>> tests/i915/gem_ccs.c | 81 ----------------------------------
>> tests/i915/gem_lmem_swapping.c | 36 ---------------
>> 4 files changed, 103 insertions(+), 117 deletions(-)
>>
>> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
>> index 2513dfc0..0f9f7265 100644
>> --- a/lib/i915/i915_blt.c
>> +++ b/lib/i915/i915_blt.c
>> @@ -1053,6 +1053,87 @@ int blt_fast_copy(int i915,
>> return ret;
>> }
>>
>
> You need to add descriptions to all lib functions you added.
I wrote in my cover letter that it's WIP and will add it in v2.
>> +void set_geom(struct blt_copy_object *obj, uint32_t pitch,
> ------- ^
> The name was ok inside test, but in lib imho it's better add
> some common prefix, maybe blt_ ? For example:
>
> void blt_set_geom(...params here...
>
Suggested by Zbigniewa and already applies, thanks
All the best,
Karolina
>> + int16_t x1, int16_t y1, int16_t x2, int16_t y2,
>> + uint16_t x_offset, uint16_t y_offset)
>> +{
>> + obj->pitch = pitch;
>> + obj->x1 = x1;
>> + obj->y1 = y1;
>> + obj->x2 = x2;
>> + obj->y2 = y2;
>> + obj->x_offset = x_offset;
>> + obj->y_offset = y_offset;
>> +}
>> +
>> +void set_batch(struct blt_copy_batch *batch,
> ------- ^
>
>> + uint32_t handle, uint64_t size, uint32_t region)
>> +{
>> + batch->handle = handle;
>> + batch->size = size;
>> + batch->region = region;
>> +}
>> +
>> +struct blt_copy_object *
>> +create_object(int i915, uint32_t region,
> ------- ^
>
>> + uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
>> + enum tiling_type tiling,
>> + enum blt_compression compression,
>> + enum blt_compression_type compression_type,
>> + bool create_mapping)
>> +{
>> + struct blt_copy_object *obj;
>> + uint64_t size = width * height * bpp / 8;
>> + uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
>> + uint32_t handle;
>> +
>> + obj = calloc(1, sizeof(*obj));
>> +
>> + obj->size = size;
>> + igt_assert(__gem_create_in_memory_regions(i915, &handle,
>> + &size, region) == 0);
>> +
>> + set_object(obj, handle, size, region, mocs, tiling,
>> + compression, compression_type);
>> + set_geom(obj, stride, 0, 0, width, height, 0, 0);
>> +
>> + if (create_mapping)
>> + obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
>> + PROT_READ | PROT_WRITE);
>> +
>> + return obj;
>> +}
>> +
>> +void destroy_object(int i915, struct blt_copy_object *obj)
> ------- ^
>
>> +{
>> + if (obj->ptr)
>> + munmap(obj->ptr, obj->size);
>> +
>> + gem_close(i915, obj->handle);
>> + free(obj);
>> +}
>> +
>> +void set_object(struct blt_copy_object *obj,
> ------- ^
> blt_set_object
>
>> + uint32_t handle, uint64_t size, uint32_t region,
>> + uint8_t mocs, enum tiling_type tiling,
>> + enum blt_compression compression,
>> + enum blt_compression_type compression_type)
>> +{
>> + obj->handle = handle;
>> + obj->size = size;
>> + obj->region = region;
>> + obj->mocs = mocs;
>> + obj->tiling = tiling;
>> + obj->compression = compression;
>> + obj->compression_type = compression_type;
>> +}
>> +
>> +void set_blt_object(struct blt_copy_object *obj,
> ------- ^
> This will clash with above name blt_set_object ?
> Maybe blt_set_copy_object ?
>
> Regards,
> Kamil
>
>> + const struct blt_copy_object *orig)
>> +{
>> + memcpy(obj, orig, sizeof(*obj));
>> +}
>> +
>> /**
>> * blt_surface_fill_rect:
>> * @i915: drm fd
>> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
>> index f1cf5408..1ef459c8 100644
>> --- a/lib/i915/i915_blt.h
>> +++ b/lib/i915/i915_blt.h
>> @@ -198,6 +198,28 @@ int blt_fast_copy(int i915,
>> uint64_t ahnd,
>> const struct blt_copy_data *blt);
>>
>> +void set_geom(struct blt_copy_object *obj, uint32_t pitch,
>> + int16_t x1, int16_t y1, int16_t x2, int16_t y2,
>> + uint16_t x_offset, uint16_t y_offset);
>> +void set_batch(struct blt_copy_batch *batch,
>> + uint32_t handle, uint64_t size, uint32_t region);
>> +
>> +struct blt_copy_object *
>> +create_object(int i915, uint32_t region,
>> + uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
>> + enum tiling_type tiling,
>> + enum blt_compression compression,
>> + enum blt_compression_type compression_type,
>> + bool create_mapping);
>> +void destroy_object(int i915, struct blt_copy_object *obj);
>> +void set_object(struct blt_copy_object *obj,
>> + uint32_t handle, uint64_t size, uint32_t region,
>> + uint8_t mocs, enum tiling_type tiling,
>> + enum blt_compression compression,
>> + enum blt_compression_type compression_type);
>> +void set_blt_object(struct blt_copy_object *obj,
>> + const struct blt_copy_object *orig);
>> +
>> void blt_surface_info(const char *info,
>> const struct blt_copy_object *obj);
>> void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
>> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
>> index 4c137c94..30ee60fd 100644
>> --- a/tests/i915/gem_ccs.c
>> +++ b/tests/i915/gem_ccs.c
>> @@ -44,42 +44,6 @@ struct test_config {
>> bool suspend_resume;
>> };
>>
>> -static void set_object(struct blt_copy_object *obj,
>> - uint32_t handle, uint64_t size, uint32_t region,
>> - uint8_t mocs, enum tiling_type tiling,
>> - enum blt_compression compression,
>> - enum blt_compression_type compression_type)
>> -{
>> - obj->handle = handle;
>> - obj->size = size;
>> - obj->region = region;
>> - obj->mocs = mocs;
>> - obj->tiling = tiling;
>> - obj->compression = compression;
>> - obj->compression_type = compression_type;
>> -}
>> -
>> -static void set_geom(struct blt_copy_object *obj, uint32_t pitch,
>> - int16_t x1, int16_t y1, int16_t x2, int16_t y2,
>> - uint16_t x_offset, uint16_t y_offset)
>> -{
>> - obj->pitch = pitch;
>> - obj->x1 = x1;
>> - obj->y1 = y1;
>> - obj->x2 = x2;
>> - obj->y2 = y2;
>> - obj->x_offset = x_offset;
>> - obj->y_offset = y_offset;
>> -}
>> -
>> -static void set_batch(struct blt_copy_batch *batch,
>> - uint32_t handle, uint64_t size, uint32_t region)
>> -{
>> - batch->handle = handle;
>> - batch->size = size;
>> - batch->region = region;
>> -}
>> -
>> static void set_object_ext(struct blt_block_copy_object_ext *obj,
>> uint8_t compression_format,
>> uint16_t surface_width, uint16_t surface_height,
>> @@ -105,51 +69,6 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
>> obj->access_type = access_type;
>> }
>>
>> -static struct blt_copy_object *
>> -create_object(int i915, uint32_t region,
>> - uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
>> - enum tiling_type tiling,
>> - enum blt_compression compression,
>> - enum blt_compression_type compression_type,
>> - bool create_mapping)
>> -{
>> - struct blt_copy_object *obj;
>> - uint64_t size = width * height * bpp / 8;
>> - uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
>> - uint32_t handle;
>> -
>> - obj = calloc(1, sizeof(*obj));
>> -
>> - obj->size = size;
>> - igt_assert(__gem_create_in_memory_regions(i915, &handle,
>> - &size, region) == 0);
>> -
>> - set_object(obj, handle, size, region, mocs, tiling,
>> - compression, compression_type);
>> - set_geom(obj, stride, 0, 0, width, height, 0, 0);
>> -
>> - if (create_mapping)
>> - obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
>> - PROT_READ | PROT_WRITE);
>> -
>> - return obj;
>> -}
>> -
>> -static void destroy_object(int i915, struct blt_copy_object *obj)
>> -{
>> - if (obj->ptr)
>> - munmap(obj->ptr, obj->size);
>> -
>> - gem_close(i915, obj->handle);
>> - free(obj);
>> -}
>> -
>> -static void set_blt_object(struct blt_copy_object *obj,
>> - const struct blt_copy_object *orig)
>> -{
>> - memcpy(obj, orig, sizeof(*obj));
>> -}
>> -
>> #define PRINT_SURFACE_INFO(name, obj) do { \
>> if (param.print_surface_info) \
>> blt_surface_info((name), (obj)); } while (0)
>> diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
>> index 8cff35d5..746fbf80 100644
>> --- a/tests/i915/gem_lmem_swapping.c
>> +++ b/tests/i915/gem_lmem_swapping.c
>> @@ -76,42 +76,6 @@ struct object {
>> struct blt_copy_object *blt_obj;
>> };
>>
>> -static void set_object(struct blt_copy_object *obj,
>> - uint32_t handle, uint64_t size, uint32_t region,
>> - uint8_t mocs, enum tiling_type tiling,
>> - enum blt_compression compression,
>> - enum blt_compression_type compression_type)
>> -{
>> - obj->handle = handle;
>> - obj->size = size;
>> - obj->region = region;
>> - obj->mocs = mocs;
>> - obj->tiling = tiling;
>> - obj->compression = compression;
>> - obj->compression_type = compression_type;
>> -}
>> -
>> -static void set_geom(struct blt_copy_object *obj, uint32_t pitch,
>> - int16_t x1, int16_t y1, int16_t x2, int16_t y2,
>> - uint16_t x_offset, uint16_t y_offset)
>> -{
>> - obj->pitch = pitch;
>> - obj->x1 = x1;
>> - obj->y1 = y1;
>> - obj->x2 = x2;
>> - obj->y2 = y2;
>> - obj->x_offset = x_offset;
>> - obj->y_offset = y_offset;
>> -}
>> -
>> -static void set_batch(struct blt_copy_batch *batch,
>> - uint32_t handle, uint64_t size, uint32_t region)
>> -{
>> - batch->handle = handle;
>> - batch->size = size;
>> - batch->region = region;
>> -}
>> -
>> static void set_object_ext(struct blt_block_copy_object_ext *obj,
>> uint8_t compression_format,
>> uint16_t surface_width, uint16_t surface_height,
>> --
>> 2.25.1
>>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats
2022-12-21 17:58 ` Kamil Konieczny
@ 2022-12-22 9:51 ` Karolina Stolarek
0 siblings, 0 replies; 22+ messages in thread
From: Karolina Stolarek @ 2022-12-22 9:51 UTC (permalink / raw)
To: Kamil Konieczny; +Cc: igt-dev
On 21.12.2022 18:58, Kamil Konieczny wrote:
> Hi,
>
> On 2022-12-20 at 12:49:10 +0100, Zbigniew Kempczyński wrote:
>> On Mon, Dec 19, 2022 at 12:49:08PM +0100, Karolina Stolarek wrote:
>>> Add structs to describe what blitter commands and tiling formats are
>>> supported per platform. Introduce functions that check which blitter
>>> commands are supported, update the tests to reflect that change.
>>> Use new enum tiling_format in i915_blt lib and block copy tests.
>>>
>>> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
>>> ---
>>> lib/i915/blt_tiling.c | 371 +++++++++++++++++++++++++++++++++
>>> lib/i915/blt_tiling.h | 64 ++++++
>>> lib/i915/i915_blt.c | 60 +-----
>>> lib/i915/i915_blt.h | 14 +-
>>> lib/meson.build | 1 +
>>> tests/i915/gem_ccs.c | 19 +-
>>> tests/i915/gem_lmem_swapping.c | 2 +-
>>> 7 files changed, 456 insertions(+), 75 deletions(-)
>>> create mode 100644 lib/i915/blt_tiling.c
>>> create mode 100644 lib/i915/blt_tiling.h
>>>
>>> diff --git a/lib/i915/blt_tiling.c b/lib/i915/blt_tiling.c
>>> new file mode 100644
>>> index 00000000..41a3fe25
>>> --- /dev/null
>>> +++ b/lib/i915/blt_tiling.c
>>> @@ -0,0 +1,371 @@
>>> +// SPDX-License-Identifier: MIT
>>> +/*
>>> + * Copyright © 2022 Intel Corporation
>>> + */
>>> +
>>> +#include "blt_tiling.h"
>>> +
>>> +#define BLT_STR_MAX 200
>>> +#define TILE_STR_MAX 60
>>> +
>>> +static bool matches_gen12_atsm(uint16_t devid)
>>> +{
>>> + return IS_DG2(devid) && intel_display_ver(devid) == 0;
>>> +}
>>> +
>>> +static bool matches_gen12_dg2(uint16_t devid)
>>> +{
>>> + return IS_DG2(devid);
>>> +}
>>> +
>>> +static bool matches_gen12_generic(uint16_t devid)
>>> +{
>>> + return !(matches_gen12_dg2(devid) || matches_gen12_atsm(devid));
>>> +}
>>> +
>>> +static const struct blt_cmd_info generic_info = {
>>> + .gen_max = -1
>>> +};
>>> +
>>> +/* No blitter-specific commands available */
>>> +static const struct blt_cmd_info pre_gen6_info = {
>>> + .gen_max = 5,
>>> +};
>>> +
>>> +static const struct blt_cmd_info pre_gen8_info = {
>>> + .gen_min = 6,
>>> + .gen_max = 7,
>>> + .cmd_num = 2,
>>> + .supported_blt_cmds = SRC_COPY | XY_SRC_COPY,
>>> + .supported_tiling = {
>>
>> If supported_tiling would point to array of pointers you can add
>> terminating NULL element. The .cmd_num can be removed and you
>> decrease of risk of mistake here.
>>
>>> + (struct blt_tiling_info){
>>> + .blt_cmd_type = SRC_COPY,
>>> + .supported_tiling = T_LINEAR
>>> + },
>>
>> You may use array initialization:
>>
>> [SRC_COPY] = &src_copy,
>> [XY_SRC_COPY] = &xy_src_copy
>> ...
>>
>> but SRC_COPY, XY_SRC_COPY, ... better should be contigues, not bitflags.
>>
>> Apart of that some initialization macro would make this code more readable,
>> like:
>>
>>> + (struct blt_tiling_info){
>>> + .blt_cmd_type = XY_SRC_COPY,
>>> + .supported_tiling = T_LINEAR | T_XMAJOR
>>> + }
>>
>> BLT_INFO(XY_SRC_COPY, T_LINEAR | T_XMAJOR)
>>
>> and instead of gen_min/gen_max I would just inject this directly to
>> intel_device_info.c, like:
>
> This will put more work in creating device info and would
> require using bitfields so maybe do not do this ?
I'd like to keep the bitfields, you can see at the first glance what
tiling is here. Still, I'm facing issues with adding this information to
intel_device_info, so maybe I'll keep the definitions in the library itself.
Thanks,
Karolina
>
> Regards,
> Kamil
>
>>
>> .blt_tiling = pre_gen8_info
>>
>> For render we might reuse same info definition, like:
>>
>> .render_tiling = pre_gen8_info
>>
>> or point to separate if there're tiling differences.
>>
>> --
>> Zbigniew
>>
>>> + }
>>> +};
>>> +
>>> +static const struct blt_cmd_info gen8_info = {
>>> + .gen_min = 8,
>>> + .gen_max = 8,
>>> + .cmd_num = 1,
>>> + .supported_blt_cmds = XY_SRC_COPY,
>>> + .supported_tiling = {
>>> + (struct blt_tiling_info){
>>> + .blt_cmd_type = XY_SRC_COPY,
>>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>>> + }
>>> + }
>>> +};
>>> +
>>> +static const struct blt_cmd_info gen11_info = {
>>> + .gen_min = 9,
>>> + .gen_max = 11,
>>> + .cmd_num = 2,
>>> + .supported_blt_cmds = XY_SRC_COPY | XY_FAST_COPY,
>>> + .supported_tiling = {
>>> + (struct blt_tiling_info){
>>> + .blt_cmd_type = XY_SRC_COPY,
>>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>>> + },
>>> + (struct blt_tiling_info){
>>> + .blt_cmd_type = XY_FAST_COPY,
>>> + .supported_tiling = T_LINEAR | T_YMAJOR | T_YFMAJOR | T_TILE64
>>> + }
>>> + }
>>> +};
>>> +
>>> +#define GEN12_FIELDS \
>>> + .gen_min = 12, \
>>> + .gen_max = 12, \
>>> + .cmd_num = 3, \
>>> + .supported_blt_cmds = XY_SRC_COPY | XY_FAST_COPY | XY_BLOCK_COPY
>>> +
>>> +static const struct blt_cmd_info gen12_info = {
>>> + GEN12_FIELDS,
>>> + .matches_platform = matches_gen12_generic,
>>> + .supported_tiling = {
>>> + (struct blt_tiling_info){
>>> + .blt_cmd_type = XY_SRC_COPY,
>>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>>> + },
>>> + (struct blt_tiling_info){
>>> + .blt_cmd_type = XY_FAST_COPY,
>>> + .supported_tiling = T_LINEAR | T_YMAJOR | T_TILE4 | T_TILE64
>>> + },
>>> + (struct blt_tiling_info){
>>> + .blt_cmd_type = XY_BLOCK_COPY,
>>> + .supported_tiling = T_LINEAR | T_YMAJOR
>>> + }
>>> + }
>>> +};
>>> +
>>> +static const struct blt_cmd_info gen12_dg2_info = {
>>> + GEN12_FIELDS,
>>> + .matches_platform = matches_gen12_dg2,
>>> + .supported_tiling = {
>>> + (struct blt_tiling_info){
>>> + .blt_cmd_type = XY_SRC_COPY,
>>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>>> + },
>>> + (struct blt_tiling_info){
>>> + .blt_cmd_type = XY_FAST_COPY,
>>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
>>> + },
>>> + (struct blt_tiling_info){
>>> + .blt_cmd_type = XY_BLOCK_COPY,
>>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
>>> + }
>>> + }
>>> +};
>>> +
>>> +static const struct blt_cmd_info gen12_atsm_info = {
>>> + GEN12_FIELDS,
>>> + .matches_platform = matches_gen12_atsm,
>>> + .supported_tiling = {
>>> + (struct blt_tiling_info){
>>> + .blt_cmd_type = XY_SRC_COPY,
>>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>>> + },
>>> + (struct blt_tiling_info){
>>> + .blt_cmd_type = XY_FAST_COPY,
>>> + .supported_tiling = T_LINEAR | T_TILE4 | T_TILE64
>>> + },
>>> + (struct blt_tiling_info){
>>> + .blt_cmd_type = XY_BLOCK_COPY,
>>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
>>> + }
>>> + }
>>> +};
>>> +
>>> +static const struct blt_cmd_info blt_gen_configs[] = {
>>> + pre_gen6_info,
>>> + pre_gen8_info,
>>> + gen8_info,
>>> + gen11_info,
>>> + generic_info
>>> +};
>>> +
>>> +static const struct blt_cmd_info blt_devid_configs[] = {
>>> + gen12_info,
>>> + gen12_dg2_info,
>>> + gen12_atsm_info,
>>> + generic_info
>>> +};
>>> +
>>> +static const struct blt_cmd_info *get_devid_config(uint16_t devid)
>>> +{
>>> + for (int i = 0; blt_devid_configs[i].gen_max != -1; i++)
>>> + if (blt_devid_configs[i].matches_platform(devid))
>>> + return &blt_devid_configs[i];
>>> + return NULL;
>>> +}
>>> +
>>> +static const struct blt_cmd_info *get_gen_config(uint16_t devid)
>>> +{
>>> + unsigned int gen = intel_gen(devid);
>>> +
>>> + for (int i = 0; blt_gen_configs[i].gen_max != -1; i++)
>>> + if (gen >= blt_gen_configs[i].gen_min &&
>>> + gen <= blt_gen_configs[i].gen_max)
>>> + return &blt_gen_configs[i];
>>> + return NULL;
>>> +}
>>> +
>>> +static const struct blt_cmd_info *get_blt_cmd_config(uint16_t devid)
>>> +{
>>> + if (IS_GEN12(devid))
>>> + return get_devid_config(devid);
>>> + else
>>> + return get_gen_config(devid);
>>> +}
>>> +
>>> +static const struct blt_tiling_info
>>> + *get_tiling_config(const struct blt_cmd_info *info, enum blt_cmd_type type)
>>> +{
>>> + igt_require_f(info, "No config found for the platform\n");
>>> +
>>> + for (int i = 0; i < BLT_CMD_MAX; i++)
>>> + if (info->supported_tiling[i].blt_cmd_type == type)
>>> + return &info->supported_tiling[i];
>>> +
>>> + return NULL;
>>> +}
>>> +
>>> +static const char *blt_cmd_name(enum blt_cmd_type cmd)
>>> +{
>>> + switch (cmd) {
>>> + case SRC_COPY: return "SRC_COPY_BLT";
>>> + case XY_SRC_COPY: return "XY_SRC_COPY_BLT";
>>> + case XY_FAST_COPY: return "XY_FAST_COPY_BLT";
>>> + case XY_BLOCK_COPY: return "XY_BLOCK_COPY_BLT";
>>> + }
>>> +
>>> + return NULL;
>>> +}
>>> +
>>> +const char *blt_tiling_name(enum tiling_type tiling)
>>> +{
>>> + switch (tiling) {
>>> + case T_LINEAR: return "linear";
>>> + case T_XMAJOR: return "xmajor";
>>> + case T_YMAJOR: return "ymajor";
>>> + case T_TILE4: return "tile4";
>>> + case T_TILE64: return "tile64";
>>> + case T_YFMAJOR: return "yfmajor";
>>> + }
>>> +
>>> + return NULL;
>>> +}
>>> +
>>> +static bool blt_cmd_supports_tiling(int i915, enum blt_cmd_type type, enum tiling_type tiling)
>>> +{
>>> + uint16_t devid = intel_get_drm_devid(i915);
>>> + struct blt_cmd_info const *info = get_blt_cmd_config(devid);
>>> + struct blt_tiling_info const *tile_config = get_tiling_config(info, type);
>>> +
>>> + /* no config means no support for that tiling */
>>> + if (!tile_config)
>>> + return false;
>>> +
>>> + return tile_config->supported_tiling & tiling;
>>> +}
>>> +
>>> +bool block_copy_supports_tiling(int i915, enum tiling_type tiling)
>>> +{
>>> + return blt_cmd_supports_tiling(i915, XY_BLOCK_COPY, tiling);
>>> +}
>>> +
>>> +bool fast_copy_supports_tiling(int i915, enum tiling_type tiling)
>>> +{
>>> + return blt_cmd_supports_tiling(i915, XY_FAST_COPY, tiling);
>>> +}
>>> +
>>> +bool xy_src_copy_supports_tiling(int i915, enum tiling_type tiling)
>>> +{
>>> + return blt_cmd_supports_tiling(i915, XY_SRC_COPY, tiling);
>>> +}
>>> +
>>> +bool src_copy_supports_tiling(int i915, enum tiling_type tiling)
>>> +{
>>> + return blt_cmd_supports_tiling(i915, SRC_COPY, tiling);
>>> +}
>>> +
>>> +static bool blt_supports_command(int i915, enum blt_cmd_type type)
>>> +{
>>> + uint16_t devid = intel_get_drm_devid(i915);
>>> + struct blt_cmd_info const *info = get_blt_cmd_config(devid);
>>> +
>>> + igt_require_f(info, "No config found for the platform\n");
>>> +
>>> + return info->supported_blt_cmds & type;
>>> +}
>>> +
>>> +/*
>>> + * A general check per platform. As the block copy support is defined per engine,
>>> + * the more detailed check should use gem_engine_can_block_copy()
>>> + */
>>> +bool can_block_copy(int i915)
>>> +{
>>> + return blt_supports_command(i915, XY_BLOCK_COPY);
>>> +}
>>> +
>>> +bool can_fast_copy(int i915)
>>> +{
>>> + return blt_supports_command(i915, XY_FAST_COPY);
>>> +}
>>> +
>>> +bool can_xy_src_copy(int i915)
>>> +{
>>> + return blt_supports_command(i915, XY_SRC_COPY);
>>> +}
>>> +
>>> +bool can_src_copy(int i915)
>>> +{
>>> + /* quickly rule out higher gens */
>>> + if (intel_gen(intel_get_drm_devid(i915)) > 8)
>>> + return false;
>>> +
>>> + return blt_supports_command(i915, SRC_COPY);
>>> +}
>>> +
>>> +/* Info dump functions */
>>> +static void append_tile(uint32_t tile, char *tile_str)
>>> +{
>>> + char const *tile_name;
>>> +
>>> + if (tile) {
>>> + tile_name = blt_tiling_name(tile);
>>> + snprintf(tile_str + strlen(tile_str), strlen(tile_name) + 2, "%s ", tile_name);
>>> + }
>>> +}
>>> +
>>> +static void get_tiling_info(struct blt_cmd_info const *info, enum blt_cmd_type type, char *tile_str)
>>> +{
>>> + uint32_t mask;
>>> + struct blt_tiling_info const *tiling = get_tiling_config(info, type);
>>> +
>>> + if (tiling) {
>>> + for (int i = 0; i < T_MAX_SHIFT; i++) {
>>> + mask = 1 << i;
>>> + append_tile(tiling->supported_tiling & mask, tile_str);
>>> + }
>>> + }
>>> +
>>> + tile_str[strlen(tile_str) - 1] = '\0';
>>> +}
>>> +
>>> +static const char *extract_cmd(const struct blt_cmd_info *info, uint32_t mask)
>>> +{
>>> + return blt_cmd_name(info->supported_blt_cmds & mask);
>>> +}
>>> +
>>> +void dump_devid_blt_info(uint16_t devid)
>>> +{
>>> + uint32_t cmd_mask;
>>> + char tiling_str[TILE_STR_MAX];
>>> + char ln_str[BLT_STR_MAX];
>>> + char const *blt_type_str;
>>> + const char *ln_intro = " * ";
>>> + struct blt_cmd_info const *info;
>>> +
>>> + info = get_blt_cmd_config(devid);
>>> +
>>> + if (!info) {
>>> + igt_warn("No config available\n");
>>> + return;
>>> + }
>>> +
>>> + igt_info("Supported blitter commands:\n");
>>> +
>>> + for (int i = 0; i < BLT_CMD_MAX; i++) {
>>> + cmd_mask = 1 << i;
>>> + blt_type_str = extract_cmd(info, cmd_mask);
>>> +
>>> + if (blt_type_str) {
>>> + memset(ln_str, '\0', sizeof(char) * BLT_STR_MAX);
>>> + memset(tiling_str, '\0', sizeof(char) * TILE_STR_MAX);
>>> +
>>> + snprintf(ln_str,
>>> + strlen(ln_intro) + strlen(blt_type_str) + 1,
>>> + "%s%s", ln_intro, blt_type_str);
>>> +
>>> + get_tiling_info(info, cmd_mask, tiling_str);
>>> +
>>> + snprintf(ln_str + strlen(ln_str),
>>> + strlen(tiling_str) + 5,
>>> + " [%s]", tiling_str);
>>> +
>>> + igt_info("%s\n", ln_str);
>>> + }
>>> + }
>>> +}
>>> +
>>> +void dump_current_blt_info(int i915)
>>> +{
>>> + dump_devid_blt_info(intel_get_drm_devid(i915));
>>> +}
>>> diff --git a/lib/i915/blt_tiling.h b/lib/i915/blt_tiling.h
>>> new file mode 100644
>>> index 00000000..44ef45ca
>>> --- /dev/null
>>> +++ b/lib/i915/blt_tiling.h
>>> @@ -0,0 +1,64 @@
>>> +/* SPDX-License-Identifier: MIT */
>>> +/*
>>> + * Copyright © 2022 Intel Corporation
>>> + */
>>> +
>>> +#ifndef BLT_TILING_H
>>> +#define BLT_TILING_H
>>> +
>>> +#include "igt.h"
>>> +
>>> +#define BLT_CMD_MAX 3
>>> +#define T_MAX_SHIFT 6
>>> +#define PLATFORMS_MAX 5
>>> +
>>> +enum tiling_type {
>>> + T_LINEAR = (1),
>>> + T_XMAJOR = (1 << 1),
>>> + T_YMAJOR = (1 << 2),
>>> + T_TILE4 = (1 << 3),
>>> + T_TILE64 = (1 << 4),
>>> + T_YFMAJOR = (1 << 5),
>>> +};
>>> +
>>> +#define for_each_tiling(__tiling) \
>>> + for (__tiling = T_LINEAR; __tiling <= T_YFMAJOR; __tiling = __tiling << 1)
>>> +
>>> +enum blt_cmd_type {
>>> + SRC_COPY = (1),
>>> + XY_SRC_COPY = (1 << 1),
>>> + XY_FAST_COPY = (1 << 2),
>>> + XY_BLOCK_COPY = (1 << 3),
>>> +};
>>> +
>>> +struct blt_tiling_info {
>>> + enum blt_cmd_type blt_cmd_type;
>>> + uint32_t supported_tiling;
>>> +};
>>> +
>>> +struct blt_cmd_info {
>>> + uint32_t supported_blt_cmds;
>>> + struct blt_tiling_info supported_tiling[BLT_CMD_MAX];
>>> + uint32_t cmd_num;
>>> +
>>> + uint32_t gen_min;
>>> + uint32_t gen_max;
>>> +
>>> + bool (*matches_platform)(uint16_t devid);
>>> +};
>>> +
>>> +void dump_current_blt_info(int i915);
>>> +void dump_devid_blt_info(uint16_t devid);
>>> +
>>> +bool can_block_copy(int i915);
>>> +bool can_fast_copy(int i915);
>>> +bool can_xy_src_copy(int i915);
>>> +bool can_src_copy(int i915);
>>> +
>>> +bool block_copy_supports_tiling(int i915, enum tiling_type tiling);
>>> +bool fast_copy_supports_tiling(int i915, enum tiling_type tiling);
>>> +bool xy_src_copy_supports_tiling(int i915, enum tiling_type tiling);
>>> +bool src_copy_supports_tiling(int i915, enum tiling_type tiling);
>>> +
>>> +const char *blt_tiling_name(enum tiling_type tiling);
>>> +#endif // BLT_TILING_H
>>> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
>>> index 54193565..9b291862 100644
>>> --- a/lib/i915/i915_blt.c
>>> +++ b/lib/i915/i915_blt.c
>>> @@ -207,59 +207,7 @@ bool blt_supports_compression(int i915)
>>> return HAS_FLATCCS(devid);
>>> }
>>>
>>> -/**
>>> - * blt_supports_tiling:
>>> - * @i915: drm fd
>>> - * @tiling: tiling id
>>> - *
>>> - * Function checks if blitter supports @tiling on @i915 device.
>>> - *
>>> - * Returns:
>>> - * true if it does, false otherwise.
>>> - */
>>> -bool blt_supports_tiling(int i915, enum blt_tiling tiling)
>>> -{
>>> - uint32_t devid = intel_get_drm_devid(i915);
>>> -
>>> - if (tiling == T_XMAJOR) {
>>> - if (IS_TIGERLAKE(devid) || IS_DG1(devid))
>>> - return false;
>>> - else
>>> - return true;
>>> - }
>>> -
>>> - if (tiling == T_YMAJOR) {
>>> - if (IS_TIGERLAKE(devid) || IS_DG1(devid))
>>> - return true;
>>> - else
>>> - return false;
>>> - }
>>> -
>>> - return true;
>>> -}
>>> -
>>> -/**
>>> - * blt_tiling_name:
>>> - * @tiling: tiling id
>>> - *
>>> - * Returns:
>>> - * name of @tiling passed. Useful to build test names.
>>> - */
>>> -const char *blt_tiling_name(enum blt_tiling tiling)
>>> -{
>>> - switch (tiling) {
>>> - case T_LINEAR: return "linear";
>>> - case T_XMAJOR: return "xmajor";
>>> - case T_YMAJOR: return "ymajor";
>>> - case T_TILE4: return "tile4";
>>> - case T_TILE64: return "tile64";
>>> - }
>>> -
>>> - igt_warn("invalid tiling passed: %d\n", tiling);
>>> - return NULL;
>>> -}
>>> -
>>> -static int __block_tiling(enum blt_tiling tiling)
>>> +static int __block_tiling(enum tiling_type tiling)
>>> {
>>> switch (tiling) {
>>> case T_LINEAR: return 0;
>>> @@ -267,6 +215,9 @@ static int __block_tiling(enum blt_tiling tiling)
>>> case T_YMAJOR: return 1;
>>> case T_TILE4: return 2;
>>> case T_TILE64: return 3;
>>> + /* type only supported in gen9 fast copy */
>>> + case T_YFMAJOR:
>>> + break;
>>> }
>>>
>>> igt_warn("invalid tiling passed: %d\n", tiling);
>>> @@ -891,13 +842,14 @@ struct gen12_fast_copy_data {
>>> } dw09;
>>> };
>>>
>>> -static int __fast_tiling(enum blt_tiling tiling)
>>> +static int __fast_tiling(enum tiling_type tiling)
>>> {
>>> switch (tiling) {
>>> case T_LINEAR: return 0;
>>> case T_XMAJOR: return 1;
>>> case T_YMAJOR: return 2;
>>> case T_TILE4: return 2;
>>> + case T_YFMAJOR: return 2;
>>> case T_TILE64: return 3;
>>> }
>>> return 0;
>>> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
>>> index 34db9bb9..f1cf5408 100644
>>> --- a/lib/i915/i915_blt.h
>>> +++ b/lib/i915/i915_blt.h
>>> @@ -47,6 +47,7 @@
>>> #include <malloc.h>
>>> #include "drm.h"
>>> #include "igt.h"
>>> +#include "blt_tiling.h"
>>>
>>> #define CCS_RATIO 256
>>>
>>> @@ -59,14 +60,6 @@ enum blt_color_depth {
>>> CD_128bit,
>>> };
>>>
>>> -enum blt_tiling {
>>> - T_LINEAR,
>>> - T_XMAJOR,
>>> - T_YMAJOR,
>>> - T_TILE4,
>>> - T_TILE64,
>>> -};
>>> -
>>> enum blt_compression {
>>> COMPRESSION_DISABLED,
>>> COMPRESSION_ENABLED,
>>> @@ -83,7 +76,7 @@ struct blt_copy_object {
>>> uint32_t region;
>>> uint64_t size;
>>> uint8_t mocs;
>>> - enum blt_tiling tiling;
>>> + enum tiling_type tiling;
>>> enum blt_compression compression; /* BC only */
>>> enum blt_compression_type compression_type; /* BC only */
>>> uint32_t pitch;
>>> @@ -165,8 +158,7 @@ struct blt_ctrl_surf_copy_data {
>>> };
>>>
>>> bool blt_supports_compression(int i915);
>>> -bool blt_supports_tiling(int i915, enum blt_tiling tiling);
>>> -const char *blt_tiling_name(enum blt_tiling tiling);
>>> +bool blt_supports_tiling(int i915, enum tiling_type tiling);
>>>
>>> uint64_t emit_blt_block_copy(int i915,
>>> uint64_t ahnd,
>>> diff --git a/lib/meson.build b/lib/meson.build
>>> index c79e3e95..33c8daad 100644
>>> --- a/lib/meson.build
>>> +++ b/lib/meson.build
>>> @@ -3,6 +3,7 @@ lib_sources = [
>>> 'dmabuf_sync_file.c',
>>> 'huc_copy.c',
>>> 'i915/gem.c',
>>> + 'i915/blt_tiling.c',
>>> 'i915/gem_context.c',
>>> 'i915/gem_create.c',
>>> 'i915/gem_engine_topology.c',
>>> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
>>> index 751f65e6..4c137c94 100644
>>> --- a/tests/i915/gem_ccs.c
>>> +++ b/tests/i915/gem_ccs.c
>>> @@ -46,7 +46,7 @@ struct test_config {
>>>
>>> static void set_object(struct blt_copy_object *obj,
>>> uint32_t handle, uint64_t size, uint32_t region,
>>> - uint8_t mocs, enum blt_tiling tiling,
>>> + uint8_t mocs, enum tiling_type tiling,
>>> enum blt_compression compression,
>>> enum blt_compression_type compression_type)
>>> {
>>> @@ -108,7 +108,7 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
>>> static struct blt_copy_object *
>>> create_object(int i915, uint32_t region,
>>> uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
>>> - enum blt_tiling tiling,
>>> + enum tiling_type tiling,
>>> enum blt_compression compression,
>>> enum blt_compression_type compression_type,
>>> bool create_mapping)
>>> @@ -374,7 +374,7 @@ static void block_copy(int i915,
>>> const intel_ctx_t *ctx,
>>> const struct intel_execution_engine2 *e,
>>> uint32_t region1, uint32_t region2,
>>> - enum blt_tiling mid_tiling,
>>> + enum tiling_type mid_tiling,
>>> const struct test_config *config)
>>> {
>>> struct blt_copy_data blt = {};
>>> @@ -492,7 +492,7 @@ static void block_multicopy(int i915,
>>> const intel_ctx_t *ctx,
>>> const struct intel_execution_engine2 *e,
>>> uint32_t region1, uint32_t region2,
>>> - enum blt_tiling mid_tiling,
>>> + enum tiling_type mid_tiling,
>>> const struct test_config *config)
>>> {
>>> struct blt_copy3_data blt3 = {};
>>> @@ -581,7 +581,7 @@ static const struct {
>>> const char *suffix;
>>> void (*copyfn)(int, const intel_ctx_t *,
>>> const struct intel_execution_engine2 *,
>>> - uint32_t, uint32_t, enum blt_tiling,
>>> + uint32_t, uint32_t, enum tiling_type,
>>> const struct test_config *);
>>> } copyfns[] = {
>>> [BLOCK_COPY] = { "", block_copy },
>>> @@ -596,6 +596,7 @@ static void block_copy_test(int i915,
>>> {
>>> struct igt_collection *regions;
>>> const struct intel_execution_engine2 *e;
>>> + int tiling;
>>>
>>> if (config->compression && !blt_supports_compression(i915))
>>> return;
>>> @@ -603,8 +604,8 @@ static void block_copy_test(int i915,
>>> if (config->inplace && !config->compression)
>>> return;
>>>
>>> - for (int tiling = T_LINEAR; tiling <= T_TILE64; tiling++) {
>>> - if (!blt_supports_tiling(i915, tiling) ||
>>> + for_each_tiling(tiling) {
>>> + if (!block_copy_supports_tiling(i915, tiling) ||
>>> (param.tiling >= 0 && param.tiling != tiling))
>>> continue;
>>>
>>> @@ -663,7 +664,7 @@ static int opt_handler(int opt, int opt_index, void *data)
>>> igt_debug("Print surface info: %d\n", param.print_surface_info);
>>> break;
>>> case 't':
>>> - param.tiling = atoi(optarg);
>>> + param.tiling = 1 << atoi(optarg);
>>> igt_debug("Tiling: %d\n", param.tiling);
>>> break;
>>> case 'W':
>>> @@ -702,7 +703,7 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
>>> igt_fixture {
>>> i915 = drm_open_driver(DRIVER_INTEL);
>>> igt_require_gem(i915);
>>> - igt_require(AT_LEAST_GEN(intel_get_drm_devid(i915), 12) > 0);
>>> + igt_require(can_block_copy(i915));
>>>
>>> query_info = gem_get_query_memory_regions(i915);
>>> igt_require(query_info);
>>> diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
>>> index 75121d41..8cff35d5 100644
>>> --- a/tests/i915/gem_lmem_swapping.c
>>> +++ b/tests/i915/gem_lmem_swapping.c
>>> @@ -78,7 +78,7 @@ struct object {
>>>
>>> static void set_object(struct blt_copy_object *obj,
>>> uint32_t handle, uint64_t size, uint32_t region,
>>> - uint8_t mocs, enum blt_tiling tiling,
>>> + uint8_t mocs, enum tiling_type tiling,
>>> enum blt_compression compression,
>>> enum blt_compression_type compression_type)
>>> {
>>> --
>>> 2.25.1
>>>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats
2022-12-21 18:31 ` Kamil Konieczny
@ 2022-12-22 10:00 ` Karolina Stolarek
0 siblings, 0 replies; 22+ messages in thread
From: Karolina Stolarek @ 2022-12-22 10:00 UTC (permalink / raw)
To: Kamil Konieczny; +Cc: igt-dev
On 21.12.2022 19:31, Kamil Konieczny wrote:
> Hi Karolina,
>
> please change commit desciption, this is adding new lib,
> not only "describe supported ..." so maybe:
> "add new lib for blitter and tiling formats"
OK, will do so, thanks
>
> On 2022-12-19 at 12:49:08 +0100, Karolina Stolarek wrote:
>> Add structs to describe what blitter commands and tiling formats are
>> supported per platform. Introduce functions that check which blitter
>> commands are supported, update the tests to reflect that change.
>> Use new enum tiling_format in i915_blt lib and block copy tests.
>>
>> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
>> ---
>> lib/i915/blt_tiling.c | 371 +++++++++++++++++++++++++++++++++
> ----------- ^
>> lib/i915/blt_tiling.h | 64 ++++++
> ----------- ^
> It is better to have i915_ here like
> lib/i915/i915_blt_tiling.h
Now it's intel_blt_info.h
>
>> lib/i915/i915_blt.c | 60 +-----
>> lib/i915/i915_blt.h | 14 +-
>> lib/meson.build | 1 +
>> tests/i915/gem_ccs.c | 19 +-
>> tests/i915/gem_lmem_swapping.c | 2 +-
>> 7 files changed, 456 insertions(+), 75 deletions(-)
>> create mode 100644 lib/i915/blt_tiling.c
>> create mode 100644 lib/i915/blt_tiling.h
>>
>> diff --git a/lib/i915/blt_tiling.c b/lib/i915/blt_tiling.c
>> new file mode 100644
>> index 00000000..41a3fe25
>> --- /dev/null
>> +++ b/lib/i915/blt_tiling.c
>> @@ -0,0 +1,371 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2022 Intel Corporation
>> + */
>> +
>> +#include "blt_tiling.h"
>> +
>> +#define BLT_STR_MAX 200
>> +#define TILE_STR_MAX 60
>> +
>> +static bool matches_gen12_atsm(uint16_t devid)
>> +{
>> + return IS_DG2(devid) && intel_display_ver(devid) == 0;
>> +}
>> +
>> +static bool matches_gen12_dg2(uint16_t devid)
>> +{
>> + return IS_DG2(devid);
>> +}
>> +
>> +static bool matches_gen12_generic(uint16_t devid)
>> +{
>> + return !(matches_gen12_dg2(devid) || matches_gen12_atsm(devid));
>> +}
>> +
>> +static const struct blt_cmd_info generic_info = {
>> + .gen_max = -1
>> +};
>> +
>> +/* No blitter-specific commands available */
>> +static const struct blt_cmd_info pre_gen6_info = {
>> + .gen_max = 5,
>> +};
>> +
>> +static const struct blt_cmd_info pre_gen8_info = {
>> + .gen_min = 6,
>> + .gen_max = 7,
>> + .cmd_num = 2,
>> + .supported_blt_cmds = SRC_COPY | XY_SRC_COPY,
>> + .supported_tiling = {
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = SRC_COPY,
>> + .supported_tiling = T_LINEAR
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_SRC_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR
>> + }
>> + }
>> +};
>> +
>> +static const struct blt_cmd_info gen8_info = {
>> + .gen_min = 8,
>> + .gen_max = 8,
>> + .cmd_num = 1,
>> + .supported_blt_cmds = XY_SRC_COPY,
>> + .supported_tiling = {
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_SRC_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>> + }
>> + }
>> +};
>> +
>> +static const struct blt_cmd_info gen11_info = {
>> + .gen_min = 9,
>> + .gen_max = 11,
>> + .cmd_num = 2,
>> + .supported_blt_cmds = XY_SRC_COPY | XY_FAST_COPY,
>> + .supported_tiling = {
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_SRC_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_FAST_COPY,
>> + .supported_tiling = T_LINEAR | T_YMAJOR | T_YFMAJOR | T_TILE64
>> + }
>> + }
>> +};
>> +
>> +#define GEN12_FIELDS \
> ---------- ^
> BLT_GEN12_FIELDS
ack
>
>> + .gen_min = 12, \
>> + .gen_max = 12, \
>> + .cmd_num = 3, \
>> + .supported_blt_cmds = XY_SRC_COPY | XY_FAST_COPY | XY_BLOCK_COPY
>> +
>> +static const struct blt_cmd_info gen12_info = {
>> + GEN12_FIELDS,
>> + .matches_platform = matches_gen12_generic,
>> + .supported_tiling = {
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_SRC_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_FAST_COPY,
>> + .supported_tiling = T_LINEAR | T_YMAJOR | T_TILE4 | T_TILE64
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_BLOCK_COPY,
>> + .supported_tiling = T_LINEAR | T_YMAJOR
>> + }
>> + }
>> +};
>> +
>> +static const struct blt_cmd_info gen12_dg2_info = {
>> + GEN12_FIELDS,
>> + .matches_platform = matches_gen12_dg2,
>> + .supported_tiling = {
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_SRC_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_FAST_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_BLOCK_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
>> + }
>> + }
>> +};
>> +
>> +static const struct blt_cmd_info gen12_atsm_info = {
>> + GEN12_FIELDS,
>> + .matches_platform = matches_gen12_atsm,
>> + .supported_tiling = {
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_SRC_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_YMAJOR
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_FAST_COPY,
>> + .supported_tiling = T_LINEAR | T_TILE4 | T_TILE64
>> + },
>> + (struct blt_tiling_info){
>> + .blt_cmd_type = XY_BLOCK_COPY,
>> + .supported_tiling = T_LINEAR | T_XMAJOR | T_TILE4 | T_TILE64
>> + }
>> + }
>> +};
>> +
>> +static const struct blt_cmd_info blt_gen_configs[] = {
>> + pre_gen6_info,
>> + pre_gen8_info,
>> + gen8_info,
>> + gen11_info,
>> + generic_info
>> +};
>> +
>> +static const struct blt_cmd_info blt_devid_configs[] = {
>> + gen12_info,
>> + gen12_dg2_info,
>> + gen12_atsm_info,
>> + generic_info
>> +};
>> +
>> +static const struct blt_cmd_info *get_devid_config(uint16_t devid)
>> +{
>> + for (int i = 0; blt_devid_configs[i].gen_max != -1; i++)
>> + if (blt_devid_configs[i].matches_platform(devid))
>> + return &blt_devid_configs[i];
>> + return NULL;
>> +}
>> +
>> +static const struct blt_cmd_info *get_gen_config(uint16_t devid)
>> +{
>> + unsigned int gen = intel_gen(devid);
>> +
>> + for (int i = 0; blt_gen_configs[i].gen_max != -1; i++)
>> + if (gen >= blt_gen_configs[i].gen_min &&
>> + gen <= blt_gen_configs[i].gen_max)
>> + return &blt_gen_configs[i];
>> + return NULL;
>> +}
>> +
>> +static const struct blt_cmd_info *get_blt_cmd_config(uint16_t devid)
>> +{
>> + if (IS_GEN12(devid))
>> + return get_devid_config(devid);
>> + else
>> + return get_gen_config(devid);
>> +}
>> +
>> +static const struct blt_tiling_info
>> + *get_tiling_config(const struct blt_cmd_info *info, enum blt_cmd_type type)
>> +{
>> + igt_require_f(info, "No config found for the platform\n");
>> +
>> + for (int i = 0; i < BLT_CMD_MAX; i++)
>> + if (info->supported_tiling[i].blt_cmd_type == type)
>> + return &info->supported_tiling[i];
>> +
>> + return NULL;
>> +}
>> +
>> +static const char *blt_cmd_name(enum blt_cmd_type cmd)
>> +{
>> + switch (cmd) {
>> + case SRC_COPY: return "SRC_COPY_BLT";
>> + case XY_SRC_COPY: return "XY_SRC_COPY_BLT";
>> + case XY_FAST_COPY: return "XY_FAST_COPY_BLT";
>> + case XY_BLOCK_COPY: return "XY_BLOCK_COPY_BLT";
>> + }
>> +
>> + return NULL;
>> +}
>> +
>
> You need to describe public functions in lib (here and below).
Like I said in the cover letter, this will come in v2.
>
>> +const char *blt_tiling_name(enum tiling_type tiling)
>> +{
>> + switch (tiling) {
>> + case T_LINEAR: return "linear";
>> + case T_XMAJOR: return "xmajor";
>> + case T_YMAJOR: return "ymajor";
>> + case T_TILE4: return "tile4";
>> + case T_TILE64: return "tile64";
>> + case T_YFMAJOR: return "yfmajor";
>> + }
>> +
>> + return NULL;
>> +}
>> +
>> +static bool blt_cmd_supports_tiling(int i915, enum blt_cmd_type type, enum tiling_type tiling)
>> +{
>> + uint16_t devid = intel_get_drm_devid(i915);
>> + struct blt_cmd_info const *info = get_blt_cmd_config(devid);
>> + struct blt_tiling_info const *tile_config = get_tiling_config(info, type);
>> +
>> + /* no config means no support for that tiling */
>> + if (!tile_config)
>> + return false;
>> +
>> + return tile_config->supported_tiling & tiling;
>> +}
>> +
>> +bool block_copy_supports_tiling(int i915, enum tiling_type tiling)
>> +{
>> + return blt_cmd_supports_tiling(i915, XY_BLOCK_COPY, tiling);
>> +}
>> +
>> +bool fast_copy_supports_tiling(int i915, enum tiling_type tiling)
>> +{
>> + return blt_cmd_supports_tiling(i915, XY_FAST_COPY, tiling);
>> +}
>> +
>> +bool xy_src_copy_supports_tiling(int i915, enum tiling_type tiling)
>> +{
>> + return blt_cmd_supports_tiling(i915, XY_SRC_COPY, tiling);
>> +}
>> +
>> +bool src_copy_supports_tiling(int i915, enum tiling_type tiling)
>> +{
>> + return blt_cmd_supports_tiling(i915, SRC_COPY, tiling);
>> +}
>> +
>> +static bool blt_supports_command(int i915, enum blt_cmd_type type)
>> +{
>> + uint16_t devid = intel_get_drm_devid(i915);
>> + struct blt_cmd_info const *info = get_blt_cmd_config(devid);
>> +
>> + igt_require_f(info, "No config found for the platform\n");
>> +
>> + return info->supported_blt_cmds & type;
>> +}
>> +
>> +/*
>> + * A general check per platform. As the block copy support is defined per engine,
>> + * the more detailed check should use gem_engine_can_block_copy()
>> + */
>> +bool can_block_copy(int i915)
> ------- ^
> We already use has_ convention so better is has_block_copy
Makes sense, thanks
>
>> +{
>> + return blt_supports_command(i915, XY_BLOCK_COPY);
>> +}
>> +
>> +bool can_fast_copy(int i915)
> ----------- ^
> Why no 'xy' here like has_xy_fast_copy ?
xy_ was added to src copy to show it's a different command. We don't
have fast_copy and xy_fast_copy, so that's why the naming is different.
>
>> +{
>> + return blt_supports_command(i915, XY_FAST_COPY);
>> +}
>> +
>> +bool can_xy_src_copy(int i915)
>> +{
>> + return blt_supports_command(i915, XY_SRC_COPY);
>> +}
>> +
>> +bool can_src_copy(int i915)
>> +{
>> + /* quickly rule out higher gens */
>> + if (intel_gen(intel_get_drm_devid(i915)) > 8)
>> + return false;
>> +
>> + return blt_supports_command(i915, SRC_COPY);
>> +}
>> +
>> +/* Info dump functions */
>> +static void append_tile(uint32_t tile, char *tile_str)
>> +{
>> + char const *tile_name;
>> +
>> + if (tile) {
>> + tile_name = blt_tiling_name(tile);
>> + snprintf(tile_str + strlen(tile_str), strlen(tile_name) + 2, "%s ", tile_name);
>> + }
>> +}
>> +
>> +static void get_tiling_info(struct blt_cmd_info const *info, enum blt_cmd_type type, char *tile_str)
>> +{
>> + uint32_t mask;
>> + struct blt_tiling_info const *tiling = get_tiling_config(info, type);
>> +
>> + if (tiling) {
>> + for (int i = 0; i < T_MAX_SHIFT; i++) {
>> + mask = 1 << i;
>> + append_tile(tiling->supported_tiling & mask, tile_str);
>> + }
>> + }
>> +
>> + tile_str[strlen(tile_str) - 1] = '\0';
>> +}
>> +
>> +static const char *extract_cmd(const struct blt_cmd_info *info, uint32_t mask)
>> +{
>> + return blt_cmd_name(info->supported_blt_cmds & mask);
>> +}
>> +
>> +void dump_devid_blt_info(uint16_t devid)
>> +{
>> + uint32_t cmd_mask;
>> + char tiling_str[TILE_STR_MAX];
>> + char ln_str[BLT_STR_MAX];
>> + char const *blt_type_str;
>> + const char *ln_intro = " * ";
>> + struct blt_cmd_info const *info;
>> +
>> + info = get_blt_cmd_config(devid);
>> +
>> + if (!info) {
>> + igt_warn("No config available\n");
>> + return;
>> + }
>> +
>> + igt_info("Supported blitter commands:\n");
>> +
>> + for (int i = 0; i < BLT_CMD_MAX; i++) {
>> + cmd_mask = 1 << i;
>> + blt_type_str = extract_cmd(info, cmd_mask);
>> +
>> + if (blt_type_str) {
>> + memset(ln_str, '\0', sizeof(char) * BLT_STR_MAX);
>> + memset(tiling_str, '\0', sizeof(char) * TILE_STR_MAX);
>> +
>> + snprintf(ln_str,
>> + strlen(ln_intro) + strlen(blt_type_str) + 1,
>> + "%s%s", ln_intro, blt_type_str);
>> +
>> + get_tiling_info(info, cmd_mask, tiling_str);
>> +
>> + snprintf(ln_str + strlen(ln_str),
>> + strlen(tiling_str) + 5,
>> + " [%s]", tiling_str);
>> +
>> + igt_info("%s\n", ln_str);
>> + }
>> + }
>> +}
>> +
>> +void dump_current_blt_info(int i915)
> ------------ ^
> imho better just dump_dev_blt_info(int i915)
Not sure what dev would refer to here. Also, it's very likely I'll keep
a function to only dump info for the current device, so we can drop
"current" altogether.
>
>> +{
>> + dump_devid_blt_info(intel_get_drm_devid(i915));
>> +}
>> diff --git a/lib/i915/blt_tiling.h b/lib/i915/blt_tiling.h
>> new file mode 100644
>> index 00000000..44ef45ca
>> --- /dev/null
>> +++ b/lib/i915/blt_tiling.h
>> @@ -0,0 +1,64 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/*
>> + * Copyright © 2022 Intel Corporation
>> + */
>> +
>> +#ifndef BLT_TILING_H
>> +#define BLT_TILING_H
>> +
>> +#include "igt.h"
>> +
>> +#define BLT_CMD_MAX 3
>> +#define T_MAX_SHIFT 6
>> +#define PLATFORMS_MAX 5
>> +
>> +enum tiling_type {
>> + T_LINEAR = (1),
>> + T_XMAJOR = (1 << 1),
>> + T_YMAJOR = (1 << 2),
>> + T_TILE4 = (1 << 3),
>> + T_TILE64 = (1 << 4),
>> + T_YFMAJOR = (1 << 5),
>> +};
>
> Please keep it with simple enum, if you need bitfield maybe introduce
> new type like enum tiling_bits_type ?
That would be redundant information in my opinion, so I would avoid
doing it for tiling information. blt_cmd_type is now a simple enum.
Thanks,
Karolina
> Regards,
> Kamil
>
>> +
>> +#define for_each_tiling(__tiling) \
>> + for (__tiling = T_LINEAR; __tiling <= T_YFMAJOR; __tiling = __tiling << 1)
>> +
>> +enum blt_cmd_type {
>> + SRC_COPY = (1),
>> + XY_SRC_COPY = (1 << 1),
>> + XY_FAST_COPY = (1 << 2),
>> + XY_BLOCK_COPY = (1 << 3),
>> +};
>> +
>> +struct blt_tiling_info {
>> + enum blt_cmd_type blt_cmd_type;
>> + uint32_t supported_tiling;
>> +};
>> +
>> +struct blt_cmd_info {
>> + uint32_t supported_blt_cmds;
>> + struct blt_tiling_info supported_tiling[BLT_CMD_MAX];
>> + uint32_t cmd_num;
>> +
>> + uint32_t gen_min;
>> + uint32_t gen_max;
>> +
>> + bool (*matches_platform)(uint16_t devid);
>> +};
>> +
>> +void dump_current_blt_info(int i915);
>> +void dump_devid_blt_info(uint16_t devid);
>> +
>> +bool can_block_copy(int i915);
>> +bool can_fast_copy(int i915);
>> +bool can_xy_src_copy(int i915);
>> +bool can_src_copy(int i915);
>> +
>> +bool block_copy_supports_tiling(int i915, enum tiling_type tiling);
>> +bool fast_copy_supports_tiling(int i915, enum tiling_type tiling);
>> +bool xy_src_copy_supports_tiling(int i915, enum tiling_type tiling);
>> +bool src_copy_supports_tiling(int i915, enum tiling_type tiling);
>> +
>> +const char *blt_tiling_name(enum tiling_type tiling);
>> +#endif // BLT_TILING_H
>> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
>> index 54193565..9b291862 100644
>> --- a/lib/i915/i915_blt.c
>> +++ b/lib/i915/i915_blt.c
>> @@ -207,59 +207,7 @@ bool blt_supports_compression(int i915)
>> return HAS_FLATCCS(devid);
>> }
>>
>> -/**
>> - * blt_supports_tiling:
>> - * @i915: drm fd
>> - * @tiling: tiling id
>> - *
>> - * Function checks if blitter supports @tiling on @i915 device.
>> - *
>> - * Returns:
>> - * true if it does, false otherwise.
>> - */
>> -bool blt_supports_tiling(int i915, enum blt_tiling tiling)
>> -{
>> - uint32_t devid = intel_get_drm_devid(i915);
>> -
>> - if (tiling == T_XMAJOR) {
>> - if (IS_TIGERLAKE(devid) || IS_DG1(devid))
>> - return false;
>> - else
>> - return true;
>> - }
>> -
>> - if (tiling == T_YMAJOR) {
>> - if (IS_TIGERLAKE(devid) || IS_DG1(devid))
>> - return true;
>> - else
>> - return false;
>> - }
>> -
>> - return true;
>> -}
>> -
>> -/**
>> - * blt_tiling_name:
>> - * @tiling: tiling id
>> - *
>> - * Returns:
>> - * name of @tiling passed. Useful to build test names.
>> - */
>> -const char *blt_tiling_name(enum blt_tiling tiling)
>> -{
>> - switch (tiling) {
>> - case T_LINEAR: return "linear";
>> - case T_XMAJOR: return "xmajor";
>> - case T_YMAJOR: return "ymajor";
>> - case T_TILE4: return "tile4";
>> - case T_TILE64: return "tile64";
>> - }
>> -
>> - igt_warn("invalid tiling passed: %d\n", tiling);
>> - return NULL;
>> -}
>> -
>> -static int __block_tiling(enum blt_tiling tiling)
>> +static int __block_tiling(enum tiling_type tiling)
>> {
>> switch (tiling) {
>> case T_LINEAR: return 0;
>> @@ -267,6 +215,9 @@ static int __block_tiling(enum blt_tiling tiling)
>> case T_YMAJOR: return 1;
>> case T_TILE4: return 2;
>> case T_TILE64: return 3;
>> + /* type only supported in gen9 fast copy */
>> + case T_YFMAJOR:
>> + break;
>> }
>>
>> igt_warn("invalid tiling passed: %d\n", tiling);
>> @@ -891,13 +842,14 @@ struct gen12_fast_copy_data {
>> } dw09;
>> };
>>
>> -static int __fast_tiling(enum blt_tiling tiling)
>> +static int __fast_tiling(enum tiling_type tiling)
>> {
>> switch (tiling) {
>> case T_LINEAR: return 0;
>> case T_XMAJOR: return 1;
>> case T_YMAJOR: return 2;
>> case T_TILE4: return 2;
>> + case T_YFMAJOR: return 2;
>> case T_TILE64: return 3;
>> }
>> return 0;
>> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
>> index 34db9bb9..f1cf5408 100644
>> --- a/lib/i915/i915_blt.h
>> +++ b/lib/i915/i915_blt.h
>> @@ -47,6 +47,7 @@
>> #include <malloc.h>
>> #include "drm.h"
>> #include "igt.h"
>> +#include "blt_tiling.h"
>>
>> #define CCS_RATIO 256
>>
>> @@ -59,14 +60,6 @@ enum blt_color_depth {
>> CD_128bit,
>> };
>>
>> -enum blt_tiling {
>> - T_LINEAR,
>> - T_XMAJOR,
>> - T_YMAJOR,
>> - T_TILE4,
>> - T_TILE64,
>> -};
>> -
>> enum blt_compression {
>> COMPRESSION_DISABLED,
>> COMPRESSION_ENABLED,
>> @@ -83,7 +76,7 @@ struct blt_copy_object {
>> uint32_t region;
>> uint64_t size;
>> uint8_t mocs;
>> - enum blt_tiling tiling;
>> + enum tiling_type tiling;
>> enum blt_compression compression; /* BC only */
>> enum blt_compression_type compression_type; /* BC only */
>> uint32_t pitch;
>> @@ -165,8 +158,7 @@ struct blt_ctrl_surf_copy_data {
>> };
>>
>> bool blt_supports_compression(int i915);
>> -bool blt_supports_tiling(int i915, enum blt_tiling tiling);
>> -const char *blt_tiling_name(enum blt_tiling tiling);
>> +bool blt_supports_tiling(int i915, enum tiling_type tiling);
>>
>> uint64_t emit_blt_block_copy(int i915,
>> uint64_t ahnd,
>> diff --git a/lib/meson.build b/lib/meson.build
>> index c79e3e95..33c8daad 100644
>> --- a/lib/meson.build
>> +++ b/lib/meson.build
>> @@ -3,6 +3,7 @@ lib_sources = [
>> 'dmabuf_sync_file.c',
>> 'huc_copy.c',
>> 'i915/gem.c',
>> + 'i915/blt_tiling.c',
>> 'i915/gem_context.c',
>> 'i915/gem_create.c',
>> 'i915/gem_engine_topology.c',
>> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
>> index 751f65e6..4c137c94 100644
>> --- a/tests/i915/gem_ccs.c
>> +++ b/tests/i915/gem_ccs.c
>> @@ -46,7 +46,7 @@ struct test_config {
>>
>> static void set_object(struct blt_copy_object *obj,
>> uint32_t handle, uint64_t size, uint32_t region,
>> - uint8_t mocs, enum blt_tiling tiling,
>> + uint8_t mocs, enum tiling_type tiling,
>> enum blt_compression compression,
>> enum blt_compression_type compression_type)
>> {
>> @@ -108,7 +108,7 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
>> static struct blt_copy_object *
>> create_object(int i915, uint32_t region,
>> uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
>> - enum blt_tiling tiling,
>> + enum tiling_type tiling,
>> enum blt_compression compression,
>> enum blt_compression_type compression_type,
>> bool create_mapping)
>> @@ -374,7 +374,7 @@ static void block_copy(int i915,
>> const intel_ctx_t *ctx,
>> const struct intel_execution_engine2 *e,
>> uint32_t region1, uint32_t region2,
>> - enum blt_tiling mid_tiling,
>> + enum tiling_type mid_tiling,
>> const struct test_config *config)
>> {
>> struct blt_copy_data blt = {};
>> @@ -492,7 +492,7 @@ static void block_multicopy(int i915,
>> const intel_ctx_t *ctx,
>> const struct intel_execution_engine2 *e,
>> uint32_t region1, uint32_t region2,
>> - enum blt_tiling mid_tiling,
>> + enum tiling_type mid_tiling,
>> const struct test_config *config)
>> {
>> struct blt_copy3_data blt3 = {};
>> @@ -581,7 +581,7 @@ static const struct {
>> const char *suffix;
>> void (*copyfn)(int, const intel_ctx_t *,
>> const struct intel_execution_engine2 *,
>> - uint32_t, uint32_t, enum blt_tiling,
>> + uint32_t, uint32_t, enum tiling_type,
>> const struct test_config *);
>> } copyfns[] = {
>> [BLOCK_COPY] = { "", block_copy },
>> @@ -596,6 +596,7 @@ static void block_copy_test(int i915,
>> {
>> struct igt_collection *regions;
>> const struct intel_execution_engine2 *e;
>> + int tiling;
>>
>> if (config->compression && !blt_supports_compression(i915))
>> return;
>> @@ -603,8 +604,8 @@ static void block_copy_test(int i915,
>> if (config->inplace && !config->compression)
>> return;
>>
>> - for (int tiling = T_LINEAR; tiling <= T_TILE64; tiling++) {
>> - if (!blt_supports_tiling(i915, tiling) ||
>> + for_each_tiling(tiling) {
>> + if (!block_copy_supports_tiling(i915, tiling) ||
>> (param.tiling >= 0 && param.tiling != tiling))
>> continue;
>>
>> @@ -663,7 +664,7 @@ static int opt_handler(int opt, int opt_index, void *data)
>> igt_debug("Print surface info: %d\n", param.print_surface_info);
>> break;
>> case 't':
>> - param.tiling = atoi(optarg);
>> + param.tiling = 1 << atoi(optarg);
>> igt_debug("Tiling: %d\n", param.tiling);
>> break;
>> case 'W':
>> @@ -702,7 +703,7 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
>> igt_fixture {
>> i915 = drm_open_driver(DRIVER_INTEL);
>> igt_require_gem(i915);
>> - igt_require(AT_LEAST_GEN(intel_get_drm_devid(i915), 12) > 0);
>> + igt_require(can_block_copy(i915));
>>
>> query_info = gem_get_query_memory_regions(i915);
>> igt_require(query_info);
>> diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
>> index 75121d41..8cff35d5 100644
>> --- a/tests/i915/gem_lmem_swapping.c
>> +++ b/tests/i915/gem_lmem_swapping.c
>> @@ -78,7 +78,7 @@ struct object {
>>
>> static void set_object(struct blt_copy_object *obj,
>> uint32_t handle, uint64_t size, uint32_t region,
>> - uint8_t mocs, enum blt_tiling tiling,
>> + uint8_t mocs, enum tiling_type tiling,
>> enum blt_compression compression,
>> enum blt_compression_type compression_type)
>> {
>> --
>> 2.25.1
>>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/4] lib/i915_blt: Extract init functions for blt_copy_object
2022-12-22 9:50 ` Karolina Stolarek
@ 2022-12-22 10:20 ` Kamil Konieczny
2022-12-22 10:23 ` Karolina Stolarek
0 siblings, 1 reply; 22+ messages in thread
From: Kamil Konieczny @ 2022-12-22 10:20 UTC (permalink / raw)
To: igt-dev
Hi Karolina,
On 2022-12-22 at 10:50:45 +0100, Karolina Stolarek wrote:
> On 21.12.2022 14:59, Kamil Konieczny wrote:
> > Hi Karolina,
> >
> > please improve commit description,
> > imho s/Extract init/Add common/
>
> But we're reusing the code, not adding new one.
Sorry I should wrote that for your first patch:
[PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats
That one should also be changed.
Btw that "Extract" seems to describe what you did in tests but imho it is
better to write in Subject: that you added new functions into lib. You will
describe why and how you did it in message.
Regards,
Kamil
>
> > On 2022-12-19 at 12:49:10 +0100, Karolina Stolarek wrote:
> > > gem_ccs and gem_lmem_swapping share a couple of functions. Extract them
> > > to i915_blt so they are accessible for both tests. Delete local
> > ---------------------------------------------------- ^
> > That sentence is not needed here or if you want you can write
> > about refactoring (you replaced those functions with lib calls).
> >
> > > definitions.
> >
> > >
> > > Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> > > ---
> > > Karolina's comment: I'm not convinced it's the best place for them.
> > > These functions are more specific to the tests
> > - ^^^
> > Please avoid huge empty spaces here.
>
> Heh, I should've eyed it in vim before sending. Anyway, everything below --
> is ignored when the patch is applied.
> >
> > > than lib functions. So, I'd appreciate
> > > suggestions on where I can move them to.
> > >
> > > lib/i915/i915_blt.c | 81 ++++++++++++++++++++++++++++++++++
> > > lib/i915/i915_blt.h | 22 +++++++++
> > > tests/i915/gem_ccs.c | 81 ----------------------------------
> > > tests/i915/gem_lmem_swapping.c | 36 ---------------
> > > 4 files changed, 103 insertions(+), 117 deletions(-)
> > >
> > > diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
> > > index 2513dfc0..0f9f7265 100644
> > > --- a/lib/i915/i915_blt.c
> > > +++ b/lib/i915/i915_blt.c
> > > @@ -1053,6 +1053,87 @@ int blt_fast_copy(int i915,
> > > return ret;
> > > }
> >
> > You need to add descriptions to all lib functions you added.
>
> I wrote in my cover letter that it's WIP and will add it in v2.
>
> > > +void set_geom(struct blt_copy_object *obj, uint32_t pitch,
> > ------- ^
> > The name was ok inside test, but in lib imho it's better add
> > some common prefix, maybe blt_ ? For example:
> >
> > void blt_set_geom(...params here...
> >
>
> Suggested by Zbigniewa and already applies, thanks
>
>
> All the best,
> Karolina
> > > + int16_t x1, int16_t y1, int16_t x2, int16_t y2,
> > > + uint16_t x_offset, uint16_t y_offset)
> > > +{
> > > + obj->pitch = pitch;
> > > + obj->x1 = x1;
> > > + obj->y1 = y1;
> > > + obj->x2 = x2;
> > > + obj->y2 = y2;
> > > + obj->x_offset = x_offset;
> > > + obj->y_offset = y_offset;
> > > +}
> > > +
> > > +void set_batch(struct blt_copy_batch *batch,
> > ------- ^
> >
> > > + uint32_t handle, uint64_t size, uint32_t region)
> > > +{
> > > + batch->handle = handle;
> > > + batch->size = size;
> > > + batch->region = region;
> > > +}
> > > +
> > > +struct blt_copy_object *
> > > +create_object(int i915, uint32_t region,
> > ------- ^
> >
> > > + uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> > > + enum tiling_type tiling,
> > > + enum blt_compression compression,
> > > + enum blt_compression_type compression_type,
> > > + bool create_mapping)
> > > +{
> > > + struct blt_copy_object *obj;
> > > + uint64_t size = width * height * bpp / 8;
> > > + uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
> > > + uint32_t handle;
> > > +
> > > + obj = calloc(1, sizeof(*obj));
> > > +
> > > + obj->size = size;
> > > + igt_assert(__gem_create_in_memory_regions(i915, &handle,
> > > + &size, region) == 0);
> > > +
> > > + set_object(obj, handle, size, region, mocs, tiling,
> > > + compression, compression_type);
> > > + set_geom(obj, stride, 0, 0, width, height, 0, 0);
> > > +
> > > + if (create_mapping)
> > > + obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
> > > + PROT_READ | PROT_WRITE);
> > > +
> > > + return obj;
> > > +}
> > > +
> > > +void destroy_object(int i915, struct blt_copy_object *obj)
> > ------- ^
> >
> > > +{
> > > + if (obj->ptr)
> > > + munmap(obj->ptr, obj->size);
> > > +
> > > + gem_close(i915, obj->handle);
> > > + free(obj);
> > > +}
> > > +
> > > +void set_object(struct blt_copy_object *obj,
> > ------- ^
> > blt_set_object
> >
> > > + uint32_t handle, uint64_t size, uint32_t region,
> > > + uint8_t mocs, enum tiling_type tiling,
> > > + enum blt_compression compression,
> > > + enum blt_compression_type compression_type)
> > > +{
> > > + obj->handle = handle;
> > > + obj->size = size;
> > > + obj->region = region;
> > > + obj->mocs = mocs;
> > > + obj->tiling = tiling;
> > > + obj->compression = compression;
> > > + obj->compression_type = compression_type;
> > > +}
> > > +
> > > +void set_blt_object(struct blt_copy_object *obj,
> > ------- ^
> > This will clash with above name blt_set_object ?
> > Maybe blt_set_copy_object ?
> >
> > Regards,
> > Kamil
> >
> > > + const struct blt_copy_object *orig)
> > > +{
> > > + memcpy(obj, orig, sizeof(*obj));
> > > +}
> > > +
> > > /**
> > > * blt_surface_fill_rect:
> > > * @i915: drm fd
> > > diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
> > > index f1cf5408..1ef459c8 100644
> > > --- a/lib/i915/i915_blt.h
> > > +++ b/lib/i915/i915_blt.h
> > > @@ -198,6 +198,28 @@ int blt_fast_copy(int i915,
> > > uint64_t ahnd,
> > > const struct blt_copy_data *blt);
> > > +void set_geom(struct blt_copy_object *obj, uint32_t pitch,
> > > + int16_t x1, int16_t y1, int16_t x2, int16_t y2,
> > > + uint16_t x_offset, uint16_t y_offset);
> > > +void set_batch(struct blt_copy_batch *batch,
> > > + uint32_t handle, uint64_t size, uint32_t region);
> > > +
> > > +struct blt_copy_object *
> > > +create_object(int i915, uint32_t region,
> > > + uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> > > + enum tiling_type tiling,
> > > + enum blt_compression compression,
> > > + enum blt_compression_type compression_type,
> > > + bool create_mapping);
> > > +void destroy_object(int i915, struct blt_copy_object *obj);
> > > +void set_object(struct blt_copy_object *obj,
> > > + uint32_t handle, uint64_t size, uint32_t region,
> > > + uint8_t mocs, enum tiling_type tiling,
> > > + enum blt_compression compression,
> > > + enum blt_compression_type compression_type);
> > > +void set_blt_object(struct blt_copy_object *obj,
> > > + const struct blt_copy_object *orig);
> > > +
> > > void blt_surface_info(const char *info,
> > > const struct blt_copy_object *obj);
> > > void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> > > diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> > > index 4c137c94..30ee60fd 100644
> > > --- a/tests/i915/gem_ccs.c
> > > +++ b/tests/i915/gem_ccs.c
> > > @@ -44,42 +44,6 @@ struct test_config {
> > > bool suspend_resume;
> > > };
> > > -static void set_object(struct blt_copy_object *obj,
> > > - uint32_t handle, uint64_t size, uint32_t region,
> > > - uint8_t mocs, enum tiling_type tiling,
> > > - enum blt_compression compression,
> > > - enum blt_compression_type compression_type)
> > > -{
> > > - obj->handle = handle;
> > > - obj->size = size;
> > > - obj->region = region;
> > > - obj->mocs = mocs;
> > > - obj->tiling = tiling;
> > > - obj->compression = compression;
> > > - obj->compression_type = compression_type;
> > > -}
> > > -
> > > -static void set_geom(struct blt_copy_object *obj, uint32_t pitch,
> > > - int16_t x1, int16_t y1, int16_t x2, int16_t y2,
> > > - uint16_t x_offset, uint16_t y_offset)
> > > -{
> > > - obj->pitch = pitch;
> > > - obj->x1 = x1;
> > > - obj->y1 = y1;
> > > - obj->x2 = x2;
> > > - obj->y2 = y2;
> > > - obj->x_offset = x_offset;
> > > - obj->y_offset = y_offset;
> > > -}
> > > -
> > > -static void set_batch(struct blt_copy_batch *batch,
> > > - uint32_t handle, uint64_t size, uint32_t region)
> > > -{
> > > - batch->handle = handle;
> > > - batch->size = size;
> > > - batch->region = region;
> > > -}
> > > -
> > > static void set_object_ext(struct blt_block_copy_object_ext *obj,
> > > uint8_t compression_format,
> > > uint16_t surface_width, uint16_t surface_height,
> > > @@ -105,51 +69,6 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
> > > obj->access_type = access_type;
> > > }
> > > -static struct blt_copy_object *
> > > -create_object(int i915, uint32_t region,
> > > - uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> > > - enum tiling_type tiling,
> > > - enum blt_compression compression,
> > > - enum blt_compression_type compression_type,
> > > - bool create_mapping)
> > > -{
> > > - struct blt_copy_object *obj;
> > > - uint64_t size = width * height * bpp / 8;
> > > - uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
> > > - uint32_t handle;
> > > -
> > > - obj = calloc(1, sizeof(*obj));
> > > -
> > > - obj->size = size;
> > > - igt_assert(__gem_create_in_memory_regions(i915, &handle,
> > > - &size, region) == 0);
> > > -
> > > - set_object(obj, handle, size, region, mocs, tiling,
> > > - compression, compression_type);
> > > - set_geom(obj, stride, 0, 0, width, height, 0, 0);
> > > -
> > > - if (create_mapping)
> > > - obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
> > > - PROT_READ | PROT_WRITE);
> > > -
> > > - return obj;
> > > -}
> > > -
> > > -static void destroy_object(int i915, struct blt_copy_object *obj)
> > > -{
> > > - if (obj->ptr)
> > > - munmap(obj->ptr, obj->size);
> > > -
> > > - gem_close(i915, obj->handle);
> > > - free(obj);
> > > -}
> > > -
> > > -static void set_blt_object(struct blt_copy_object *obj,
> > > - const struct blt_copy_object *orig)
> > > -{
> > > - memcpy(obj, orig, sizeof(*obj));
> > > -}
> > > -
> > > #define PRINT_SURFACE_INFO(name, obj) do { \
> > > if (param.print_surface_info) \
> > > blt_surface_info((name), (obj)); } while (0)
> > > diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
> > > index 8cff35d5..746fbf80 100644
> > > --- a/tests/i915/gem_lmem_swapping.c
> > > +++ b/tests/i915/gem_lmem_swapping.c
> > > @@ -76,42 +76,6 @@ struct object {
> > > struct blt_copy_object *blt_obj;
> > > };
> > > -static void set_object(struct blt_copy_object *obj,
> > > - uint32_t handle, uint64_t size, uint32_t region,
> > > - uint8_t mocs, enum tiling_type tiling,
> > > - enum blt_compression compression,
> > > - enum blt_compression_type compression_type)
> > > -{
> > > - obj->handle = handle;
> > > - obj->size = size;
> > > - obj->region = region;
> > > - obj->mocs = mocs;
> > > - obj->tiling = tiling;
> > > - obj->compression = compression;
> > > - obj->compression_type = compression_type;
> > > -}
> > > -
> > > -static void set_geom(struct blt_copy_object *obj, uint32_t pitch,
> > > - int16_t x1, int16_t y1, int16_t x2, int16_t y2,
> > > - uint16_t x_offset, uint16_t y_offset)
> > > -{
> > > - obj->pitch = pitch;
> > > - obj->x1 = x1;
> > > - obj->y1 = y1;
> > > - obj->x2 = x2;
> > > - obj->y2 = y2;
> > > - obj->x_offset = x_offset;
> > > - obj->y_offset = y_offset;
> > > -}
> > > -
> > > -static void set_batch(struct blt_copy_batch *batch,
> > > - uint32_t handle, uint64_t size, uint32_t region)
> > > -{
> > > - batch->handle = handle;
> > > - batch->size = size;
> > > - batch->region = region;
> > > -}
> > > -
> > > static void set_object_ext(struct blt_block_copy_object_ext *obj,
> > > uint8_t compression_format,
> > > uint16_t surface_width, uint16_t surface_height,
> > > --
> > > 2.25.1
> > >
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/4] lib/i915_blt: Extract init functions for blt_copy_object
2022-12-22 10:20 ` Kamil Konieczny
@ 2022-12-22 10:23 ` Karolina Stolarek
0 siblings, 0 replies; 22+ messages in thread
From: Karolina Stolarek @ 2022-12-22 10:23 UTC (permalink / raw)
To: Kamil Konieczny; +Cc: igt-dev
On 22.12.2022 11:20, Kamil Konieczny wrote:
> Hi Karolina,
>
> On 2022-12-22 at 10:50:45 +0100, Karolina Stolarek wrote:
>> On 21.12.2022 14:59, Kamil Konieczny wrote:
>>> Hi Karolina,
>>>
>>> please improve commit description,
>>> imho s/Extract init/Add common/
>>
>> But we're reusing the code, not adding new one.
>
> Sorry I should wrote that for your first patch:
>
> [PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats
>
> That one should also be changed.
>
> Btw that "Extract" seems to describe what you did in tests but imho it is
> better to write in Subject: that you added new functions into lib. You will
> describe why and how you did it in message.
Ah, this way. Can do it.
Many thanks,
Karolina
>
> Regards,
> Kamil
>
>>
>>> On 2022-12-19 at 12:49:10 +0100, Karolina Stolarek wrote:
>>>> gem_ccs and gem_lmem_swapping share a couple of functions. Extract them
>>>> to i915_blt so they are accessible for both tests. Delete local
>>> ---------------------------------------------------- ^
>>> That sentence is not needed here or if you want you can write
>>> about refactoring (you replaced those functions with lib calls).
>>>
>>>> definitions.
>>>
>>>>
>>>> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
>>>> ---
>>>> Karolina's comment: I'm not convinced it's the best place for them.
>>>> These functions are more specific to the tests
>>> - ^^^
>>> Please avoid huge empty spaces here.
>>
>> Heh, I should've eyed it in vim before sending. Anyway, everything below --
>> is ignored when the patch is applied.
>>>
>>>> than lib functions. So, I'd appreciate
>>>> suggestions on where I can move them to.
>>>>
>>>> lib/i915/i915_blt.c | 81 ++++++++++++++++++++++++++++++++++
>>>> lib/i915/i915_blt.h | 22 +++++++++
>>>> tests/i915/gem_ccs.c | 81 ----------------------------------
>>>> tests/i915/gem_lmem_swapping.c | 36 ---------------
>>>> 4 files changed, 103 insertions(+), 117 deletions(-)
>>>>
>>>> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
>>>> index 2513dfc0..0f9f7265 100644
>>>> --- a/lib/i915/i915_blt.c
>>>> +++ b/lib/i915/i915_blt.c
>>>> @@ -1053,6 +1053,87 @@ int blt_fast_copy(int i915,
>>>> return ret;
>>>> }
>>>
>>> You need to add descriptions to all lib functions you added.
>>
>> I wrote in my cover letter that it's WIP and will add it in v2.
>>
>>>> +void set_geom(struct blt_copy_object *obj, uint32_t pitch,
>>> ------- ^
>>> The name was ok inside test, but in lib imho it's better add
>>> some common prefix, maybe blt_ ? For example:
>>>
>>> void blt_set_geom(...params here...
>>>
>>
>> Suggested by Zbigniewa and already applies, thanks
>>
>>
>> All the best,
>> Karolina
>>>> + int16_t x1, int16_t y1, int16_t x2, int16_t y2,
>>>> + uint16_t x_offset, uint16_t y_offset)
>>>> +{
>>>> + obj->pitch = pitch;
>>>> + obj->x1 = x1;
>>>> + obj->y1 = y1;
>>>> + obj->x2 = x2;
>>>> + obj->y2 = y2;
>>>> + obj->x_offset = x_offset;
>>>> + obj->y_offset = y_offset;
>>>> +}
>>>> +
>>>> +void set_batch(struct blt_copy_batch *batch,
>>> ------- ^
>>>
>>>> + uint32_t handle, uint64_t size, uint32_t region)
>>>> +{
>>>> + batch->handle = handle;
>>>> + batch->size = size;
>>>> + batch->region = region;
>>>> +}
>>>> +
>>>> +struct blt_copy_object *
>>>> +create_object(int i915, uint32_t region,
>>> ------- ^
>>>
>>>> + uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
>>>> + enum tiling_type tiling,
>>>> + enum blt_compression compression,
>>>> + enum blt_compression_type compression_type,
>>>> + bool create_mapping)
>>>> +{
>>>> + struct blt_copy_object *obj;
>>>> + uint64_t size = width * height * bpp / 8;
>>>> + uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
>>>> + uint32_t handle;
>>>> +
>>>> + obj = calloc(1, sizeof(*obj));
>>>> +
>>>> + obj->size = size;
>>>> + igt_assert(__gem_create_in_memory_regions(i915, &handle,
>>>> + &size, region) == 0);
>>>> +
>>>> + set_object(obj, handle, size, region, mocs, tiling,
>>>> + compression, compression_type);
>>>> + set_geom(obj, stride, 0, 0, width, height, 0, 0);
>>>> +
>>>> + if (create_mapping)
>>>> + obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
>>>> + PROT_READ | PROT_WRITE);
>>>> +
>>>> + return obj;
>>>> +}
>>>> +
>>>> +void destroy_object(int i915, struct blt_copy_object *obj)
>>> ------- ^
>>>
>>>> +{
>>>> + if (obj->ptr)
>>>> + munmap(obj->ptr, obj->size);
>>>> +
>>>> + gem_close(i915, obj->handle);
>>>> + free(obj);
>>>> +}
>>>> +
>>>> +void set_object(struct blt_copy_object *obj,
>>> ------- ^
>>> blt_set_object
>>>
>>>> + uint32_t handle, uint64_t size, uint32_t region,
>>>> + uint8_t mocs, enum tiling_type tiling,
>>>> + enum blt_compression compression,
>>>> + enum blt_compression_type compression_type)
>>>> +{
>>>> + obj->handle = handle;
>>>> + obj->size = size;
>>>> + obj->region = region;
>>>> + obj->mocs = mocs;
>>>> + obj->tiling = tiling;
>>>> + obj->compression = compression;
>>>> + obj->compression_type = compression_type;
>>>> +}
>>>> +
>>>> +void set_blt_object(struct blt_copy_object *obj,
>>> ------- ^
>>> This will clash with above name blt_set_object ?
>>> Maybe blt_set_copy_object ?
>>>
>>> Regards,
>>> Kamil
>>>
>>>> + const struct blt_copy_object *orig)
>>>> +{
>>>> + memcpy(obj, orig, sizeof(*obj));
>>>> +}
>>>> +
>>>> /**
>>>> * blt_surface_fill_rect:
>>>> * @i915: drm fd
>>>> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
>>>> index f1cf5408..1ef459c8 100644
>>>> --- a/lib/i915/i915_blt.h
>>>> +++ b/lib/i915/i915_blt.h
>>>> @@ -198,6 +198,28 @@ int blt_fast_copy(int i915,
>>>> uint64_t ahnd,
>>>> const struct blt_copy_data *blt);
>>>> +void set_geom(struct blt_copy_object *obj, uint32_t pitch,
>>>> + int16_t x1, int16_t y1, int16_t x2, int16_t y2,
>>>> + uint16_t x_offset, uint16_t y_offset);
>>>> +void set_batch(struct blt_copy_batch *batch,
>>>> + uint32_t handle, uint64_t size, uint32_t region);
>>>> +
>>>> +struct blt_copy_object *
>>>> +create_object(int i915, uint32_t region,
>>>> + uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
>>>> + enum tiling_type tiling,
>>>> + enum blt_compression compression,
>>>> + enum blt_compression_type compression_type,
>>>> + bool create_mapping);
>>>> +void destroy_object(int i915, struct blt_copy_object *obj);
>>>> +void set_object(struct blt_copy_object *obj,
>>>> + uint32_t handle, uint64_t size, uint32_t region,
>>>> + uint8_t mocs, enum tiling_type tiling,
>>>> + enum blt_compression compression,
>>>> + enum blt_compression_type compression_type);
>>>> +void set_blt_object(struct blt_copy_object *obj,
>>>> + const struct blt_copy_object *orig);
>>>> +
>>>> void blt_surface_info(const char *info,
>>>> const struct blt_copy_object *obj);
>>>> void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
>>>> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
>>>> index 4c137c94..30ee60fd 100644
>>>> --- a/tests/i915/gem_ccs.c
>>>> +++ b/tests/i915/gem_ccs.c
>>>> @@ -44,42 +44,6 @@ struct test_config {
>>>> bool suspend_resume;
>>>> };
>>>> -static void set_object(struct blt_copy_object *obj,
>>>> - uint32_t handle, uint64_t size, uint32_t region,
>>>> - uint8_t mocs, enum tiling_type tiling,
>>>> - enum blt_compression compression,
>>>> - enum blt_compression_type compression_type)
>>>> -{
>>>> - obj->handle = handle;
>>>> - obj->size = size;
>>>> - obj->region = region;
>>>> - obj->mocs = mocs;
>>>> - obj->tiling = tiling;
>>>> - obj->compression = compression;
>>>> - obj->compression_type = compression_type;
>>>> -}
>>>> -
>>>> -static void set_geom(struct blt_copy_object *obj, uint32_t pitch,
>>>> - int16_t x1, int16_t y1, int16_t x2, int16_t y2,
>>>> - uint16_t x_offset, uint16_t y_offset)
>>>> -{
>>>> - obj->pitch = pitch;
>>>> - obj->x1 = x1;
>>>> - obj->y1 = y1;
>>>> - obj->x2 = x2;
>>>> - obj->y2 = y2;
>>>> - obj->x_offset = x_offset;
>>>> - obj->y_offset = y_offset;
>>>> -}
>>>> -
>>>> -static void set_batch(struct blt_copy_batch *batch,
>>>> - uint32_t handle, uint64_t size, uint32_t region)
>>>> -{
>>>> - batch->handle = handle;
>>>> - batch->size = size;
>>>> - batch->region = region;
>>>> -}
>>>> -
>>>> static void set_object_ext(struct blt_block_copy_object_ext *obj,
>>>> uint8_t compression_format,
>>>> uint16_t surface_width, uint16_t surface_height,
>>>> @@ -105,51 +69,6 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
>>>> obj->access_type = access_type;
>>>> }
>>>> -static struct blt_copy_object *
>>>> -create_object(int i915, uint32_t region,
>>>> - uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
>>>> - enum tiling_type tiling,
>>>> - enum blt_compression compression,
>>>> - enum blt_compression_type compression_type,
>>>> - bool create_mapping)
>>>> -{
>>>> - struct blt_copy_object *obj;
>>>> - uint64_t size = width * height * bpp / 8;
>>>> - uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
>>>> - uint32_t handle;
>>>> -
>>>> - obj = calloc(1, sizeof(*obj));
>>>> -
>>>> - obj->size = size;
>>>> - igt_assert(__gem_create_in_memory_regions(i915, &handle,
>>>> - &size, region) == 0);
>>>> -
>>>> - set_object(obj, handle, size, region, mocs, tiling,
>>>> - compression, compression_type);
>>>> - set_geom(obj, stride, 0, 0, width, height, 0, 0);
>>>> -
>>>> - if (create_mapping)
>>>> - obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
>>>> - PROT_READ | PROT_WRITE);
>>>> -
>>>> - return obj;
>>>> -}
>>>> -
>>>> -static void destroy_object(int i915, struct blt_copy_object *obj)
>>>> -{
>>>> - if (obj->ptr)
>>>> - munmap(obj->ptr, obj->size);
>>>> -
>>>> - gem_close(i915, obj->handle);
>>>> - free(obj);
>>>> -}
>>>> -
>>>> -static void set_blt_object(struct blt_copy_object *obj,
>>>> - const struct blt_copy_object *orig)
>>>> -{
>>>> - memcpy(obj, orig, sizeof(*obj));
>>>> -}
>>>> -
>>>> #define PRINT_SURFACE_INFO(name, obj) do { \
>>>> if (param.print_surface_info) \
>>>> blt_surface_info((name), (obj)); } while (0)
>>>> diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
>>>> index 8cff35d5..746fbf80 100644
>>>> --- a/tests/i915/gem_lmem_swapping.c
>>>> +++ b/tests/i915/gem_lmem_swapping.c
>>>> @@ -76,42 +76,6 @@ struct object {
>>>> struct blt_copy_object *blt_obj;
>>>> };
>>>> -static void set_object(struct blt_copy_object *obj,
>>>> - uint32_t handle, uint64_t size, uint32_t region,
>>>> - uint8_t mocs, enum tiling_type tiling,
>>>> - enum blt_compression compression,
>>>> - enum blt_compression_type compression_type)
>>>> -{
>>>> - obj->handle = handle;
>>>> - obj->size = size;
>>>> - obj->region = region;
>>>> - obj->mocs = mocs;
>>>> - obj->tiling = tiling;
>>>> - obj->compression = compression;
>>>> - obj->compression_type = compression_type;
>>>> -}
>>>> -
>>>> -static void set_geom(struct blt_copy_object *obj, uint32_t pitch,
>>>> - int16_t x1, int16_t y1, int16_t x2, int16_t y2,
>>>> - uint16_t x_offset, uint16_t y_offset)
>>>> -{
>>>> - obj->pitch = pitch;
>>>> - obj->x1 = x1;
>>>> - obj->y1 = y1;
>>>> - obj->x2 = x2;
>>>> - obj->y2 = y2;
>>>> - obj->x_offset = x_offset;
>>>> - obj->y_offset = y_offset;
>>>> -}
>>>> -
>>>> -static void set_batch(struct blt_copy_batch *batch,
>>>> - uint32_t handle, uint64_t size, uint32_t region)
>>>> -{
>>>> - batch->handle = handle;
>>>> - batch->size = size;
>>>> - batch->region = region;
>>>> -}
>>>> -
>>>> static void set_object_ext(struct blt_block_copy_object_ext *obj,
>>>> uint8_t compression_format,
>>>> uint16_t surface_width, uint16_t surface_height,
>>>> --
>>>> 2.25.1
>>>>
^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2022-12-22 10:24 UTC | newest]
Thread overview: 22+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-12-19 11:49 [igt-dev] [PATCH i-g-t 0/4] Introduce blt_cmd_info struct Karolina Stolarek
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 1/4] lib: Describe supported blitter commands and tiling formats Karolina Stolarek
2022-12-20 11:49 ` Zbigniew Kempczyński
2022-12-21 9:09 ` Karolina Stolarek
2022-12-21 17:58 ` Kamil Konieczny
2022-12-22 9:51 ` Karolina Stolarek
2022-12-21 18:31 ` Kamil Konieczny
2022-12-22 10:00 ` Karolina Stolarek
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 2/4] lib/i915_blt: Check for Tile-YF in fast_copy Karolina Stolarek
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 3/4] lib/i915_blt: Extract init functions for blt_copy_object Karolina Stolarek
2022-12-20 11:51 ` Zbigniew Kempczyński
2022-12-21 13:59 ` Kamil Konieczny
2022-12-22 9:50 ` Karolina Stolarek
2022-12-22 10:20 ` Kamil Konieczny
2022-12-22 10:23 ` Karolina Stolarek
2022-12-19 11:49 ` [igt-dev] [PATCH i-g-t 4/4] tests/gem_exercise_blt: Add fast-copy test Karolina Stolarek
2022-12-19 13:23 ` [igt-dev] ✓ Fi.CI.BAT: success for Introduce blt_cmd_info struct Patchwork
2022-12-20 3:12 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
2022-12-20 8:11 ` Karolina Stolarek
2022-12-20 12:09 ` Yedireswarapu, SaiX Nandan
2022-12-20 11:25 ` [igt-dev] ✓ Fi.CI.IGT: success " Patchwork
2022-12-21 16:56 ` [igt-dev] ✗ GitLab.Pipeline: warning " Patchwork
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