Re: [i-g-t, v1, 5/5] lib/i915/fbc: fbc psr combo support update for xe3

["Joshi, Kunal1" <kunal1.joshi@intel.com>]

On 20-02-2025 17:51, Vinod Govindapillai wrote:
> Because of the FBC dirty rect support in xe3, the FBC and PSR
> are not recommended to be enabled together. So if PSR2 selective
> fetch is enabled, FBC will not be activated in xe3.
>
> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Kunal Joshi <kunal1.joshi@intel.com>
> ---
>   lib/i915/intel_fbc.c | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/lib/i915/intel_fbc.c b/lib/i915/intel_fbc.c
> index 90fe5943c..3971e4920 100644
> --- a/lib/i915/intel_fbc.c
> +++ b/lib/i915/intel_fbc.c
> @@ -167,7 +167,10 @@ bool intel_fbc_plane_size_supported(int fd, uint32_t width, uint32_t height)
>    */
>   bool intel_fbc_psr_combo_supported(int device)
>   {
> -	if (intel_display_ver(intel_get_drm_devid(device)) >= 20)
> +	int ver = intel_display_ver(intel_get_drm_devid(device));
> +
> +	/* In Xe3 FBC PSR combo not supported because of FBC dirty rect */
> +	if (ver >= 20 && ver < 30)
>   		return true;
>   
>   	return false;