* [igt-dev] [PATCH i-g-t 1/6] tests/gem_exec_latency: Move to benchmarks
2018-02-05 9:35 [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks Abdiel Janulgue
@ 2018-02-05 9:35 ` Abdiel Janulgue
2018-02-05 9:35 ` [igt-dev] [PATCH i-g-t 2/6] tests/gem_exec_lut_handle: " Abdiel Janulgue
` (8 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Abdiel Janulgue @ 2018-02-05 9:35 UTC (permalink / raw)
To: igt-dev; +Cc: Joonas Lahtinen
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
benchmarks/Makefile.sources | 1 +
benchmarks/gem_exec_latency.c | 504 ++++++++++++++++++++++++++++++++++++++++++
benchmarks/meson.build | 1 +
tests/Makefile.sources | 1 -
tests/gem_exec_latency.c | 504 ------------------------------------------
tests/meson.build | 1 -
6 files changed, 506 insertions(+), 506 deletions(-)
create mode 100644 benchmarks/gem_exec_latency.c
delete mode 100644 tests/gem_exec_latency.c
diff --git a/benchmarks/Makefile.sources b/benchmarks/Makefile.sources
index d150035..4562b28 100644
--- a/benchmarks/Makefile.sources
+++ b/benchmarks/Makefile.sources
@@ -15,6 +15,7 @@ benchmarks_prog_list = \
gem_set_domain \
gem_syslatency \
gem_wsim \
+ gem_exec_latency \
kms_vblank \
prime_lookup \
vgem_mmap \
diff --git a/benchmarks/gem_exec_latency.c b/benchmarks/gem_exec_latency.c
new file mode 100644
index 0000000..850404b
--- /dev/null
+++ b/benchmarks/gem_exec_latency.c
@@ -0,0 +1,504 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include "igt.h"
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include <fcntl.h>
+#include <inttypes.h>
+#include <errno.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <sys/time.h>
+#include <sys/signal.h>
+#include <time.h>
+
+#include "drm.h"
+
+#include "igt_sysfs.h"
+#include "igt_vgem.h"
+
+#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
+#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+
+#define LOCAL_I915_EXEC_BSD_SHIFT (13)
+#define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
+
+#define ENGINE_FLAGS (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
+
+#define CORK 0x1
+#define PREEMPT 0x2
+
+static unsigned int ring_size;
+
+struct cork {
+ int device;
+ uint32_t handle;
+ uint32_t fence;
+};
+
+static void plug(int fd, struct cork *c)
+{
+ struct vgem_bo bo;
+ int dmabuf;
+
+ c->device = drm_open_driver(DRIVER_VGEM);
+
+ bo.width = bo.height = 1;
+ bo.bpp = 4;
+ vgem_create(c->device, &bo);
+ c->fence = vgem_fence_attach(c->device, &bo, VGEM_FENCE_WRITE);
+
+ dmabuf = prime_handle_to_fd(c->device, bo.handle);
+ c->handle = prime_fd_to_handle(fd, dmabuf);
+ close(dmabuf);
+}
+
+static void unplug(struct cork *c)
+{
+ vgem_fence_signal(c->device, c->fence);
+ close(c->device);
+}
+
+static void alarm_handler(int sig)
+{
+}
+
+static void set_timeout(int seconds)
+{
+ struct sigaction sa = { .sa_handler = alarm_handler };
+
+ sigaction(SIGALRM, seconds ? &sa : NULL, NULL);
+ alarm(seconds);
+}
+
+static int __execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
+{
+ return ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf);
+}
+
+static unsigned int measure_ring_size(int fd)
+{
+ struct drm_i915_gem_exec_object2 obj[2];
+ struct drm_i915_gem_execbuffer2 execbuf;
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ unsigned int count;
+ struct cork c;
+
+ memset(obj, 0, sizeof(obj));
+ obj[1].handle = gem_create(fd, 4096);
+ gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
+
+ plug(fd, &c);
+ obj[0].handle = c.handle;
+
+ memset(&execbuf, 0, sizeof(execbuf));
+ execbuf.buffers_ptr = to_user_pointer(obj);
+ execbuf.buffer_count = 2;
+
+ count = 0;
+ set_timeout(1);
+ while (__execbuf(fd, &execbuf) == 0)
+ count++;
+ set_timeout(0);
+
+ unplug(&c);
+ gem_close(fd, obj[1].handle);
+
+ return count;
+}
+
+#define RCS_TIMESTAMP (0x2000 + 0x358)
+static void latency_on_ring(int fd,
+ unsigned ring, const char *name,
+ unsigned flags)
+{
+ const int gen = intel_gen(intel_get_drm_devid(fd));
+ const int has_64bit_reloc = gen >= 8;
+ struct drm_i915_gem_exec_object2 obj[3];
+ struct drm_i915_gem_relocation_entry reloc;
+ struct drm_i915_gem_execbuffer2 execbuf;
+ struct cork c;
+ volatile uint32_t *reg;
+ unsigned repeats = ring_size;
+ uint32_t start, end, *map, *results;
+ uint64_t offset;
+ double gpu_latency;
+ int i, j;
+
+ reg = (volatile uint32_t *)((volatile char *)igt_global_mmio + RCS_TIMESTAMP);
+
+ memset(&execbuf, 0, sizeof(execbuf));
+ execbuf.buffers_ptr = to_user_pointer(&obj[1]);
+ execbuf.buffer_count = 2;
+ execbuf.flags = ring;
+ execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC | LOCAL_I915_EXEC_HANDLE_LUT;
+
+ memset(obj, 0, sizeof(obj));
+ obj[1].handle = gem_create(fd, 4096);
+ obj[1].flags = EXEC_OBJECT_WRITE;
+ results = gem_mmap__wc(fd, obj[1].handle, 0, 4096, PROT_READ);
+
+ obj[2].handle = gem_create(fd, 64*1024);
+ map = gem_mmap__wc(fd, obj[2].handle, 0, 64*1024, PROT_WRITE);
+ gem_set_domain(fd, obj[2].handle,
+ I915_GEM_DOMAIN_GTT,
+ I915_GEM_DOMAIN_GTT);
+ map[0] = MI_BATCH_BUFFER_END;
+ gem_execbuf(fd, &execbuf);
+
+ memset(&reloc,0, sizeof(reloc));
+ obj[2].relocation_count = 1;
+ obj[2].relocs_ptr = to_user_pointer(&reloc);
+
+ gem_set_domain(fd, obj[2].handle,
+ I915_GEM_DOMAIN_GTT,
+ I915_GEM_DOMAIN_GTT);
+
+ reloc.target_handle = flags & CORK ? 1 : 0;
+ reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
+ reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
+ reloc.presumed_offset = obj[1].offset;
+
+ for (j = 0; j < repeats; j++) {
+ execbuf.batch_start_offset = 64 * j;
+ reloc.offset =
+ execbuf.batch_start_offset + sizeof(uint32_t);
+ reloc.delta = sizeof(uint32_t) * j;
+
+ offset = reloc.presumed_offset;
+ offset += reloc.delta;
+
+ i = 16 * j;
+ /* MI_STORE_REG_MEM */
+ map[i++] = 0x24 << 23 | 1;
+ if (has_64bit_reloc)
+ map[i-1]++;
+ map[i++] = RCS_TIMESTAMP; /* ring local! */
+ map[i++] = offset;
+ if (has_64bit_reloc)
+ map[i++] = offset >> 32;
+ map[i++] = MI_BATCH_BUFFER_END;
+ }
+
+ if (flags & CORK) {
+ plug(fd, &c);
+ obj[0].handle = c.handle;
+ execbuf.buffers_ptr = to_user_pointer(&obj[0]);
+ execbuf.buffer_count = 3;
+ }
+
+ start = *reg;
+ for (j = 0; j < repeats; j++) {
+ uint64_t presumed_offset = reloc.presumed_offset;
+
+ execbuf.batch_start_offset = 64 * j;
+ reloc.offset =
+ execbuf.batch_start_offset + sizeof(uint32_t);
+ reloc.delta = sizeof(uint32_t) * j;
+
+ gem_execbuf(fd, &execbuf);
+ igt_assert(reloc.presumed_offset == presumed_offset);
+ }
+ end = *reg;
+ igt_assert(reloc.presumed_offset == obj[1].offset);
+
+ if (flags & CORK)
+ unplug(&c);
+
+ gem_set_domain(fd, obj[1].handle, I915_GEM_DOMAIN_GTT, 0);
+ gpu_latency = (results[repeats-1] - results[0]) / (double)(repeats-1);
+
+ gem_set_domain(fd, obj[2].handle,
+ I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+
+ execbuf.batch_start_offset = 0;
+ for (j = 0; j < repeats - 1; j++) {
+ offset = obj[2].offset;
+ offset += 64 * (j + 1);
+
+ i = 16 * j + (has_64bit_reloc ? 4 : 3);
+ map[i] = MI_BATCH_BUFFER_START;
+ if (gen >= 8) {
+ map[i] |= 1 << 8 | 1;
+ map[i + 1] = offset;
+ map[i + 2] = offset >> 32;
+ } else if (gen >= 6) {
+ map[i] |= 1 << 8;
+ map[i + 1] = offset;
+ } else {
+ map[i] |= 2 << 6;
+ map[i + 1] = offset;
+ if (gen < 4)
+ map[i] |= 1;
+ }
+ }
+ offset = obj[2].offset;
+ gem_execbuf(fd, &execbuf);
+ igt_assert(offset == obj[2].offset);
+
+ gem_set_domain(fd, obj[1].handle, I915_GEM_DOMAIN_GTT, 0);
+ igt_info("%s: dispatch latency: %.2f, execution latency: %.2f (target %.2f)\n",
+ name,
+ (end - start) / (double)repeats,
+ gpu_latency, (results[repeats - 1] - results[0]) / (double)(repeats - 1));
+
+ munmap(map, 64*1024);
+ munmap(results, 4096);
+ gem_close(fd, obj[1].handle);
+ gem_close(fd, obj[2].handle);
+}
+
+static void latency_from_ring(int fd,
+ unsigned ring, const char *name,
+ unsigned flags)
+{
+ const struct intel_execution_engine *e;
+ const int gen = intel_gen(intel_get_drm_devid(fd));
+ const int has_64bit_reloc = gen >= 8;
+ struct drm_i915_gem_exec_object2 obj[3];
+ struct drm_i915_gem_relocation_entry reloc;
+ struct drm_i915_gem_execbuffer2 execbuf;
+ const unsigned int repeats = ring_size / 2;
+ uint32_t *map, *results;
+ uint32_t ctx[2] = {};
+ int i, j;
+
+ if (flags & PREEMPT) {
+ ctx[0] = gem_context_create(fd);
+ gem_context_set_priority(fd, ctx[0], -1023);
+
+ ctx[1] = gem_context_create(fd);
+ gem_context_set_priority(fd, ctx[1], 1023);
+ }
+
+ memset(&execbuf, 0, sizeof(execbuf));
+ execbuf.buffers_ptr = to_user_pointer(&obj[1]);
+ execbuf.buffer_count = 2;
+ execbuf.flags = ring;
+ execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC | LOCAL_I915_EXEC_HANDLE_LUT;
+ execbuf.rsvd1 = ctx[1];
+
+ memset(obj, 0, sizeof(obj));
+ obj[1].handle = gem_create(fd, 4096);
+ obj[1].flags = EXEC_OBJECT_WRITE;
+ results = gem_mmap__wc(fd, obj[1].handle, 0, 4096, PROT_READ);
+
+ obj[2].handle = gem_create(fd, 64*1024);
+ map = gem_mmap__wc(fd, obj[2].handle, 0, 64*1024, PROT_WRITE);
+ gem_set_domain(fd, obj[2].handle,
+ I915_GEM_DOMAIN_GTT,
+ I915_GEM_DOMAIN_GTT);
+ map[0] = MI_BATCH_BUFFER_END;
+ gem_execbuf(fd, &execbuf);
+
+ memset(&reloc,0, sizeof(reloc));
+ obj[2].relocation_count = 1;
+ obj[2].relocs_ptr = to_user_pointer(&reloc);
+
+ gem_set_domain(fd, obj[2].handle,
+ I915_GEM_DOMAIN_GTT,
+ I915_GEM_DOMAIN_GTT);
+
+ reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
+ reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
+ reloc.presumed_offset = obj[1].offset;
+ reloc.target_handle = flags & CORK ? 1 : 0;
+
+ for (e = intel_execution_engines; e->name; e++) {
+ igt_spin_t *spin = NULL;
+ struct cork c;
+
+ if (e->exec_id == 0)
+ continue;
+
+ if (!gem_has_ring(fd, e->exec_id | e->flags))
+ continue;
+
+ gem_set_domain(fd, obj[2].handle,
+ I915_GEM_DOMAIN_GTT,
+ I915_GEM_DOMAIN_GTT);
+
+ if (flags & PREEMPT)
+ spin = igt_spin_batch_new(fd, ctx[0], ring, 0);
+
+ if (flags & CORK) {
+ plug(fd, &c);
+ obj[0].handle = c.handle;
+ execbuf.buffers_ptr = to_user_pointer(&obj[0]);
+ execbuf.buffer_count = 3;
+ }
+
+ for (j = 0; j < repeats; j++) {
+ uint64_t offset;
+
+ execbuf.flags &= ~ENGINE_FLAGS;
+ execbuf.flags |= ring;
+
+ execbuf.batch_start_offset = 64 * j;
+ reloc.offset =
+ execbuf.batch_start_offset + sizeof(uint32_t);
+ reloc.delta = sizeof(uint32_t) * j;
+
+ reloc.presumed_offset = obj[1].offset;
+ offset = reloc.presumed_offset;
+ offset += reloc.delta;
+
+ i = 16 * j;
+ /* MI_STORE_REG_MEM */
+ map[i++] = 0x24 << 23 | 1;
+ if (has_64bit_reloc)
+ map[i-1]++;
+ map[i++] = RCS_TIMESTAMP; /* ring local! */
+ map[i++] = offset;
+ if (has_64bit_reloc)
+ map[i++] = offset >> 32;
+ map[i++] = MI_BATCH_BUFFER_END;
+
+ gem_execbuf(fd, &execbuf);
+
+ execbuf.flags &= ~ENGINE_FLAGS;
+ execbuf.flags |= e->exec_id | e->flags;
+
+ execbuf.batch_start_offset = 64 * (j + repeats);
+ reloc.offset =
+ execbuf.batch_start_offset + sizeof(uint32_t);
+ reloc.delta = sizeof(uint32_t) * (j + repeats);
+
+ reloc.presumed_offset = obj[1].offset;
+ offset = reloc.presumed_offset;
+ offset += reloc.delta;
+
+ i = 16 * (j + repeats);
+ /* MI_STORE_REG_MEM */
+ map[i++] = 0x24 << 23 | 1;
+ if (has_64bit_reloc)
+ map[i-1]++;
+ map[i++] = RCS_TIMESTAMP; /* ring local! */
+ map[i++] = offset;
+ if (has_64bit_reloc)
+ map[i++] = offset >> 32;
+ map[i++] = MI_BATCH_BUFFER_END;
+
+ gem_execbuf(fd, &execbuf);
+ }
+
+ if (flags & CORK)
+ unplug(&c);
+ gem_set_domain(fd, obj[1].handle,
+ I915_GEM_DOMAIN_GTT,
+ I915_GEM_DOMAIN_GTT);
+ igt_spin_batch_free(fd, spin);
+
+ igt_info("%s-%s delay: %.2f\n",
+ name, e->name, (results[2*repeats-1] - results[0]) / (double)repeats);
+ }
+
+ munmap(map, 64*1024);
+ munmap(results, 4096);
+ gem_close(fd, obj[1].handle);
+ gem_close(fd, obj[2].handle);
+
+ if (flags & PREEMPT) {
+ gem_context_destroy(fd, ctx[1]);
+ gem_context_destroy(fd, ctx[0]);
+ }
+}
+
+igt_main
+{
+ const struct intel_execution_engine *e;
+ int device = -1;
+
+ igt_fixture {
+ device = drm_open_driver(DRIVER_INTEL);
+ igt_require_gem(device);
+ gem_require_mmap_wc(device);
+
+ gem_submission_print_method(device);
+
+ ring_size = measure_ring_size(device);
+ igt_info("Ring size: %d batches\n", ring_size);
+ igt_require(ring_size > 8);
+ ring_size -= 8; /* leave some spare */
+ if (ring_size > 1024)
+ ring_size = 1024;
+
+ intel_register_access_init(intel_get_pci_device(), false, device);
+ }
+
+ igt_subtest_group {
+ igt_fixture
+ igt_require(intel_gen(intel_get_drm_devid(device)) >= 7);
+
+ for (e = intel_execution_engines; e->name; e++) {
+ if (e->exec_id == 0)
+ continue;
+
+ igt_subtest_group {
+ igt_fixture {
+ gem_require_ring(device, e->exec_id | e->flags);
+ }
+
+ igt_subtest_f("%s-dispatch", e->name)
+ latency_on_ring(device,
+ e->exec_id | e->flags,
+ e->name, 0);
+
+ igt_subtest_f("%s-dispatch-queued", e->name)
+ latency_on_ring(device,
+ e->exec_id | e->flags,
+ e->name, CORK);
+
+ igt_subtest_f("%s-synchronisation", e->name)
+ latency_from_ring(device,
+ e->exec_id | e->flags,
+ e->name, 0);
+
+ igt_subtest_f("%s-synchronisation-queued", e->name)
+ latency_from_ring(device,
+ e->exec_id | e->flags,
+ e->name, CORK);
+
+ igt_subtest_group {
+ igt_fixture {
+ igt_require(gem_scheduler_has_preemption(device));
+ }
+
+ igt_subtest_f("%s-preemption", e->name)
+ latency_from_ring(device,
+ e->exec_id | e->flags,
+ e->name, PREEMPT);
+ }
+ }
+ }
+ }
+
+ igt_fixture {
+ close(device);
+ }
+}
diff --git a/benchmarks/meson.build b/benchmarks/meson.build
index 27836c1..c89bb76 100644
--- a/benchmarks/meson.build
+++ b/benchmarks/meson.build
@@ -12,6 +12,7 @@ benchmark_progs = [
'gem_prw',
'gem_set_domain',
'gem_syslatency',
+ 'gem_exec_latency',
'kms_vblank',
'prime_lookup',
'vgem_mmap',
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 870c909..2d8ecb6 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -77,7 +77,6 @@ TESTS_progs = \
gem_exec_fence \
gem_exec_flush \
gem_exec_gttfill \
- gem_exec_latency \
gem_exec_lut_handle \
gem_exec_nop \
gem_exec_parallel \
diff --git a/tests/gem_exec_latency.c b/tests/gem_exec_latency.c
deleted file mode 100644
index 850404b..0000000
--- a/tests/gem_exec_latency.c
+++ /dev/null
@@ -1,504 +0,0 @@
-/*
- * Copyright © 2016 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- */
-
-#include "igt.h"
-#include <unistd.h>
-#include <stdlib.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-#include <fcntl.h>
-#include <inttypes.h>
-#include <errno.h>
-#include <sys/stat.h>
-#include <sys/ioctl.h>
-#include <sys/time.h>
-#include <sys/signal.h>
-#include <time.h>
-
-#include "drm.h"
-
-#include "igt_sysfs.h"
-#include "igt_vgem.h"
-
-#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
-#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
-
-#define LOCAL_I915_EXEC_BSD_SHIFT (13)
-#define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
-
-#define ENGINE_FLAGS (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
-
-#define CORK 0x1
-#define PREEMPT 0x2
-
-static unsigned int ring_size;
-
-struct cork {
- int device;
- uint32_t handle;
- uint32_t fence;
-};
-
-static void plug(int fd, struct cork *c)
-{
- struct vgem_bo bo;
- int dmabuf;
-
- c->device = drm_open_driver(DRIVER_VGEM);
-
- bo.width = bo.height = 1;
- bo.bpp = 4;
- vgem_create(c->device, &bo);
- c->fence = vgem_fence_attach(c->device, &bo, VGEM_FENCE_WRITE);
-
- dmabuf = prime_handle_to_fd(c->device, bo.handle);
- c->handle = prime_fd_to_handle(fd, dmabuf);
- close(dmabuf);
-}
-
-static void unplug(struct cork *c)
-{
- vgem_fence_signal(c->device, c->fence);
- close(c->device);
-}
-
-static void alarm_handler(int sig)
-{
-}
-
-static void set_timeout(int seconds)
-{
- struct sigaction sa = { .sa_handler = alarm_handler };
-
- sigaction(SIGALRM, seconds ? &sa : NULL, NULL);
- alarm(seconds);
-}
-
-static int __execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
-{
- return ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf);
-}
-
-static unsigned int measure_ring_size(int fd)
-{
- struct drm_i915_gem_exec_object2 obj[2];
- struct drm_i915_gem_execbuffer2 execbuf;
- const uint32_t bbe = MI_BATCH_BUFFER_END;
- unsigned int count;
- struct cork c;
-
- memset(obj, 0, sizeof(obj));
- obj[1].handle = gem_create(fd, 4096);
- gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
-
- plug(fd, &c);
- obj[0].handle = c.handle;
-
- memset(&execbuf, 0, sizeof(execbuf));
- execbuf.buffers_ptr = to_user_pointer(obj);
- execbuf.buffer_count = 2;
-
- count = 0;
- set_timeout(1);
- while (__execbuf(fd, &execbuf) == 0)
- count++;
- set_timeout(0);
-
- unplug(&c);
- gem_close(fd, obj[1].handle);
-
- return count;
-}
-
-#define RCS_TIMESTAMP (0x2000 + 0x358)
-static void latency_on_ring(int fd,
- unsigned ring, const char *name,
- unsigned flags)
-{
- const int gen = intel_gen(intel_get_drm_devid(fd));
- const int has_64bit_reloc = gen >= 8;
- struct drm_i915_gem_exec_object2 obj[3];
- struct drm_i915_gem_relocation_entry reloc;
- struct drm_i915_gem_execbuffer2 execbuf;
- struct cork c;
- volatile uint32_t *reg;
- unsigned repeats = ring_size;
- uint32_t start, end, *map, *results;
- uint64_t offset;
- double gpu_latency;
- int i, j;
-
- reg = (volatile uint32_t *)((volatile char *)igt_global_mmio + RCS_TIMESTAMP);
-
- memset(&execbuf, 0, sizeof(execbuf));
- execbuf.buffers_ptr = to_user_pointer(&obj[1]);
- execbuf.buffer_count = 2;
- execbuf.flags = ring;
- execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC | LOCAL_I915_EXEC_HANDLE_LUT;
-
- memset(obj, 0, sizeof(obj));
- obj[1].handle = gem_create(fd, 4096);
- obj[1].flags = EXEC_OBJECT_WRITE;
- results = gem_mmap__wc(fd, obj[1].handle, 0, 4096, PROT_READ);
-
- obj[2].handle = gem_create(fd, 64*1024);
- map = gem_mmap__wc(fd, obj[2].handle, 0, 64*1024, PROT_WRITE);
- gem_set_domain(fd, obj[2].handle,
- I915_GEM_DOMAIN_GTT,
- I915_GEM_DOMAIN_GTT);
- map[0] = MI_BATCH_BUFFER_END;
- gem_execbuf(fd, &execbuf);
-
- memset(&reloc,0, sizeof(reloc));
- obj[2].relocation_count = 1;
- obj[2].relocs_ptr = to_user_pointer(&reloc);
-
- gem_set_domain(fd, obj[2].handle,
- I915_GEM_DOMAIN_GTT,
- I915_GEM_DOMAIN_GTT);
-
- reloc.target_handle = flags & CORK ? 1 : 0;
- reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
- reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
- reloc.presumed_offset = obj[1].offset;
-
- for (j = 0; j < repeats; j++) {
- execbuf.batch_start_offset = 64 * j;
- reloc.offset =
- execbuf.batch_start_offset + sizeof(uint32_t);
- reloc.delta = sizeof(uint32_t) * j;
-
- offset = reloc.presumed_offset;
- offset += reloc.delta;
-
- i = 16 * j;
- /* MI_STORE_REG_MEM */
- map[i++] = 0x24 << 23 | 1;
- if (has_64bit_reloc)
- map[i-1]++;
- map[i++] = RCS_TIMESTAMP; /* ring local! */
- map[i++] = offset;
- if (has_64bit_reloc)
- map[i++] = offset >> 32;
- map[i++] = MI_BATCH_BUFFER_END;
- }
-
- if (flags & CORK) {
- plug(fd, &c);
- obj[0].handle = c.handle;
- execbuf.buffers_ptr = to_user_pointer(&obj[0]);
- execbuf.buffer_count = 3;
- }
-
- start = *reg;
- for (j = 0; j < repeats; j++) {
- uint64_t presumed_offset = reloc.presumed_offset;
-
- execbuf.batch_start_offset = 64 * j;
- reloc.offset =
- execbuf.batch_start_offset + sizeof(uint32_t);
- reloc.delta = sizeof(uint32_t) * j;
-
- gem_execbuf(fd, &execbuf);
- igt_assert(reloc.presumed_offset == presumed_offset);
- }
- end = *reg;
- igt_assert(reloc.presumed_offset == obj[1].offset);
-
- if (flags & CORK)
- unplug(&c);
-
- gem_set_domain(fd, obj[1].handle, I915_GEM_DOMAIN_GTT, 0);
- gpu_latency = (results[repeats-1] - results[0]) / (double)(repeats-1);
-
- gem_set_domain(fd, obj[2].handle,
- I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
-
- execbuf.batch_start_offset = 0;
- for (j = 0; j < repeats - 1; j++) {
- offset = obj[2].offset;
- offset += 64 * (j + 1);
-
- i = 16 * j + (has_64bit_reloc ? 4 : 3);
- map[i] = MI_BATCH_BUFFER_START;
- if (gen >= 8) {
- map[i] |= 1 << 8 | 1;
- map[i + 1] = offset;
- map[i + 2] = offset >> 32;
- } else if (gen >= 6) {
- map[i] |= 1 << 8;
- map[i + 1] = offset;
- } else {
- map[i] |= 2 << 6;
- map[i + 1] = offset;
- if (gen < 4)
- map[i] |= 1;
- }
- }
- offset = obj[2].offset;
- gem_execbuf(fd, &execbuf);
- igt_assert(offset == obj[2].offset);
-
- gem_set_domain(fd, obj[1].handle, I915_GEM_DOMAIN_GTT, 0);
- igt_info("%s: dispatch latency: %.2f, execution latency: %.2f (target %.2f)\n",
- name,
- (end - start) / (double)repeats,
- gpu_latency, (results[repeats - 1] - results[0]) / (double)(repeats - 1));
-
- munmap(map, 64*1024);
- munmap(results, 4096);
- gem_close(fd, obj[1].handle);
- gem_close(fd, obj[2].handle);
-}
-
-static void latency_from_ring(int fd,
- unsigned ring, const char *name,
- unsigned flags)
-{
- const struct intel_execution_engine *e;
- const int gen = intel_gen(intel_get_drm_devid(fd));
- const int has_64bit_reloc = gen >= 8;
- struct drm_i915_gem_exec_object2 obj[3];
- struct drm_i915_gem_relocation_entry reloc;
- struct drm_i915_gem_execbuffer2 execbuf;
- const unsigned int repeats = ring_size / 2;
- uint32_t *map, *results;
- uint32_t ctx[2] = {};
- int i, j;
-
- if (flags & PREEMPT) {
- ctx[0] = gem_context_create(fd);
- gem_context_set_priority(fd, ctx[0], -1023);
-
- ctx[1] = gem_context_create(fd);
- gem_context_set_priority(fd, ctx[1], 1023);
- }
-
- memset(&execbuf, 0, sizeof(execbuf));
- execbuf.buffers_ptr = to_user_pointer(&obj[1]);
- execbuf.buffer_count = 2;
- execbuf.flags = ring;
- execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC | LOCAL_I915_EXEC_HANDLE_LUT;
- execbuf.rsvd1 = ctx[1];
-
- memset(obj, 0, sizeof(obj));
- obj[1].handle = gem_create(fd, 4096);
- obj[1].flags = EXEC_OBJECT_WRITE;
- results = gem_mmap__wc(fd, obj[1].handle, 0, 4096, PROT_READ);
-
- obj[2].handle = gem_create(fd, 64*1024);
- map = gem_mmap__wc(fd, obj[2].handle, 0, 64*1024, PROT_WRITE);
- gem_set_domain(fd, obj[2].handle,
- I915_GEM_DOMAIN_GTT,
- I915_GEM_DOMAIN_GTT);
- map[0] = MI_BATCH_BUFFER_END;
- gem_execbuf(fd, &execbuf);
-
- memset(&reloc,0, sizeof(reloc));
- obj[2].relocation_count = 1;
- obj[2].relocs_ptr = to_user_pointer(&reloc);
-
- gem_set_domain(fd, obj[2].handle,
- I915_GEM_DOMAIN_GTT,
- I915_GEM_DOMAIN_GTT);
-
- reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
- reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
- reloc.presumed_offset = obj[1].offset;
- reloc.target_handle = flags & CORK ? 1 : 0;
-
- for (e = intel_execution_engines; e->name; e++) {
- igt_spin_t *spin = NULL;
- struct cork c;
-
- if (e->exec_id == 0)
- continue;
-
- if (!gem_has_ring(fd, e->exec_id | e->flags))
- continue;
-
- gem_set_domain(fd, obj[2].handle,
- I915_GEM_DOMAIN_GTT,
- I915_GEM_DOMAIN_GTT);
-
- if (flags & PREEMPT)
- spin = igt_spin_batch_new(fd, ctx[0], ring, 0);
-
- if (flags & CORK) {
- plug(fd, &c);
- obj[0].handle = c.handle;
- execbuf.buffers_ptr = to_user_pointer(&obj[0]);
- execbuf.buffer_count = 3;
- }
-
- for (j = 0; j < repeats; j++) {
- uint64_t offset;
-
- execbuf.flags &= ~ENGINE_FLAGS;
- execbuf.flags |= ring;
-
- execbuf.batch_start_offset = 64 * j;
- reloc.offset =
- execbuf.batch_start_offset + sizeof(uint32_t);
- reloc.delta = sizeof(uint32_t) * j;
-
- reloc.presumed_offset = obj[1].offset;
- offset = reloc.presumed_offset;
- offset += reloc.delta;
-
- i = 16 * j;
- /* MI_STORE_REG_MEM */
- map[i++] = 0x24 << 23 | 1;
- if (has_64bit_reloc)
- map[i-1]++;
- map[i++] = RCS_TIMESTAMP; /* ring local! */
- map[i++] = offset;
- if (has_64bit_reloc)
- map[i++] = offset >> 32;
- map[i++] = MI_BATCH_BUFFER_END;
-
- gem_execbuf(fd, &execbuf);
-
- execbuf.flags &= ~ENGINE_FLAGS;
- execbuf.flags |= e->exec_id | e->flags;
-
- execbuf.batch_start_offset = 64 * (j + repeats);
- reloc.offset =
- execbuf.batch_start_offset + sizeof(uint32_t);
- reloc.delta = sizeof(uint32_t) * (j + repeats);
-
- reloc.presumed_offset = obj[1].offset;
- offset = reloc.presumed_offset;
- offset += reloc.delta;
-
- i = 16 * (j + repeats);
- /* MI_STORE_REG_MEM */
- map[i++] = 0x24 << 23 | 1;
- if (has_64bit_reloc)
- map[i-1]++;
- map[i++] = RCS_TIMESTAMP; /* ring local! */
- map[i++] = offset;
- if (has_64bit_reloc)
- map[i++] = offset >> 32;
- map[i++] = MI_BATCH_BUFFER_END;
-
- gem_execbuf(fd, &execbuf);
- }
-
- if (flags & CORK)
- unplug(&c);
- gem_set_domain(fd, obj[1].handle,
- I915_GEM_DOMAIN_GTT,
- I915_GEM_DOMAIN_GTT);
- igt_spin_batch_free(fd, spin);
-
- igt_info("%s-%s delay: %.2f\n",
- name, e->name, (results[2*repeats-1] - results[0]) / (double)repeats);
- }
-
- munmap(map, 64*1024);
- munmap(results, 4096);
- gem_close(fd, obj[1].handle);
- gem_close(fd, obj[2].handle);
-
- if (flags & PREEMPT) {
- gem_context_destroy(fd, ctx[1]);
- gem_context_destroy(fd, ctx[0]);
- }
-}
-
-igt_main
-{
- const struct intel_execution_engine *e;
- int device = -1;
-
- igt_fixture {
- device = drm_open_driver(DRIVER_INTEL);
- igt_require_gem(device);
- gem_require_mmap_wc(device);
-
- gem_submission_print_method(device);
-
- ring_size = measure_ring_size(device);
- igt_info("Ring size: %d batches\n", ring_size);
- igt_require(ring_size > 8);
- ring_size -= 8; /* leave some spare */
- if (ring_size > 1024)
- ring_size = 1024;
-
- intel_register_access_init(intel_get_pci_device(), false, device);
- }
-
- igt_subtest_group {
- igt_fixture
- igt_require(intel_gen(intel_get_drm_devid(device)) >= 7);
-
- for (e = intel_execution_engines; e->name; e++) {
- if (e->exec_id == 0)
- continue;
-
- igt_subtest_group {
- igt_fixture {
- gem_require_ring(device, e->exec_id | e->flags);
- }
-
- igt_subtest_f("%s-dispatch", e->name)
- latency_on_ring(device,
- e->exec_id | e->flags,
- e->name, 0);
-
- igt_subtest_f("%s-dispatch-queued", e->name)
- latency_on_ring(device,
- e->exec_id | e->flags,
- e->name, CORK);
-
- igt_subtest_f("%s-synchronisation", e->name)
- latency_from_ring(device,
- e->exec_id | e->flags,
- e->name, 0);
-
- igt_subtest_f("%s-synchronisation-queued", e->name)
- latency_from_ring(device,
- e->exec_id | e->flags,
- e->name, CORK);
-
- igt_subtest_group {
- igt_fixture {
- igt_require(gem_scheduler_has_preemption(device));
- }
-
- igt_subtest_f("%s-preemption", e->name)
- latency_from_ring(device,
- e->exec_id | e->flags,
- e->name, PREEMPT);
- }
- }
- }
- }
-
- igt_fixture {
- close(device);
- }
-}
diff --git a/tests/meson.build b/tests/meson.build
index 521a4c4..e77a221 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -55,7 +55,6 @@ test_progs = [
'gem_exec_fence',
'gem_exec_flush',
'gem_exec_gttfill',
- 'gem_exec_latency',
'gem_exec_lut_handle',
'gem_exec_nop',
'gem_exec_parallel',
--
2.7.4
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 14+ messages in thread* [igt-dev] [PATCH i-g-t 2/6] tests/gem_exec_lut_handle: Move to benchmarks
2018-02-05 9:35 [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks Abdiel Janulgue
2018-02-05 9:35 ` [igt-dev] [PATCH i-g-t 1/6] tests/gem_exec_latency: Move " Abdiel Janulgue
@ 2018-02-05 9:35 ` Abdiel Janulgue
2018-02-05 9:35 ` [igt-dev] [PATCH i-g-t 3/6] tests/gem_read_read_speed: " Abdiel Janulgue
` (7 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Abdiel Janulgue @ 2018-02-05 9:35 UTC (permalink / raw)
To: igt-dev; +Cc: Joonas Lahtinen
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
benchmarks/Makefile.sources | 1 +
benchmarks/gem_exec_lut_handle.c | 263 +++++++++++++++++++++++++++++++++++++++
benchmarks/meson.build | 1 +
tests/Makefile.sources | 1 -
tests/gem_exec_lut_handle.c | 263 ---------------------------------------
tests/meson.build | 1 -
6 files changed, 265 insertions(+), 265 deletions(-)
create mode 100644 benchmarks/gem_exec_lut_handle.c
delete mode 100644 tests/gem_exec_lut_handle.c
diff --git a/benchmarks/Makefile.sources b/benchmarks/Makefile.sources
index 4562b28..11a59bb 100644
--- a/benchmarks/Makefile.sources
+++ b/benchmarks/Makefile.sources
@@ -16,6 +16,7 @@ benchmarks_prog_list = \
gem_syslatency \
gem_wsim \
gem_exec_latency \
+ gem_exec_lut_handle \
kms_vblank \
prime_lookup \
vgem_mmap \
diff --git a/benchmarks/gem_exec_lut_handle.c b/benchmarks/gem_exec_lut_handle.c
new file mode 100644
index 0000000..9793133
--- /dev/null
+++ b/benchmarks/gem_exec_lut_handle.c
@@ -0,0 +1,263 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Chris Wilson <chris@chris-wilson.co.uk>
+ *
+ */
+
+/* Exercises the basic execbuffer using the handle LUT interface */
+
+#include "igt.h"
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <fcntl.h>
+#include <inttypes.h>
+#include <errno.h>
+#include <sys/stat.h>
+#include <sys/time.h>
+#include "drm.h"
+
+IGT_TEST_DESCRIPTION("Exercises the basic execbuffer using the handle LUT"
+ " interface.");
+
+#define BATCH_SIZE (1024*1024)
+
+#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
+#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+
+#define MAX_NUM_EXEC 2048
+#define MAX_NUM_RELOC 4096
+
+#define SKIP_RELOC 0x1
+#define NO_RELOC 0x2
+#define CYCLE_BATCH 0x4
+#define FAULT 0x8
+
+int target[MAX_NUM_RELOC];
+struct drm_i915_gem_exec_object2 gem_exec[MAX_NUM_EXEC+1];
+struct drm_i915_gem_relocation_entry mem_reloc[MAX_NUM_RELOC];
+
+static uint32_t state = 0x12345678;
+
+static uint32_t
+hars_petruska_f54_1_random (void)
+{
+#define rol(x,k) ((x << k) | (x >> (32-k)))
+ return state = (state ^ rol (state, 5) ^ rol (state, 24)) + 0x37798849;
+#undef rol
+}
+
+static int has_exec_lut(int fd)
+{
+ struct drm_i915_gem_execbuffer2 execbuf;
+
+ memset(&execbuf, 0, sizeof(execbuf));
+ execbuf.buffers_ptr = to_user_pointer((gem_exec + MAX_NUM_EXEC));
+ execbuf.buffer_count = 1;
+ execbuf.flags = LOCAL_I915_EXEC_HANDLE_LUT;
+
+ return drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) == 0;
+}
+
+#define ELAPSED(a,b) (1e6*((b)->tv_sec - (a)->tv_sec) + ((b)->tv_usec - (a)->tv_usec))
+igt_simple_main
+{
+ uint32_t batch[2] = {MI_BATCH_BUFFER_END};
+ uint32_t cycle[16];
+ int fd, n, m, count, c;
+ const struct {
+ const char *name;
+ unsigned int flags;
+ } pass[] = {
+ { .name = "relocation", .flags = 0 },
+ { .name = "cycle-relocation", .flags = CYCLE_BATCH },
+ { .name = "fault-relocation", .flags = FAULT },
+ { .name = "skip-relocs", .flags = SKIP_RELOC },
+ { .name = "no-relocs", .flags = SKIP_RELOC | NO_RELOC },
+ { .name = NULL },
+ }, *p;
+ struct drm_i915_gem_relocation_entry *reloc;
+ uint32_t reloc_handle;
+ int size;
+
+ igt_skip_on_simulation();
+
+ fd = drm_open_driver(DRIVER_INTEL);
+ igt_require_gem(fd);
+
+ memset(gem_exec, 0, sizeof(gem_exec));
+ for (n = 0; n < MAX_NUM_EXEC; n++)
+ gem_exec[n].handle = gem_create(fd, 4096);
+
+ for (n = 0; n < 16; n++) {
+ cycle[n] = gem_create(fd, 4096);
+ gem_write(fd, cycle[n], 0, batch, sizeof(batch));
+ }
+ gem_exec[MAX_NUM_EXEC].handle = cycle[0];
+
+ memset(mem_reloc, 0, sizeof(mem_reloc));
+ for (n = 0; n < MAX_NUM_RELOC; n++) {
+ mem_reloc[n].offset = 1024;
+ mem_reloc[n].read_domains = I915_GEM_DOMAIN_RENDER;
+ }
+
+ size = ALIGN(sizeof(mem_reloc), 4096);
+ reloc_handle = gem_create(fd, size);
+ reloc = gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE);
+ for (n = 0; n < MAX_NUM_RELOC; n++) {
+ reloc[n].offset = 1024;
+ reloc[n].read_domains = I915_GEM_DOMAIN_RENDER;
+ }
+ munmap(reloc, size);
+
+ igt_require(has_exec_lut(fd));
+
+ for (p = pass; p->name != NULL; p++) {
+ if (p->flags & FAULT)
+ igt_disable_prefault();
+ for (n = 1; n <= MAX_NUM_EXEC; n *= 2) {
+ double elapsed[16][2];
+ double s_x, s_y, s_xx, s_xy;
+ double A, B;
+ int i, j;
+
+ for (i = 0, m = 1; m <= MAX_NUM_RELOC; m *= 2, i++) {
+ struct drm_i915_gem_execbuffer2 execbuf;
+ struct drm_i915_gem_exec_object2 *objects;
+ struct timeval start, end;
+
+ if (p->flags & FAULT)
+ reloc = __gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE);
+ else
+ reloc = mem_reloc;
+
+ gem_exec[MAX_NUM_EXEC].relocation_count = m;
+ gem_exec[MAX_NUM_EXEC].relocs_ptr = to_user_pointer(reloc);
+ objects = gem_exec + MAX_NUM_EXEC - n;
+
+ memset(&execbuf, 0, sizeof(execbuf));
+ execbuf.buffers_ptr = to_user_pointer(objects);
+ execbuf.buffer_count = n + 1;
+ execbuf.flags = LOCAL_I915_EXEC_HANDLE_LUT;
+ if (p->flags & NO_RELOC)
+ execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
+
+ for (j = 0; j < m; j++) {
+ target[j] = hars_petruska_f54_1_random() % n;
+ reloc[j].target_handle = target[j];
+ reloc[j].presumed_offset = -1;
+ }
+
+ gem_execbuf(fd,&execbuf);
+ gettimeofday(&start, NULL);
+ for (count = 0; count < 1000; count++) {
+ if ((p->flags & SKIP_RELOC) == 0) {
+ for (j = 0; j < m; j++)
+ reloc[j].presumed_offset = -1;
+ if (p->flags & CYCLE_BATCH) {
+ c = (c + 1) % 16;
+ gem_exec[MAX_NUM_EXEC].handle = cycle[c];
+ }
+ }
+ if (p->flags & FAULT) {
+ munmap(reloc, size);
+ reloc = __gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE);
+ gem_exec[MAX_NUM_EXEC].relocs_ptr = to_user_pointer(reloc);
+ }
+ gem_execbuf(fd, &execbuf);
+ }
+ gettimeofday(&end, NULL);
+ c = 16;
+ do
+ gem_sync(fd, cycle[--c]);
+ while (c != 0);
+ gem_exec[MAX_NUM_EXEC].handle = cycle[c];
+ elapsed[i][1] = ELAPSED(&start, &end);
+
+ execbuf.flags &= ~LOCAL_I915_EXEC_HANDLE_LUT;
+ for (j = 0; j < m; j++)
+ reloc[j].target_handle = objects[target[j]].handle;
+
+ gem_execbuf(fd,&execbuf);
+ gettimeofday(&start, NULL);
+ for (count = 0; count < 1000; count++) {
+ if ((p->flags & SKIP_RELOC) == 0) {
+ for (j = 0; j < m; j++)
+ reloc[j].presumed_offset = -1;
+ if (p->flags & CYCLE_BATCH) {
+ c = (c + 1) % 16;
+ gem_exec[MAX_NUM_EXEC].handle = cycle[c];
+ }
+ }
+ if (p->flags & FAULT) {
+ munmap(reloc, size);
+ reloc = __gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE);
+ gem_exec[MAX_NUM_EXEC].relocs_ptr = to_user_pointer(reloc);
+ }
+ gem_execbuf(fd, &execbuf);
+ }
+ gettimeofday(&end, NULL);
+ c = 16;
+ do
+ gem_sync(fd, cycle[--c]);
+ while (c != 0);
+ gem_exec[MAX_NUM_EXEC].handle = cycle[c];
+ elapsed[i][0] = ELAPSED(&start, &end);
+
+ if (p->flags & FAULT)
+ munmap(reloc, size);
+ }
+
+ igt_info("%s: buffers=%4d:", p->name, n);
+
+ s_x = s_y = s_xx = s_xy = 0;
+ for (j = 0; j < i; j++) {
+ int k = 1 << j;
+ s_x += k;
+ s_y += elapsed[j][0];
+ s_xx += k * k;
+ s_xy += k * elapsed[j][0];
+ }
+ B = (s_xy - s_x * s_y / j) / (s_xx - s_x * s_x / j);
+ A = s_y / j - B * s_x / j;
+ igt_info(" old=%7.0f + %.1f*reloc,", A, B);
+
+ s_x = s_y = s_xx = s_xy = 0;
+ for (j = 0; j < i; j++) {
+ int k = 1 << j;
+ s_x += k;
+ s_y += elapsed[j][1];
+ s_xx += k * k;
+ s_xy += k * elapsed[j][1];
+ }
+ B = (s_xy - s_x * s_y / j) / (s_xx - s_x * s_x / j);
+ A = s_y / j - B * s_x / j;
+ igt_info(" lut=%7.0f + %.1f*reloc (ns)", A, B);
+
+ igt_info("\n");
+ }
+ if (p->flags & FAULT)
+ igt_enable_prefault();
+ }
+}
diff --git a/benchmarks/meson.build b/benchmarks/meson.build
index c89bb76..31e397c 100644
--- a/benchmarks/meson.build
+++ b/benchmarks/meson.build
@@ -13,6 +13,7 @@ benchmark_progs = [
'gem_set_domain',
'gem_syslatency',
'gem_exec_latency',
+ 'gem_exec_lut_handle',
'kms_vblank',
'prime_lookup',
'vgem_mmap',
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 2d8ecb6..41cf79b 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -77,7 +77,6 @@ TESTS_progs = \
gem_exec_fence \
gem_exec_flush \
gem_exec_gttfill \
- gem_exec_lut_handle \
gem_exec_nop \
gem_exec_parallel \
gem_exec_params \
diff --git a/tests/gem_exec_lut_handle.c b/tests/gem_exec_lut_handle.c
deleted file mode 100644
index 9793133..0000000
--- a/tests/gem_exec_lut_handle.c
+++ /dev/null
@@ -1,263 +0,0 @@
-/*
- * Copyright © 2012 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- * Chris Wilson <chris@chris-wilson.co.uk>
- *
- */
-
-/* Exercises the basic execbuffer using the handle LUT interface */
-
-#include "igt.h"
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <fcntl.h>
-#include <inttypes.h>
-#include <errno.h>
-#include <sys/stat.h>
-#include <sys/time.h>
-#include "drm.h"
-
-IGT_TEST_DESCRIPTION("Exercises the basic execbuffer using the handle LUT"
- " interface.");
-
-#define BATCH_SIZE (1024*1024)
-
-#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
-#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
-
-#define MAX_NUM_EXEC 2048
-#define MAX_NUM_RELOC 4096
-
-#define SKIP_RELOC 0x1
-#define NO_RELOC 0x2
-#define CYCLE_BATCH 0x4
-#define FAULT 0x8
-
-int target[MAX_NUM_RELOC];
-struct drm_i915_gem_exec_object2 gem_exec[MAX_NUM_EXEC+1];
-struct drm_i915_gem_relocation_entry mem_reloc[MAX_NUM_RELOC];
-
-static uint32_t state = 0x12345678;
-
-static uint32_t
-hars_petruska_f54_1_random (void)
-{
-#define rol(x,k) ((x << k) | (x >> (32-k)))
- return state = (state ^ rol (state, 5) ^ rol (state, 24)) + 0x37798849;
-#undef rol
-}
-
-static int has_exec_lut(int fd)
-{
- struct drm_i915_gem_execbuffer2 execbuf;
-
- memset(&execbuf, 0, sizeof(execbuf));
- execbuf.buffers_ptr = to_user_pointer((gem_exec + MAX_NUM_EXEC));
- execbuf.buffer_count = 1;
- execbuf.flags = LOCAL_I915_EXEC_HANDLE_LUT;
-
- return drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) == 0;
-}
-
-#define ELAPSED(a,b) (1e6*((b)->tv_sec - (a)->tv_sec) + ((b)->tv_usec - (a)->tv_usec))
-igt_simple_main
-{
- uint32_t batch[2] = {MI_BATCH_BUFFER_END};
- uint32_t cycle[16];
- int fd, n, m, count, c;
- const struct {
- const char *name;
- unsigned int flags;
- } pass[] = {
- { .name = "relocation", .flags = 0 },
- { .name = "cycle-relocation", .flags = CYCLE_BATCH },
- { .name = "fault-relocation", .flags = FAULT },
- { .name = "skip-relocs", .flags = SKIP_RELOC },
- { .name = "no-relocs", .flags = SKIP_RELOC | NO_RELOC },
- { .name = NULL },
- }, *p;
- struct drm_i915_gem_relocation_entry *reloc;
- uint32_t reloc_handle;
- int size;
-
- igt_skip_on_simulation();
-
- fd = drm_open_driver(DRIVER_INTEL);
- igt_require_gem(fd);
-
- memset(gem_exec, 0, sizeof(gem_exec));
- for (n = 0; n < MAX_NUM_EXEC; n++)
- gem_exec[n].handle = gem_create(fd, 4096);
-
- for (n = 0; n < 16; n++) {
- cycle[n] = gem_create(fd, 4096);
- gem_write(fd, cycle[n], 0, batch, sizeof(batch));
- }
- gem_exec[MAX_NUM_EXEC].handle = cycle[0];
-
- memset(mem_reloc, 0, sizeof(mem_reloc));
- for (n = 0; n < MAX_NUM_RELOC; n++) {
- mem_reloc[n].offset = 1024;
- mem_reloc[n].read_domains = I915_GEM_DOMAIN_RENDER;
- }
-
- size = ALIGN(sizeof(mem_reloc), 4096);
- reloc_handle = gem_create(fd, size);
- reloc = gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE);
- for (n = 0; n < MAX_NUM_RELOC; n++) {
- reloc[n].offset = 1024;
- reloc[n].read_domains = I915_GEM_DOMAIN_RENDER;
- }
- munmap(reloc, size);
-
- igt_require(has_exec_lut(fd));
-
- for (p = pass; p->name != NULL; p++) {
- if (p->flags & FAULT)
- igt_disable_prefault();
- for (n = 1; n <= MAX_NUM_EXEC; n *= 2) {
- double elapsed[16][2];
- double s_x, s_y, s_xx, s_xy;
- double A, B;
- int i, j;
-
- for (i = 0, m = 1; m <= MAX_NUM_RELOC; m *= 2, i++) {
- struct drm_i915_gem_execbuffer2 execbuf;
- struct drm_i915_gem_exec_object2 *objects;
- struct timeval start, end;
-
- if (p->flags & FAULT)
- reloc = __gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE);
- else
- reloc = mem_reloc;
-
- gem_exec[MAX_NUM_EXEC].relocation_count = m;
- gem_exec[MAX_NUM_EXEC].relocs_ptr = to_user_pointer(reloc);
- objects = gem_exec + MAX_NUM_EXEC - n;
-
- memset(&execbuf, 0, sizeof(execbuf));
- execbuf.buffers_ptr = to_user_pointer(objects);
- execbuf.buffer_count = n + 1;
- execbuf.flags = LOCAL_I915_EXEC_HANDLE_LUT;
- if (p->flags & NO_RELOC)
- execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
-
- for (j = 0; j < m; j++) {
- target[j] = hars_petruska_f54_1_random() % n;
- reloc[j].target_handle = target[j];
- reloc[j].presumed_offset = -1;
- }
-
- gem_execbuf(fd,&execbuf);
- gettimeofday(&start, NULL);
- for (count = 0; count < 1000; count++) {
- if ((p->flags & SKIP_RELOC) == 0) {
- for (j = 0; j < m; j++)
- reloc[j].presumed_offset = -1;
- if (p->flags & CYCLE_BATCH) {
- c = (c + 1) % 16;
- gem_exec[MAX_NUM_EXEC].handle = cycle[c];
- }
- }
- if (p->flags & FAULT) {
- munmap(reloc, size);
- reloc = __gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE);
- gem_exec[MAX_NUM_EXEC].relocs_ptr = to_user_pointer(reloc);
- }
- gem_execbuf(fd, &execbuf);
- }
- gettimeofday(&end, NULL);
- c = 16;
- do
- gem_sync(fd, cycle[--c]);
- while (c != 0);
- gem_exec[MAX_NUM_EXEC].handle = cycle[c];
- elapsed[i][1] = ELAPSED(&start, &end);
-
- execbuf.flags &= ~LOCAL_I915_EXEC_HANDLE_LUT;
- for (j = 0; j < m; j++)
- reloc[j].target_handle = objects[target[j]].handle;
-
- gem_execbuf(fd,&execbuf);
- gettimeofday(&start, NULL);
- for (count = 0; count < 1000; count++) {
- if ((p->flags & SKIP_RELOC) == 0) {
- for (j = 0; j < m; j++)
- reloc[j].presumed_offset = -1;
- if (p->flags & CYCLE_BATCH) {
- c = (c + 1) % 16;
- gem_exec[MAX_NUM_EXEC].handle = cycle[c];
- }
- }
- if (p->flags & FAULT) {
- munmap(reloc, size);
- reloc = __gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE);
- gem_exec[MAX_NUM_EXEC].relocs_ptr = to_user_pointer(reloc);
- }
- gem_execbuf(fd, &execbuf);
- }
- gettimeofday(&end, NULL);
- c = 16;
- do
- gem_sync(fd, cycle[--c]);
- while (c != 0);
- gem_exec[MAX_NUM_EXEC].handle = cycle[c];
- elapsed[i][0] = ELAPSED(&start, &end);
-
- if (p->flags & FAULT)
- munmap(reloc, size);
- }
-
- igt_info("%s: buffers=%4d:", p->name, n);
-
- s_x = s_y = s_xx = s_xy = 0;
- for (j = 0; j < i; j++) {
- int k = 1 << j;
- s_x += k;
- s_y += elapsed[j][0];
- s_xx += k * k;
- s_xy += k * elapsed[j][0];
- }
- B = (s_xy - s_x * s_y / j) / (s_xx - s_x * s_x / j);
- A = s_y / j - B * s_x / j;
- igt_info(" old=%7.0f + %.1f*reloc,", A, B);
-
- s_x = s_y = s_xx = s_xy = 0;
- for (j = 0; j < i; j++) {
- int k = 1 << j;
- s_x += k;
- s_y += elapsed[j][1];
- s_xx += k * k;
- s_xy += k * elapsed[j][1];
- }
- B = (s_xy - s_x * s_y / j) / (s_xx - s_x * s_x / j);
- A = s_y / j - B * s_x / j;
- igt_info(" lut=%7.0f + %.1f*reloc (ns)", A, B);
-
- igt_info("\n");
- }
- if (p->flags & FAULT)
- igt_enable_prefault();
- }
-}
diff --git a/tests/meson.build b/tests/meson.build
index e77a221..7708fdd 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -55,7 +55,6 @@ test_progs = [
'gem_exec_fence',
'gem_exec_flush',
'gem_exec_gttfill',
- 'gem_exec_lut_handle',
'gem_exec_nop',
'gem_exec_parallel',
'gem_exec_params',
--
2.7.4
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 14+ messages in thread* [igt-dev] [PATCH i-g-t 3/6] tests/gem_read_read_speed: Move to benchmarks
2018-02-05 9:35 [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks Abdiel Janulgue
2018-02-05 9:35 ` [igt-dev] [PATCH i-g-t 1/6] tests/gem_exec_latency: Move " Abdiel Janulgue
2018-02-05 9:35 ` [igt-dev] [PATCH i-g-t 2/6] tests/gem_exec_lut_handle: " Abdiel Janulgue
@ 2018-02-05 9:35 ` Abdiel Janulgue
2018-02-05 9:35 ` [igt-dev] [PATCH i-g-t 4/6] tests/gem_fence_upload: " Abdiel Janulgue
` (6 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Abdiel Janulgue @ 2018-02-05 9:35 UTC (permalink / raw)
To: igt-dev; +Cc: Joonas Lahtinen
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
benchmarks/Makefile.sources | 1 +
benchmarks/gem_read_read_speed.c | 213 +++++++++++++++++++++++++++++++++++++++
benchmarks/meson.build | 1 +
tests/Makefile.sources | 1 -
tests/gem_read_read_speed.c | 213 ---------------------------------------
tests/meson.build | 1 -
6 files changed, 215 insertions(+), 215 deletions(-)
create mode 100644 benchmarks/gem_read_read_speed.c
delete mode 100644 tests/gem_read_read_speed.c
diff --git a/benchmarks/Makefile.sources b/benchmarks/Makefile.sources
index 11a59bb..54045fb 100644
--- a/benchmarks/Makefile.sources
+++ b/benchmarks/Makefile.sources
@@ -17,6 +17,7 @@ benchmarks_prog_list = \
gem_wsim \
gem_exec_latency \
gem_exec_lut_handle \
+ gem_read_read_speed \
kms_vblank \
prime_lookup \
vgem_mmap \
diff --git a/benchmarks/gem_read_read_speed.c b/benchmarks/gem_read_read_speed.c
new file mode 100644
index 0000000..3dcf440
--- /dev/null
+++ b/benchmarks/gem_read_read_speed.c
@@ -0,0 +1,213 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+/** @file gem_read_read_speed.c
+ *
+ * This is a test of performance with multiple readers from the same source.
+ */
+
+#include "igt.h"
+#include "igt_sysfs.h"
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <fcntl.h>
+#include <inttypes.h>
+#include <errno.h>
+#include <time.h>
+#include <sys/stat.h>
+#include <sys/time.h>
+#include <sys/wait.h>
+
+#include <drm.h>
+
+#include "intel_bufmgr.h"
+
+IGT_TEST_DESCRIPTION("Test speed of concurrent reads between engines.");
+
+igt_render_copyfunc_t rendercopy;
+struct intel_batchbuffer *batch;
+int width, height;
+
+static drm_intel_bo *rcs_copy_bo(drm_intel_bo *dst, drm_intel_bo *src)
+{
+ struct igt_buf d = {
+ .bo = dst,
+ .size = width * height * 4,
+ .num_tiles = width * height * 4,
+ .stride = width * 4,
+ }, s = {
+ .bo = src,
+ .size = width * height * 4,
+ .num_tiles = width * height * 4,
+ .stride = width * 4,
+ };
+ uint32_t swizzle;
+ drm_intel_bo *bo = batch->bo;
+ drm_intel_bo_reference(bo);
+
+ drm_intel_bo_get_tiling(dst, &d.tiling, &swizzle);
+ drm_intel_bo_get_tiling(src, &s.tiling, &swizzle);
+
+ rendercopy(batch, NULL,
+ &s, 0, 0,
+ width, height,
+ &d, 0, 0);
+
+ return bo;
+}
+
+static drm_intel_bo *bcs_copy_bo(drm_intel_bo *dst, drm_intel_bo *src)
+{
+ drm_intel_bo *bo = batch->bo;
+ drm_intel_bo_reference(bo);
+
+ intel_blt_copy(batch,
+ src, 0, 0, 4*width,
+ dst, 0, 0, 4*width,
+ width, height, 32);
+
+ return bo;
+}
+
+static void
+set_bo(drm_intel_bo *bo, uint32_t val)
+{
+ int size = width * height;
+ uint32_t *vaddr;
+
+ do_or_die(drm_intel_bo_map(bo, 1));
+ vaddr = bo->virtual;
+ while (size--)
+ *vaddr++ = val;
+ drm_intel_bo_unmap(bo);
+}
+
+static double elapsed(const struct timespec *start,
+ const struct timespec *end,
+ int loop)
+{
+ return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_nsec - start->tv_nsec)/1000)/loop;
+}
+
+static drm_intel_bo *create_bo(drm_intel_bufmgr *bufmgr,
+ const char *name)
+{
+ uint32_t tiling_mode = I915_TILING_X;
+ unsigned long pitch;
+ return drm_intel_bo_alloc_tiled(bufmgr, name,
+ width, height, 4,
+ &tiling_mode, &pitch, 0);
+}
+
+static void run(drm_intel_bufmgr *bufmgr, int _width, int _height,
+ bool write_bcs, bool write_rcs)
+{
+ drm_intel_bo *src = NULL, *bcs = NULL, *rcs = NULL;
+ drm_intel_bo *bcs_batch, *rcs_batch;
+ struct timespec start, end;
+ int loops = 1000;
+
+ width = _width;
+ height = _height;
+
+ src = create_bo(bufmgr, "src");
+ bcs = create_bo(bufmgr, "bcs");
+ rcs = create_bo(bufmgr, "rcs");
+
+ set_bo(src, 0xdeadbeef);
+
+ if (write_bcs) {
+ bcs_batch = bcs_copy_bo(src, bcs);
+ } else {
+ bcs_batch = bcs_copy_bo(bcs, src);
+ }
+ if (write_rcs) {
+ rcs_batch = rcs_copy_bo(src, rcs);
+ } else {
+ rcs_batch = rcs_copy_bo(rcs, src);
+ }
+
+ drm_intel_bo_unreference(rcs);
+ drm_intel_bo_unreference(bcs);
+
+ drm_intel_gem_bo_start_gtt_access(src, true);
+ clock_gettime(CLOCK_MONOTONIC, &start);
+ for (int i = 0; i < loops; i++) {
+ drm_intel_gem_bo_context_exec(rcs_batch, NULL, 4096, I915_EXEC_RENDER);
+ drm_intel_gem_bo_context_exec(bcs_batch, NULL, 4096, I915_EXEC_BLT);
+ }
+ drm_intel_gem_bo_start_gtt_access(src, true);
+ clock_gettime(CLOCK_MONOTONIC, &end);
+
+ igt_info("Time to %s-%s %dx%d [%dk]: %7.3fµs\n",
+ write_bcs ? "write" : "read",
+ write_rcs ? "write" : "read",
+ width, height, 4*width*height/1024,
+ elapsed(&start, &end, loops));
+
+ drm_intel_bo_unreference(rcs_batch);
+ drm_intel_bo_unreference(bcs_batch);
+
+ drm_intel_bo_unreference(src);
+}
+
+igt_main
+{
+ const int sizes[] = {1, 128, 256, 512, 1024, 2048, 4096, 8192, 0};
+ drm_intel_bufmgr *bufmgr = NULL;
+ int fd, i;
+
+ igt_skip_on_simulation();
+
+ igt_fixture {
+ int devid;
+
+ fd = drm_open_driver(DRIVER_INTEL);
+ igt_require_gem(fd);
+
+ devid = intel_get_drm_devid(fd);
+ igt_require(intel_gen(devid) >= 6);
+
+ rendercopy = igt_get_render_copyfunc(devid);
+ igt_require(rendercopy);
+
+ bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
+ igt_assert(bufmgr);
+
+ batch = intel_batchbuffer_alloc(bufmgr, devid);
+
+ gem_submission_print_method(fd);
+ }
+
+ for (i = 0; sizes[i] != 0; i++) {
+ igt_subtest_f("read-read-%dx%d", sizes[i], sizes[i])
+ run(bufmgr, sizes[i], sizes[i], false, false);
+ igt_subtest_f("read-write-%dx%d", sizes[i], sizes[i])
+ run(bufmgr, sizes[i], sizes[i], false, true);
+ igt_subtest_f("write-read-%dx%d", sizes[i], sizes[i])
+ run(bufmgr, sizes[i], sizes[i], true, false);
+ igt_subtest_f("write-write-%dx%d", sizes[i], sizes[i])
+ run(bufmgr, sizes[i], sizes[i], true, true);
+ }
+}
diff --git a/benchmarks/meson.build b/benchmarks/meson.build
index 31e397c..acb84c0 100644
--- a/benchmarks/meson.build
+++ b/benchmarks/meson.build
@@ -14,6 +14,7 @@ benchmark_progs = [
'gem_syslatency',
'gem_exec_latency',
'gem_exec_lut_handle',
+ 'gem_read_read_speed',
'kms_vblank',
'prime_lookup',
'vgem_mmap',
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 41cf79b..b37ece0 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -116,7 +116,6 @@ TESTS_progs = \
gem_pwrite \
gem_pwrite_pread \
gem_pwrite_snooped \
- gem_read_read_speed \
gem_readwrite \
gem_reg_read \
gem_reloc_overflow \
diff --git a/tests/gem_read_read_speed.c b/tests/gem_read_read_speed.c
deleted file mode 100644
index 3dcf440..0000000
--- a/tests/gem_read_read_speed.c
+++ /dev/null
@@ -1,213 +0,0 @@
-/*
- * Copyright © 2015 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-
-/** @file gem_read_read_speed.c
- *
- * This is a test of performance with multiple readers from the same source.
- */
-
-#include "igt.h"
-#include "igt_sysfs.h"
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <fcntl.h>
-#include <inttypes.h>
-#include <errno.h>
-#include <time.h>
-#include <sys/stat.h>
-#include <sys/time.h>
-#include <sys/wait.h>
-
-#include <drm.h>
-
-#include "intel_bufmgr.h"
-
-IGT_TEST_DESCRIPTION("Test speed of concurrent reads between engines.");
-
-igt_render_copyfunc_t rendercopy;
-struct intel_batchbuffer *batch;
-int width, height;
-
-static drm_intel_bo *rcs_copy_bo(drm_intel_bo *dst, drm_intel_bo *src)
-{
- struct igt_buf d = {
- .bo = dst,
- .size = width * height * 4,
- .num_tiles = width * height * 4,
- .stride = width * 4,
- }, s = {
- .bo = src,
- .size = width * height * 4,
- .num_tiles = width * height * 4,
- .stride = width * 4,
- };
- uint32_t swizzle;
- drm_intel_bo *bo = batch->bo;
- drm_intel_bo_reference(bo);
-
- drm_intel_bo_get_tiling(dst, &d.tiling, &swizzle);
- drm_intel_bo_get_tiling(src, &s.tiling, &swizzle);
-
- rendercopy(batch, NULL,
- &s, 0, 0,
- width, height,
- &d, 0, 0);
-
- return bo;
-}
-
-static drm_intel_bo *bcs_copy_bo(drm_intel_bo *dst, drm_intel_bo *src)
-{
- drm_intel_bo *bo = batch->bo;
- drm_intel_bo_reference(bo);
-
- intel_blt_copy(batch,
- src, 0, 0, 4*width,
- dst, 0, 0, 4*width,
- width, height, 32);
-
- return bo;
-}
-
-static void
-set_bo(drm_intel_bo *bo, uint32_t val)
-{
- int size = width * height;
- uint32_t *vaddr;
-
- do_or_die(drm_intel_bo_map(bo, 1));
- vaddr = bo->virtual;
- while (size--)
- *vaddr++ = val;
- drm_intel_bo_unmap(bo);
-}
-
-static double elapsed(const struct timespec *start,
- const struct timespec *end,
- int loop)
-{
- return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_nsec - start->tv_nsec)/1000)/loop;
-}
-
-static drm_intel_bo *create_bo(drm_intel_bufmgr *bufmgr,
- const char *name)
-{
- uint32_t tiling_mode = I915_TILING_X;
- unsigned long pitch;
- return drm_intel_bo_alloc_tiled(bufmgr, name,
- width, height, 4,
- &tiling_mode, &pitch, 0);
-}
-
-static void run(drm_intel_bufmgr *bufmgr, int _width, int _height,
- bool write_bcs, bool write_rcs)
-{
- drm_intel_bo *src = NULL, *bcs = NULL, *rcs = NULL;
- drm_intel_bo *bcs_batch, *rcs_batch;
- struct timespec start, end;
- int loops = 1000;
-
- width = _width;
- height = _height;
-
- src = create_bo(bufmgr, "src");
- bcs = create_bo(bufmgr, "bcs");
- rcs = create_bo(bufmgr, "rcs");
-
- set_bo(src, 0xdeadbeef);
-
- if (write_bcs) {
- bcs_batch = bcs_copy_bo(src, bcs);
- } else {
- bcs_batch = bcs_copy_bo(bcs, src);
- }
- if (write_rcs) {
- rcs_batch = rcs_copy_bo(src, rcs);
- } else {
- rcs_batch = rcs_copy_bo(rcs, src);
- }
-
- drm_intel_bo_unreference(rcs);
- drm_intel_bo_unreference(bcs);
-
- drm_intel_gem_bo_start_gtt_access(src, true);
- clock_gettime(CLOCK_MONOTONIC, &start);
- for (int i = 0; i < loops; i++) {
- drm_intel_gem_bo_context_exec(rcs_batch, NULL, 4096, I915_EXEC_RENDER);
- drm_intel_gem_bo_context_exec(bcs_batch, NULL, 4096, I915_EXEC_BLT);
- }
- drm_intel_gem_bo_start_gtt_access(src, true);
- clock_gettime(CLOCK_MONOTONIC, &end);
-
- igt_info("Time to %s-%s %dx%d [%dk]: %7.3fµs\n",
- write_bcs ? "write" : "read",
- write_rcs ? "write" : "read",
- width, height, 4*width*height/1024,
- elapsed(&start, &end, loops));
-
- drm_intel_bo_unreference(rcs_batch);
- drm_intel_bo_unreference(bcs_batch);
-
- drm_intel_bo_unreference(src);
-}
-
-igt_main
-{
- const int sizes[] = {1, 128, 256, 512, 1024, 2048, 4096, 8192, 0};
- drm_intel_bufmgr *bufmgr = NULL;
- int fd, i;
-
- igt_skip_on_simulation();
-
- igt_fixture {
- int devid;
-
- fd = drm_open_driver(DRIVER_INTEL);
- igt_require_gem(fd);
-
- devid = intel_get_drm_devid(fd);
- igt_require(intel_gen(devid) >= 6);
-
- rendercopy = igt_get_render_copyfunc(devid);
- igt_require(rendercopy);
-
- bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
- igt_assert(bufmgr);
-
- batch = intel_batchbuffer_alloc(bufmgr, devid);
-
- gem_submission_print_method(fd);
- }
-
- for (i = 0; sizes[i] != 0; i++) {
- igt_subtest_f("read-read-%dx%d", sizes[i], sizes[i])
- run(bufmgr, sizes[i], sizes[i], false, false);
- igt_subtest_f("read-write-%dx%d", sizes[i], sizes[i])
- run(bufmgr, sizes[i], sizes[i], false, true);
- igt_subtest_f("write-read-%dx%d", sizes[i], sizes[i])
- run(bufmgr, sizes[i], sizes[i], true, false);
- igt_subtest_f("write-write-%dx%d", sizes[i], sizes[i])
- run(bufmgr, sizes[i], sizes[i], true, true);
- }
-}
diff --git a/tests/meson.build b/tests/meson.build
index 7708fdd..6273322 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -94,7 +94,6 @@ test_progs = [
'gem_pwrite',
'gem_pwrite_pread',
'gem_pwrite_snooped',
- 'gem_read_read_speed',
'gem_readwrite',
'gem_reg_read',
'gem_reloc_overflow',
--
2.7.4
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 14+ messages in thread* [igt-dev] [PATCH i-g-t 4/6] tests/gem_fence_upload: Move to benchmarks
2018-02-05 9:35 [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks Abdiel Janulgue
` (2 preceding siblings ...)
2018-02-05 9:35 ` [igt-dev] [PATCH i-g-t 3/6] tests/gem_read_read_speed: " Abdiel Janulgue
@ 2018-02-05 9:35 ` Abdiel Janulgue
2018-02-05 9:35 ` [igt-dev] [PATCH i-g-t 5/6] tests/gem_gtt_speed: " Abdiel Janulgue
` (5 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Abdiel Janulgue @ 2018-02-05 9:35 UTC (permalink / raw)
To: igt-dev; +Cc: Joonas Lahtinen
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
benchmarks/Makefile.sources | 1 +
benchmarks/gem_fence_upload.c | 405 ++++++++++++++++++++++++++++++++++++++++++
benchmarks/meson.build | 1 +
tests/Makefile.sources | 1 -
tests/gem_fence_upload.c | 405 ------------------------------------------
tests/meson.build | 1 -
6 files changed, 407 insertions(+), 407 deletions(-)
create mode 100644 benchmarks/gem_fence_upload.c
delete mode 100644 tests/gem_fence_upload.c
diff --git a/benchmarks/Makefile.sources b/benchmarks/Makefile.sources
index 54045fb..443cdc6 100644
--- a/benchmarks/Makefile.sources
+++ b/benchmarks/Makefile.sources
@@ -18,6 +18,7 @@ benchmarks_prog_list = \
gem_exec_latency \
gem_exec_lut_handle \
gem_read_read_speed \
+ gem_fence_upload \
kms_vblank \
prime_lookup \
vgem_mmap \
diff --git a/benchmarks/gem_fence_upload.c b/benchmarks/gem_fence_upload.c
new file mode 100644
index 0000000..f3b0e62
--- /dev/null
+++ b/benchmarks/gem_fence_upload.c
@@ -0,0 +1,405 @@
+/*
+ * Copyright © 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Chris Wilson <chris@chris-wilson.co.uk>
+ *
+ */
+
+#include "config.h"
+
+#include "igt.h"
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <fcntl.h>
+#include <inttypes.h>
+#include <errno.h>
+#include <sys/time.h>
+#include <pthread.h>
+#include "drm.h"
+#include "i915_drm.h"
+
+#define OBJECT_SIZE (1024*1024) /* restricted to 1MiB alignment on i915 fences */
+
+static double elapsed(const struct timeval *start,
+ const struct timeval *end)
+{
+ return (end->tv_sec - start->tv_sec) + 1e-6*(end->tv_usec - start->tv_usec);
+}
+
+static void performance(void)
+{
+ int n, loop, count;
+ int fd, num_fences;
+ double linear[2], tiled[2];
+
+ fd = drm_open_driver(DRIVER_INTEL);
+
+ num_fences = gem_available_fences(fd);
+ igt_require(num_fences > 0);
+
+ for (count = 2; count < 4*num_fences; count *= 2) {
+ struct timeval start, end;
+ uint32_t handle[count];
+ void *ptr[count];
+
+ for (n = 0; n < count; n++) {
+ handle[n] = gem_create(fd, OBJECT_SIZE);
+ ptr[n] = gem_mmap__gtt(fd, handle[n], OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ }
+
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1024; loop++) {
+ for (n = 0; n < count; n++)
+ memset(ptr[n], 0, OBJECT_SIZE);
+ }
+ gettimeofday(&end, NULL);
+
+ linear[count != 2] = count * loop / elapsed(&start, &end);
+ igt_info("Upload rate for %d linear surfaces: %7.3fMiB/s\n", count, linear[count != 2]);
+
+ for (n = 0; n < count; n++)
+ gem_set_tiling(fd, handle[n], I915_TILING_X, 1024);
+
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1024; loop++) {
+ for (n = 0; n < count; n++)
+ memset(ptr[n], 0, OBJECT_SIZE);
+ }
+ gettimeofday(&end, NULL);
+
+ tiled[count != 2] = count * loop / elapsed(&start, &end);
+ igt_info("Upload rate for %d tiled surfaces: %7.3fMiB/s\n", count, tiled[count != 2]);
+
+ for (n = 0; n < count; n++) {
+ munmap(ptr[n], OBJECT_SIZE);
+ gem_close(fd, handle[n]);
+ }
+
+ }
+
+ errno = 0;
+ igt_assert(linear[1] > 0.75 * linear[0]);
+ igt_assert(tiled[1] > 0.75 * tiled[0]);
+}
+
+struct thread_performance {
+ pthread_t thread;
+ int id, count, direction, loops;
+ void **ptr;
+};
+
+static void *read_thread_performance(void *closure)
+{
+ struct thread_performance *t = closure;
+ uint32_t x = 0;
+ int n, m;
+
+ for (n = 0; n < t->loops; n++) {
+ uint32_t *src = t->ptr[rand() % t->count];
+ src += (rand() % 256) * 4096 / 4;
+ for (m = 0; m < 4096/4; m++)
+ x += src[m];
+ }
+
+ return (void *)(uintptr_t)x;
+}
+
+static void *write_thread_performance(void *closure)
+{
+ struct thread_performance *t = closure;
+ int n;
+
+ for (n = 0; n < t->loops; n++) {
+ uint32_t *dst = t->ptr[rand() % t->count];
+ dst += (rand() % 256) * 4096 / 4;
+ memset(dst, 0, 4096);
+ }
+
+ return NULL;
+}
+
+#define READ (1<<0)
+#define WRITE (1<<1)
+static const char *direction_string(unsigned mask)
+{
+ switch (mask) {
+ case READ: return "Download";
+ case WRITE: return "Upload";
+ case READ | WRITE: return "Combined";
+ default: return "Unknown";
+ }
+}
+static void thread_performance(unsigned mask)
+{
+ const int loops = 4096;
+ int n, count;
+ int fd, num_fences;
+ double linear[2], tiled[2];
+
+ fd = drm_open_driver(DRIVER_INTEL);
+
+ num_fences = gem_available_fences(fd);
+ igt_require(num_fences > 0);
+
+ for (count = 2; count < 4*num_fences; count *= 2) {
+ const int nthreads = (mask & READ ? count : 0) + (mask & WRITE ? count : 0);
+ struct timeval start, end;
+ struct thread_performance readers[count];
+ struct thread_performance writers[count];
+ uint32_t handle[count];
+ void *ptr[count];
+
+ for (n = 0; n < count; n++) {
+ handle[n] = gem_create(fd, OBJECT_SIZE);
+ ptr[n] = gem_mmap__gtt(fd, handle[n], OBJECT_SIZE, PROT_READ | PROT_WRITE);
+
+ if (mask & READ) {
+ readers[n].id = n;
+ readers[n].direction = READ;
+ readers[n].ptr = ptr;
+ readers[n].count = count;
+ readers[n].loops = loops;
+ }
+
+ if (mask & WRITE) {
+ writers[n].id = count - n - 1;
+ writers[n].direction = WRITE;
+ writers[n].ptr = ptr;
+ writers[n].count = count;
+ writers[n].loops = loops;
+ }
+ }
+
+ gettimeofday(&start, NULL);
+ for (n = 0; n < count; n++) {
+ if (mask & READ)
+ pthread_create(&readers[n].thread, NULL, read_thread_performance, &readers[n]);
+ if (mask & WRITE)
+ pthread_create(&writers[n].thread, NULL, write_thread_performance, &writers[n]);
+ }
+ for (n = 0; n < count; n++) {
+ if (mask & READ)
+ pthread_join(readers[n].thread, NULL);
+ if (mask & WRITE)
+ pthread_join(writers[n].thread, NULL);
+ }
+ gettimeofday(&end, NULL);
+
+ linear[count != 2] = nthreads * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096);
+ igt_info("%s rate for %d linear surfaces, %d threads: %7.3fMiB/s\n", direction_string(mask), count, nthreads, linear[count != 2]);
+
+ for (n = 0; n < count; n++)
+ gem_set_tiling(fd, handle[n], I915_TILING_X, 1024);
+
+ gettimeofday(&start, NULL);
+ for (n = 0; n < count; n++) {
+ if (mask & READ)
+ pthread_create(&readers[n].thread, NULL, read_thread_performance, &readers[n]);
+ if (mask & WRITE)
+ pthread_create(&writers[n].thread, NULL, write_thread_performance, &writers[n]);
+ }
+ for (n = 0; n < count; n++) {
+ if (mask & READ)
+ pthread_join(readers[n].thread, NULL);
+ if (mask & WRITE)
+ pthread_join(writers[n].thread, NULL);
+ }
+ gettimeofday(&end, NULL);
+
+ tiled[count != 2] = nthreads * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096);
+ igt_info("%s rate for %d tiled surfaces, %d threads: %7.3fMiB/s\n", direction_string(mask), count, nthreads, tiled[count != 2]);
+
+ for (n = 0; n < count; n++) {
+ munmap(ptr[n], OBJECT_SIZE);
+ gem_close(fd, handle[n]);
+ }
+ }
+
+ errno = 0;
+ igt_assert(linear[1] > 0.75 * linear[0]);
+ igt_assert(tiled[1] > 0.75 * tiled[0]);
+}
+
+struct thread_contention {
+ pthread_t thread;
+ uint32_t handle;
+ int loops, fd;
+};
+static void *no_contention(void *closure)
+{
+ struct thread_contention *t = closure;
+ int n;
+
+ for (n = 0; n < t->loops; n++) {
+ uint32_t *ptr = gem_mmap__gtt(t->fd, t->handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ memset(ptr + (rand() % 256) * 4096 / 4, 0, 4096);
+ munmap(ptr, OBJECT_SIZE);
+ }
+
+ return NULL;
+}
+
+static void *wc_mmap(void *closure)
+{
+ struct thread_contention *t = closure;
+ int n;
+
+ for (n = 0; n < t->loops; n++) {
+ uint32_t *ptr = gem_mmap__wc(t->fd, t->handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ memset(ptr + (rand() % 256) * 4096 / 4, 0, 4096);
+ munmap(ptr, OBJECT_SIZE);
+ }
+
+ return NULL;
+}
+
+static void thread_contention(void)
+{
+ const int loops = 4096;
+ int n, count;
+ int fd, num_fences;
+ double linear[2], tiled[2];
+
+ fd = drm_open_driver(DRIVER_INTEL);
+
+ num_fences = gem_available_fences(fd);
+ igt_require(num_fences > 0);
+
+ for (count = 1; count < 4*num_fences; count *= 2) {
+ struct timeval start, end;
+ struct thread_contention threads[count];
+
+ for (n = 0; n < count; n++) {
+ threads[n].handle = gem_create(fd, OBJECT_SIZE);
+ threads[n].loops = loops;
+ threads[n].fd = fd;
+ }
+
+ gettimeofday(&start, NULL);
+ for (n = 0; n < count; n++)
+ pthread_create(&threads[n].thread, NULL, no_contention, &threads[n]);
+ for (n = 0; n < count; n++)
+ pthread_join(threads[n].thread, NULL);
+ gettimeofday(&end, NULL);
+
+ linear[count != 2] = count * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096);
+ igt_info("Contended upload rate for %d linear threads: %7.3fMiB/s\n", count, linear[count != 2]);
+
+ for (n = 0; n < count; n++)
+ gem_set_tiling(fd, threads[n].handle, I915_TILING_X, 1024);
+
+ gettimeofday(&start, NULL);
+ for (n = 0; n < count; n++)
+ pthread_create(&threads[n].thread, NULL, no_contention, &threads[n]);
+ for (n = 0; n < count; n++)
+ pthread_join(threads[n].thread, NULL);
+ gettimeofday(&end, NULL);
+
+ tiled[count != 2] = count * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096);
+ igt_info("Contended upload rate for %d tiled threads: %7.3fMiB/s\n", count, tiled[count != 2]);
+
+ for (n = 0; n < count; n++) {
+ gem_close(fd, threads[n].handle);
+ }
+ }
+
+ errno = 0;
+ igt_assert(linear[1] > 0.75 * linear[0]);
+ igt_assert(tiled[1] > 0.75 * tiled[0]);
+}
+
+static void wc_contention(void)
+{
+ const int loops = 4096;
+ int n, count;
+ int fd, num_fences;
+ double linear[2], tiled[2];
+
+ fd = drm_open_driver(DRIVER_INTEL);
+ gem_require_mmap_wc(fd);
+
+ num_fences = gem_available_fences(fd);
+ igt_require(num_fences > 0);
+
+ for (count = 1; count < 4*num_fences; count *= 2) {
+ struct timeval start, end;
+ struct thread_contention threads[count];
+
+ for (n = 0; n < count; n++) {
+ threads[n].handle = gem_create(fd, OBJECT_SIZE);
+ threads[n].loops = loops;
+ threads[n].fd = fd;
+ }
+
+ gettimeofday(&start, NULL);
+ for (n = 0; n < count; n++)
+ pthread_create(&threads[n].thread, NULL, wc_mmap, &threads[n]);
+ for (n = 0; n < count; n++)
+ pthread_join(threads[n].thread, NULL);
+ gettimeofday(&end, NULL);
+
+ linear[count != 2] = count * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096);
+ igt_info("Contended upload rate for %d linear threads/wc: %7.3fMiB/s\n", count, linear[count != 2]);
+
+ for (n = 0; n < count; n++)
+ gem_set_tiling(fd, threads[n].handle, I915_TILING_X, 1024);
+
+ gettimeofday(&start, NULL);
+ for (n = 0; n < count; n++)
+ pthread_create(&threads[n].thread, NULL, wc_mmap, &threads[n]);
+ for (n = 0; n < count; n++)
+ pthread_join(threads[n].thread, NULL);
+ gettimeofday(&end, NULL);
+
+ tiled[count != 2] = count * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096);
+ igt_info("Contended upload rate for %d tiled threads/wc: %7.3fMiB/s\n", count, tiled[count != 2]);
+
+ for (n = 0; n < count; n++) {
+ gem_close(fd, threads[n].handle);
+ }
+ }
+
+ errno = 0;
+ igt_assert(linear[1] > 0.75 * linear[0]);
+ igt_assert(tiled[1] > 0.75 * tiled[0]);
+}
+
+igt_main
+{
+ igt_skip_on_simulation();
+
+ igt_subtest("performance")
+ performance();
+ igt_subtest("thread-contention")
+ thread_contention();
+ igt_subtest("wc-contention")
+ wc_contention();
+ igt_subtest("thread-performance-read")
+ thread_performance(READ);
+ igt_subtest("thread-performance-write")
+ thread_performance(WRITE);
+ igt_subtest("thread-performance-both")
+ thread_performance(READ | WRITE);
+}
diff --git a/benchmarks/meson.build b/benchmarks/meson.build
index acb84c0..12e4242 100644
--- a/benchmarks/meson.build
+++ b/benchmarks/meson.build
@@ -15,6 +15,7 @@ benchmark_progs = [
'gem_exec_latency',
'gem_exec_lut_handle',
'gem_read_read_speed',
+ 'gem_fence_upload',
'kms_vblank',
'prime_lookup',
'vgem_mmap',
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index b37ece0..cf4c0c4 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -89,7 +89,6 @@ TESTS_progs = \
gem_exec_whisper \
gem_fd_exhaustion \
gem_fence_thrash \
- gem_fence_upload \
gem_fenced_exec_thrash \
gem_flink_basic \
gem_flink_race \
diff --git a/tests/gem_fence_upload.c b/tests/gem_fence_upload.c
deleted file mode 100644
index f3b0e62..0000000
--- a/tests/gem_fence_upload.c
+++ /dev/null
@@ -1,405 +0,0 @@
-/*
- * Copyright © 2014 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- * Chris Wilson <chris@chris-wilson.co.uk>
- *
- */
-
-#include "config.h"
-
-#include "igt.h"
-#include <unistd.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <fcntl.h>
-#include <inttypes.h>
-#include <errno.h>
-#include <sys/time.h>
-#include <pthread.h>
-#include "drm.h"
-#include "i915_drm.h"
-
-#define OBJECT_SIZE (1024*1024) /* restricted to 1MiB alignment on i915 fences */
-
-static double elapsed(const struct timeval *start,
- const struct timeval *end)
-{
- return (end->tv_sec - start->tv_sec) + 1e-6*(end->tv_usec - start->tv_usec);
-}
-
-static void performance(void)
-{
- int n, loop, count;
- int fd, num_fences;
- double linear[2], tiled[2];
-
- fd = drm_open_driver(DRIVER_INTEL);
-
- num_fences = gem_available_fences(fd);
- igt_require(num_fences > 0);
-
- for (count = 2; count < 4*num_fences; count *= 2) {
- struct timeval start, end;
- uint32_t handle[count];
- void *ptr[count];
-
- for (n = 0; n < count; n++) {
- handle[n] = gem_create(fd, OBJECT_SIZE);
- ptr[n] = gem_mmap__gtt(fd, handle[n], OBJECT_SIZE, PROT_READ | PROT_WRITE);
- }
-
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1024; loop++) {
- for (n = 0; n < count; n++)
- memset(ptr[n], 0, OBJECT_SIZE);
- }
- gettimeofday(&end, NULL);
-
- linear[count != 2] = count * loop / elapsed(&start, &end);
- igt_info("Upload rate for %d linear surfaces: %7.3fMiB/s\n", count, linear[count != 2]);
-
- for (n = 0; n < count; n++)
- gem_set_tiling(fd, handle[n], I915_TILING_X, 1024);
-
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1024; loop++) {
- for (n = 0; n < count; n++)
- memset(ptr[n], 0, OBJECT_SIZE);
- }
- gettimeofday(&end, NULL);
-
- tiled[count != 2] = count * loop / elapsed(&start, &end);
- igt_info("Upload rate for %d tiled surfaces: %7.3fMiB/s\n", count, tiled[count != 2]);
-
- for (n = 0; n < count; n++) {
- munmap(ptr[n], OBJECT_SIZE);
- gem_close(fd, handle[n]);
- }
-
- }
-
- errno = 0;
- igt_assert(linear[1] > 0.75 * linear[0]);
- igt_assert(tiled[1] > 0.75 * tiled[0]);
-}
-
-struct thread_performance {
- pthread_t thread;
- int id, count, direction, loops;
- void **ptr;
-};
-
-static void *read_thread_performance(void *closure)
-{
- struct thread_performance *t = closure;
- uint32_t x = 0;
- int n, m;
-
- for (n = 0; n < t->loops; n++) {
- uint32_t *src = t->ptr[rand() % t->count];
- src += (rand() % 256) * 4096 / 4;
- for (m = 0; m < 4096/4; m++)
- x += src[m];
- }
-
- return (void *)(uintptr_t)x;
-}
-
-static void *write_thread_performance(void *closure)
-{
- struct thread_performance *t = closure;
- int n;
-
- for (n = 0; n < t->loops; n++) {
- uint32_t *dst = t->ptr[rand() % t->count];
- dst += (rand() % 256) * 4096 / 4;
- memset(dst, 0, 4096);
- }
-
- return NULL;
-}
-
-#define READ (1<<0)
-#define WRITE (1<<1)
-static const char *direction_string(unsigned mask)
-{
- switch (mask) {
- case READ: return "Download";
- case WRITE: return "Upload";
- case READ | WRITE: return "Combined";
- default: return "Unknown";
- }
-}
-static void thread_performance(unsigned mask)
-{
- const int loops = 4096;
- int n, count;
- int fd, num_fences;
- double linear[2], tiled[2];
-
- fd = drm_open_driver(DRIVER_INTEL);
-
- num_fences = gem_available_fences(fd);
- igt_require(num_fences > 0);
-
- for (count = 2; count < 4*num_fences; count *= 2) {
- const int nthreads = (mask & READ ? count : 0) + (mask & WRITE ? count : 0);
- struct timeval start, end;
- struct thread_performance readers[count];
- struct thread_performance writers[count];
- uint32_t handle[count];
- void *ptr[count];
-
- for (n = 0; n < count; n++) {
- handle[n] = gem_create(fd, OBJECT_SIZE);
- ptr[n] = gem_mmap__gtt(fd, handle[n], OBJECT_SIZE, PROT_READ | PROT_WRITE);
-
- if (mask & READ) {
- readers[n].id = n;
- readers[n].direction = READ;
- readers[n].ptr = ptr;
- readers[n].count = count;
- readers[n].loops = loops;
- }
-
- if (mask & WRITE) {
- writers[n].id = count - n - 1;
- writers[n].direction = WRITE;
- writers[n].ptr = ptr;
- writers[n].count = count;
- writers[n].loops = loops;
- }
- }
-
- gettimeofday(&start, NULL);
- for (n = 0; n < count; n++) {
- if (mask & READ)
- pthread_create(&readers[n].thread, NULL, read_thread_performance, &readers[n]);
- if (mask & WRITE)
- pthread_create(&writers[n].thread, NULL, write_thread_performance, &writers[n]);
- }
- for (n = 0; n < count; n++) {
- if (mask & READ)
- pthread_join(readers[n].thread, NULL);
- if (mask & WRITE)
- pthread_join(writers[n].thread, NULL);
- }
- gettimeofday(&end, NULL);
-
- linear[count != 2] = nthreads * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096);
- igt_info("%s rate for %d linear surfaces, %d threads: %7.3fMiB/s\n", direction_string(mask), count, nthreads, linear[count != 2]);
-
- for (n = 0; n < count; n++)
- gem_set_tiling(fd, handle[n], I915_TILING_X, 1024);
-
- gettimeofday(&start, NULL);
- for (n = 0; n < count; n++) {
- if (mask & READ)
- pthread_create(&readers[n].thread, NULL, read_thread_performance, &readers[n]);
- if (mask & WRITE)
- pthread_create(&writers[n].thread, NULL, write_thread_performance, &writers[n]);
- }
- for (n = 0; n < count; n++) {
- if (mask & READ)
- pthread_join(readers[n].thread, NULL);
- if (mask & WRITE)
- pthread_join(writers[n].thread, NULL);
- }
- gettimeofday(&end, NULL);
-
- tiled[count != 2] = nthreads * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096);
- igt_info("%s rate for %d tiled surfaces, %d threads: %7.3fMiB/s\n", direction_string(mask), count, nthreads, tiled[count != 2]);
-
- for (n = 0; n < count; n++) {
- munmap(ptr[n], OBJECT_SIZE);
- gem_close(fd, handle[n]);
- }
- }
-
- errno = 0;
- igt_assert(linear[1] > 0.75 * linear[0]);
- igt_assert(tiled[1] > 0.75 * tiled[0]);
-}
-
-struct thread_contention {
- pthread_t thread;
- uint32_t handle;
- int loops, fd;
-};
-static void *no_contention(void *closure)
-{
- struct thread_contention *t = closure;
- int n;
-
- for (n = 0; n < t->loops; n++) {
- uint32_t *ptr = gem_mmap__gtt(t->fd, t->handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
- memset(ptr + (rand() % 256) * 4096 / 4, 0, 4096);
- munmap(ptr, OBJECT_SIZE);
- }
-
- return NULL;
-}
-
-static void *wc_mmap(void *closure)
-{
- struct thread_contention *t = closure;
- int n;
-
- for (n = 0; n < t->loops; n++) {
- uint32_t *ptr = gem_mmap__wc(t->fd, t->handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
- memset(ptr + (rand() % 256) * 4096 / 4, 0, 4096);
- munmap(ptr, OBJECT_SIZE);
- }
-
- return NULL;
-}
-
-static void thread_contention(void)
-{
- const int loops = 4096;
- int n, count;
- int fd, num_fences;
- double linear[2], tiled[2];
-
- fd = drm_open_driver(DRIVER_INTEL);
-
- num_fences = gem_available_fences(fd);
- igt_require(num_fences > 0);
-
- for (count = 1; count < 4*num_fences; count *= 2) {
- struct timeval start, end;
- struct thread_contention threads[count];
-
- for (n = 0; n < count; n++) {
- threads[n].handle = gem_create(fd, OBJECT_SIZE);
- threads[n].loops = loops;
- threads[n].fd = fd;
- }
-
- gettimeofday(&start, NULL);
- for (n = 0; n < count; n++)
- pthread_create(&threads[n].thread, NULL, no_contention, &threads[n]);
- for (n = 0; n < count; n++)
- pthread_join(threads[n].thread, NULL);
- gettimeofday(&end, NULL);
-
- linear[count != 2] = count * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096);
- igt_info("Contended upload rate for %d linear threads: %7.3fMiB/s\n", count, linear[count != 2]);
-
- for (n = 0; n < count; n++)
- gem_set_tiling(fd, threads[n].handle, I915_TILING_X, 1024);
-
- gettimeofday(&start, NULL);
- for (n = 0; n < count; n++)
- pthread_create(&threads[n].thread, NULL, no_contention, &threads[n]);
- for (n = 0; n < count; n++)
- pthread_join(threads[n].thread, NULL);
- gettimeofday(&end, NULL);
-
- tiled[count != 2] = count * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096);
- igt_info("Contended upload rate for %d tiled threads: %7.3fMiB/s\n", count, tiled[count != 2]);
-
- for (n = 0; n < count; n++) {
- gem_close(fd, threads[n].handle);
- }
- }
-
- errno = 0;
- igt_assert(linear[1] > 0.75 * linear[0]);
- igt_assert(tiled[1] > 0.75 * tiled[0]);
-}
-
-static void wc_contention(void)
-{
- const int loops = 4096;
- int n, count;
- int fd, num_fences;
- double linear[2], tiled[2];
-
- fd = drm_open_driver(DRIVER_INTEL);
- gem_require_mmap_wc(fd);
-
- num_fences = gem_available_fences(fd);
- igt_require(num_fences > 0);
-
- for (count = 1; count < 4*num_fences; count *= 2) {
- struct timeval start, end;
- struct thread_contention threads[count];
-
- for (n = 0; n < count; n++) {
- threads[n].handle = gem_create(fd, OBJECT_SIZE);
- threads[n].loops = loops;
- threads[n].fd = fd;
- }
-
- gettimeofday(&start, NULL);
- for (n = 0; n < count; n++)
- pthread_create(&threads[n].thread, NULL, wc_mmap, &threads[n]);
- for (n = 0; n < count; n++)
- pthread_join(threads[n].thread, NULL);
- gettimeofday(&end, NULL);
-
- linear[count != 2] = count * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096);
- igt_info("Contended upload rate for %d linear threads/wc: %7.3fMiB/s\n", count, linear[count != 2]);
-
- for (n = 0; n < count; n++)
- gem_set_tiling(fd, threads[n].handle, I915_TILING_X, 1024);
-
- gettimeofday(&start, NULL);
- for (n = 0; n < count; n++)
- pthread_create(&threads[n].thread, NULL, wc_mmap, &threads[n]);
- for (n = 0; n < count; n++)
- pthread_join(threads[n].thread, NULL);
- gettimeofday(&end, NULL);
-
- tiled[count != 2] = count * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096);
- igt_info("Contended upload rate for %d tiled threads/wc: %7.3fMiB/s\n", count, tiled[count != 2]);
-
- for (n = 0; n < count; n++) {
- gem_close(fd, threads[n].handle);
- }
- }
-
- errno = 0;
- igt_assert(linear[1] > 0.75 * linear[0]);
- igt_assert(tiled[1] > 0.75 * tiled[0]);
-}
-
-igt_main
-{
- igt_skip_on_simulation();
-
- igt_subtest("performance")
- performance();
- igt_subtest("thread-contention")
- thread_contention();
- igt_subtest("wc-contention")
- wc_contention();
- igt_subtest("thread-performance-read")
- thread_performance(READ);
- igt_subtest("thread-performance-write")
- thread_performance(WRITE);
- igt_subtest("thread-performance-both")
- thread_performance(READ | WRITE);
-}
diff --git a/tests/meson.build b/tests/meson.build
index 6273322..ae30fd9 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -67,7 +67,6 @@ test_progs = [
'gem_exec_whisper',
'gem_fd_exhaustion',
'gem_fence_thrash',
- 'gem_fence_upload',
'gem_fenced_exec_thrash',
'gem_flink_basic',
'gem_flink_race',
--
2.7.4
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 14+ messages in thread* [igt-dev] [PATCH i-g-t 5/6] tests/gem_gtt_speed: Move to benchmarks
2018-02-05 9:35 [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks Abdiel Janulgue
` (3 preceding siblings ...)
2018-02-05 9:35 ` [igt-dev] [PATCH i-g-t 4/6] tests/gem_fence_upload: " Abdiel Janulgue
@ 2018-02-05 9:35 ` Abdiel Janulgue
2018-02-05 9:46 ` Chris Wilson
2018-02-05 9:35 ` [igt-dev] [PATCH i-g-t 6/6] benchmarks/gtt_speed: Add a subtest to compare post suspend speed Abdiel Janulgue
` (4 subsequent siblings)
9 siblings, 1 reply; 14+ messages in thread
From: Abdiel Janulgue @ 2018-02-05 9:35 UTC (permalink / raw)
To: igt-dev; +Cc: Joonas Lahtinen
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
benchmarks/Makefile.sources | 1 +
benchmarks/gem_gtt_speed.c | 510 ++++++++++++++++++++++++++++++++++++++++++++
benchmarks/meson.build | 1 +
tests/Makefile.sources | 1 -
tests/gem_gtt_speed.c | 510 --------------------------------------------
tests/meson.build | 1 -
6 files changed, 512 insertions(+), 512 deletions(-)
create mode 100644 benchmarks/gem_gtt_speed.c
delete mode 100644 tests/gem_gtt_speed.c
diff --git a/benchmarks/Makefile.sources b/benchmarks/Makefile.sources
index 443cdc6..29a2d3c 100644
--- a/benchmarks/Makefile.sources
+++ b/benchmarks/Makefile.sources
@@ -19,6 +19,7 @@ benchmarks_prog_list = \
gem_exec_lut_handle \
gem_read_read_speed \
gem_fence_upload \
+ gem_gtt_speed \
kms_vblank \
prime_lookup \
vgem_mmap \
diff --git a/benchmarks/gem_gtt_speed.c b/benchmarks/gem_gtt_speed.c
new file mode 100644
index 0000000..3d726c4
--- /dev/null
+++ b/benchmarks/gem_gtt_speed.c
@@ -0,0 +1,510 @@
+/*
+ * Copyright © 2010 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Eric Anholt <eric@anholt.net>
+ * Chris Wilson <chris@chris-wilson.co.uk>
+ *
+ */
+
+#include "igt.h"
+#include "igt_x86.h"
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include <fcntl.h>
+#include <inttypes.h>
+#include <errno.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <sys/time.h>
+#include "drm.h"
+
+#define OBJECT_SIZE 16384
+
+static double elapsed(const struct timeval *start,
+ const struct timeval *end,
+ int loop)
+{
+ return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_usec - start->tv_usec))/loop;
+}
+
+#if defined(__x86_64__) && !defined(__clang__)
+#pragma GCC push_options
+#pragma GCC target("sse4.1")
+#include <smmintrin.h>
+__attribute__((noinline))
+static void streaming_load(void *src, int len)
+{
+ __m128i tmp, *s = src;
+
+ igt_assert((len & 15) == 0);
+ igt_assert((((uintptr_t)src) & 15) == 0);
+
+ while (len >= 16) {
+ tmp += _mm_stream_load_si128(s++);
+ len -= 16;
+
+ }
+
+ *(volatile __m128i *)src = tmp;
+}
+static inline unsigned x86_64_features(void)
+{
+ return igt_x86_features();
+}
+#pragma GCC pop_options
+#else
+static inline unsigned x86_64_features(void)
+{
+ return 0;
+}
+static void streaming_load(void *src, int len)
+{
+ igt_assert(!"reached");
+}
+#endif
+
+int main(int argc, char **argv)
+{
+ struct timeval start, end;
+ uint8_t *buf;
+ uint32_t handle;
+ unsigned cpu = x86_64_features();
+ int size = OBJECT_SIZE;
+ int loop, i, tiling;
+ int fd;
+
+ igt_simple_init(argc, argv);
+
+ igt_skip_on_simulation();
+
+ if (argc > 1)
+ size = atoi(argv[1]);
+ if (size == 0) {
+ igt_warn("Invalid object size specified\n");
+ return 1;
+ }
+
+ if (cpu) {
+ char str[1024];
+ igt_info("Detected cpu faatures: %s\n",
+ igt_x86_features_to_string(cpu, str));
+ }
+
+ buf = malloc(size);
+ memset(buf, 0, size);
+ fd = drm_open_driver(DRIVER_INTEL);
+
+ handle = gem_create(fd, size);
+ igt_assert(handle);
+
+ for (tiling = I915_TILING_NONE; tiling <= I915_TILING_Y; tiling++) {
+ if (tiling != I915_TILING_NONE) {
+ igt_info("\nSetting tiling mode to %s\n",
+ tiling == I915_TILING_X ? "X" : "Y");
+ gem_set_tiling(fd, handle, tiling, 512);
+ }
+
+ if (tiling == I915_TILING_NONE) {
+ gem_set_domain(fd, handle,
+ I915_GEM_DOMAIN_CPU,
+ I915_GEM_DOMAIN_CPU);
+
+ {
+ uint32_t *base = gem_mmap__cpu(fd, handle, 0, size, PROT_READ | PROT_WRITE);
+ volatile uint32_t *ptr = base;
+ int x = 0;
+
+ for (i = 0; i < size/sizeof(*ptr); i++)
+ x += ptr[i];
+
+ /* force overly clever gcc to actually compute x */
+ ptr[0] = x;
+
+ munmap(base, size);
+
+ /* mmap read */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ base = gem_mmap__cpu(fd, handle, 0,
+ size,
+ PROT_READ | PROT_WRITE);
+ ptr = base;
+ x = 0;
+
+ for (i = 0; i < size/sizeof(*ptr); i++)
+ x += ptr[i];
+
+ /* force overly clever gcc to actually compute x */
+ ptr[0] = x;
+
+ munmap(base, size);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to read %dk through a CPU map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+ {
+ base = gem_mmap__cpu(fd, handle, 0,
+ size,
+ PROT_READ | PROT_WRITE);
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ ptr = base;
+ x = 0;
+
+ for (i = 0; i < size/sizeof(*ptr); i++)
+ x += ptr[i];
+
+ /* force overly clever gcc to actually compute x */
+ ptr[0] = x;
+
+ }
+ gettimeofday(&end, NULL);
+ munmap(base, size);
+ igt_info("Time to read %dk through a cached CPU map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+ }
+
+ /* mmap write */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ base = gem_mmap__cpu(fd, handle, 0,
+ size,
+ PROT_READ | PROT_WRITE);
+ ptr = base;
+
+ for (i = 0; i < size/sizeof(*ptr); i++)
+ ptr[i] = i;
+
+ munmap(base, size);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to write %dk through a CPU map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ base = gem_mmap__cpu(fd, handle, 0,
+ size,
+ PROT_READ | PROT_WRITE);
+ memset(base, 0, size);
+ munmap(base, size);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to clear %dk through a CPU map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ gettimeofday(&start, NULL);
+ base = gem_mmap__cpu(fd, handle, 0, size,
+ PROT_READ | PROT_WRITE);
+ for (loop = 0; loop < 1000; loop++)
+ memset(base, 0, size);
+ munmap(base, size);
+ gettimeofday(&end, NULL);
+ igt_info("Time to clear %dk through a cached CPU map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+ }
+
+ /* CPU pwrite */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++)
+ gem_write(fd, handle, 0, buf, size);
+ gettimeofday(&end, NULL);
+ igt_info("Time to pwrite %dk through the CPU: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ /* CPU pread */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++)
+ gem_read(fd, handle, 0, buf, size);
+ gettimeofday(&end, NULL);
+ igt_info("Time to pread %dk through the CPU: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+ }
+
+ /* prefault into gtt */
+ {
+ uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE);
+ volatile uint32_t *ptr = base;
+ int x = 0;
+
+ for (i = 0; i < size/sizeof(*ptr); i++)
+ x += ptr[i];
+
+ /* force overly clever gcc to actually compute x */
+ ptr[0] = x;
+
+ munmap(base, size);
+ }
+ /* mmap read */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE);
+ volatile uint32_t *ptr = base;
+ int x = 0;
+
+ for (i = 0; i < size/sizeof(*ptr); i++)
+ x += ptr[i];
+
+ /* force overly clever gcc to actually compute x */
+ ptr[0] = x;
+
+ munmap(base, size);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to read %dk through a GTT map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ if (gem_mmap__has_wc(fd)) {
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
+ volatile uint32_t *ptr = base;
+ int x = 0;
+
+ for (i = 0; i < size/sizeof(*ptr); i++)
+ x += ptr[i];
+
+ /* force overly clever gcc to actually compute x */
+ ptr[0] = x;
+
+ munmap(base, size);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to read %dk through a WC map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ {
+ uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ volatile uint32_t *ptr = base;
+ int x = 0;
+
+ for (i = 0; i < size/sizeof(*ptr); i++)
+ x += ptr[i];
+
+ /* force overly clever gcc to actually compute x */
+ ptr[0] = x;
+
+ }
+ gettimeofday(&end, NULL);
+ munmap(base, size);
+ }
+ igt_info("Time to read %dk through a cached WC map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ /* Check streaming loads from WC */
+ if (cpu & SSE4_1) {
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
+ streaming_load(base, size);
+
+ munmap(base, size);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to stream %dk from a WC map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ {
+ uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++)
+ streaming_load(base, size);
+ gettimeofday(&end, NULL);
+ munmap(base, size);
+ }
+ igt_info("Time to stream %dk from a cached WC map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+ }
+ }
+
+
+ /* mmap write */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE);
+ volatile uint32_t *ptr = base;
+
+ for (i = 0; i < size/sizeof(*ptr); i++)
+ ptr[i] = i;
+
+ munmap(base, size);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to write %dk through a GTT map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ if (gem_mmap__has_wc(fd)) {
+ /* mmap write */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
+ volatile uint32_t *ptr = base;
+
+ for (i = 0; i < size/sizeof(*ptr); i++)
+ ptr[i] = i;
+
+ munmap(base, size);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to write %dk through a WC map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+ }
+
+ /* mmap clear */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE);
+ memset(base, 0, size);
+ munmap(base, size);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to clear %dk through a GTT map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ if (gem_mmap__has_wc(fd)) {
+ /* mmap clear */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
+ memset(base, 0, size);
+ munmap(base, size);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to clear %dk through a WC map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+ }
+
+ gettimeofday(&start, NULL);{
+ uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE);
+ for (loop = 0; loop < 1000; loop++)
+ memset(base, 0, size);
+ munmap(base, size);
+ } gettimeofday(&end, NULL);
+ igt_info("Time to clear %dk through a cached GTT map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ if (gem_mmap__has_wc(fd)) {
+ gettimeofday(&start, NULL);{
+ uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
+ for (loop = 0; loop < 1000; loop++)
+ memset(base, 0, size);
+ munmap(base, size);
+ } gettimeofday(&end, NULL);
+ igt_info("Time to clear %dk through a cached WC map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+ }
+
+ /* mmap read */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE);
+ volatile uint32_t *ptr = base;
+ int x = 0;
+
+ for (i = 0; i < size/sizeof(*ptr); i++)
+ x += ptr[i];
+
+ /* force overly clever gcc to actually compute x */
+ ptr[0] = x;
+
+ munmap(base, size);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to read %dk (again) through a GTT map: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ if (tiling == I915_TILING_NONE) {
+ /* GTT pwrite */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++)
+ gem_write(fd, handle, 0, buf, size);
+ gettimeofday(&end, NULL);
+ igt_info("Time to pwrite %dk through the GTT: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ /* GTT pread */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++)
+ gem_read(fd, handle, 0, buf, size);
+ gettimeofday(&end, NULL);
+ igt_info("Time to pread %dk through the GTT: %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ /* GTT pwrite, including clflush */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ gem_write(fd, handle, 0, buf, size);
+ gem_sync(fd, handle);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to pwrite %dk through the GTT (clflush): %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ /* GTT pread, including clflush */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ gem_sync(fd, handle);
+ gem_read(fd, handle, 0, buf, size);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to pread %dk through the GTT (clflush): %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ /* partial writes */
+ igt_info("Now partial writes.\n");
+ size /= 4;
+
+ /* partial GTT pwrite, including clflush */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ gem_write(fd, handle, 0, buf, size);
+ gem_sync(fd, handle);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to pwrite %dk through the GTT (clflush): %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ /* partial GTT pread, including clflush */
+ gettimeofday(&start, NULL);
+ for (loop = 0; loop < 1000; loop++) {
+ gem_sync(fd, handle);
+ gem_read(fd, handle, 0, buf, size);
+ }
+ gettimeofday(&end, NULL);
+ igt_info("Time to pread %dk through the GTT (clflush): %7.3fµs\n",
+ size/1024, elapsed(&start, &end, loop));
+
+ size *= 4;
+ }
+ }
+
+ gem_close(fd, handle);
+ close(fd);
+
+ igt_exit();
+}
diff --git a/benchmarks/meson.build b/benchmarks/meson.build
index 12e4242..be49ed8 100644
--- a/benchmarks/meson.build
+++ b/benchmarks/meson.build
@@ -16,6 +16,7 @@ benchmark_progs = [
'gem_exec_lut_handle',
'gem_read_read_speed',
'gem_fence_upload',
+ 'gem_gtt_speed',
'kms_vblank',
'prime_lookup',
'vgem_mmap',
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index cf4c0c4..c75d02a 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -95,7 +95,6 @@ TESTS_progs = \
gem_gpgpu_fill \
gem_gtt_cpu_tlb \
gem_gtt_hog \
- gem_gtt_speed \
gem_largeobject \
gem_linear_blits \
gem_lut_handle \
diff --git a/tests/gem_gtt_speed.c b/tests/gem_gtt_speed.c
deleted file mode 100644
index 3d726c4..0000000
--- a/tests/gem_gtt_speed.c
+++ /dev/null
@@ -1,510 +0,0 @@
-/*
- * Copyright © 2010 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- * Eric Anholt <eric@anholt.net>
- * Chris Wilson <chris@chris-wilson.co.uk>
- *
- */
-
-#include "igt.h"
-#include "igt_x86.h"
-#include <unistd.h>
-#include <stdlib.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-#include <fcntl.h>
-#include <inttypes.h>
-#include <errno.h>
-#include <sys/stat.h>
-#include <sys/ioctl.h>
-#include <sys/time.h>
-#include "drm.h"
-
-#define OBJECT_SIZE 16384
-
-static double elapsed(const struct timeval *start,
- const struct timeval *end,
- int loop)
-{
- return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_usec - start->tv_usec))/loop;
-}
-
-#if defined(__x86_64__) && !defined(__clang__)
-#pragma GCC push_options
-#pragma GCC target("sse4.1")
-#include <smmintrin.h>
-__attribute__((noinline))
-static void streaming_load(void *src, int len)
-{
- __m128i tmp, *s = src;
-
- igt_assert((len & 15) == 0);
- igt_assert((((uintptr_t)src) & 15) == 0);
-
- while (len >= 16) {
- tmp += _mm_stream_load_si128(s++);
- len -= 16;
-
- }
-
- *(volatile __m128i *)src = tmp;
-}
-static inline unsigned x86_64_features(void)
-{
- return igt_x86_features();
-}
-#pragma GCC pop_options
-#else
-static inline unsigned x86_64_features(void)
-{
- return 0;
-}
-static void streaming_load(void *src, int len)
-{
- igt_assert(!"reached");
-}
-#endif
-
-int main(int argc, char **argv)
-{
- struct timeval start, end;
- uint8_t *buf;
- uint32_t handle;
- unsigned cpu = x86_64_features();
- int size = OBJECT_SIZE;
- int loop, i, tiling;
- int fd;
-
- igt_simple_init(argc, argv);
-
- igt_skip_on_simulation();
-
- if (argc > 1)
- size = atoi(argv[1]);
- if (size == 0) {
- igt_warn("Invalid object size specified\n");
- return 1;
- }
-
- if (cpu) {
- char str[1024];
- igt_info("Detected cpu faatures: %s\n",
- igt_x86_features_to_string(cpu, str));
- }
-
- buf = malloc(size);
- memset(buf, 0, size);
- fd = drm_open_driver(DRIVER_INTEL);
-
- handle = gem_create(fd, size);
- igt_assert(handle);
-
- for (tiling = I915_TILING_NONE; tiling <= I915_TILING_Y; tiling++) {
- if (tiling != I915_TILING_NONE) {
- igt_info("\nSetting tiling mode to %s\n",
- tiling == I915_TILING_X ? "X" : "Y");
- gem_set_tiling(fd, handle, tiling, 512);
- }
-
- if (tiling == I915_TILING_NONE) {
- gem_set_domain(fd, handle,
- I915_GEM_DOMAIN_CPU,
- I915_GEM_DOMAIN_CPU);
-
- {
- uint32_t *base = gem_mmap__cpu(fd, handle, 0, size, PROT_READ | PROT_WRITE);
- volatile uint32_t *ptr = base;
- int x = 0;
-
- for (i = 0; i < size/sizeof(*ptr); i++)
- x += ptr[i];
-
- /* force overly clever gcc to actually compute x */
- ptr[0] = x;
-
- munmap(base, size);
-
- /* mmap read */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- base = gem_mmap__cpu(fd, handle, 0,
- size,
- PROT_READ | PROT_WRITE);
- ptr = base;
- x = 0;
-
- for (i = 0; i < size/sizeof(*ptr); i++)
- x += ptr[i];
-
- /* force overly clever gcc to actually compute x */
- ptr[0] = x;
-
- munmap(base, size);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to read %dk through a CPU map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
- {
- base = gem_mmap__cpu(fd, handle, 0,
- size,
- PROT_READ | PROT_WRITE);
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- ptr = base;
- x = 0;
-
- for (i = 0; i < size/sizeof(*ptr); i++)
- x += ptr[i];
-
- /* force overly clever gcc to actually compute x */
- ptr[0] = x;
-
- }
- gettimeofday(&end, NULL);
- munmap(base, size);
- igt_info("Time to read %dk through a cached CPU map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
- }
-
- /* mmap write */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- base = gem_mmap__cpu(fd, handle, 0,
- size,
- PROT_READ | PROT_WRITE);
- ptr = base;
-
- for (i = 0; i < size/sizeof(*ptr); i++)
- ptr[i] = i;
-
- munmap(base, size);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to write %dk through a CPU map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- base = gem_mmap__cpu(fd, handle, 0,
- size,
- PROT_READ | PROT_WRITE);
- memset(base, 0, size);
- munmap(base, size);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to clear %dk through a CPU map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- gettimeofday(&start, NULL);
- base = gem_mmap__cpu(fd, handle, 0, size,
- PROT_READ | PROT_WRITE);
- for (loop = 0; loop < 1000; loop++)
- memset(base, 0, size);
- munmap(base, size);
- gettimeofday(&end, NULL);
- igt_info("Time to clear %dk through a cached CPU map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
- }
-
- /* CPU pwrite */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++)
- gem_write(fd, handle, 0, buf, size);
- gettimeofday(&end, NULL);
- igt_info("Time to pwrite %dk through the CPU: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- /* CPU pread */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++)
- gem_read(fd, handle, 0, buf, size);
- gettimeofday(&end, NULL);
- igt_info("Time to pread %dk through the CPU: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
- }
-
- /* prefault into gtt */
- {
- uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE);
- volatile uint32_t *ptr = base;
- int x = 0;
-
- for (i = 0; i < size/sizeof(*ptr); i++)
- x += ptr[i];
-
- /* force overly clever gcc to actually compute x */
- ptr[0] = x;
-
- munmap(base, size);
- }
- /* mmap read */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE);
- volatile uint32_t *ptr = base;
- int x = 0;
-
- for (i = 0; i < size/sizeof(*ptr); i++)
- x += ptr[i];
-
- /* force overly clever gcc to actually compute x */
- ptr[0] = x;
-
- munmap(base, size);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to read %dk through a GTT map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- if (gem_mmap__has_wc(fd)) {
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
- volatile uint32_t *ptr = base;
- int x = 0;
-
- for (i = 0; i < size/sizeof(*ptr); i++)
- x += ptr[i];
-
- /* force overly clever gcc to actually compute x */
- ptr[0] = x;
-
- munmap(base, size);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to read %dk through a WC map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- {
- uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- volatile uint32_t *ptr = base;
- int x = 0;
-
- for (i = 0; i < size/sizeof(*ptr); i++)
- x += ptr[i];
-
- /* force overly clever gcc to actually compute x */
- ptr[0] = x;
-
- }
- gettimeofday(&end, NULL);
- munmap(base, size);
- }
- igt_info("Time to read %dk through a cached WC map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- /* Check streaming loads from WC */
- if (cpu & SSE4_1) {
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
- streaming_load(base, size);
-
- munmap(base, size);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to stream %dk from a WC map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- {
- uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++)
- streaming_load(base, size);
- gettimeofday(&end, NULL);
- munmap(base, size);
- }
- igt_info("Time to stream %dk from a cached WC map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
- }
- }
-
-
- /* mmap write */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE);
- volatile uint32_t *ptr = base;
-
- for (i = 0; i < size/sizeof(*ptr); i++)
- ptr[i] = i;
-
- munmap(base, size);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to write %dk through a GTT map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- if (gem_mmap__has_wc(fd)) {
- /* mmap write */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
- volatile uint32_t *ptr = base;
-
- for (i = 0; i < size/sizeof(*ptr); i++)
- ptr[i] = i;
-
- munmap(base, size);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to write %dk through a WC map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
- }
-
- /* mmap clear */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE);
- memset(base, 0, size);
- munmap(base, size);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to clear %dk through a GTT map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- if (gem_mmap__has_wc(fd)) {
- /* mmap clear */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
- memset(base, 0, size);
- munmap(base, size);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to clear %dk through a WC map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
- }
-
- gettimeofday(&start, NULL);{
- uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE);
- for (loop = 0; loop < 1000; loop++)
- memset(base, 0, size);
- munmap(base, size);
- } gettimeofday(&end, NULL);
- igt_info("Time to clear %dk through a cached GTT map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- if (gem_mmap__has_wc(fd)) {
- gettimeofday(&start, NULL);{
- uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
- for (loop = 0; loop < 1000; loop++)
- memset(base, 0, size);
- munmap(base, size);
- } gettimeofday(&end, NULL);
- igt_info("Time to clear %dk through a cached WC map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
- }
-
- /* mmap read */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE);
- volatile uint32_t *ptr = base;
- int x = 0;
-
- for (i = 0; i < size/sizeof(*ptr); i++)
- x += ptr[i];
-
- /* force overly clever gcc to actually compute x */
- ptr[0] = x;
-
- munmap(base, size);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to read %dk (again) through a GTT map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- if (tiling == I915_TILING_NONE) {
- /* GTT pwrite */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++)
- gem_write(fd, handle, 0, buf, size);
- gettimeofday(&end, NULL);
- igt_info("Time to pwrite %dk through the GTT: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- /* GTT pread */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++)
- gem_read(fd, handle, 0, buf, size);
- gettimeofday(&end, NULL);
- igt_info("Time to pread %dk through the GTT: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- /* GTT pwrite, including clflush */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- gem_write(fd, handle, 0, buf, size);
- gem_sync(fd, handle);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to pwrite %dk through the GTT (clflush): %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- /* GTT pread, including clflush */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- gem_sync(fd, handle);
- gem_read(fd, handle, 0, buf, size);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to pread %dk through the GTT (clflush): %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- /* partial writes */
- igt_info("Now partial writes.\n");
- size /= 4;
-
- /* partial GTT pwrite, including clflush */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- gem_write(fd, handle, 0, buf, size);
- gem_sync(fd, handle);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to pwrite %dk through the GTT (clflush): %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- /* partial GTT pread, including clflush */
- gettimeofday(&start, NULL);
- for (loop = 0; loop < 1000; loop++) {
- gem_sync(fd, handle);
- gem_read(fd, handle, 0, buf, size);
- }
- gettimeofday(&end, NULL);
- igt_info("Time to pread %dk through the GTT (clflush): %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
-
- size *= 4;
- }
- }
-
- gem_close(fd, handle);
- close(fd);
-
- igt_exit();
-}
diff --git a/tests/meson.build b/tests/meson.build
index ae30fd9..c03b325 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -73,7 +73,6 @@ test_progs = [
'gem_gpgpu_fill',
'gem_gtt_cpu_tlb',
'gem_gtt_hog',
- 'gem_gtt_speed',
'gem_largeobject',
'gem_linear_blits',
'gem_lut_handle',
--
2.7.4
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 14+ messages in thread* [igt-dev] [PATCH i-g-t 6/6] benchmarks/gtt_speed: Add a subtest to compare post suspend speed
2018-02-05 9:35 [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks Abdiel Janulgue
` (4 preceding siblings ...)
2018-02-05 9:35 ` [igt-dev] [PATCH i-g-t 5/6] tests/gem_gtt_speed: " Abdiel Janulgue
@ 2018-02-05 9:35 ` Abdiel Janulgue
2018-02-05 9:43 ` [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks Chris Wilson
` (3 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Abdiel Janulgue @ 2018-02-05 9:35 UTC (permalink / raw)
To: igt-dev; +Cc: Joonas Lahtinen
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
benchmarks/gem_gtt_speed.c | 107 +++++++++++++++++++++++++++++----------------
1 file changed, 70 insertions(+), 37 deletions(-)
diff --git a/benchmarks/gem_gtt_speed.c b/benchmarks/gem_gtt_speed.c
index 3d726c4..ff42ab3 100644
--- a/benchmarks/gem_gtt_speed.c
+++ b/benchmarks/gem_gtt_speed.c
@@ -42,6 +42,7 @@
#include "drm.h"
#define OBJECT_SIZE 16384
+int size = OBJECT_SIZE;
static double elapsed(const struct timeval *start,
const struct timeval *end,
@@ -86,39 +87,13 @@ static void streaming_load(void *src, int len)
}
#endif
-int main(int argc, char **argv)
+static void run_test(int fd, uint32_t handle, unsigned cpu,
+ uint8_t *buf)
{
struct timeval start, end;
- uint8_t *buf;
- uint32_t handle;
- unsigned cpu = x86_64_features();
- int size = OBJECT_SIZE;
- int loop, i, tiling;
- int fd;
-
- igt_simple_init(argc, argv);
-
- igt_skip_on_simulation();
-
- if (argc > 1)
- size = atoi(argv[1]);
- if (size == 0) {
- igt_warn("Invalid object size specified\n");
- return 1;
- }
-
- if (cpu) {
- char str[1024];
- igt_info("Detected cpu faatures: %s\n",
- igt_x86_features_to_string(cpu, str));
- }
+ int i, tiling, loop;
- buf = malloc(size);
memset(buf, 0, size);
- fd = drm_open_driver(DRIVER_INTEL);
-
- handle = gem_create(fd, size);
- igt_assert(handle);
for (tiling = I915_TILING_NONE; tiling <= I915_TILING_Y; tiling++) {
if (tiling != I915_TILING_NONE) {
@@ -294,7 +269,7 @@ int main(int argc, char **argv)
}
gettimeofday(&end, NULL);
igt_info("Time to read %dk through a WC map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
+ size/1024, elapsed(&start, &end, loop));
{
uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE);
@@ -372,7 +347,7 @@ int main(int argc, char **argv)
}
gettimeofday(&end, NULL);
igt_info("Time to write %dk through a WC map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
+ size/1024, elapsed(&start, &end, loop));
}
/* mmap clear */
@@ -396,7 +371,7 @@ int main(int argc, char **argv)
}
gettimeofday(&end, NULL);
igt_info("Time to clear %dk through a WC map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
+ size/1024, elapsed(&start, &end, loop));
}
gettimeofday(&start, NULL);{
@@ -416,7 +391,7 @@ int main(int argc, char **argv)
munmap(base, size);
} gettimeofday(&end, NULL);
igt_info("Time to clear %dk through a cached WC map: %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
+ size/1024, elapsed(&start, &end, loop));
}
/* mmap read */
@@ -487,7 +462,7 @@ int main(int argc, char **argv)
}
gettimeofday(&end, NULL);
igt_info("Time to pwrite %dk through the GTT (clflush): %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
+ size/1024, elapsed(&start, &end, loop));
/* partial GTT pread, including clflush */
gettimeofday(&start, NULL);
@@ -497,14 +472,72 @@ int main(int argc, char **argv)
}
gettimeofday(&end, NULL);
igt_info("Time to pread %dk through the GTT (clflush): %7.3fµs\n",
- size/1024, elapsed(&start, &end, loop));
+ size/1024, elapsed(&start, &end, loop));
size *= 4;
}
}
+}
+
+static int opt_handler(int option, int option_index, void *input)
+{
+ switch (option) {
+ case 's':
+ size = strtol(optarg, NULL, 0);
+ igt_fail_on_f(size == 0,
+ "Invalid object size specified\n");
+ break;
+ }
+
+ return 0;
+}
+int main(int argc, char **argv)
+{
+ uint8_t *buf;
+ uint32_t handle;
+ unsigned cpu = x86_64_features();
+ int fd;
+ struct option long_options[] = {
+ { "size", required_argument, NULL, 's'},
+ { 0, 0, 0, 0 }
+ };
+
+ const char *help_str =
+ " --size\tObject size\n";
+
+ igt_subtest_init_parse_opts(&argc, argv, "", long_options, help_str,
+ opt_handler, NULL);
+
+ igt_skip_on_simulation();
+
+ if (cpu) {
+ char str[1024];
+ igt_info("Detected cpu faatures: %s\n",
+ igt_x86_features_to_string(cpu, str));
+ }
- gem_close(fd, handle);
- close(fd);
+ igt_fixture {
+ fd = drm_open_driver(DRIVER_INTEL);
+ handle = gem_create(fd, size);
+ igt_assert(handle);
+ buf = malloc(size);
+ igt_assert(buf);
+ }
+
+ igt_subtest("basic")
+ run_test(fd, handle, cpu, buf);
+
+ igt_subtest("post-suspend") {
+ igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
+ SUSPEND_TEST_NONE);
+ run_test(fd, handle, cpu, buf);
+ }
+
+ igt_fixture {
+ gem_close(fd, handle);
+ close(fd);
+ free(buf);
+ }
igt_exit();
}
--
2.7.4
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks
2018-02-05 9:35 [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks Abdiel Janulgue
` (5 preceding siblings ...)
2018-02-05 9:35 ` [igt-dev] [PATCH i-g-t 6/6] benchmarks/gtt_speed: Add a subtest to compare post suspend speed Abdiel Janulgue
@ 2018-02-05 9:43 ` Chris Wilson
2018-02-05 9:52 ` Abdiel Janulgue
2018-02-05 10:00 ` Chris Wilson
` (2 subsequent siblings)
9 siblings, 1 reply; 14+ messages in thread
From: Chris Wilson @ 2018-02-05 9:43 UTC (permalink / raw)
To: Abdiel Janulgue, igt-dev; +Cc: Joonas Lahtinen
Quoting Abdiel Janulgue (2018-02-05 09:35:19)
> Some of the gem tests actually look like benchmarks. Move them to their
> proper place. Also improve gem_gtt_speed by adding a post-suspend
> benchmark.
>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>
> benchmarks/Makefile.sources | 5 +
> benchmarks/gem_exec_latency.c | 504 ++++++++++++++++++++++++++++++++++
> benchmarks/gem_exec_lut_handle.c | 263 ++++++++++++++++++
> benchmarks/gem_fence_upload.c | 405 +++++++++++++++++++++++++++
> benchmarks/gem_gtt_speed.c | 543 +++++++++++++++++++++++++++++++++++++
> benchmarks/gem_read_read_speed.c | 213 +++++++++++++++
Where's the ezbench integration?
-Chris
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^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks
2018-02-05 9:43 ` [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks Chris Wilson
@ 2018-02-05 9:52 ` Abdiel Janulgue
0 siblings, 0 replies; 14+ messages in thread
From: Abdiel Janulgue @ 2018-02-05 9:52 UTC (permalink / raw)
To: Chris Wilson, igt-dev; +Cc: Joonas Lahtinen
On 02/05/2018 11:43 AM, Chris Wilson wrote:
> Quoting Abdiel Janulgue (2018-02-05 09:35:19)
>> Some of the gem tests actually look like benchmarks. Move them to their
>> proper place. Also improve gem_gtt_speed by adding a post-suspend
>> benchmark.
>>
>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>>
>> benchmarks/Makefile.sources | 5 +
>> benchmarks/gem_exec_latency.c | 504 ++++++++++++++++++++++++++++++++++
>> benchmarks/gem_exec_lut_handle.c | 263 ++++++++++++++++++
>> benchmarks/gem_fence_upload.c | 405 +++++++++++++++++++++++++++
>> benchmarks/gem_gtt_speed.c | 543 +++++++++++++++++++++++++++++++++++++
>> benchmarks/gem_read_read_speed.c | 213 +++++++++++++++
>
> Where's the ezbench integration?> -Chris
Oops, forgot that. Will include include that next.
Thanks,
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks
2018-02-05 9:35 [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks Abdiel Janulgue
` (6 preceding siblings ...)
2018-02-05 9:43 ` [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks Chris Wilson
@ 2018-02-05 10:00 ` Chris Wilson
2018-02-05 11:40 ` Abdiel Janulgue
2018-02-05 11:13 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/6] tests/gem_exec_latency: Move " Patchwork
2018-02-05 12:13 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
9 siblings, 1 reply; 14+ messages in thread
From: Chris Wilson @ 2018-02-05 10:00 UTC (permalink / raw)
To: Abdiel Janulgue, igt-dev; +Cc: Joonas Lahtinen
Quoting Abdiel Janulgue (2018-02-05 09:35:19)
> Some of the gem tests actually look like benchmarks. Move them to their
> proper place. Also improve gem_gtt_speed by adding a post-suspend
> benchmark.
You can't just move them wholesale into benchmarks/ without weaning them
off libigt, they were not even supposed to be linked against libigt.la.
libigt was expressly developed with the purpose of making writing tests
easier and that gets in the way of the benchmarks. That is not to say
the core ioctl wrappers are not useful, it's just all the logging and
subtest framework built above them that has all too often caused
explosions and get in the way.
Say no to igt_subtest, but welcome a new igt_perf. And ezbench
integration.
-Chris
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https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks
2018-02-05 10:00 ` Chris Wilson
@ 2018-02-05 11:40 ` Abdiel Janulgue
0 siblings, 0 replies; 14+ messages in thread
From: Abdiel Janulgue @ 2018-02-05 11:40 UTC (permalink / raw)
To: Chris Wilson, igt-dev; +Cc: Joonas Lahtinen
On 02/05/2018 12:00 PM, Chris Wilson wrote:
> Quoting Abdiel Janulgue (2018-02-05 09:35:19)
>> Some of the gem tests actually look like benchmarks. Move them to their
>> proper place. Also improve gem_gtt_speed by adding a post-suspend
>> benchmark.
>
> You can't just move them wholesale into benchmarks/ without weaning them
> off libigt, they were not even supposed to be linked against libigt.la.
> libigt was expressly developed with the purpose of making writing tests
> easier and that gets in the way of the benchmarks. That is not to say
> the core ioctl wrappers are not useful, it's just all the logging and
> subtest framework built above them that has all too often caused
> explosions and get in the way.
>
> Say no to igt_subtest, but welcome a new igt_perf. And ezbench
> integration.
Looks like another upcoming lib. Will try to update accordingly...
> -Chris
>
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^ permalink raw reply [flat|nested] 14+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/6] tests/gem_exec_latency: Move to benchmarks
2018-02-05 9:35 [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks Abdiel Janulgue
` (7 preceding siblings ...)
2018-02-05 10:00 ` Chris Wilson
@ 2018-02-05 11:13 ` Patchwork
2018-02-05 12:13 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
9 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2018-02-05 11:13 UTC (permalink / raw)
To: Abdiel Janulgue; +Cc: igt-dev
== Series Details ==
Series: series starting with [i-g-t,1/6] tests/gem_exec_latency: Move to benchmarks
URL : https://patchwork.freedesktop.org/series/37647/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
c219cc5307474cb53612ca759354f9473955e110 tools: Clear unused fields in register spec
with latest DRM-Tip kernel build CI_DRM_3720
2e76a2952923 drm-tip: 2018y-02m-02d-20h-33m-12s UTC integration manifest
Testlist changes:
-igt@gem_exec_latency@blt-dispatch
-igt@gem_exec_latency@blt-dispatch-queued
-igt@gem_exec_latency@blt-preemption
-igt@gem_exec_latency@blt-synchronisation
-igt@gem_exec_latency@blt-synchronisation-queued
-igt@gem_exec_latency@bsd1-dispatch
-igt@gem_exec_latency@bsd1-dispatch-queued
-igt@gem_exec_latency@bsd1-preemption
-igt@gem_exec_latency@bsd1-synchronisation
-igt@gem_exec_latency@bsd1-synchronisation-queued
-igt@gem_exec_latency@bsd2-dispatch
-igt@gem_exec_latency@bsd2-dispatch-queued
-igt@gem_exec_latency@bsd2-preemption
-igt@gem_exec_latency@bsd2-synchronisation
-igt@gem_exec_latency@bsd2-synchronisation-queued
-igt@gem_exec_latency@bsd-dispatch
-igt@gem_exec_latency@bsd-dispatch-queued
-igt@gem_exec_latency@bsd-preemption
-igt@gem_exec_latency@bsd-synchronisation
-igt@gem_exec_latency@bsd-synchronisation-queued
-igt@gem_exec_latency@render-dispatch
-igt@gem_exec_latency@render-dispatch-queued
-igt@gem_exec_latency@render-preemption
-igt@gem_exec_latency@render-synchronisation
-igt@gem_exec_latency@render-synchronisation-queued
-igt@gem_exec_latency@vebox-dispatch
-igt@gem_exec_latency@vebox-dispatch-queued
-igt@gem_exec_latency@vebox-preemption
-igt@gem_exec_latency@vebox-synchronisation
-igt@gem_exec_latency@vebox-synchronisation-queued
-igt@gem_exec_lut_handle
-igt@gem_fence_upload@performance
-igt@gem_fence_upload@thread-contention
-igt@gem_fence_upload@thread-performance-both
-igt@gem_fence_upload@thread-performance-read
-igt@gem_fence_upload@thread-performance-write
-igt@gem_fence_upload@wc-contention
-igt@gem_gtt_speed
-igt@gem_read_read_speed@read-read-1x1
-igt@gem_read_read_speed@read-read-128x128
-igt@gem_read_read_speed@read-read-256x256
-igt@gem_read_read_speed@read-read-512x512
-igt@gem_read_read_speed@read-read-1024x1024
-igt@gem_read_read_speed@read-read-2048x2048
-igt@gem_read_read_speed@read-read-4096x4096
-igt@gem_read_read_speed@read-read-8192x8192
-igt@gem_read_read_speed@read-write-1x1
-igt@gem_read_read_speed@read-write-128x128
-igt@gem_read_read_speed@read-write-256x256
-igt@gem_read_read_speed@read-write-512x512
-igt@gem_read_read_speed@read-write-1024x1024
-igt@gem_read_read_speed@read-write-2048x2048
-igt@gem_read_read_speed@read-write-4096x4096
-igt@gem_read_read_speed@read-write-8192x8192
-igt@gem_read_read_speed@write-read-1x1
-igt@gem_read_read_speed@write-read-128x128
-igt@gem_read_read_speed@write-read-256x256
-igt@gem_read_read_speed@write-read-512x512
-igt@gem_read_read_speed@write-read-1024x1024
-igt@gem_read_read_speed@write-read-2048x2048
-igt@gem_read_read_speed@write-read-4096x4096
-igt@gem_read_read_speed@write-read-8192x8192
-igt@gem_read_read_speed@write-write-1x1
-igt@gem_read_read_speed@write-write-128x128
-igt@gem_read_read_speed@write-write-256x256
-igt@gem_read_read_speed@write-write-512x512
-igt@gem_read_read_speed@write-write-1024x1024
-igt@gem_read_read_speed@write-write-2048x2048
-igt@gem_read_read_speed@write-write-4096x4096
-igt@gem_read_read_speed@write-write-8192x8192
Test gem_mmap_gtt:
Subgroup basic-small-bo-tiledx:
pass -> FAIL (fi-gdg-551) fdo#102575
Test prime_vgem:
Subgroup basic-fence-flip:
pass -> FAIL (fi-byt-n2820) fdo#104008
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:420s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:426s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:372s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:482s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:282s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:483s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:482s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:469s
fi-byt-n2820 total:288 pass:248 dwarn:0 dfail:0 fail:1 skip:39 time:453s
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:574s
fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:415s
fi-gdg-551 total:288 pass:179 dwarn:0 dfail:0 fail:1 skip:108 time:278s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:513s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:389s
fi-hsw-4770r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:397s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:413s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:458s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:415s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:458s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:498s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:456s
fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:500s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:577s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:426s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:512s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:525s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:485s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:487s
fi-skl-guc total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:415s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:430s
fi-snb-2520m total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:525s
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:410s
Blacklisted hosts:
fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:468s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_862/issues.html
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^ permalink raw reply [flat|nested] 14+ messages in thread* [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/6] tests/gem_exec_latency: Move to benchmarks
2018-02-05 9:35 [igt-dev] [PATCH i-g-t] Move some gem tests to benchmarks Abdiel Janulgue
` (8 preceding siblings ...)
2018-02-05 11:13 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/6] tests/gem_exec_latency: Move " Patchwork
@ 2018-02-05 12:13 ` Patchwork
9 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2018-02-05 12:13 UTC (permalink / raw)
To: Abdiel Janulgue; +Cc: igt-dev
== Series Details ==
Series: series starting with [i-g-t,1/6] tests/gem_exec_latency: Move to benchmarks
URL : https://patchwork.freedesktop.org/series/37647/
State : success
== Summary ==
Test kms_flip:
Subgroup 2x-plain-flip-ts-check:
fail -> PASS (shard-hsw) fdo#100368
Subgroup 2x-flip-vs-expired-vblank-interruptible:
fail -> PASS (shard-hsw) fdo#102887
Subgroup modeset-vs-vblank-race:
pass -> FAIL (shard-hsw) fdo#103060 +1
Test kms_cursor_legacy:
Subgroup flip-vs-cursor-toggle:
fail -> PASS (shard-hsw) fdo#102670 +1
Test gem_eio:
Subgroup in-flight-external:
pass -> FAIL (shard-hsw) fdo#104676
Test kms_vblank:
Subgroup pipe-b-ts-continuation-suspend:
pass -> FAIL (shard-snb) fdo#104783
Test perf:
Subgroup buffer-fill:
pass -> FAIL (shard-apl) fdo#103755
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670
fdo#104676 https://bugs.freedesktop.org/show_bug.cgi?id=104676
fdo#104783 https://bugs.freedesktop.org/show_bug.cgi?id=104783
fdo#103755 https://bugs.freedesktop.org/show_bug.cgi?id=103755
shard-apl total:2836 pass:1749 dwarn:1 dfail:0 fail:22 skip:1064 time:12383s
shard-hsw total:2836 pass:1731 dwarn:1 dfail:0 fail:13 skip:1090 time:11724s
shard-snb total:2836 pass:1326 dwarn:2 dfail:0 fail:11 skip:1497 time:6406s
Blacklisted hosts:
shard-kbl total:2789 pass:1837 dwarn:1 dfail:0 fail:21 skip:929 time:9177s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_862/shards.html
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^ permalink raw reply [flat|nested] 14+ messages in thread