[PATCH v2 0/5] Add DT bindings and device tree for Compulab SB-UCM-iMX8MPLUS

[PATCH v2 0/5] Add DT bindings and device tree for Compulab SB-UCM-iMX8MPLUS

[Laurent Pinchart]

Hello,

This small patch series is a drive-by addition of the Compulab
SB-UCM-iMX8MPLUS to the Linux kernel device tree sources. While porting
the device tree from the Compulab BSP kernel to mainline, I thought I
could as well mainline it, along with related conversion of text DT
bindings to YAML.

The SB-UCM-iMX8MPLUS is a carrier board designed as a reference to
evaluate the Compulab UCM-iMX8MPLUS SoM. The SoM integrates the bare
minimal peripherals (DRAM, eMMC, ethernet PHY, EEPROM and RTC), while
the carrier board includes a much wider range of peripherals. I have
only enabled support for the ones I am interested in, or, as a strech
goal, the ones I could easily test.

The first patch in the series adds compatible strings for the SoM and
the board to the ARM FSL bindings. The next two patches then add DT
sources for the SoM and the carrier board.

I have split HDMI support out to patch 4/5, as it depends on patches
that have not hit linux-next yet (see [1]). Depending on which series
gets merged first, patch 4/5 can be left out for now.

Finally, patch 5/5 adds an overlay for the display panel shipped with
the Compulab evaluation kit.

The series is based on a branch that contains a backport of the HDMI
support series, as well miscellaneous patches I have submitted
separately to convert text DT bindings to YAML. You can find the series
applied on top of the base branch at [2]. With that base, the only DT
validation warnings are due to preexisting issues in imx8mp.dtsi.

[1] https://lore.kernel.org/all/20240227220444.77566-1-aford173@gmail.com/#t
[2] https://git.kernel.org/pub/scm/linux/kernel/git/pinchartl/linux.git/log/?h=nxp/v6.8/compulab

Laurent Pinchart (5):
  dt-bindings: arm: fsl: Add Compulab SB-UCM-iMX8MPLUS carrier board
  arm64: dts: freescale: Add device tree for Compulab UCM-iMX8M-Plus
  arm64: dts: freescale: Add device tree for Compulab SB-UCM-iMX8MPLUS
  arm64: dts: freescale: imx8mp-sb-ucm: Add HDMI output support
  arm64: dts: freescale: imx8mp-sb-ucm: Add DSI panel overlay

 .../devicetree/bindings/arm/fsl.yaml          |   6 +
 arch/arm64/boot/dts/freescale/Makefile        |   5 +
 .../imx8mp-sb-ucm-panel-kd050hdfia020.dtso    |  81 +++++
 .../boot/dts/freescale/imx8mp-sb-ucm.dts      | 337 ++++++++++++++++++
 arch/arm64/boot/dts/freescale/imx8mp-ucm.dtsi | 309 ++++++++++++++++
 5 files changed, 738 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtso
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-sb-ucm.dts
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-ucm.dtsi


base-commit: 64d8ca69f2f1e659c60ba509a2e91d2c8c0a3a4c
-- 
Regards,

Laurent Pinchart

[PATCH v2 1/5] dt-bindings: arm: fsl: Add Compulab SB-UCM-iMX8MPLUS carrier board

[Laurent Pinchart]

The SB-UCM-iMX8MPLUS is a reference carrier board from Compulab based on
the UCM-iMX8MPLUS SoM. Add corresponding DT compatible strings.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 228dcc5c7d6f..790de9e5fd73 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -1068,6 +1068,12 @@ properties:
           - const: avnet,sm2s-imx8mp              # SM2S-IMX8PLUS SoM
           - const: fsl,imx8mp
 
+      - description: Compulab reference carrier board based on the UCM-iMX8MPLUS SoM
+        items:
+          - const: compulab,sb-ucm-imx8mp
+          - const: compulab,ucm-imx8mp
+          - const: fsl,imx8mp
+
       - description: i.MX8MP DHCOM based Boards
         items:
           - enum:
-- 
Regards,

Laurent Pinchart

[PATCH v2 2/5] arm64: dts: freescale: Add device tree for Compulab UCM-iMX8M-Plus

[Laurent Pinchart]

The Compulab UCM-iMX8M-Plus is a system on module (SoM) based on an NXP
i.MX8MP. It features up to 8GB of LPDDR4, a 64GB eMMC, an ethernet PHY,
an RTC and an EEPROM. Add a .dtsi that models the UCM, to be included in
board device tree files.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 arch/arm64/boot/dts/freescale/imx8mp-ucm.dtsi | 309 ++++++++++++++++++
 1 file changed, 309 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-ucm.dtsi

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-ucm.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-ucm.dtsi
new file mode 100644
index 000000000000..51964a7059b1
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-ucm.dtsi
@@ -0,0 +1,309 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2021 CompuLab
+ * Copyright 2024 Ideas on Board Oy
+ *
+ * Compulab UCM-iMX8M-Plus System on Module
+ */
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+#include "imx8mp-pinfunc.h"
+#include "imx8mp.dtsi"
+
+/ {
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_gpio_led>;
+
+		heartbeat-led {
+			label = "Heartbeat";
+			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "heartbeat";
+		};
+	};
+};
+
+&A53_0 {
+	cpu-supply = <&reg_arm>;
+};
+
+&A53_1 {
+	cpu-supply = <&reg_arm>;
+};
+
+&A53_2 {
+	cpu-supply = <&reg_arm>;
+};
+
+&A53_3 {
+	cpu-supply = <&reg_arm>;
+};
+
+&eqos {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_eqos>;
+	phy-mode = "rgmii-id";
+	phy-handle = <&ethphy0>;
+
+	mdio {
+		compatible = "snps,dwmac-mdio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		/* Atheros AR8033 on v1.0, Realtek RTL8211E on v1.1 */
+		ethphy0: ethernet-phy@0 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0>;
+			eee-broken-1000t;
+		};
+	};
+};
+
+&i2c1 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+
+	pmic@25 {
+		compatible = "nxp,pca9450c";
+		reg = <0x25>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_pmic>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+
+		regulators {
+			BUCK1 {
+				regulator-name = "BUCK1";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <2187500>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <3125>;
+			};
+
+			reg_arm: BUCK2 {
+				regulator-name = "BUCK2";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <2187500>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <3125>;
+				nxp,dvs-run-voltage = <950000>;
+				nxp,dvs-standby-voltage = <850000>;
+			};
+
+			BUCK4 {
+				regulator-name = "BUCK4";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			BUCK5 {
+				regulator-name = "BUCK5";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			BUCK6 {
+				regulator-name = "BUCK6";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			LDO1 {
+				regulator-name = "LDO1";
+				regulator-min-microvolt = <1600000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			LDO2 {
+				regulator-name = "LDO2";
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1150000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			LDO3 {
+				regulator-name = "LDO3";
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			LDO4 {
+				regulator-name = "LDO4";
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			LDO5 {
+				regulator-name = "LDO5";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&i2c2 {
+	clock-frequency = <400000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2>;
+	status = "okay";
+
+	eeprom@50 {
+		compatible = "catalyst,24c08", "atmel,24c08";
+		reg = <0x50>;
+		pagesize = <16>;
+	};
+
+	rtc@69 {
+		compatible = "abracon,ab1805";
+		reg = <0x69>;
+	};
+};
+
+&iomuxc {
+	pinctrl_eqos: eqosgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC				0x3
+			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO				0x3
+			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0			0x91
+			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1			0x91
+			MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2			0x91
+			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3			0x91
+			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x91
+			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL			0x91
+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0			0x1f
+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1			0x1f
+			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2			0x1f
+			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3			0x1f
+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL			0x1f
+			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x1f
+		>;
+	};
+
+	pinctrl_gpio_led: gpioledgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12	0x140
+		>;
+	};
+
+	pinctrl_i2c1: i2c1grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL		0x400001c3
+			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA		0x400001c3
+		>;
+	};
+
+	pinctrl_i2c2: i2c2grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400001c3
+			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400001c3
+		>;
+	};
+
+	pinctrl_pmic: pmicgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03	0x41
+		>;
+	};
+
+	pinctrl_usdhc3: usdhc3grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x190
+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d0
+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d0
+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d0
+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d0
+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d0
+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d0
+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d0
+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d0
+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d0
+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x190
+		>;
+	};
+
+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x194
+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d4
+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d4
+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d4
+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d4
+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d4
+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d4
+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d4
+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d4
+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d4
+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x194
+		>;
+	};
+
+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x196
+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d6
+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d6
+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d6
+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d6
+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d6
+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d6
+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d6
+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d6
+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d6
+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x196
+		>;
+	};
+
+	pinctrl_wdog: wdoggrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B	0xc6
+		>;
+	};
+};
+
+&snvs_pwrkey {
+	status = "okay";
+};
+
+/* eMMC */
+&usdhc3 {
+	assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
+	assigned-clock-rates = <400000000>;
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+	bus-width = <8>;
+	non-removable;
+	status = "okay";
+};
+
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+	status = "okay";
+};
-- 
Regards,

Laurent Pinchart

Re: [PATCH v2 2/5] arm64: dts: freescale: Add device tree for Compulab UCM-iMX8M-Plus

[Andrew Lunn]

> +&eqos {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_eqos>;
> +	phy-mode = "rgmii-id";
> +	phy-handle = <&ethphy0>;
> +
> +	mdio {
> +		compatible = "snps,dwmac-mdio";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		/* Atheros AR8033 on v1.0, Realtek RTL8211E on v1.1 */
> +		ethphy0: ethernet-phy@0 {
> +			compatible = "ethernet-phy-ieee802.3-c22";
> +			reg = <0>;
> +			eee-broken-1000t;
> +		};

Hi Laurent

Do you happen to know what is broken with respect to EEE? It seems
like a lot of IMX boards have this, so i suspect it is the MAC. Maybe
we should be keying off the MAC compatible and disabling this in the
ethernet driver rather than have every .dts file needing it?

Re: [PATCH v2 2/5] arm64: dts: freescale: Add device tree for Compulab UCM-iMX8M-Plus

[Laurent Pinchart]

On Sun, Mar 17, 2024 at 06:17:17PM +0100, Andrew Lunn wrote:
> > +&eqos {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_eqos>;
> > +	phy-mode = "rgmii-id";
> > +	phy-handle = <&ethphy0>;
> > +
> > +	mdio {
> > +		compatible = "snps,dwmac-mdio";
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +
> > +		/* Atheros AR8033 on v1.0, Realtek RTL8211E on v1.1 */
> > +		ethphy0: ethernet-phy@0 {
> > +			compatible = "ethernet-phy-ieee802.3-c22";
> > +			reg = <0>;
> > +			eee-broken-1000t;
> > +		};
> 
> Hi Laurent
> 
> Do you happen to know what is broken with respect to EEE? It seems
> like a lot of IMX boards have this, so i suspect it is the MAC. Maybe
> we should be keying off the MAC compatible and disabling this in the
> ethernet driver rather than have every .dts file needing it?

I wonder if this could be cargo-cult. To be honest, I've copied it from
the BSP and haven't investigated it. I've tried dropping that and
haven't noticed any difference, but I'm not sure how I should test it
properly.

-- 
Regards,

Laurent Pinchart

Re: [PATCH v2 2/5] arm64: dts: freescale: Add device tree for Compulab UCM-iMX8M-Plus

[Andrew Lunn]

On Sun, Mar 17, 2024 at 08:57:22PM +0200, Laurent Pinchart wrote:
> On Sun, Mar 17, 2024 at 06:17:17PM +0100, Andrew Lunn wrote:
> > > +&eqos {
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&pinctrl_eqos>;
> > > +	phy-mode = "rgmii-id";
> > > +	phy-handle = <&ethphy0>;
> > > +
> > > +	mdio {
> > > +		compatible = "snps,dwmac-mdio";
> > > +		#address-cells = <1>;
> > > +		#size-cells = <0>;
> > > +
> > > +		/* Atheros AR8033 on v1.0, Realtek RTL8211E on v1.1 */
> > > +		ethphy0: ethernet-phy@0 {
> > > +			compatible = "ethernet-phy-ieee802.3-c22";
> > > +			reg = <0>;
> > > +			eee-broken-1000t;
> > > +		};
> > 
> > Hi Laurent
> > 
> > Do you happen to know what is broken with respect to EEE? It seems
> > like a lot of IMX boards have this, so i suspect it is the MAC. Maybe
> > we should be keying off the MAC compatible and disabling this in the
> > ethernet driver rather than have every .dts file needing it?
> 
> I wonder if this could be cargo-cult. To be honest, I've copied it from
> the BSP and haven't investigated it. I've tried dropping that and
> haven't noticed any difference, but I'm not sure how I should test it
> properly.

Maybe a better approach is to find the errata. It could be some older
version of the eqos was broken, and it got fixed along the way? If
that is so, moving it into the driver would be better, assuming there
is some sort of hardware version register in the eqos.

	Andrew

Re: [PATCH v2 2/5] arm64: dts: freescale: Add device tree for Compulab UCM-iMX8M-Plus

[Laurent Pinchart]

(CC'ing Johannes)

On Sun, Mar 17, 2024 at 10:55:16PM +0100, Andrew Lunn wrote:
> On Sun, Mar 17, 2024 at 08:57:22PM +0200, Laurent Pinchart wrote:
> > On Sun, Mar 17, 2024 at 06:17:17PM +0100, Andrew Lunn wrote:
> > > > +&eqos {
> > > > +	pinctrl-names = "default";
> > > > +	pinctrl-0 = <&pinctrl_eqos>;
> > > > +	phy-mode = "rgmii-id";
> > > > +	phy-handle = <&ethphy0>;
> > > > +
> > > > +	mdio {
> > > > +		compatible = "snps,dwmac-mdio";
> > > > +		#address-cells = <1>;
> > > > +		#size-cells = <0>;
> > > > +
> > > > +		/* Atheros AR8033 on v1.0, Realtek RTL8211E on v1.1 */
> > > > +		ethphy0: ethernet-phy@0 {
> > > > +			compatible = "ethernet-phy-ieee802.3-c22";
> > > > +			reg = <0>;
> > > > +			eee-broken-1000t;
> > > > +		};
> > > 
> > > Hi Laurent
> > > 
> > > Do you happen to know what is broken with respect to EEE? It seems
> > > like a lot of IMX boards have this, so i suspect it is the MAC. Maybe
> > > we should be keying off the MAC compatible and disabling this in the
> > > ethernet driver rather than have every .dts file needing it?
> > 
> > I wonder if this could be cargo-cult. To be honest, I've copied it from
> > the BSP and haven't investigated it. I've tried dropping that and
> > haven't noticed any difference, but I'm not sure how I should test it
> > properly.
> 
> Maybe a better approach is to find the errata. It could be some older
> version of the eqos was broken, and it got fixed along the way? If
> that is so, moving it into the driver would be better, assuming there
> is some sort of hardware version register in the eqos.

I don't know if there are public errata about this issue. It is beyong
my areas of expertise. I've found a relatively recent e-mail on the
netdev mailing list that seems related ([1]), but there was no reply.

[1] https://lore.kernel.org/netdev/9c1c9408-88ac-4ade-b8ec-2ae5d8922cac@pengutronix.de/

-- 
Regards,

Laurent Pinchart

Re: [PATCH v2 2/5] arm64: dts: freescale: Add device tree for Compulab UCM-iMX8M-Plus

[Andrew Lunn]

> I don't know if there are public errata about this issue. It is beyong
> my areas of expertise. I've found a relatively recent e-mail on the
> netdev mailing list that seems related ([1]), but there was no reply.
> 
> [1] https://lore.kernel.org/netdev/9c1c9408-88ac-4ade-b8ec-2ae5d8922cac@pengutronix.de/

Thanks for the link.

Has anybody tried setting STMMAC_FLAG_RX_CLK_RUNS_IN_LPI.

https://elixir.bootlin.com/linux/latest/source/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c#L816

The problem description makes it sound like the hardware does not like
the clock being turned off. Setting this flag might fix that.

	Andrew

Re: [PATCH v2 2/5] arm64: dts: freescale: Add device tree for Compulab UCM-iMX8M-Plus

[Laurent Pinchart]

Hi Andrew,

On Mon, Mar 18, 2024 at 01:58:56PM +0100, Andrew Lunn wrote:
> > I don't know if there are public errata about this issue. It is beyong
> > my areas of expertise. I've found a relatively recent e-mail on the
> > netdev mailing list that seems related ([1]), but there was no reply.
> > 
> > [1] https://lore.kernel.org/netdev/9c1c9408-88ac-4ade-b8ec-2ae5d8922cac@pengutronix.de/
> 
> Thanks for the link.
> 
> Has anybody tried setting STMMAC_FLAG_RX_CLK_RUNS_IN_LPI.
> 
> https://elixir.bootlin.com/linux/latest/source/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c#L816
> 
> The problem description makes it sound like the hardware does not like
> the clock being turned off. Setting this flag might fix that.

How would you recommend proceeding with this patch ? I can drop the
eee-broken-1000t property as I didn't notice any issue, or keep with the
risk that it my be cargo-cult. This is beyond my area of expertise, so I
can perform tests if I get clear instructions, but I don't think I can
investigate alone at this point.

-- 
Regards,

Laurent Pinchart

Re: [PATCH v2 2/5] arm64: dts: freescale: Add device tree for Compulab UCM-iMX8M-Plus

[Andrew Lunn]

On Fri, Jun 07, 2024 at 01:38:23AM +0300, Laurent Pinchart wrote:
> Hi Andrew,
> 
> On Mon, Mar 18, 2024 at 01:58:56PM +0100, Andrew Lunn wrote:
> > > I don't know if there are public errata about this issue. It is beyong
> > > my areas of expertise. I've found a relatively recent e-mail on the
> > > netdev mailing list that seems related ([1]), but there was no reply.
> > > 
> > > [1] https://lore.kernel.org/netdev/9c1c9408-88ac-4ade-b8ec-2ae5d8922cac@pengutronix.de/
> > 
> > Thanks for the link.
> > 
> > Has anybody tried setting STMMAC_FLAG_RX_CLK_RUNS_IN_LPI.
> > 
> > https://elixir.bootlin.com/linux/latest/source/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c#L816
> > 
> > The problem description makes it sound like the hardware does not like
> > the clock being turned off. Setting this flag might fix that.
> 
> How would you recommend proceeding with this patch ? I can drop the
> eee-broken-1000t property as I didn't notice any issue, or keep with the
> risk that it my be cargo-cult.

If you have not noticed any issues, drop it. This thread should
hopefully pop up in a search engine if anybody runs into problems.

	  Andrew

[PATCH v2 3/5] arm64: dts: freescale: Add device tree for Compulab SB-UCM-iMX8MPLUS

[Laurent Pinchart]

The Compulab SB-UCM-iMX8MPLUS is a carrier board designed as an
evaluation board for the UCM-iMX8M-Plus SoM. It integrates support for
ethernet, USB, display (HDMI, DSI and LVDS), cameras (CSI-2 and GMSL),
audio and various other peripherals. Add a .dts that models the SB-UCM.

Not all peripherals present on the board are enabled yet, due to missing
support in mainline, or just because I couldn't test them all. Missing
features include PCIe, audio, camera, display, SIM and CAN. The I2C, SPI
and other buses routed to extensions connectors have also not been
tested. They can be added to the device tree at a later time.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
Changes since v1:

- Split HDMI to separate patch
- Enable pwm1
- Add 3V3_PER regulator
- Add DSI backlight
- Add pinctrl for DSI panel
- Add pinctrl for I2C5
---
 arch/arm64/boot/dts/freescale/Makefile        |   1 +
 .../boot/dts/freescale/imx8mp-sb-ucm.dts      | 290 ++++++++++++++++++
 2 files changed, 291 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-sb-ucm.dts

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 2cb0212b63c6..02efa97fc464 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -164,6 +164,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-sb-ucm.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-hdmi.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-lt6.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-mi1010ait-1cp1.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm.dts b/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm.dts
new file mode 100644
index 000000000000..0141d85dc6a3
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm.dts
@@ -0,0 +1,290 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2021 CompuLab
+ * Copyright 2024 Ideas on Board Oy
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/usb/pd.h>
+
+#include "imx8mp-pinfunc.h"
+#include "imx8mp-ucm.dtsi"
+
+/ {
+	model = "CompuLab SB-UCM-iMX8MPLUS";
+	compatible = "compulab,sb-ucm-imx8mp", "compulab,ucm-imx8mp", "fsl,imx8mp";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	dsi_backlight: backlight-dsi {
+		compatible = "pwm-backlight";
+		pwms = <&pwm1 0 3000000 0>;
+		brightness-levels = <0 255>;
+		num-interpolated-steps = <255>;
+		default-brightness-level = <255>;
+		power-supply = <&reg_3v3_per>;
+		status = "disabled";
+	};
+
+	reg_3v3_per: regulator-3v3-per {
+		compatible = "regulator-fixed";
+		regulator-name = "3v3_per";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	usb-connector {
+		compatible = "usb-c-connector";
+		label = "USB-C";
+		data-role = "dual";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				hs_ep: endpoint {
+					remote-endpoint = <&usb3_hs_ep>;
+				};
+			};
+			port@1 {
+				reg = <1>;
+
+				ss_ep: endpoint {
+					remote-endpoint = <&hd3ss3220_in_ep>;
+				};
+			};
+		};
+	};
+};
+
+&eqos {
+	status = "okay";
+};
+
+&i2c2 {
+	pca9555: gpio@20 {
+		compatible = "nxp,pca9555";
+		reg = <0x20>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	usb-typec@47 {
+		compatible = "ti,hd3ss3220";
+		reg = <0x47>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_typec>;
+		interrupt-parent = <&gpio4>;
+		interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				hd3ss3220_in_ep: endpoint {
+					remote-endpoint = <&ss_ep>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+
+				hd3ss3220_out_ep: endpoint {
+					remote-endpoint = <&usb3_role_switch>;
+				};
+			};
+		};
+	};
+
+	eeprom@54 {
+		compatible = "catalyst,24c08", "atmel,24c08";
+		reg = <0x54>;
+		pagesize = <16>;
+	};
+};
+
+&i2c5 {
+	clock-frequency = <400000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c5>;
+};
+
+&iomuxc {
+	pinctrl_dsi_panel: dsi-panelgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08	0x16
+		>;
+	};
+
+	pinctrl_dsi_touch: dsi-touchgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12		0x00
+		>;
+	};
+
+	pinctrl_i2c5: i2c5grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI5_RXD0__I2C5_SCL		0x400001c2
+			MX8MP_IOMUXC_SAI5_MCLK__I2C5_SDA		0x400001c2
+		>;
+	};
+
+	pinctrl_pwm1: pwm1grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SPDIF_EXT_CLK__PWM1_OUT		0x116
+		>;
+	};
+
+	pinctrl_typec: typec1grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19		0x1c4
+		>;
+	};
+
+	pinctrl_uart1: uart1grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX		0x140
+			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX		0x140
+		>;
+	};
+
+	pinctrl_uart2: uart2grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX		0x140
+			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX		0x140
+		>;
+	};
+
+	pinctrl_usdhc2_gpio: usdhc2-gpiogrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12		0x1c4
+		>;
+	};
+
+	pinctrl_usdhc2: usdhc2grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x190
+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d0
+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d0
+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d0
+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d0
+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d0
+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0
+		>;
+	};
+
+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x194
+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d4
+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d4
+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d4
+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d4
+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d4
+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0
+		>;
+	};
+
+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x196
+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d6
+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d6
+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d6
+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d6
+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d6
+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0
+		>;
+	};
+};
+
+&pwm1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm1>;
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+	status = "okay";
+};
+
+/* Serial debug console */
+&uart2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart2>;
+	status = "okay";
+};
+
+&usb3_0 {
+	status = "okay";
+};
+
+&usb_dwc3_0 {
+	dr_mode = "otg";
+	hnp-disable;
+	srp-disable;
+	adp-disable;
+	usb-role-switch;
+	status = "okay";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+			usb3_hs_ep: endpoint {
+				remote-endpoint = <&hs_ep>;
+			};
+		};
+		port@1 {
+			reg = <1>;
+			usb3_role_switch: endpoint {
+				remote-endpoint = <&hd3ss3220_out_ep>;
+			};
+		};
+	};
+};
+
+&usb3_phy0 {
+	status = "okay";
+};
+
+&usb3_1 {
+	status = "okay";
+};
+
+&usb_dwc3_1 {
+	dr_mode = "host";
+	status = "okay";
+};
+
+&usb3_phy1 {
+	status = "okay";
+};
+
+/* Micro-SD socket */
+&usdhc2 {
+	assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
+	assigned-clock-rates = <400000000>;
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+	bus-width = <4>;
+	status = "okay";
+};
-- 
Regards,

Laurent Pinchart

[PATCH v2 4/5] arm64: dts: freescale: imx8mp-sb-ucm: Add HDMI output support

[Laurent Pinchart]

Enable the HDMI output on the Compulab SB-UCM-iMX8MPLUS, using the HDMI
encoder in the i.MX8MP SoC.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 .../boot/dts/freescale/imx8mp-sb-ucm.dts      | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm.dts b/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm.dts
index 0141d85dc6a3..9dfa43d14a9b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm.dts
@@ -32,6 +32,18 @@ dsi_backlight: backlight-dsi {
 		status = "disabled";
 	};
 
+	hdmi-connector {
+		compatible = "hdmi-connector";
+		label = "hdmi";
+		type = "a";
+
+		port {
+			hdmi_connector_in: endpoint {
+				remote-endpoint = <&hdmi_tx_out>;
+			};
+		};
+	};
+
 	reg_3v3_per: regulator-3v3-per {
 		compatible = "regulator-fixed";
 		regulator-name = "3v3_per";
@@ -70,6 +82,28 @@ &eqos {
 	status = "okay";
 };
 
+&hdmi_pvi {
+	status = "okay";
+};
+
+&hdmi_tx {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hdmi>;
+	status = "okay";
+
+	ports {
+		port@1 {
+			hdmi_tx_out: endpoint {
+				remote-endpoint = <&hdmi_connector_in>;
+			};
+		};
+	};
+};
+
+&hdmi_tx_phy {
+	status = "okay";
+};
+
 &i2c2 {
 	pca9555: gpio@20 {
 		compatible = "nxp,pca9555";
@@ -134,6 +168,15 @@ MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12		0x00
 		>;
 	};
 
+	pinctrl_hdmi: hdmigrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL	0x1c2
+			MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA	0x1c2
+			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD		0x0
+			MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC		0x0
+		>;
+	};
+
 	pinctrl_i2c5: i2c5grp {
 		fsl,pins = <
 			MX8MP_IOMUXC_SAI5_RXD0__I2C5_SCL		0x400001c2
@@ -210,6 +253,10 @@ MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0
 	};
 };
 
+&lcdif3 {
+	status = "okay";
+};
+
 &pwm1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
-- 
Regards,

Laurent Pinchart

[PATCH v2 5/5] arm64: dts: freescale: imx8mp-sb-ucm: Add DSI panel overlay

[Laurent Pinchart]

The SB-UCM-iMX8MPLUS kit is shipped with an external DSI panel. Add a
corresponding DT overlay.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 arch/arm64/boot/dts/freescale/Makefile        |  4 +
 .../imx8mp-sb-ucm-panel-kd050hdfia020.dtso    | 81 +++++++++++++++++++
 2 files changed, 85 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtso

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 02efa97fc464..d7432ce6a7bb 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -165,6 +165,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-sb-ucm.dtb
+
+imx8mp-sb-ucm-panel-kd050hdfia020-dtbs := imx8mp-sb-ucm.dtb imx8mp-sb-ucm-panel-kd050hdfia020-dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-sb-ucm-panel-kd050hdfia020-dtb
+
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-hdmi.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-lt6.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-mi1010ait-1cp1.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtso b/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtso
new file mode 100644
index 000000000000..fdad943c1554
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtso
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2021 CompuLab
+ *
+ * Device tree overlay for KD050HDFIA020-C020A panel connector to Compulab
+ * SB-UCM-iMX8PLUS.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+&dsi_backlight {
+	status = "okay";
+};
+
+&i2c5 {
+	status = "okay";
+
+	touch@5d {
+		compatible = "goodix,gt911";
+		reg = <0x5d>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_dsi_touch>;
+
+		interrupt-parent = <&gpio4>;
+		interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
+
+                irq-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
+		reset-gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>;
+        };
+};
+
+&lcdif1 {
+	status = "okay";
+};
+
+&mipi_dsi {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	samsung,esc-clock-frequency = <20000000>;
+	status = "okay";
+
+	panel@0 {
+		compatible = "startek,kd050hdfia020", "ilitek,ili9881c";
+		reg = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_dsi_panel>;
+
+		reset-gpio = <&pca9555 4 GPIO_ACTIVE_LOW>;
+		power-supply = <&reg_3v3_per>;
+
+		backlight = <&dsi_backlight>;
+
+		port {
+			panel_in: endpoint {
+				remote-endpoint = <&mipi_dsi_out>;
+				data-lanes = <1 2 3 4>;
+			};
+		};
+	};
+
+	ports {
+		port@1 {
+			reg = <1>;
+
+			mipi_dsi_out: endpoint {
+				remote-endpoint = <&panel_in>;
+				data-lanes = <1 2 3 4>;
+				lane-polarities = <0 0 0 0 0>;
+			};
+		};
+	};
+};
+
+&pwm1 {
+	status = "okay";
+};
-- 
Regards,

Laurent Pinchart

Re: [PATCH v2 5/5] arm64: dts: freescale: imx8mp-sb-ucm: Add DSI panel overlay

[Laurent Pinchart]

On Sun, Mar 17, 2024 at 06:48:50PM +0200, Laurent Pinchart wrote:
> The SB-UCM-iMX8MPLUS kit is shipped with an external DSI panel. Add a
> corresponding DT overlay.
> 
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
>  arch/arm64/boot/dts/freescale/Makefile        |  4 +
>  .../imx8mp-sb-ucm-panel-kd050hdfia020.dtso    | 81 +++++++++++++++++++
>  2 files changed, 85 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtso
> 
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index 02efa97fc464..d7432ce6a7bb 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -165,6 +165,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-sb-ucm.dtb
> +
> +imx8mp-sb-ucm-panel-kd050hdfia020-dtbs := imx8mp-sb-ucm.dtb imx8mp-sb-ucm-panel-kd050hdfia020-dtbo
> +dtb-$(CONFIG_ARCH_MXC) += imx8mp-sb-ucm-panel-kd050hdfia020-dtb

On a side note, is there a way to selectively compile this dtb ? Running

$ make dtbs

will compile them all, but

$ make freescale/imx8mp-sb-ucm-panel-kd050hdfia020-dtb

complains with

make[4]: *** No rule to make target 'arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtb'.  Stop.
make[3]: *** [/home/laurent/src/iob/toradex/linux/scripts/Makefile.build:481: arch/arm64/boot/dts/freescale] Error 2
make[2]: *** [/home/laurent/src/iob/toradex/linux/Makefile:1389: freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtb] Error 2

I would like to compile it selectively, as running

$ make dtbs CHECK_DTBS=1

makes it much more time consuming to run the dtb checks.

> +
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-hdmi.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-lt6.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-mi1010ait-1cp1.dtb
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtso b/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtso
> new file mode 100644
> index 000000000000..fdad943c1554
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtso
> @@ -0,0 +1,81 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright 2021 CompuLab
> + *
> + * Device tree overlay for KD050HDFIA020-C020A panel connector to Compulab
> + * SB-UCM-iMX8PLUS.
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
> +&dsi_backlight {
> +	status = "okay";
> +};
> +
> +&i2c5 {
> +	status = "okay";
> +
> +	touch@5d {
> +		compatible = "goodix,gt911";
> +		reg = <0x5d>;
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_dsi_touch>;
> +
> +		interrupt-parent = <&gpio4>;
> +		interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
> +
> +                irq-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
> +		reset-gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>;
> +        };
> +};
> +
> +&lcdif1 {
> +	status = "okay";
> +};
> +
> +&mipi_dsi {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	samsung,esc-clock-frequency = <20000000>;
> +	status = "okay";
> +
> +	panel@0 {
> +		compatible = "startek,kd050hdfia020", "ilitek,ili9881c";
> +		reg = <0>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_dsi_panel>;
> +
> +		reset-gpio = <&pca9555 4 GPIO_ACTIVE_LOW>;
> +		power-supply = <&reg_3v3_per>;
> +
> +		backlight = <&dsi_backlight>;
> +
> +		port {
> +			panel_in: endpoint {
> +				remote-endpoint = <&mipi_dsi_out>;
> +				data-lanes = <1 2 3 4>;
> +			};
> +		};
> +	};
> +
> +	ports {
> +		port@1 {
> +			reg = <1>;
> +
> +			mipi_dsi_out: endpoint {
> +				remote-endpoint = <&panel_in>;
> +				data-lanes = <1 2 3 4>;
> +				lane-polarities = <0 0 0 0 0>;
> +			};
> +		};
> +	};
> +};
> +
> +&pwm1 {
> +	status = "okay";
> +};

-- 
Regards,

Laurent Pinchart

Re: [PATCH v2 5/5] arm64: dts: freescale: imx8mp-sb-ucm: Add DSI panel overlay

[Laurent Pinchart]

On Sun, Mar 17, 2024 at 06:56:47PM +0200, Laurent Pinchart wrote:
> On Sun, Mar 17, 2024 at 06:48:50PM +0200, Laurent Pinchart wrote:
> > The SB-UCM-iMX8MPLUS kit is shipped with an external DSI panel. Add a
> > corresponding DT overlay.
> > 
> > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > ---
> >  arch/arm64/boot/dts/freescale/Makefile        |  4 +
> >  .../imx8mp-sb-ucm-panel-kd050hdfia020.dtso    | 81 +++++++++++++++++++
> >  2 files changed, 85 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtso
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> > index 02efa97fc464..d7432ce6a7bb 100644
> > --- a/arch/arm64/boot/dts/freescale/Makefile
> > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > @@ -165,6 +165,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-sb-ucm.dtb
> > +
> > +imx8mp-sb-ucm-panel-kd050hdfia020-dtbs := imx8mp-sb-ucm.dtb imx8mp-sb-ucm-panel-kd050hdfia020-dtbo
> > +dtb-$(CONFIG_ARCH_MXC) += imx8mp-sb-ucm-panel-kd050hdfia020-dtb

Replying to myself, fixing the typo here with s/-dtb$/.dtb/ helps :-)
I'll send a v3 after waiting some time for review comments.

> On a side note, is there a way to selectively compile this dtb ? Running
> 
> $ make dtbs
> 
> will compile them all, but
> 
> $ make freescale/imx8mp-sb-ucm-panel-kd050hdfia020-dtb
> 
> complains with
> 
> make[4]: *** No rule to make target 'arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtb'.  Stop.
> make[3]: *** [/home/laurent/src/iob/toradex/linux/scripts/Makefile.build:481: arch/arm64/boot/dts/freescale] Error 2
> make[2]: *** [/home/laurent/src/iob/toradex/linux/Makefile:1389: freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtb] Error 2
> 
> I would like to compile it selectively, as running
> 
> $ make dtbs CHECK_DTBS=1
> 
> makes it much more time consuming to run the dtb checks.
> 
> > +
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-hdmi.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-lt6.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-mi1010ait-1cp1.dtb
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtso b/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtso
> > new file mode 100644
> > index 000000000000..fdad943c1554
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-sb-ucm-panel-kd050hdfia020.dtso
> > @@ -0,0 +1,81 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright 2021 CompuLab
> > + *
> > + * Device tree overlay for KD050HDFIA020-C020A panel connector to Compulab
> > + * SB-UCM-iMX8PLUS.
> > + */
> > +
> > +/dts-v1/;
> > +/plugin/;
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +
> > +&dsi_backlight {
> > +	status = "okay";
> > +};
> > +
> > +&i2c5 {
> > +	status = "okay";
> > +
> > +	touch@5d {
> > +		compatible = "goodix,gt911";
> > +		reg = <0x5d>;
> > +
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_dsi_touch>;
> > +
> > +		interrupt-parent = <&gpio4>;
> > +		interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
> > +
> > +                irq-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
> > +		reset-gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>;
> > +        };
> > +};
> > +
> > +&lcdif1 {
> > +	status = "okay";
> > +};
> > +
> > +&mipi_dsi {
> > +	#address-cells = <1>;
> > +	#size-cells = <0>;
> > +	samsung,esc-clock-frequency = <20000000>;
> > +	status = "okay";
> > +
> > +	panel@0 {
> > +		compatible = "startek,kd050hdfia020", "ilitek,ili9881c";
> > +		reg = <0>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_dsi_panel>;
> > +
> > +		reset-gpio = <&pca9555 4 GPIO_ACTIVE_LOW>;
> > +		power-supply = <&reg_3v3_per>;
> > +
> > +		backlight = <&dsi_backlight>;
> > +
> > +		port {
> > +			panel_in: endpoint {
> > +				remote-endpoint = <&mipi_dsi_out>;
> > +				data-lanes = <1 2 3 4>;
> > +			};
> > +		};
> > +	};
> > +
> > +	ports {
> > +		port@1 {
> > +			reg = <1>;
> > +
> > +			mipi_dsi_out: endpoint {
> > +				remote-endpoint = <&panel_in>;
> > +				data-lanes = <1 2 3 4>;
> > +				lane-polarities = <0 0 0 0 0>;
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&pwm1 {
> > +	status = "okay";
> > +};

-- 
Regards,

Laurent Pinchart