From: Frank Li <Frank.Li@nxp.com>
To: Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org (moderated
list:ARM/FREESCALE LAYERSCAPE ARM ARCHITECTURE),
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS),
linux-kernel@vger.kernel.org (open list)
Cc: imx@lists.linux.dev
Subject: [PATCH v2 09/13] arm64: dts: layerscape: change pcie interrupt order
Date: Wed, 26 Jun 2024 16:25:29 -0400 [thread overview]
Message-ID: <20240626202533.2182846-10-Frank.Li@nxp.com> (raw)
In-Reply-To: <20240626202533.2182846-1-Frank.Li@nxp.com>
Change pcie interrupt order to fix below warning.
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dtb: pcie@3400000: interrupt-names:0: 'pme' was expected
from schema $id: http://devicetree.org/schemas/pci/fsl,layerscape-pcie.yaml#
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dtb: pcie@3400000: interrupt-names:1: 'aer' was expected
from schema $id: http://devicetree.org/schemas/pci/fsl,layerscape-pcie.yaml#
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 6 +++---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 18 +++++++++---------
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 64e14154d5969..daded853457bc 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -535,9 +535,9 @@ pcie1: pcie@3400000 {
reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
<0x40 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */
- interrupt-names = "aer", "pme";
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
+ interrupt-names = "pme", "aer";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 801c5b77d608f..8ce73a076e77a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -801,9 +801,9 @@ pcie1: pcie@3400000 {
reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
<0x40 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */
- interrupt-names = "aer", "pme";
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
+ interrupt-names = "pme", "aer";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
@@ -840,9 +840,9 @@ pcie2: pcie@3500000 {
reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
<0x48 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
- interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */
- interrupt-names = "aer", "pme";
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
+ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
+ interrupt-names = "pme", "aer";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
@@ -879,9 +879,9 @@ pcie3: pcie@3600000 {
reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
<0x50 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
- <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */
- interrupt-names = "aer", "pme";
+ interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
+ <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
+ interrupt-names = "pme", "aer";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
--
2.34.1
next prev parent reply other threads:[~2024-06-26 20:26 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-26 20:25 [PATCH v2 00/13] arm64: dts: layerscaple: clean up some simple CHECK_WARNING Frank Li
2024-06-26 20:25 ` [PATCH v2 01/13] arm64: dts: layerscape: rename node 'timer' as 'rtc' Frank Li
2024-06-26 20:28 ` [PATCH v2 00/13] arm64: dts: layerscaple: clean up some simple CHECK_WARNING Frank Li
2024-06-27 10:37 ` Shawn Guo
2024-06-26 20:25 ` [PATCH v2 02/13] arm64: dts: layerscape: add platform special compatible string for gpio Frank Li
2024-07-01 16:43 ` Rob Herring
2024-07-01 18:51 ` Frank Li
2024-06-26 20:25 ` [PATCH v2 03/13] arm64: dts: fsl-lx2160a: fix #address-cells for pinctrl-single Frank Li
2024-06-26 20:25 ` [PATCH v2 04/13] arm64: dts: fsl-ls1012a: remove property 'snps,host-vbus-glitches' Frank Li
2024-06-26 20:25 ` [PATCH v2 05/13] arm64: dts: layerscape: replace node name 'nor' with 'flash' Frank Li
2024-06-26 20:25 ` [PATCH v2 06/13] arm64: dts: layerscape: remove compatible string 'fsl,fman-xmdio' for fman3 Frank Li
2024-06-26 20:25 ` [PATCH v2 07/13] arm64: dts: layerscaple: add #dma-cells for qdma Frank Li
2024-06-27 17:17 ` Rob Herring
2024-06-27 17:22 ` Rob Herring
2024-06-27 18:27 ` Frank Li
2024-06-28 2:34 ` Shawn Guo
2024-06-26 20:25 ` [PATCH v2 08/13] arm64: dts: layerscape: rename node name "wdt" to "watchdog" Frank Li
2024-06-26 20:25 ` Frank Li [this message]
2024-06-26 20:25 ` [PATCH v2 10/13] arm64: dts: layerscape: rename aux_bus to aux-bus Frank Li
2024-06-26 20:25 ` [PATCH v2 11/13] arm64: dts: fsl-ls1043a: remove unused clk-name at watchdog node Frank Li
2024-06-26 20:25 ` [PATCH v2 12/13] arm64: dts: fsl-ls1046a: rename thermal node name Frank Li
2024-06-26 20:25 ` [PATCH v2 13/13] arm64: dts: layerscape: rename b(q)man-portals to b(q)man-portals-bus Frank Li
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