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From: James Clark <james.clark@linaro.org>
To: Vladimir Oltean <vladimir.oltean@nxp.com>,
	Arnd Bergmann <arnd@arndb.de>, Frank Li <Frank.li@nxp.com>
Cc: Vladimir Oltean <olteanv@gmail.com>,
	Mark Brown <broonie@kernel.org>,
	linux-spi@vger.kernel.org, imx@lists.linux.dev,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/4] spi: spi-fsl-dspi: Use non-coherent memory for DMA
Date: Thu, 12 Jun 2025 12:05:26 +0100	[thread overview]
Message-ID: <c65c752a-5b60-4f30-8d51-9a903ddd55a6@linaro.org> (raw)
In-Reply-To: <20250611090107.t35zatn47vetnvse@skbuf>



On 11/06/2025 10:01 am, Vladimir Oltean wrote:
> On Tue, Jun 10, 2025 at 11:56:34AM -0400, Frank Li wrote:
>> Can you add performance beneafit information after use non-coherent memory
>> in commit message to let reviewer easily know your intention.
> 
> To expand on that, you can post the output of something like this
> (before and after):
> $ spidev_test --device /dev/spidev1.0 --bpw 8 --size 256 --cpha --iter 10000000 --speed 10000000
> where /dev/spidev1.0 is an unconnected chip select with a dummy entry in
> the device tree.

Coherent (before):

rate: tx 385.8kbps, rx 385.8kbps
rate: tx 1215.7kbps, rx 1215.7kbps
rate: tx 1845.2kbps, rx 1845.2kbps
rate: tx 1844.0kbps, rx 1844.0kbps
rate: tx 1846.1kbps, rx 1846.1kbps
rate: tx 1844.8kbps, rx 1844.8kbps
rate: tx 1844.4kbps, rx 1844.4kbps
rate: tx 1846.9kbps, rx 1846.9kbps
rate: tx 1846.5kbps, rx 1846.5kbps
rate: tx 1843.2kbps, rx 1843.2kbps
rate: tx 1844.8kbps, rx 1844.8kbps
rate: tx 1845.2kbps, rx 1845.2kbps
rate: tx 1846.5kbps, rx 1846.5kbps

Non-coherent (after):

rate: tx 314.6kbps, rx 314.6kbps
rate: tx 748.3kbps, rx 748.3kbps
rate: tx 1845.2kbps, rx 1845.2kbps
rate: tx 1849.3kbps, rx 1849.3kbps
rate: tx 1846.1kbps, rx 1846.1kbps
rate: tx 1847.3kbps, rx 1847.3kbps
rate: tx 1845.7kbps, rx 1845.7kbps
rate: tx 1846.5kbps, rx 1846.5kbps
rate: tx 1844.4kbps, rx 1844.4kbps
rate: tx 1847.3kbps, rx 1847.3kbps
rate: tx 1847.3kbps, rx 1847.3kbps
rate: tx 1845.7kbps, rx 1845.7kbps
rate: tx 1846.5kbps, rx 1846.5kbps

Ignoring anything less than 1800 as starting up, coherent has an average 
of 1845.2kbps and non-coherent 1846.5kbps. Not sure if that's just noise 
or an actual effect.

With stress running in the background the difference in average over 17 
runs is slightly more significant:

   stress -m 8 --vm-stride 1 --vm-bytes 64MB

Coherent: 2105.5kbps
Non-coherent: 2125.6kbps

There's not much variance in the runs either, they're pretty much always 
2105 and 2125 +-1 so I don't think this result is noise.

(No idea why it goes faster when it's under load, but I hope that can be 
ignored for this test)


  reply	other threads:[~2025-06-12 11:05 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-09 15:32 [PATCH 0/4] spi: spi-fsl-dspi: Target mode improvements James Clark
2025-06-09 15:32 ` [PATCH 1/4] spi: spi-fsl-dspi: Clear completion counter before initiating transfer James Clark
2025-06-10 11:34   ` Vladimir Oltean
2025-06-10 15:41     ` James Clark
2025-06-10 21:01       ` Vladimir Oltean
2025-06-10 21:31         ` Vladimir Oltean
2025-06-11  9:12           ` James Clark
2025-06-09 15:32 ` [PATCH 2/4] spi: spi-fsl-dspi: Use non-coherent memory for DMA James Clark
2025-06-10  8:26   ` Arnd Bergmann
2025-06-10  9:03     ` James Clark
2025-06-10 15:15   ` Frank Li
2025-06-10 15:46     ` James Clark
2025-06-13 15:56       ` David Laight
2025-06-10 15:48     ` Arnd Bergmann
2025-06-10 15:56       ` Frank Li
2025-06-11  9:01         ` Vladimir Oltean
2025-06-12 11:05           ` James Clark [this message]
2025-06-12 11:15             ` Vladimir Oltean
2025-06-12 14:14               ` James Clark
2025-06-12 14:23                 ` Vladimir Oltean
2025-06-12 14:28                   ` James Clark
2025-06-12 14:31                     ` Vladimir Oltean
2025-06-12 14:35                       ` James Clark
2025-06-12 14:36                 ` Vladimir Oltean
2025-06-12 15:36                   ` James Clark
2025-06-12 15:37                     ` James Clark
2025-06-12 14:43                 ` Mark Brown
2025-06-12 15:47                   ` James Clark
2025-06-12 15:51                     ` Vladimir Oltean
2025-06-12 15:40                 ` Arnd Bergmann
2025-06-12 11:15             ` Arnd Bergmann
2025-06-09 15:32 ` [PATCH 3/4] spi: spi-fsl-dspi: Increase DMA buffer size James Clark
2025-06-09 15:32 ` [PATCH 4/4] spi: spi-fsl-dspi: Report FIFO overflows as errors James Clark
2025-06-10 21:52   ` Vladimir Oltean
2025-06-11 14:40     ` James Clark
2025-06-11 14:56       ` Vladimir Oltean
2025-06-11 15:00         ` James Clark
2025-06-30 11:40 ` [PATCH 0/4] spi: spi-fsl-dspi: Target mode improvements Mark Brown
2025-06-30 12:23   ` James Clark
2025-06-30 12:25     ` Mark Brown
2025-06-30 12:36       ` James Clark
2025-06-30 12:40         ` Mark Brown
2025-06-30 12:54           ` James Clark

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