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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 00/11] i915: Introduce Ponte Vecchio
Date: Tue, 3 May 2022 09:21:04 +0100	[thread overview]
Message-ID: <0524db05-4d9e-4522-4d80-10ffe4c4207c@linux.intel.com> (raw)
In-Reply-To: <20220502163417.2635462-1-matthew.d.roper@intel.com>


On 02/05/2022 17:34, Matt Roper wrote:
> Ponte Vecchio (PVC) is a new GPU based on the Xe_HPC architecture.  As a
> compute-focused platform, PVC has compute engines and enhanced copy
> engines, but no render engine (there is no geometry pipeline) and no
> display.
> 
> This is just a handful of early enablement patches, including some
> initial support for the new copy engines (although we're not yet adding
> those to the platform's engine list or exposing them to userspace just
> yet).

IMO lets hold off merging this until next week if that sounds 
acceptable? This week I need to do a final pull for final bits of DG2 
and I would like to keep it as small as possible.

Regards,

Tvrtko

> 
> Ayaz A Siddiqui (1):
>    drm/i915/pvc: Define MOCS table for PVC
> 
> John Harrison (1):
>    drm/i915/pvc: Reduce stack usage in reset selftest with extra blitter
>      engine
> 
> Lucas De Marchi (2):
>    drm/i915/pvc: skip all copy engines from aux table invalidate
>    drm/i915/pvc: read fuses for link copy engines
> 
> Matt Roper (5):
>    drm/i915/pvc: Add forcewake support
>    drm/i915/pvc: Read correct RP_STATE_CAP register
>    drm/i915/pvc: Engines definitions for new copy engines
>    drm/i915/pvc: Interrupt support for new copy engines
>    drm/i915/pvc: Reset support for new copy engines
> 
> Stuart Summers (2):
>    drm/i915/pvc: add initial Ponte Vecchio definitions
>    drm/i915/pvc: Remove additional 3D flags from PIPE_CONTROL
> 
>   drivers/gpu/drm/i915/gt/gen8_engine_cs.c      |  20 ++-
>   drivers/gpu/drm/i915/gt/intel_engine_cs.c     |  92 +++++++++++
>   drivers/gpu/drm/i915/gt/intel_engine_types.h  |  10 +-
>   drivers/gpu/drm/i915/gt/intel_gpu_commands.h  |  12 +-
>   drivers/gpu/drm/i915/gt/intel_gt_irq.c        |  16 ++
>   drivers/gpu/drm/i915/gt/intel_gt_regs.h       |  56 ++++---
>   drivers/gpu/drm/i915/gt/intel_gt_types.h      |   1 +
>   drivers/gpu/drm/i915/gt/intel_mocs.c          |  24 ++-
>   drivers/gpu/drm/i915/gt/intel_rps.c           |   4 +-
>   drivers/gpu/drm/i915/gt/intel_workarounds.c   |  13 +-
>   drivers/gpu/drm/i915/gt/selftest_hangcheck.c  |   9 +-
>   drivers/gpu/drm/i915/gvt/cmd_parser.c         |   2 +-
>   drivers/gpu/drm/i915/i915_drv.h               |   6 +
>   drivers/gpu/drm/i915/i915_pci.c               |  23 +++
>   drivers/gpu/drm/i915/i915_reg.h               |   9 ++
>   drivers/gpu/drm/i915/intel_device_info.c      |   1 +
>   drivers/gpu/drm/i915/intel_device_info.h      |   5 +-
>   drivers/gpu/drm/i915/intel_uncore.c           | 150 +++++++++++++++++-
>   drivers/gpu/drm/i915/selftests/intel_uncore.c |   2 +
>   19 files changed, 417 insertions(+), 38 deletions(-)
> 

  parent reply	other threads:[~2022-05-03  8:21 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-02 16:34 [Intel-gfx] [PATCH 00/11] i915: Introduce Ponte Vecchio Matt Roper
2022-05-02 16:34 ` [Intel-gfx] [PATCH 01/11] drm/i915/pvc: add initial Ponte Vecchio definitions Matt Roper
2022-05-02 20:44   ` Lucas De Marchi
2022-05-02 16:34 ` [Intel-gfx] [PATCH 02/11] drm/i915/pvc: Add forcewake support Matt Roper
2022-05-02 22:33   ` Summers, Stuart
2022-05-05  0:34     ` Matt Roper
2022-05-02 16:34 ` [Intel-gfx] [PATCH 03/11] drm/i915/pvc: Define MOCS table for PVC Matt Roper
2022-05-02 16:50   ` Matt Roper
2022-05-02 18:39     ` Lucas De Marchi
2022-05-02 18:50       ` Matt Roper
2022-05-02 19:27         ` Lucas De Marchi
2022-05-02 19:42           ` Matt Roper
2022-05-02 21:03   ` Lucas De Marchi
2022-05-02 21:14     ` Matt Roper
2022-05-03  6:22       ` Lucas De Marchi
2022-05-02 16:34 ` [Intel-gfx] [PATCH 04/11] drm/i915/pvc: Read correct RP_STATE_CAP register Matt Roper
2022-05-02 16:55   ` Rodrigo Vivi
2022-05-02 16:34 ` [Intel-gfx] [PATCH 05/11] drm/i915/pvc: Remove additional 3D flags from PIPE_CONTROL Matt Roper
2022-05-02 16:34 ` [Intel-gfx] [PATCH 06/11] drm/i915/pvc: Reduce stack usage in reset selftest with extra blitter engine Matt Roper
2022-05-02 18:46   ` Souza, Jose
2022-05-03  8:25   ` Tvrtko Ursulin
2022-05-02 16:34 ` [Intel-gfx] [PATCH 07/11] drm/i915/pvc: Engines definitions for new copy engines Matt Roper
2022-05-02 18:45   ` Souza, Jose
2022-05-03  8:05   ` Tvrtko Ursulin
2022-05-05 20:59     ` Matt Roper
2022-05-06  7:21       ` Tvrtko Ursulin
2022-05-06 14:29         ` Matt Roper
2022-05-02 16:34 ` [Intel-gfx] [PATCH 08/11] drm/i915/pvc: Interrupt support " Matt Roper
2022-05-02 22:23   ` Summers, Stuart
2022-05-02 16:34 ` [Intel-gfx] [PATCH 09/11] drm/i915/pvc: Reset " Matt Roper
2022-05-02 18:44   ` Souza, Jose
2022-05-02 22:23   ` Summers, Stuart
2022-05-02 16:34 ` [Intel-gfx] [PATCH 10/11] drm/i915/pvc: skip all copy engines from aux table invalidate Matt Roper
2022-05-02 18:40   ` Souza, Jose
2022-05-02 22:58   ` Kumar Valsan, Prathap
2022-05-02 16:34 ` [Intel-gfx] [PATCH 11/11] drm/i915/pvc: read fuses for link copy engines Matt Roper
2022-05-02 18:48   ` Souza, Jose
2022-05-03  8:19   ` Tvrtko Ursulin
2022-05-02 16:58 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Introduce Ponte Vecchio Patchwork
2022-05-02 16:58 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-05-02 17:22 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-05-02 22:58 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-05-03 17:32   ` Matt Roper
2022-05-04 17:03     ` Vudum, Lakshminarayana
2022-05-03  8:21 ` Tvrtko Ursulin [this message]
2022-05-03 14:56   ` [Intel-gfx] [PATCH 00/11] " Matt Roper
2022-05-03 15:01     ` Tvrtko Ursulin
2022-05-04 16:22 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork
2022-05-04 16:43 ` Patchwork

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