* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
2022-02-14 23:56 [Intel-gfx] [PATCH 0/2] " Vivek Kasireddy
@ 2022-02-16 3:16 ` Patchwork
0 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2022-02-16 3:16 UTC (permalink / raw)
To: Vivek Kasireddy; +Cc: intel-gfx
== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
URL : https://patchwork.freedesktop.org/series/100136/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ebe0b21fe6a5 drm/mm: Add an iterator to optimally walk over holes for an allocation (v3)
-:146: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pos' - possible side-effects?
#146: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, hole, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:146: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'mm' - possible side-effects?
#146: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, hole, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:146: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'size' - possible side-effects?
#146: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, hole, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:146: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'mode' - possible side-effects?
#146: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, hole, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:146: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'mode' may be better as '(mode)' to avoid precedence issues
#146: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, hole, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
total: 0 errors, 0 warnings, 5 checks, 114 lines checked
241d025a61c3 drm/i915/gem: Don't try to map and fence large scanout buffers (v7)
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
2022-02-27 17:29 [Intel-gfx] [CI 0/2] " Vivek Kasireddy
@ 2022-02-27 17:57 ` Patchwork
0 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2022-02-27 17:57 UTC (permalink / raw)
To: Vivek Kasireddy; +Cc: intel-gfx
== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
URL : https://patchwork.freedesktop.org/series/100796/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
427fbe66bc3d drm/mm: Add an iterator to optimally walk over holes for an allocation (v4)
-:153: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pos' - possible side-effects?
#153: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:153: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'mm' - possible side-effects?
#153: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:153: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'size' - possible side-effects?
#153: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:153: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'mode' - possible side-effects?
#153: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:153: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'mode' may be better as '(mode)' to avoid precedence issues
#153: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
total: 0 errors, 0 warnings, 5 checks, 114 lines checked
546a14fb7313 drm/i915/gem: Don't try to map and fence large scanout buffers (v9)
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
2022-02-28 19:04 [Intel-gfx] [CI 0/2] " Vivek Kasireddy
@ 2022-02-28 23:57 ` Patchwork
0 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2022-02-28 23:57 UTC (permalink / raw)
To: Vivek Kasireddy; +Cc: intel-gfx
== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
URL : https://patchwork.freedesktop.org/series/100847/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0ae83c35ff14 drm/mm: Add an iterator to optimally walk over holes for an allocation (v5)
-:157: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pos' - possible side-effects?
#157: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:157: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'mm' - possible side-effects?
#157: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:157: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'size' - possible side-effects?
#157: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:157: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'mode' - possible side-effects?
#157: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:157: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'mode' may be better as '(mode)' to avoid precedence issues
#157: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
total: 0 errors, 0 warnings, 5 checks, 114 lines checked
81e2ccf8eadb drm/i915/gem: Don't try to map and fence large scanout buffers (v9)
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] [CI 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
@ 2022-03-05 23:36 Vivek Kasireddy
2022-03-05 23:36 ` [Intel-gfx] [CI 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v5) Vivek Kasireddy
` (5 more replies)
0 siblings, 6 replies; 13+ messages in thread
From: Vivek Kasireddy @ 2022-03-05 23:36 UTC (permalink / raw)
To: intel-gfx, dri-devel
The first patch is a drm core patch that replaces the for loop in
drm_mm_insert_node_in_range() with the iterator and would not
cause any functional changes. The second patch is a i915 driver
specific patch that also uses the iterator but solves a different
problem.
v2:
- Added a new patch to this series to fix a potential NULL
dereference.
- Fixed a typo associated with the iterator introduced in the
drm core patch.
- Added locking around the snippet in the i915 patch that
traverses the GGTT hole nodes.
v3: (Tvrtko)
- Replaced mutex_lock with mutex_lock_interruptible_nested() in
the i915 patch.
v4: (Tvrtko)
- Dropped the patch added in v2 as it was deemed unnecessary.
v5: (Tvrtko)
- Fixed yet another typo in the drm core patch: should have
passed caller_mode instead of mode to the iterator.
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
Cc: Christian König <christian.koenig@amd.com>
Vivek Kasireddy (2):
drm/mm: Add an iterator to optimally walk over holes for an allocation
(v5)
drm/i915/gem: Don't try to map and fence large scanout buffers (v9)
drivers/gpu/drm/drm_mm.c | 32 ++++----
drivers/gpu/drm/i915/i915_gem.c | 128 +++++++++++++++++++++++---------
include/drm/drm_mm.h | 36 +++++++++
3 files changed, 145 insertions(+), 51 deletions(-)
--
2.35.1
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] [CI 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v5)
2022-03-05 23:36 [Intel-gfx] [CI 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Vivek Kasireddy
@ 2022-03-05 23:36 ` Vivek Kasireddy
2022-03-10 13:03 ` Tvrtko Ursulin
2022-03-05 23:36 ` [Intel-gfx] [CI 2/2] drm/i915/gem: Don't try to map and fence large scanout buffers (v9) Vivek Kasireddy
` (4 subsequent siblings)
5 siblings, 1 reply; 13+ messages in thread
From: Vivek Kasireddy @ 2022-03-05 23:36 UTC (permalink / raw)
To: intel-gfx, dri-devel
This iterator relies on drm_mm_first_hole() and drm_mm_next_hole()
functions to identify suitable holes for an allocation of a given
size by efficiently traversing the rbtree associated with the given
allocator.
It replaces the for loop in drm_mm_insert_node_in_range() and can
also be used by drm drivers to quickly identify holes of a certain
size within a given range.
v2: (Tvrtko)
- Prepend a double underscore for the newly exported first/next_hole
- s/each_best_hole/each_suitable_hole/g
- Mask out DRM_MM_INSERT_ONCE from the mode before calling
first/next_hole and elsewhere.
v3: (Tvrtko)
- Reduce the number of hunks by retaining the "mode" variable name
v4:
- Typo: s/__drm_mm_next_hole(.., hole/__drm_mm_next_hole(.., pos
v5: (Tvrtko)
- Fixed another typo: should pass caller_mode instead of mode to
the iterator in drm_mm_insert_node_in_range().
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Christian König <christian.koenig@amd.com>
Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com>
---
drivers/gpu/drm/drm_mm.c | 32 +++++++++++++++-----------------
include/drm/drm_mm.h | 36 ++++++++++++++++++++++++++++++++++++
2 files changed, 51 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 8257f9d4f619..6ff98a0e4df3 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -352,10 +352,10 @@ static struct drm_mm_node *find_hole_addr(struct drm_mm *mm, u64 addr, u64 size)
return node;
}
-static struct drm_mm_node *
-first_hole(struct drm_mm *mm,
- u64 start, u64 end, u64 size,
- enum drm_mm_insert_mode mode)
+struct drm_mm_node *
+__drm_mm_first_hole(struct drm_mm *mm,
+ u64 start, u64 end, u64 size,
+ enum drm_mm_insert_mode mode)
{
switch (mode) {
default:
@@ -374,6 +374,7 @@ first_hole(struct drm_mm *mm,
hole_stack);
}
}
+EXPORT_SYMBOL(__drm_mm_first_hole);
/**
* DECLARE_NEXT_HOLE_ADDR - macro to declare next hole functions
@@ -410,11 +411,11 @@ static struct drm_mm_node *name(struct drm_mm_node *entry, u64 size) \
DECLARE_NEXT_HOLE_ADDR(next_hole_high_addr, rb_left, rb_right)
DECLARE_NEXT_HOLE_ADDR(next_hole_low_addr, rb_right, rb_left)
-static struct drm_mm_node *
-next_hole(struct drm_mm *mm,
- struct drm_mm_node *node,
- u64 size,
- enum drm_mm_insert_mode mode)
+struct drm_mm_node *
+__drm_mm_next_hole(struct drm_mm *mm,
+ struct drm_mm_node *node,
+ u64 size,
+ enum drm_mm_insert_mode mode)
{
switch (mode) {
default:
@@ -432,6 +433,7 @@ next_hole(struct drm_mm *mm,
return &node->hole_stack == &mm->hole_stack ? NULL : node;
}
}
+EXPORT_SYMBOL(__drm_mm_next_hole);
/**
* drm_mm_reserve_node - insert an pre-initialized node
@@ -516,11 +518,11 @@ int drm_mm_insert_node_in_range(struct drm_mm * const mm,
u64 size, u64 alignment,
unsigned long color,
u64 range_start, u64 range_end,
- enum drm_mm_insert_mode mode)
+ enum drm_mm_insert_mode caller_mode)
{
struct drm_mm_node *hole;
u64 remainder_mask;
- bool once;
+ enum drm_mm_insert_mode mode = caller_mode & ~DRM_MM_INSERT_ONCE;
DRM_MM_BUG_ON(range_start > range_end);
@@ -533,13 +535,9 @@ int drm_mm_insert_node_in_range(struct drm_mm * const mm,
if (alignment <= 1)
alignment = 0;
- once = mode & DRM_MM_INSERT_ONCE;
- mode &= ~DRM_MM_INSERT_ONCE;
-
remainder_mask = is_power_of_2(alignment) ? alignment - 1 : 0;
- for (hole = first_hole(mm, range_start, range_end, size, mode);
- hole;
- hole = once ? NULL : next_hole(mm, hole, size, mode)) {
+ drm_mm_for_each_suitable_hole(hole, mm, range_start, range_end,
+ size, caller_mode) {
u64 hole_start = __drm_mm_hole_node_start(hole);
u64 hole_end = hole_start + hole->hole_size;
u64 adj_start, adj_end;
diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h
index ac33ba1b18bc..dff6db627807 100644
--- a/include/drm/drm_mm.h
+++ b/include/drm/drm_mm.h
@@ -400,6 +400,42 @@ static inline u64 drm_mm_hole_node_end(const struct drm_mm_node *hole_node)
1 : 0; \
pos = list_next_entry(pos, hole_stack))
+struct drm_mm_node *
+__drm_mm_first_hole(struct drm_mm *mm,
+ u64 start, u64 end, u64 size,
+ enum drm_mm_insert_mode mode);
+
+struct drm_mm_node *
+__drm_mm_next_hole(struct drm_mm *mm,
+ struct drm_mm_node *node,
+ u64 size,
+ enum drm_mm_insert_mode mode);
+
+/**
+ * drm_mm_for_each_suitable_hole - iterator to optimally walk over all
+ * holes that can fit an allocation of the given @size.
+ * @pos: &drm_mm_node used internally to track progress
+ * @mm: &drm_mm allocator to walk
+ * @range_start: start of the allowed range for the allocation
+ * @range_end: end of the allowed range for the allocation
+ * @size: size of the allocation
+ * @mode: fine-tune the allocation search
+ *
+ * This iterator walks over all holes suitable for the allocation of given
+ * @size in a very efficient manner. It is implemented by calling
+ * drm_mm_first_hole() and drm_mm_next_hole() which identify the
+ * appropriate holes within the given range by efficiently traversing the
+ * rbtree associated with @mm.
+ */
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
+
/*
* Basic range manager support (drm_mm.c)
*/
--
2.35.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Intel-gfx] [CI 2/2] drm/i915/gem: Don't try to map and fence large scanout buffers (v9)
2022-03-05 23:36 [Intel-gfx] [CI 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Vivek Kasireddy
2022-03-05 23:36 ` [Intel-gfx] [CI 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v5) Vivek Kasireddy
@ 2022-03-05 23:36 ` Vivek Kasireddy
2022-03-06 0:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Patchwork
` (3 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Vivek Kasireddy @ 2022-03-05 23:36 UTC (permalink / raw)
To: intel-gfx, dri-devel
On platforms capable of allowing 8K (7680 x 4320) modes, pinning 2 or
more framebuffers/scanout buffers results in only one that is mappable/
fenceable. Therefore, pageflipping between these 2 FBs where only one
is mappable/fenceable creates latencies large enough to miss alternate
vblanks thereby producing less optimal framerate.
This mainly happens because when i915_gem_object_pin_to_display_plane()
is called to pin one of the FB objs, the associated vma is identified
as misplaced and therefore i915_vma_unbind() is called which unbinds and
evicts it. This misplaced vma gets subseqently pinned only when
i915_gem_object_ggtt_pin_ww() is called without PIN_MAPPABLE. This
results in a latency of ~10ms and happens every other vblank/repaint cycle.
Therefore, to fix this issue, we try to see if there is space to map
at-least two objects of a given size and return early if there isn't. This
would ensure that we do not try with PIN_MAPPABLE for any objects that
are too big to map thereby preventing unncessary unbind.
Testcase:
Running Weston and weston-simple-egl on an Alderlake_S (ADLS) platform
with a 8K@60 mode results in only ~40 FPS. Since upstream Weston submits
a frame ~7ms before the next vblank, the latencies seen between atomic
commit and flip event are 7, 24 (7 + 16.66), 7, 24..... suggesting that
it misses the vblank every other frame.
Here is the ftrace snippet that shows the source of the ~10ms latency:
i915_gem_object_pin_to_display_plane() {
0.102 us | i915_gem_object_set_cache_level();
i915_gem_object_ggtt_pin_ww() {
0.390 us | i915_vma_instance();
0.178 us | i915_vma_misplaced();
i915_vma_unbind() {
__i915_active_wait() {
0.082 us | i915_active_acquire_if_busy();
0.475 us | }
intel_runtime_pm_get() {
0.087 us | intel_runtime_pm_acquire();
0.259 us | }
__i915_active_wait() {
0.085 us | i915_active_acquire_if_busy();
0.240 us | }
__i915_vma_evict() {
ggtt_unbind_vma() {
gen8_ggtt_clear_range() {
10507.255 us | }
10507.689 us | }
10508.516 us | }
v2: Instead of using bigjoiner checks, determine whether a scanout
buffer is too big by checking to see if it is possible to map
two of them into the ggtt.
v3 (Ville):
- Count how many fb objects can be fit into the available holes
instead of checking for a hole twice the object size.
- Take alignment constraints into account.
- Limit this large scanout buffer check to >= Gen 11 platforms.
v4:
- Remove existing heuristic that checks just for size. (Ville)
- Return early if we find space to map at-least two objects. (Tvrtko)
- Slightly update the commit message.
v5: (Tvrtko)
- Rename the function to indicate that the object may be too big to
map into the aperture.
- Account for guard pages while calculating the total size required
for the object.
- Do not subject all objects to the heuristic check and instead
consider objects only of a certain size.
- Do the hole walk using the rbtree.
- Preserve the existing PIN_NONBLOCK logic.
- Drop the PIN_MAPPABLE check while pinning the VMA.
v6: (Tvrtko)
- Return 0 on success and the specific error code on failure to
preserve the existing behavior.
v7: (Ville)
- Drop the HAS_GMCH(i915), DISPLAY_VER(i915) < 11 and
size < ggtt->mappable_end / 4 checks.
- Drop the redundant check that is based on previous heuristic.
v8:
- Make sure that we are holding the mutex associated with ggtt vm
as we traverse the hole nodes.
v9: (Tvrtko)
- Use mutex_lock_interruptible_nested() instead of mutex_lock().
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com>
---
drivers/gpu/drm/i915/i915_gem.c | 128 +++++++++++++++++++++++---------
1 file changed, 94 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 2e10187cd0a0..4bef9eaa8b2e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -49,6 +49,7 @@
#include "gem/i915_gem_pm.h"
#include "gem/i915_gem_region.h"
#include "gem/i915_gem_userptr.h"
+#include "gem/i915_gem_tiling.h"
#include "gt/intel_engine_user.h"
#include "gt/intel_gt.h"
#include "gt/intel_gt_pm.h"
@@ -879,6 +880,96 @@ static void discard_ggtt_vma(struct i915_vma *vma)
spin_unlock(&obj->vma.lock);
}
+static int
+i915_gem_object_fits_in_aperture(struct drm_i915_gem_object *obj,
+ u64 alignment, u64 flags)
+{
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
+ struct drm_mm_node *hole;
+ u64 hole_start, hole_end, start, end;
+ u64 fence_size, fence_alignment;
+ unsigned int count = 0;
+ int err = 0;
+
+ /*
+ * If the required space is larger than the available
+ * aperture, we will not able to find a slot for the
+ * object and unbinding the object now will be in
+ * vain. Worse, doing so may cause us to ping-pong
+ * the object in and out of the Global GTT and
+ * waste a lot of cycles under the mutex.
+ */
+ if (obj->base.size > ggtt->mappable_end)
+ return -E2BIG;
+
+ /*
+ * If NONBLOCK is set the caller is optimistically
+ * trying to cache the full object within the mappable
+ * aperture, and *must* have a fallback in place for
+ * situations where we cannot bind the object. We
+ * can be a little more lax here and use the fallback
+ * more often to avoid costly migrations of ourselves
+ * and other objects within the aperture.
+ */
+ if (!(flags & PIN_NONBLOCK))
+ return 0;
+
+ /*
+ * Other objects such as batchbuffers are fairly small compared
+ * to FBs and are unlikely to exahust the aperture space.
+ * Therefore, return early if this obj is not an FB.
+ */
+ if (!i915_gem_object_is_framebuffer(obj))
+ return 0;
+
+ fence_size = i915_gem_fence_size(i915, obj->base.size,
+ i915_gem_object_get_tiling(obj),
+ i915_gem_object_get_stride(obj));
+
+ if (i915_vm_has_cache_coloring(&ggtt->vm))
+ fence_size += 2 * I915_GTT_PAGE_SIZE;
+
+ fence_alignment = i915_gem_fence_alignment(i915, obj->base.size,
+ i915_gem_object_get_tiling(obj),
+ i915_gem_object_get_stride(obj));
+ alignment = max_t(u64, alignment, fence_alignment);
+
+ err = mutex_lock_interruptible_nested(&ggtt->vm.mutex, 0);
+ if (err)
+ return err;
+
+ /*
+ * Assuming this object is a large scanout buffer, we try to find
+ * out if there is room to map at-least two of them. There could
+ * be space available to map one but to be consistent, we try to
+ * avoid mapping/fencing any of them.
+ */
+ drm_mm_for_each_suitable_hole(hole, &ggtt->vm.mm, 0, ggtt->mappable_end,
+ fence_size, DRM_MM_INSERT_LOW) {
+ hole_start = drm_mm_hole_node_start(hole);
+ hole_end = hole_start + hole->hole_size;
+
+ do {
+ start = round_up(hole_start, alignment);
+ end = min_t(u64, hole_end, ggtt->mappable_end);
+
+ if (range_overflows(start, fence_size, end))
+ break;
+
+ if (++count >= 2) {
+ mutex_unlock(&ggtt->vm.mutex);
+ return 0;
+ }
+
+ hole_start = start + fence_size;
+ } while (1);
+ }
+
+ mutex_unlock(&ggtt->vm.mutex);
+ return -ENOSPC;
+}
+
struct i915_vma *
i915_gem_object_ggtt_pin_ww(struct drm_i915_gem_object *obj,
struct i915_gem_ww_ctx *ww,
@@ -894,36 +985,9 @@ i915_gem_object_ggtt_pin_ww(struct drm_i915_gem_object *obj,
if (flags & PIN_MAPPABLE &&
(!view || view->type == I915_GGTT_VIEW_NORMAL)) {
- /*
- * If the required space is larger than the available
- * aperture, we will not able to find a slot for the
- * object and unbinding the object now will be in
- * vain. Worse, doing so may cause us to ping-pong
- * the object in and out of the Global GTT and
- * waste a lot of cycles under the mutex.
- */
- if (obj->base.size > ggtt->mappable_end)
- return ERR_PTR(-E2BIG);
-
- /*
- * If NONBLOCK is set the caller is optimistically
- * trying to cache the full object within the mappable
- * aperture, and *must* have a fallback in place for
- * situations where we cannot bind the object. We
- * can be a little more lax here and use the fallback
- * more often to avoid costly migrations of ourselves
- * and other objects within the aperture.
- *
- * Half-the-aperture is used as a simple heuristic.
- * More interesting would to do search for a free
- * block prior to making the commitment to unbind.
- * That caters for the self-harm case, and with a
- * little more heuristics (e.g. NOFAULT, NOEVICT)
- * we could try to minimise harm to others.
- */
- if (flags & PIN_NONBLOCK &&
- obj->base.size > ggtt->mappable_end / 2)
- return ERR_PTR(-ENOSPC);
+ ret = i915_gem_object_fits_in_aperture(obj, alignment, flags);
+ if (ret)
+ return ERR_PTR(ret);
}
new_vma:
@@ -935,10 +999,6 @@ i915_gem_object_ggtt_pin_ww(struct drm_i915_gem_object *obj,
if (flags & PIN_NONBLOCK) {
if (i915_vma_is_pinned(vma) || i915_vma_is_active(vma))
return ERR_PTR(-ENOSPC);
-
- if (flags & PIN_MAPPABLE &&
- vma->fence_size > ggtt->mappable_end / 2)
- return ERR_PTR(-ENOSPC);
}
if (i915_vma_is_pinned(vma) || i915_vma_is_active(vma)) {
--
2.35.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
2022-03-05 23:36 [Intel-gfx] [CI 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Vivek Kasireddy
2022-03-05 23:36 ` [Intel-gfx] [CI 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v5) Vivek Kasireddy
2022-03-05 23:36 ` [Intel-gfx] [CI 2/2] drm/i915/gem: Don't try to map and fence large scanout buffers (v9) Vivek Kasireddy
@ 2022-03-06 0:13 ` Patchwork
2022-03-07 9:50 ` Tvrtko Ursulin
2022-03-06 0:15 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
5 siblings, 1 reply; 13+ messages in thread
From: Patchwork @ 2022-03-06 0:13 UTC (permalink / raw)
To: Vivek Kasireddy; +Cc: intel-gfx
== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
URL : https://patchwork.freedesktop.org/series/101076/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ea05608e3596 drm/mm: Add an iterator to optimally walk over holes for an allocation (v5)
-:157: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pos' - possible side-effects?
#157: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:157: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'mm' - possible side-effects?
#157: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:157: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'size' - possible side-effects?
#157: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:157: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'mode' - possible side-effects?
#157: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:157: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'mode' may be better as '(mode)' to avoid precedence issues
#157: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
total: 0 errors, 0 warnings, 5 checks, 114 lines checked
a751d6631079 drm/i915/gem: Don't try to map and fence large scanout buffers (v9)
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
2022-03-05 23:36 [Intel-gfx] [CI 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Vivek Kasireddy
` (2 preceding siblings ...)
2022-03-06 0:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Patchwork
@ 2022-03-06 0:15 ` Patchwork
2022-03-06 0:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-06 2:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
5 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2022-03-06 0:15 UTC (permalink / raw)
To: Vivek Kasireddy; +Cc: intel-gfx
== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
URL : https://patchwork.freedesktop.org/series/101076/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
2022-03-05 23:36 [Intel-gfx] [CI 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Vivek Kasireddy
` (3 preceding siblings ...)
2022-03-06 0:15 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2022-03-06 0:45 ` Patchwork
2022-03-06 2:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
5 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2022-03-06 0:45 UTC (permalink / raw)
To: Vivek Kasireddy; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 6261 bytes --]
== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
URL : https://patchwork.freedesktop.org/series/101076/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11330 -> Patchwork_22495
====================================================
Summary
-------
**WARNING**
Minor unknown changes coming with Patchwork_22495 need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22495, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/index.html
Participating hosts (48 -> 40)
------------------------------
Additional (1): fi-glk-dsi
Missing (9): shard-tglu fi-skl-guc shard-rkl fi-icl-u2 fi-bsw-cyan bat-rpls-2 shard-dg1 fi-bsw-nick fi-bdw-samus
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_22495:
### IGT changes ###
#### Warnings ####
* igt@i915_pm_rpm@module-reload:
- fi-tgl-1115g4: [INCOMPLETE][1] ([i915#1385]) -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/fi-tgl-1115g4/igt@i915_pm_rpm@module-reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/fi-tgl-1115g4/igt@i915_pm_rpm@module-reload.html
Known issues
------------
Here are the changes found in Patchwork_22495 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@query-info:
- fi-glk-dsi: NOTRUN -> [SKIP][3] ([fdo#109271]) +30 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/fi-glk-dsi/igt@amdgpu/amd_basic@query-info.html
* igt@gem_exec_suspend@basic-s3:
- fi-skl-6600u: NOTRUN -> [INCOMPLETE][4] ([i915#4547])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/fi-skl-6600u/igt@gem_exec_suspend@basic-s3.html
* igt@gem_huc_copy@huc-copy:
- fi-glk-dsi: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/fi-glk-dsi/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-glk-dsi: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/fi-glk-dsi/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@i915_module_load@reload:
- fi-tgl-1115g4: [PASS][7] -> [DMESG-WARN][8] ([i915#4002]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/fi-tgl-1115g4/igt@i915_module_load@reload.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/fi-tgl-1115g4/igt@i915_module_load@reload.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-glk-dsi: NOTRUN -> [SKIP][9] ([fdo#109271] / [fdo#111827]) +8 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/fi-glk-dsi/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-glk-dsi: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#533])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/fi-glk-dsi/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@runner@aborted:
- fi-skl-6600u: NOTRUN -> [FAIL][11] ([i915#2722] / [i915#4312])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/fi-skl-6600u/igt@runner@aborted.html
- fi-bdw-5557u: NOTRUN -> [FAIL][12] ([i915#2426] / [i915#4312])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/fi-bdw-5557u/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live@dmabuf:
- {fi-tgl-dsi}: [FAIL][13] -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/fi-tgl-dsi/igt@i915_selftest@live@dmabuf.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/fi-tgl-dsi/igt@i915_selftest@live@dmabuf.html
* igt@kms_busy@basic@modeset:
- {bat-adlp-6}: [DMESG-WARN][15] ([i915#3576]) -> [PASS][16] +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/bat-adlp-6/igt@kms_busy@basic@modeset.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/bat-adlp-6/igt@kms_busy@basic@modeset.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1385]: https://gitlab.freedesktop.org/drm/intel/issues/1385
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
[i915#4002]: https://gitlab.freedesktop.org/drm/intel/issues/4002
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Build changes
-------------
* Linux: CI_DRM_11330 -> Patchwork_22495
CI-20190529: 20190529
CI_DRM_11330: 68d8cd94c6eaa94aa6bae2e92efbd488523a1a1b @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6364: 3523fe577bc22e6512a8de7e60175c8f46cf61d2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22495: a751d6631079171dbec1ac56dfa083bb431f56aa @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
a751d6631079 drm/i915/gem: Don't try to map and fence large scanout buffers (v9)
ea05608e3596 drm/mm: Add an iterator to optimally walk over holes for an allocation (v5)
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/index.html
[-- Attachment #2: Type: text/html, Size: 7376 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
2022-03-05 23:36 [Intel-gfx] [CI 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Vivek Kasireddy
` (4 preceding siblings ...)
2022-03-06 0:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2022-03-06 2:03 ` Patchwork
5 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2022-03-06 2:03 UTC (permalink / raw)
To: Vivek Kasireddy; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30303 bytes --]
== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
URL : https://patchwork.freedesktop.org/series/101076/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11330_full -> Patchwork_22495_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_22495_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22495_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_22495_full:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@gt_heartbeat:
- shard-skl: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-skl6/igt@i915_selftest@live@gt_heartbeat.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl8/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_rotation_crc@primary-rotation-90:
- shard-kbl: [PASS][3] -> [INCOMPLETE][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-kbl3/igt@kms_rotation_crc@primary-rotation-90.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-kbl3/igt@kms_rotation_crc@primary-rotation-90.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75}:
- {shard-rkl}: NOTRUN -> [SKIP][5]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-rkl-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html
* igt@prime_mmap_coherency@ioctl-errors:
- {shard-dg1}: NOTRUN -> [SKIP][6]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-dg1-13/igt@prime_mmap_coherency@ioctl-errors.html
Known issues
------------
Here are the changes found in Patchwork_22495_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_sseu@invalid-sseu:
- shard-tglb: NOTRUN -> [SKIP][7] ([i915#280])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb1/igt@gem_ctx_sseu@invalid-sseu.html
* igt@gem_eio@kms:
- shard-tglb: [PASS][8] -> [FAIL][9] ([i915#232])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-tglb6/igt@gem_eio@kms.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb1/igt@gem_eio@kms.html
* igt@gem_exec_capture@pi@bcs0:
- shard-iclb: [PASS][10] -> [INCOMPLETE][11] ([i915#3371])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-iclb5/igt@gem_exec_capture@pi@bcs0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb5/igt@gem_exec_capture@pi@bcs0.html
* igt@gem_exec_capture@pi@rcs0:
- shard-skl: [PASS][12] -> [INCOMPLETE][13] ([i915#4547])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-skl7/igt@gem_exec_capture@pi@rcs0.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl9/igt@gem_exec_capture@pi@rcs0.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-kbl: [PASS][14] -> [FAIL][15] ([i915#2842])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-kbl1/igt@gem_exec_fair@basic-none-solo@rcs0.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-kbl7/igt@gem_exec_fair@basic-none-solo@rcs0.html
- shard-tglb: NOTRUN -> [FAIL][16] ([i915#2842])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb6/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-apl: [PASS][17] -> [FAIL][18] ([i915#2842])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-apl6/igt@gem_exec_fair@basic-none@vcs0.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-apl8/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][19] ([i915#2842])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb4/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-glk: [PASS][20] -> [FAIL][21] ([i915#2842]) +2 similar issues
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-glk9/igt@gem_exec_fair@basic-pace@vecs0.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-glk7/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_lmem_swapping@parallel-random:
- shard-apl: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#4613]) +1 similar issue
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-apl6/igt@gem_lmem_swapping@parallel-random.html
* igt@gem_lmem_swapping@smem-oom:
- shard-skl: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#4613]) +2 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl1/igt@gem_lmem_swapping@smem-oom.html
* igt@gem_pxp@reject-modify-context-protection-off-2:
- shard-tglb: NOTRUN -> [SKIP][24] ([i915#4270])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb1/igt@gem_pxp@reject-modify-context-protection-off-2.html
* igt@gem_render_copy@linear-to-vebox-y-tiled:
- shard-apl: NOTRUN -> [SKIP][25] ([fdo#109271]) +58 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-apl1/igt@gem_render_copy@linear-to-vebox-y-tiled.html
* igt@gem_render_copy@y-tiled-to-vebox-linear:
- shard-iclb: NOTRUN -> [SKIP][26] ([i915#768])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb7/igt@gem_render_copy@y-tiled-to-vebox-linear.html
* igt@gem_userptr_blits@input-checking:
- shard-glk: NOTRUN -> [DMESG-WARN][27] ([i915#4991])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-glk8/igt@gem_userptr_blits@input-checking.html
* igt@gen7_exec_parse@chained-batch:
- shard-tglb: NOTRUN -> [SKIP][28] ([fdo#109289])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb6/igt@gen7_exec_parse@chained-batch.html
* igt@gen9_exec_parse@batch-invalid-length:
- shard-tglb: NOTRUN -> [SKIP][29] ([i915#2527] / [i915#2856])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb1/igt@gen9_exec_parse@batch-invalid-length.html
* igt@gen9_exec_parse@unaligned-access:
- shard-iclb: NOTRUN -> [SKIP][30] ([i915#2856])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb7/igt@gen9_exec_parse@unaligned-access.html
* igt@i915_pm_dc@dc6-dpms:
- shard-iclb: [PASS][31] -> [FAIL][32] ([i915#454])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-iclb5/igt@i915_pm_dc@dc6-dpms.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_sseu@full-enable:
- shard-tglb: NOTRUN -> [SKIP][33] ([i915#4387])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb6/igt@i915_pm_sseu@full-enable.html
* igt@i915_query@query-topology-known-pci-ids:
- shard-iclb: NOTRUN -> [SKIP][34] ([fdo#109303])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb7/igt@i915_query@query-topology-known-pci-ids.html
* igt@i915_suspend@debugfs-reader:
- shard-kbl: [PASS][35] -> [DMESG-WARN][36] ([i915#180]) +1 similar issue
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-kbl6/igt@i915_suspend@debugfs-reader.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-kbl7/igt@i915_suspend@debugfs-reader.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [PASS][37] -> [DMESG-WARN][38] ([i915#180]) +2 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-apl6/igt@i915_suspend@sysfs-reader.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-apl7/igt@i915_suspend@sysfs-reader.html
* igt@kms_big_fb@linear-32bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][39] ([fdo#111614])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb6/igt@kms_big_fb@linear-32bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-180:
- shard-snb: [PASS][40] -> [SKIP][41] ([fdo#109271]) +1 similar issue
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-snb7/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-snb4/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-skl: NOTRUN -> [FAIL][42] ([i915#3743])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-tglb: [PASS][43] -> [FAIL][44] ([i915#3743])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-tglb2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-skl: NOTRUN -> [SKIP][45] ([fdo#109271] / [i915#3777]) +1 similar issue
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl9/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-tglb: NOTRUN -> [SKIP][46] ([fdo#111615]) +1 similar issue
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
- shard-glk: NOTRUN -> [SKIP][47] ([fdo#109271] / [i915#3886])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-glk8/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-a-missing-ccs-buffer-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][48] ([fdo#111615] / [i915#3689])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb1/igt@kms_ccs@pipe-a-missing-ccs-buffer-yf_tiled_ccs.html
* igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][49] ([i915#3689] / [i915#3886]) +2 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb6/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
- shard-iclb: NOTRUN -> [SKIP][50] ([fdo#109278] / [i915#3886]) +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb7/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][51] ([fdo#109271] / [i915#3886]) +1 similar issue
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-apl3/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- shard-skl: NOTRUN -> [SKIP][52] ([fdo#109271] / [i915#3886]) +7 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl3/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][53] ([i915#3689]) +1 similar issue
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb1/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs.html
* igt@kms_chamelium@dp-edid-change-during-suspend:
- shard-iclb: NOTRUN -> [SKIP][54] ([fdo#109284] / [fdo#111827]) +1 similar issue
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb7/igt@kms_chamelium@dp-edid-change-during-suspend.html
* igt@kms_chamelium@dp-hpd-storm-disable:
- shard-apl: NOTRUN -> [SKIP][55] ([fdo#109271] / [fdo#111827]) +4 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-apl7/igt@kms_chamelium@dp-hpd-storm-disable.html
* igt@kms_chamelium@hdmi-audio-edid:
- shard-tglb: NOTRUN -> [SKIP][56] ([fdo#109284] / [fdo#111827]) +2 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb1/igt@kms_chamelium@hdmi-audio-edid.html
* igt@kms_chamelium@vga-hpd-for-each-pipe:
- shard-skl: NOTRUN -> [SKIP][57] ([fdo#109271] / [fdo#111827]) +17 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl3/igt@kms_chamelium@vga-hpd-for-each-pipe.html
* igt@kms_content_protection@uevent:
- shard-iclb: NOTRUN -> [SKIP][58] ([fdo#109300] / [fdo#111066])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb7/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@pipe-a-cursor-512x512-random:
- shard-iclb: NOTRUN -> [SKIP][59] ([fdo#109278] / [fdo#109279])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb7/igt@kms_cursor_crc@pipe-a-cursor-512x512-random.html
* igt@kms_cursor_crc@pipe-b-cursor-32x10-random:
- shard-tglb: NOTRUN -> [SKIP][60] ([i915#3359])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb6/igt@kms_cursor_crc@pipe-b-cursor-32x10-random.html
* igt@kms_cursor_crc@pipe-c-cursor-512x512-rapid-movement:
- shard-tglb: NOTRUN -> [SKIP][61] ([fdo#109279] / [i915#3359]) +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb1/igt@kms_cursor_crc@pipe-c-cursor-512x512-rapid-movement.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions:
- shard-iclb: NOTRUN -> [SKIP][62] ([fdo#109274] / [fdo#109278])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb7/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-iclb: [PASS][63] -> [FAIL][64] ([i915#2346])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-iclb4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-tglb: [PASS][65] -> [FAIL][66] ([i915#2346] / [i915#533])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-tglb2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_display_modes@extended-mode-basic:
- shard-tglb: NOTRUN -> [SKIP][67] ([fdo#109274])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb1/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [PASS][68] -> [INCOMPLETE][69] ([i915#180] / [i915#1982])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-apl3/igt@kms_fbcon_fbt@fbc-suspend.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-apl8/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][70] -> [FAIL][71] ([i915#79])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-flip-vs-panning-interruptible:
- shard-tglb: NOTRUN -> [SKIP][72] ([fdo#109274] / [fdo#111825]) +1 similar issue
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb6/igt@kms_flip@2x-flip-vs-panning-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-skl: [PASS][73] -> [FAIL][74] ([i915#2122])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-skl7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl9/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
- shard-apl: NOTRUN -> [DMESG-WARN][75] ([i915#180]) +1 similar issue
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
- shard-tglb: NOTRUN -> [SKIP][76] ([i915#2587])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-tglb: NOTRUN -> [SKIP][77] ([fdo#109280] / [fdo#111825]) +15 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-gtt:
- shard-iclb: NOTRUN -> [SKIP][78] ([fdo#109280])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render:
- shard-glk: NOTRUN -> [SKIP][79] ([fdo#109271]) +15 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-glk8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: NOTRUN -> [FAIL][80] ([i915#1188])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl3/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-d:
- shard-skl: NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#533]) +1 similar issue
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl3/igt@kms_pipe_crc_basic@hang-read-crc-pipe-d.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
- shard-iclb: NOTRUN -> [SKIP][82] ([fdo#109278]) +3 similar issues
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb7/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
- shard-skl: NOTRUN -> [FAIL][83] ([fdo#108145] / [i915#265]) +2 similar issues
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html
- shard-apl: NOTRUN -> [FAIL][84] ([fdo#108145] / [i915#265])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb:
- shard-skl: NOTRUN -> [FAIL][85] ([i915#265])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][86] -> [FAIL][87] ([fdo#108145] / [i915#265]) +1 similar issue
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-skl: NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#658]) +2 similar issues
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl1/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr@psr2_no_drrs:
- shard-iclb: NOTRUN -> [SKIP][89] ([fdo#109441])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb7/igt@kms_psr@psr2_no_drrs.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-iclb: [PASS][90] -> [SKIP][91] ([fdo#109441])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-iclb6/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_psr@psr2_suspend:
- shard-tglb: NOTRUN -> [FAIL][92] ([i915#132] / [i915#3467]) +1 similar issue
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb6/igt@kms_psr@psr2_suspend.html
* igt@kms_scaling_modes@scaling-mode-none@edp-1-pipe-a:
- shard-skl: NOTRUN -> [SKIP][93] ([fdo#109271]) +187 similar issues
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl9/igt@kms_scaling_modes@scaling-mode-none@edp-1-pipe-a.html
* igt@kms_setmode@basic:
- shard-glk: [PASS][94] -> [FAIL][95] ([i915#31])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-glk7/igt@kms_setmode@basic.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-glk9/igt@kms_setmode@basic.html
* igt@kms_sysfs_edid_timing:
- shard-apl: NOTRUN -> [FAIL][96] ([IGT#2])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-apl7/igt@kms_sysfs_edid_timing.html
- shard-skl: NOTRUN -> [FAIL][97] ([IGT#2])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl6/igt@kms_sysfs_edid_timing.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-skl: NOTRUN -> [SKIP][98] ([fdo#109271] / [i915#2437])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl9/igt@kms_writeback@writeback-pixel-formats.html
* igt@prime_nv_api@nv_i915_reimport_twice_check_flink_name:
- shard-tglb: NOTRUN -> [SKIP][99] ([fdo#109291]) +1 similar issue
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb6/igt@prime_nv_api@nv_i915_reimport_twice_check_flink_name.html
* igt@sysfs_clients@pidname:
- shard-skl: NOTRUN -> [SKIP][100] ([fdo#109271] / [i915#2994])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl9/igt@sysfs_clients@pidname.html
* igt@sysfs_clients@sema-25:
- shard-tglb: NOTRUN -> [SKIP][101] ([i915#2994])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb1/igt@sysfs_clients@sema-25.html
* igt@sysfs_heartbeat_interval@mixed@vcs0:
- shard-skl: NOTRUN -> [WARN][102] ([i915#4055])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl1/igt@sysfs_heartbeat_interval@mixed@vcs0.html
* igt@sysfs_heartbeat_interval@mixed@vecs0:
- shard-skl: NOTRUN -> [FAIL][103] ([i915#1731])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-skl1/igt@sysfs_heartbeat_interval@mixed@vecs0.html
#### Possible fixes ####
* igt@fbdev@read:
- {shard-rkl}: [SKIP][104] ([i915#2582]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-rkl-5/igt@fbdev@read.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-rkl-6/igt@fbdev@read.html
* igt@gem_ctx_persistence@smoketest:
- shard-glk: [FAIL][106] -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-glk9/igt@gem_ctx_persistence@smoketest.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-glk8/igt@gem_ctx_persistence@smoketest.html
* igt@gem_eio@in-flight-10ms:
- shard-tglb: [TIMEOUT][108] ([i915#3063]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-tglb1/igt@gem_eio@in-flight-10ms.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb6/igt@gem_eio@in-flight-10ms.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [FAIL][110] ([i915#232]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-tglb8/igt@gem_eio@unwedge-stress.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb6/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_endless@dispatch@vcs1:
- {shard-tglu}: [INCOMPLETE][112] ([i915#3778]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-tglu-1/igt@gem_exec_endless@dispatch@vcs1.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglu-6/igt@gem_exec_endless@dispatch@vcs1.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [FAIL][114] ([i915#2842]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-apl8/igt@gem_exec_fair@basic-none-solo@rcs0.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-apl7/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl: [FAIL][116] ([i915#2842]) -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-kbl4/igt@gem_exec_fair@basic-none@vcs0.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-kbl6/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [FAIL][118] ([i915#2842]) -> [PASS][119]
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-tglb5/igt@gem_exec_fair@basic-pace-share@rcs0.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglb7/igt@gem_exec_fair@basic-pace-share@rcs0.html
- shard-glk: [FAIL][120] ([i915#2842]) -> [PASS][121]
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-glk3/igt@gem_exec_fair@basic-pace-share@rcs0.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fence@expired-history:
- {shard-rkl}: ([DMESG-WARN][122], [PASS][123]) -> [PASS][124]
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-rkl-5/igt@gem_exec_fence@expired-history.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-rkl-4/igt@gem_exec_fence@expired-history.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-rkl-6/igt@gem_exec_fence@expired-history.html
* igt@i915_pm_backlight@fade_with_dpms:
- {shard-rkl}: [SKIP][125] ([i915#3012]) -> [PASS][126]
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-rkl-5/igt@i915_pm_backlight@fade_with_dpms.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-rkl-6/igt@i915_pm_backlight@fade_with_dpms.html
* igt@i915_pm_dc@dc9-dpms:
- {shard-tglu}: [SKIP][127] ([i915#4281]) -> [PASS][128]
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-tglu-3/igt@i915_pm_dc@dc9-dpms.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-tglu-2/igt@i915_pm_dc@dc9-dpms.html
* igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_rc_ccs:
- {shard-rkl}: [SKIP][129] ([i915#1845] / [i915#4098]) -> [PASS][130] +1 similar issue
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-rkl-5/igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_rc_ccs.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-rkl-6/igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_rc_ccs.html
* igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs:
- {shard-rkl}: ([SKIP][131], [SKIP][132]) ([i915#1845] / [i915#4098]) -> [PASS][133] +1 similar issue
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-rkl-4/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-rkl-1/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-rkl-6/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs.html
* igt@kms_color@pipe-a-ctm-0-75:
- {shard-rkl}: [SKIP][134] ([i915#1149] / [i915#1849]) -> [PASS][135] +1 similar issue
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-rkl-5/igt@kms_color@pipe-a-ctm-0-75.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-rkl-6/igt@kms_color@pipe-a-ctm-0-75.html
* igt@kms_cursor_crc@pipe-a-cursor-256x256-offscreen:
- {shard-rkl}: [SKIP][136] ([fdo#112022]) -> [PASS][137] +3 similar issues
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-rkl-5/igt@kms_cursor_crc@pipe-a-cursor-256x256-offscreen.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/shard-rkl-6/igt@kms_cursor_crc@pipe-a-cursor-256x256-offscreen.html
* igt@kms_cursor_cr
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22495/index.html
[-- Attachment #2: Type: text/html, Size: 33603 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
2022-03-06 0:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Patchwork
@ 2022-03-07 9:50 ` Tvrtko Ursulin
0 siblings, 0 replies; 13+ messages in thread
From: Tvrtko Ursulin @ 2022-03-07 9:50 UTC (permalink / raw)
To: intel-gfx, Patchwork, Vivek Kasireddy
On 06/03/2022 00:13, Patchwork wrote:
> -:157: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'mode' may be better as '(mode)' to avoid precedence issues
> #157: FILE: include/drm/drm_mm.h:430:
> +#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
> + size, mode) \
> + for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
> + mode & ~DRM_MM_INSERT_ONCE); \
> + pos; \
> + pos = mode & DRM_MM_INSERT_ONCE ? \
> + NULL : __drm_mm_next_hole(mm, pos, size, \
> + mode & ~DRM_MM_INSERT_ONCE))
CI results are good I think but please do fix this warning.
Regards,
Tvrtko
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
2022-03-07 20:21 [Intel-gfx] [PATCH v6 0/2] " Vivek Kasireddy
@ 2022-03-07 20:56 ` Patchwork
0 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2022-03-07 20:56 UTC (permalink / raw)
To: Vivek Kasireddy; +Cc: intel-gfx
== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
URL : https://patchwork.freedesktop.org/series/101123/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
521ab4ad04ad drm/mm: Add an iterator to optimally walk over holes for an allocation (v6)
-:160: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pos' - possible side-effects?
#160: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ (mode) & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = (mode) & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ (mode) & ~DRM_MM_INSERT_ONCE))
-:160: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'mm' - possible side-effects?
#160: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ (mode) & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = (mode) & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ (mode) & ~DRM_MM_INSERT_ONCE))
-:160: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'size' - possible side-effects?
#160: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ (mode) & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = (mode) & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ (mode) & ~DRM_MM_INSERT_ONCE))
-:160: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'mode' - possible side-effects?
#160: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ (mode) & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = (mode) & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, pos, size, \
+ (mode) & ~DRM_MM_INSERT_ONCE))
total: 0 errors, 0 warnings, 4 checks, 114 lines checked
eccd97c3fed3 drm/i915/gem: Don't try to map and fence large scanout buffers (v9)
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Intel-gfx] [CI 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v5)
2022-03-05 23:36 ` [Intel-gfx] [CI 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v5) Vivek Kasireddy
@ 2022-03-10 13:03 ` Tvrtko Ursulin
0 siblings, 0 replies; 13+ messages in thread
From: Tvrtko Ursulin @ 2022-03-10 13:03 UTC (permalink / raw)
To: Dave Airlie, Daniel Vetter; +Cc: intel-gfx, dri-devel
On 05/03/2022 23:36, Vivek Kasireddy wrote:
> This iterator relies on drm_mm_first_hole() and drm_mm_next_hole()
> functions to identify suitable holes for an allocation of a given
> size by efficiently traversing the rbtree associated with the given
> allocator.
>
> It replaces the for loop in drm_mm_insert_node_in_range() and can
> also be used by drm drivers to quickly identify holes of a certain
> size within a given range.
>
> v2: (Tvrtko)
> - Prepend a double underscore for the newly exported first/next_hole
> - s/each_best_hole/each_suitable_hole/g
> - Mask out DRM_MM_INSERT_ONCE from the mode before calling
> first/next_hole and elsewhere.
>
> v3: (Tvrtko)
> - Reduce the number of hunks by retaining the "mode" variable name
>
> v4:
> - Typo: s/__drm_mm_next_hole(.., hole/__drm_mm_next_hole(.., pos
>
> v5: (Tvrtko)
> - Fixed another typo: should pass caller_mode instead of mode to
> the iterator in drm_mm_insert_node_in_range().
>
> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Acked-by: Christian König <christian.koenig@amd.com>
> Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com>
Are we okay to merge this via drm-intel-gt-next? I haven't spotted any
in progress patches touching this area so should be conflict free.
Regards,
Tvrtko
> ---
> drivers/gpu/drm/drm_mm.c | 32 +++++++++++++++-----------------
> include/drm/drm_mm.h | 36 ++++++++++++++++++++++++++++++++++++
> 2 files changed, 51 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
> index 8257f9d4f619..6ff98a0e4df3 100644
> --- a/drivers/gpu/drm/drm_mm.c
> +++ b/drivers/gpu/drm/drm_mm.c
> @@ -352,10 +352,10 @@ static struct drm_mm_node *find_hole_addr(struct drm_mm *mm, u64 addr, u64 size)
> return node;
> }
>
> -static struct drm_mm_node *
> -first_hole(struct drm_mm *mm,
> - u64 start, u64 end, u64 size,
> - enum drm_mm_insert_mode mode)
> +struct drm_mm_node *
> +__drm_mm_first_hole(struct drm_mm *mm,
> + u64 start, u64 end, u64 size,
> + enum drm_mm_insert_mode mode)
> {
> switch (mode) {
> default:
> @@ -374,6 +374,7 @@ first_hole(struct drm_mm *mm,
> hole_stack);
> }
> }
> +EXPORT_SYMBOL(__drm_mm_first_hole);
>
> /**
> * DECLARE_NEXT_HOLE_ADDR - macro to declare next hole functions
> @@ -410,11 +411,11 @@ static struct drm_mm_node *name(struct drm_mm_node *entry, u64 size) \
> DECLARE_NEXT_HOLE_ADDR(next_hole_high_addr, rb_left, rb_right)
> DECLARE_NEXT_HOLE_ADDR(next_hole_low_addr, rb_right, rb_left)
>
> -static struct drm_mm_node *
> -next_hole(struct drm_mm *mm,
> - struct drm_mm_node *node,
> - u64 size,
> - enum drm_mm_insert_mode mode)
> +struct drm_mm_node *
> +__drm_mm_next_hole(struct drm_mm *mm,
> + struct drm_mm_node *node,
> + u64 size,
> + enum drm_mm_insert_mode mode)
> {
> switch (mode) {
> default:
> @@ -432,6 +433,7 @@ next_hole(struct drm_mm *mm,
> return &node->hole_stack == &mm->hole_stack ? NULL : node;
> }
> }
> +EXPORT_SYMBOL(__drm_mm_next_hole);
>
> /**
> * drm_mm_reserve_node - insert an pre-initialized node
> @@ -516,11 +518,11 @@ int drm_mm_insert_node_in_range(struct drm_mm * const mm,
> u64 size, u64 alignment,
> unsigned long color,
> u64 range_start, u64 range_end,
> - enum drm_mm_insert_mode mode)
> + enum drm_mm_insert_mode caller_mode)
> {
> struct drm_mm_node *hole;
> u64 remainder_mask;
> - bool once;
> + enum drm_mm_insert_mode mode = caller_mode & ~DRM_MM_INSERT_ONCE;
>
> DRM_MM_BUG_ON(range_start > range_end);
>
> @@ -533,13 +535,9 @@ int drm_mm_insert_node_in_range(struct drm_mm * const mm,
> if (alignment <= 1)
> alignment = 0;
>
> - once = mode & DRM_MM_INSERT_ONCE;
> - mode &= ~DRM_MM_INSERT_ONCE;
> -
> remainder_mask = is_power_of_2(alignment) ? alignment - 1 : 0;
> - for (hole = first_hole(mm, range_start, range_end, size, mode);
> - hole;
> - hole = once ? NULL : next_hole(mm, hole, size, mode)) {
> + drm_mm_for_each_suitable_hole(hole, mm, range_start, range_end,
> + size, caller_mode) {
> u64 hole_start = __drm_mm_hole_node_start(hole);
> u64 hole_end = hole_start + hole->hole_size;
> u64 adj_start, adj_end;
> diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h
> index ac33ba1b18bc..dff6db627807 100644
> --- a/include/drm/drm_mm.h
> +++ b/include/drm/drm_mm.h
> @@ -400,6 +400,42 @@ static inline u64 drm_mm_hole_node_end(const struct drm_mm_node *hole_node)
> 1 : 0; \
> pos = list_next_entry(pos, hole_stack))
>
> +struct drm_mm_node *
> +__drm_mm_first_hole(struct drm_mm *mm,
> + u64 start, u64 end, u64 size,
> + enum drm_mm_insert_mode mode);
> +
> +struct drm_mm_node *
> +__drm_mm_next_hole(struct drm_mm *mm,
> + struct drm_mm_node *node,
> + u64 size,
> + enum drm_mm_insert_mode mode);
> +
> +/**
> + * drm_mm_for_each_suitable_hole - iterator to optimally walk over all
> + * holes that can fit an allocation of the given @size.
> + * @pos: &drm_mm_node used internally to track progress
> + * @mm: &drm_mm allocator to walk
> + * @range_start: start of the allowed range for the allocation
> + * @range_end: end of the allowed range for the allocation
> + * @size: size of the allocation
> + * @mode: fine-tune the allocation search
> + *
> + * This iterator walks over all holes suitable for the allocation of given
> + * @size in a very efficient manner. It is implemented by calling
> + * drm_mm_first_hole() and drm_mm_next_hole() which identify the
> + * appropriate holes within the given range by efficiently traversing the
> + * rbtree associated with @mm.
> + */
> +#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
> + size, mode) \
> + for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
> + mode & ~DRM_MM_INSERT_ONCE); \
> + pos; \
> + pos = mode & DRM_MM_INSERT_ONCE ? \
> + NULL : __drm_mm_next_hole(mm, pos, size, \
> + mode & ~DRM_MM_INSERT_ONCE))
> +
> /*
> * Basic range manager support (drm_mm.c)
> */
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2022-03-10 13:03 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-03-05 23:36 [Intel-gfx] [CI 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Vivek Kasireddy
2022-03-05 23:36 ` [Intel-gfx] [CI 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v5) Vivek Kasireddy
2022-03-10 13:03 ` Tvrtko Ursulin
2022-03-05 23:36 ` [Intel-gfx] [CI 2/2] drm/i915/gem: Don't try to map and fence large scanout buffers (v9) Vivek Kasireddy
2022-03-06 0:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Patchwork
2022-03-07 9:50 ` Tvrtko Ursulin
2022-03-06 0:15 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-06 0:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-06 2:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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2022-03-07 20:21 [Intel-gfx] [PATCH v6 0/2] " Vivek Kasireddy
2022-03-07 20:56 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2022-02-28 19:04 [Intel-gfx] [CI 0/2] " Vivek Kasireddy
2022-02-28 23:57 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2022-02-27 17:29 [Intel-gfx] [CI 0/2] " Vivek Kasireddy
2022-02-27 17:57 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2022-02-14 23:56 [Intel-gfx] [PATCH 0/2] " Vivek Kasireddy
2022-02-16 3:16 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
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