Re: [PATCH v9 4/8] drm/i915/dsb: Set DSB_SKIP_WAITS_EN chicken bit for LunarLake and onwards

["Hogander, Jouni" <jouni.hogander@intel.com>]

On Fri, 2026-01-23 at 10:11 +0530, Nautiyal, Ankit K wrote:
> 
> On 12/23/2025 4:21 PM, Jouni Högander wrote:
> > On LunarLake we are using TRANS_PUSH mechanism to trigger "Frame
> > Change"
> > event. This way we have more control on when PSR HW is woken up.
> > I.e. not
> > every display register write is triggering sending update. This
> > allows us
> > setting DSB_SKIP_WAITS_EN chicken bit as well.
> > 
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >   drivers/gpu/drm/i915/display/intel_dsb.c | 15 +++++++++++----
> >   1 file changed, 11 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> > b/drivers/gpu/drm/i915/display/intel_dsb.c
> > index ec2a3fb171ab..19a99f82f413 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> > @@ -17,6 +17,7 @@
> >   #include "intel_dsb.h"
> >   #include "intel_dsb_buffer.h"
> >   #include "intel_dsb_regs.h"
> > +#include "intel_psr.h"
> >   #include "intel_vblank.h"
> >   #include "intel_vrr.h"
> >   #include "skl_watermark.h"
> > @@ -166,18 +167,24 @@ static int dsb_scanline_to_hw(struct
> > intel_atomic_state *state,
> >    * definitely do not want to skip vblank wait. We also have
> > concern what comes
> >    * to skipping vblank evasion. I.e. arming registers are latched
> > before we have
> >    * managed writing them. Due to these reasons we are not setting
> > - * DSB_SKIP_WAITS_EN.
> > + * DSB_SKIP_WAITS_EN except when using TRANS_PUSH mechanism to
> > trigger
> > + * "frame change" event.
> >    */
> >   static u32 dsb_chicken(struct intel_atomic_state *state,
> >   		       struct intel_crtc *crtc)
> >   {
> > +	const struct intel_crtc_state *new_crtc_state =
> > +		intel_atomic_get_new_crtc_state(state, crtc);
> > +	u32 chicken = intel_psr_use_trans_push(new_crtc_state) ?
> > +		DSB_SKIP_WAITS_EN : 0;
> 
> 
> I have a query regarding Panel Replay. Let's say Panel Replay is
> enabled.
> 
> crtc_state->has_psr will be set for Panel Replay as well so 
> DSB_SKIP_WAITS_EN bit gets set.
> 
> As per the bspec: "When set, this will enable the DSB to jump from
> WAIT 
> for Vblank, wait for scanline number, in range and out of range
> states 
> to IDLE state when PSR and PSR2 is entered."
> 
> When it says "PSR and PSR2 is entered", does this apply to Panel
> Replay 
> as well? Meaning in case of Panel Replay will the wait be skipped?

Wait will be skipped for PR as we based on my experiments.

BR,

Jouni Högander

> 
> 
> Regards,
> 
> Ankit
> 
> > +
> >   	if (pre_commit_is_vrr_active(state, crtc))
> > -		return DSB_CTRL_WAIT_SAFE_WINDOW |
> > +		chicken |= DSB_CTRL_WAIT_SAFE_WINDOW |
> >   			DSB_CTRL_NO_WAIT_VBLANK |
> >   			DSB_INST_WAIT_SAFE_WINDOW |
> >   			DSB_INST_NO_WAIT_VBLANK;
> > -	else
> > -		return 0;
> > +
> > +	return chicken;
> >   }
> >   
> >   static bool assert_dsb_has_room(struct intel_dsb *dsb)