* [PATCH v9 0/8] Use trans push mechanism to generate frame change event
@ 2025-12-23 10:51 Jouni Högander
2025-12-23 10:51 ` [PATCH v9 1/8] drm/i915/psr: Add TRANS_PUSH register bit definition for PSR Jouni Högander
` (9 more replies)
0 siblings, 10 replies; 21+ messages in thread
From: Jouni Högander @ 2025-12-23 10:51 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jouni Högander
Currently we are using "automatic" frame change event generation. The
event is generated by any access to plane or pipe registers.
We have option to use "PSR PR Frame Change Enable" bit in TRANS_PUSH
register to enable frame change event generation only when doing trans
push. When this bit is set "automatic" frame change event generation
doesn't work anymore. Benfit from this is more controled updates send
by PSR HW.
This patch set is taking trans push mechanism into use.
v9: always do PSR exit on frontbuffer flush for LunarLake and onwards
v8:
- rebase
- Wait for idle only after possible send
v7:
- added bspec references
- add HAS_PSR_FRAME_CHANGE macro
- use TRANS_PUSH in instead of TRAN_VRR_CTL
- "Do not trigger Frame Change events from frontbuffer flush" patch
already merged
v6: use AND instead of OR in intel_psr_use_trans_push
v5: add missing patch
v4:
- add intel_psr_use_trans_push to query if TRANS_PUSH is used
- set DSB_SKIP_WAITS_EN chicken bit when TRANS_PUSH is used
- Wait for vblank in case of PSR is using trans push
v3:
- use rmw when enabling disabling transh push for PSR or VRR
- rely on crtc_state->has_psr/has_vrr to keep trans push enabled
- modify frontbuffer flush/invalidate to use disable/enable also for
SU/SF on recent platforms.
- send push before waiting for vblank
v2: implement intel_vrr_trans_push_enabled_set_clear and use that
instead of rmw
Jouni Högander (8):
drm/i915/psr: Add TRANS_PUSH register bit definition for PSR
drm/i915/psr: Add intel_psr_use_trans_push to query if TRANS_PUSH is
used
drm/i915/vrr: Prepare to Use TRANS_PUSH mechanism for PSR frame change
drm/i915/dsb: Set DSB_SKIP_WAITS_EN chicken bit for LunarLake and
onwards
drm/i915/display: Wait for vblank in case of PSR is using trans push
drm/i915/psr: Wait for idle only after possible send push
drm/i915/psr: Do PSR exit on frontbuffer flush on LunarLake and
onwards
drm/i915/psr: Use TRANS_PUSH to trigger frame change event
drivers/gpu/drm/i915/display/intel_crtc.c | 4 +-
drivers/gpu/drm/i915/display/intel_display.c | 33 ++++++++++++++--
drivers/gpu/drm/i915/display/intel_dsb.c | 15 ++++++--
drivers/gpu/drm/i915/display/intel_psr.c | 38 +++++++++++++------
drivers/gpu/drm/i915/display/intel_psr.h | 1 +
drivers/gpu/drm/i915/display/intel_vrr.c | 29 +++++++++++---
drivers/gpu/drm/i915/display/intel_vrr.h | 1 +
drivers/gpu/drm/i915/display/intel_vrr_regs.h | 1 +
8 files changed, 96 insertions(+), 26 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v9 1/8] drm/i915/psr: Add TRANS_PUSH register bit definition for PSR
2025-12-23 10:51 [PATCH v9 0/8] Use trans push mechanism to generate frame change event Jouni Högander
@ 2025-12-23 10:51 ` Jouni Högander
2025-12-23 10:51 ` [PATCH v9 2/8] drm/i915/psr: Add intel_psr_use_trans_push to query if TRANS_PUSH is used Jouni Högander
` (8 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: Jouni Högander @ 2025-12-23 10:51 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jouni Högander, Ankit Nautiyal
Add TRANS_PUSH register bit LNL_TRANS_PUSH_PSR_PR_EN definition for PSR
usage.
v2: add bspec reference
Bspec: 69984
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr_regs.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr_regs.h b/drivers/gpu/drm/i915/display/intel_vrr_regs.h
index ba9b9215dc11..a67b2eb125ce 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr_regs.h
@@ -97,6 +97,7 @@
#define TRANS_PUSH(display, trans) _MMIO_TRANS2((display), (trans), _TRANS_PUSH_A)
#define TRANS_PUSH_EN REG_BIT(31)
#define TRANS_PUSH_SEND REG_BIT(30)
+#define LNL_TRANS_PUSH_PSR_PR_EN REG_BIT(16)
#define _TRANS_VRR_VSYNC_A 0x60078
#define TRANS_VRR_VSYNC(display, trans) _MMIO_TRANS2((display), (trans), _TRANS_VRR_VSYNC_A)
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v9 2/8] drm/i915/psr: Add intel_psr_use_trans_push to query if TRANS_PUSH is used
2025-12-23 10:51 [PATCH v9 0/8] Use trans push mechanism to generate frame change event Jouni Högander
2025-12-23 10:51 ` [PATCH v9 1/8] drm/i915/psr: Add TRANS_PUSH register bit definition for PSR Jouni Högander
@ 2025-12-23 10:51 ` Jouni Högander
2025-12-23 10:51 ` [PATCH v9 3/8] drm/i915/vrr: Prepare to Use TRANS_PUSH mechanism for PSR frame change Jouni Högander
` (7 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: Jouni Högander @ 2025-12-23 10:51 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jouni Högander
This is a preparation to start using trans push as a PSR "Frame Change"
event. It adds intel_psr_use_trans_push placeholder which return false for
now until we have everything in place.
v2:
- modify commit message
- add TODO
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 ++++++
drivers/gpu/drm/i915/display/intel_psr.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 91f4ac86c7ad..170d65999ccd 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -4557,3 +4557,9 @@ int intel_psr_min_guardband(struct intel_crtc_state *crtc_state)
return psr_min_guardband;
}
+
+bool intel_psr_use_trans_push(const struct intel_crtc_state *crtc_state)
+{
+ /* TODO: Enable using trans push when everything is in place */
+ return false;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index b41dc4d44ff2..394b641840b3 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -85,5 +85,6 @@ bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
void intel_psr_compute_config_late(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state);
int intel_psr_min_guardband(struct intel_crtc_state *crtc_state);
+bool intel_psr_use_trans_push(const struct intel_crtc_state *crtc_state);
#endif /* __INTEL_PSR_H__ */
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v9 3/8] drm/i915/vrr: Prepare to Use TRANS_PUSH mechanism for PSR frame change
2025-12-23 10:51 [PATCH v9 0/8] Use trans push mechanism to generate frame change event Jouni Högander
2025-12-23 10:51 ` [PATCH v9 1/8] drm/i915/psr: Add TRANS_PUSH register bit definition for PSR Jouni Högander
2025-12-23 10:51 ` [PATCH v9 2/8] drm/i915/psr: Add intel_psr_use_trans_push to query if TRANS_PUSH is used Jouni Högander
@ 2025-12-23 10:51 ` Jouni Högander
2026-01-22 11:04 ` Nautiyal, Ankit K
2025-12-23 10:51 ` [PATCH v9 4/8] drm/i915/dsb: Set DSB_SKIP_WAITS_EN chicken bit for LunarLake and onwards Jouni Högander
` (6 subsequent siblings)
9 siblings, 1 reply; 21+ messages in thread
From: Jouni Högander @ 2025-12-23 10:51 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jouni Högander
On Lunarlake and onwards it is possible to generate PSR "frame change"
event using TRANS_PUSH mechanism. Implement function to enable this and
take PSR into account in intel_vrr_send_push.
v6:
- add HAS_PSR_FRAME_CHANGE macro
- use TRANS_PUSH in instead of TRAN_VRR_CTL
v5: use intel_psr_use_trans_push for intel_vrr_psr_frame_change_enable
v4:
- use rmw when enabling/disabling transcoder
- set TRANS_PUSH_EN conditionally in intel_vrr_send_push
- do not call intel_vrr_send_push from intel_psr_trigger_frame_change
- do not enable using TRANS_PUSH mechanism for PSR "Frame Change"
v3:
- use rmw when enabling/disabling
- keep LNL_TRANS_PUSH_PSR_PR_EN set always on LunarLake and onwards
v2: use intel_vrr_trans_push_enabled_set_clear instead of rmw
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_crtc.c | 4 +++-
drivers/gpu/drm/i915/display/intel_psr.c | 13 +++++++---
drivers/gpu/drm/i915/display/intel_vrr.c | 29 ++++++++++++++++++-----
drivers/gpu/drm/i915/display/intel_vrr.h | 1 +
4 files changed, 37 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 778ebc5095c3..ed3c6c4ce025 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -747,7 +747,9 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
* which would cause the next frame to terminate already at vmin
* vblank start instead of vmax vblank start.
*/
- if (!state->base.legacy_cursor_update)
+ if (!state->base.legacy_cursor_update ||
+ (intel_psr_use_trans_push(new_crtc_state) &&
+ !new_crtc_state->vrr.enable))
intel_vrr_send_push(NULL, new_crtc_state);
local_irq_enable();
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 170d65999ccd..4336ba188aa7 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -207,6 +207,8 @@
#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
(intel_dp)->psr.source_support)
+#define HAS_PSR_FRAME_CHANGE(display) (DISPLAY_VER(display) >= 20)
+
bool intel_encoder_can_psr(struct intel_encoder *encoder)
{
if (intel_encoder_is_dp(encoder) || encoder->type == INTEL_OUTPUT_DP_MST)
@@ -2120,6 +2122,9 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
intel_dmc_block_pkgc(display, intel_dp->psr.pipe, true);
intel_alpm_configure(intel_dp, crtc_state);
+
+ if (intel_psr_use_trans_push(crtc_state))
+ intel_vrr_psr_frame_change_enable(crtc_state);
}
static bool psr_interrupt_error_check(struct intel_dp *intel_dp)
@@ -2511,9 +2516,11 @@ void intel_psr_trigger_frame_change_event(struct intel_dsb *dsb,
intel_pre_commit_crtc_state(state, crtc);
struct intel_display *display = to_intel_display(crtc);
- if (crtc_state->has_psr)
- intel_de_write_dsb(display, dsb,
- CURSURFLIVE(display, crtc->pipe), 0);
+ if (!crtc_state->has_psr || HAS_PSR_FRAME_CHANGE(display))
+ return;
+
+ intel_de_write_dsb(display, dsb,
+ CURSURFLIVE(display, crtc->pipe), 0);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index b92c42fde937..aaf0f6cf3cfe 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -584,16 +584,23 @@ void intel_vrr_send_push(struct intel_dsb *dsb,
{
struct intel_display *display = to_intel_display(crtc_state);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u32 trans_push;
- if (!crtc_state->vrr.enable)
+ if (!crtc_state->vrr.enable && !intel_psr_use_trans_push(crtc_state))
return;
if (dsb)
intel_dsb_nonpost_start(dsb);
- intel_de_write_dsb(display, dsb,
- TRANS_PUSH(display, cpu_transcoder),
- TRANS_PUSH_EN | TRANS_PUSH_SEND);
+ trans_push = TRANS_PUSH_SEND;
+
+ if (crtc_state->vrr.enable)
+ trans_push |= TRANS_PUSH_EN;
+ if (intel_psr_use_trans_push(crtc_state))
+ trans_push |= LNL_TRANS_PUSH_PSR_PR_EN;
+
+ intel_de_write_dsb(display, dsb, TRANS_PUSH(display, cpu_transcoder),
+ trans_push);
if (dsb)
intel_dsb_nonpost_end(dsb);
@@ -693,7 +700,7 @@ static void intel_vrr_tg_enable(const struct intel_crtc_state *crtc_state,
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
u32 vrr_ctl;
- intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), TRANS_PUSH_EN);
+ intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder), 0, TRANS_PUSH_EN);
vrr_ctl = VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state);
@@ -721,7 +728,8 @@ static void intel_vrr_tg_disable(const struct intel_crtc_state *old_crtc_state)
VRR_STATUS_VRR_EN_LIVE, 1000))
drm_err(display->drm, "Timed out waiting for VRR live status to clear\n");
- intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);
+ intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder),
+ TRANS_PUSH_EN, 0);
}
void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
@@ -737,6 +745,15 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
intel_vrr_tg_enable(crtc_state, crtc_state->cmrr.enable);
}
+void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+
+ intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder), 0,
+ LNL_TRANS_PUSH_PSR_PR_EN);
+}
+
void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
{
struct intel_display *display = to_intel_display(old_crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index bc9044621635..4dc5bb3f6f28 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -30,6 +30,7 @@ void intel_vrr_check_push_sent(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state);
bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state);
void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state);
+void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state *crtc_state);
void intel_vrr_get_config(struct intel_crtc_state *crtc_state);
int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state);
int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state);
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v9 4/8] drm/i915/dsb: Set DSB_SKIP_WAITS_EN chicken bit for LunarLake and onwards
2025-12-23 10:51 [PATCH v9 0/8] Use trans push mechanism to generate frame change event Jouni Högander
` (2 preceding siblings ...)
2025-12-23 10:51 ` [PATCH v9 3/8] drm/i915/vrr: Prepare to Use TRANS_PUSH mechanism for PSR frame change Jouni Högander
@ 2025-12-23 10:51 ` Jouni Högander
2026-01-23 4:41 ` Nautiyal, Ankit K
2025-12-23 10:51 ` [PATCH v9 5/8] drm/i915/display: Wait for vblank in case of PSR is using trans push Jouni Högander
` (5 subsequent siblings)
9 siblings, 1 reply; 21+ messages in thread
From: Jouni Högander @ 2025-12-23 10:51 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jouni Högander
On LunarLake we are using TRANS_PUSH mechanism to trigger "Frame Change"
event. This way we have more control on when PSR HW is woken up. I.e. not
every display register write is triggering sending update. This allows us
setting DSB_SKIP_WAITS_EN chicken bit as well.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_dsb.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index ec2a3fb171ab..19a99f82f413 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -17,6 +17,7 @@
#include "intel_dsb.h"
#include "intel_dsb_buffer.h"
#include "intel_dsb_regs.h"
+#include "intel_psr.h"
#include "intel_vblank.h"
#include "intel_vrr.h"
#include "skl_watermark.h"
@@ -166,18 +167,24 @@ static int dsb_scanline_to_hw(struct intel_atomic_state *state,
* definitely do not want to skip vblank wait. We also have concern what comes
* to skipping vblank evasion. I.e. arming registers are latched before we have
* managed writing them. Due to these reasons we are not setting
- * DSB_SKIP_WAITS_EN.
+ * DSB_SKIP_WAITS_EN except when using TRANS_PUSH mechanism to trigger
+ * "frame change" event.
*/
static u32 dsb_chicken(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ const struct intel_crtc_state *new_crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
+ u32 chicken = intel_psr_use_trans_push(new_crtc_state) ?
+ DSB_SKIP_WAITS_EN : 0;
+
if (pre_commit_is_vrr_active(state, crtc))
- return DSB_CTRL_WAIT_SAFE_WINDOW |
+ chicken |= DSB_CTRL_WAIT_SAFE_WINDOW |
DSB_CTRL_NO_WAIT_VBLANK |
DSB_INST_WAIT_SAFE_WINDOW |
DSB_INST_NO_WAIT_VBLANK;
- else
- return 0;
+
+ return chicken;
}
static bool assert_dsb_has_room(struct intel_dsb *dsb)
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v9 5/8] drm/i915/display: Wait for vblank in case of PSR is using trans push
2025-12-23 10:51 [PATCH v9 0/8] Use trans push mechanism to generate frame change event Jouni Högander
` (3 preceding siblings ...)
2025-12-23 10:51 ` [PATCH v9 4/8] drm/i915/dsb: Set DSB_SKIP_WAITS_EN chicken bit for LunarLake and onwards Jouni Högander
@ 2025-12-23 10:51 ` Jouni Högander
2025-12-23 10:51 ` [PATCH v9 6/8] drm/i915/psr: Wait for idle only after possible send push Jouni Högander
` (4 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: Jouni Högander @ 2025-12-23 10:51 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jouni Högander
In case PSR uses trans push as a "frame change" event and we need to wait
vblank after triggering PSR "frame change" event. Otherwise we may miss
selective updates.
DSB skips all waits while PSR is active. Check push send is skipped as well
because trans push send bit is not clearn by the HW if VRR is not enabled
-> we may start configuring new selective update while previous is not
complete. Avoid this by waiting for vblank after sending trans push.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1e3c5761fc5e..c7ca4f53b8b8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7366,9 +7366,27 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
new_crtc_state->dsb_color);
if (new_crtc_state->use_dsb && !intel_color_uses_chained_dsb(new_crtc_state)) {
- intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
+ /*
+ * Dsb wait vblank may or may not skip. Let's remove it for PSR
+ * trans push case to ensure we are not waiting two vblanks
+ */
+ if (!intel_psr_use_trans_push(new_crtc_state))
+ intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
intel_vrr_send_push(new_crtc_state->dsb_commit, new_crtc_state);
+
+ /*
+ * In case PSR uses trans push as a "frame change" event and
+ * VRR is not in use we need to wait vblank. Othervise we may
+ * miss selective updates. DSB skips all waits while PSR is
+ * active. Check push send is skipped as well because trans push
+ * send bit is not clearn by the HW if VRR is not enabled -> we
+ * may start configuring new selective update while previous is
+ * not complete.
+ */
+ if (intel_psr_use_trans_push(new_crtc_state))
+ intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
+
intel_dsb_wait_for_delayed_vblank(state, new_crtc_state->dsb_commit);
intel_vrr_check_push_sent(new_crtc_state->dsb_commit,
new_crtc_state);
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v9 6/8] drm/i915/psr: Wait for idle only after possible send push
2025-12-23 10:51 [PATCH v9 0/8] Use trans push mechanism to generate frame change event Jouni Högander
` (4 preceding siblings ...)
2025-12-23 10:51 ` [PATCH v9 5/8] drm/i915/display: Wait for vblank in case of PSR is using trans push Jouni Högander
@ 2025-12-23 10:51 ` Jouni Högander
2026-01-23 5:12 ` Nautiyal, Ankit K
2025-12-23 10:51 ` [PATCH v9 7/8] drm/i915/psr: Do PSR exit on frontbuffer flush on LunarLake and onwards Jouni Högander
` (3 subsequent siblings)
9 siblings, 1 reply; 21+ messages in thread
From: Jouni Högander @ 2025-12-23 10:51 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jouni Högander
We are planning to move using trans push mechanism to trigger the Frame
Change event. in that case we can't wait PSR to idle before send push
happens. Due to this move wait for idle to be done after possible send push
is done.
This should be ok for Frame Change event triggered by register write as
well. Wait for idle is needed only for corner case where PSR is
transitioning into DEEP_SLEEP when Frame Change event is triggered. It just
has to be before wait for vblank. Otherwise we may have vblank before PSR
enters DEEP_SLEEP and still using old frame buffers for first frame after
wake up.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index c7ca4f53b8b8..1aca4802b7d5 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7333,9 +7333,6 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
intel_psr_trigger_frame_change_event(new_crtc_state->dsb_commit,
state, crtc);
- intel_psr_wait_for_idle_dsb(new_crtc_state->dsb_commit,
- new_crtc_state);
-
if (new_crtc_state->use_dsb)
intel_dsb_vblank_evade(state, new_crtc_state->dsb_commit);
@@ -7375,6 +7372,16 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
intel_vrr_send_push(new_crtc_state->dsb_commit, new_crtc_state);
+ /*
+ * Wait for idle is needed for corner case where PSR HW
+ * is transitioning into DEEP_SLEEP/SRDENT_OFF when
+ * new Frame Change event comes in. It is ok to do it
+ * here for both Frame Change mecanisms (trans push
+ * and register write).
+ */
+ intel_psr_wait_for_idle_dsb(new_crtc_state->dsb_commit,
+ new_crtc_state);
+
/*
* In case PSR uses trans push as a "frame change" event and
* VRR is not in use we need to wait vblank. Othervise we may
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v9 7/8] drm/i915/psr: Do PSR exit on frontbuffer flush on LunarLake and onwards
2025-12-23 10:51 [PATCH v9 0/8] Use trans push mechanism to generate frame change event Jouni Högander
` (5 preceding siblings ...)
2025-12-23 10:51 ` [PATCH v9 6/8] drm/i915/psr: Wait for idle only after possible send push Jouni Högander
@ 2025-12-23 10:51 ` Jouni Högander
2026-01-23 6:18 ` Nautiyal, Ankit K
2025-12-23 10:51 ` [PATCH v9 8/8] drm/i915/psr: Use TRANS_PUSH to trigger frame change event Jouni Högander
` (2 subsequent siblings)
9 siblings, 1 reply; 21+ messages in thread
From: Jouni Högander @ 2025-12-23 10:51 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jouni Högander
We need to use intel_psr_exit in frontbuffer flush on LunarLake and
onwardsif we want to move using trans push mechanism to trigger Frame
Change event.
Keep PSR1 and PSR2 HW tracking as it is for older platforms as this was
seen causing problems there.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 18 ++++++++++--------
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 4336ba188aa7..ee70d0ceeb5b 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3559,7 +3559,14 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
{
struct intel_display *display = to_intel_display(intel_dp);
- if (DISPLAY_VER(display) < 20 && intel_dp->psr.psr2_sel_fetch_enabled) {
+ if (DISPLAY_VER(display) >= 20) {
+ /*
+ * We can use PSR exit on LunarLake onwards. Also
+ * using trans push mechanism to trigger Frame Change
+ * event requires using PSR exit.
+ */
+ intel_psr_exit(intel_dp);
+ } else if (intel_dp->psr.psr2_sel_fetch_enabled) {
/* Selective fetch prior LNL */
if (intel_dp->psr.psr2_sel_fetch_cff_enabled) {
/* can we turn CFF off? */
@@ -3579,16 +3586,11 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
intel_psr_configure_full_frame_update(intel_dp);
intel_psr_force_update(intel_dp);
- } else if (!intel_dp->psr.psr2_sel_fetch_enabled) {
+ } else {
/*
- * PSR1 on all platforms
- * PSR2 HW tracking
- * Panel Replay Full frame update
+ * On older platforms using PSR exit was seen causing problems
*/
intel_psr_force_update(intel_dp);
- } else {
- /* Selective update LNL onwards */
- intel_psr_exit(intel_dp);
}
if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v9 8/8] drm/i915/psr: Use TRANS_PUSH to trigger frame change event
2025-12-23 10:51 [PATCH v9 0/8] Use trans push mechanism to generate frame change event Jouni Högander
` (6 preceding siblings ...)
2025-12-23 10:51 ` [PATCH v9 7/8] drm/i915/psr: Do PSR exit on frontbuffer flush on LunarLake and onwards Jouni Högander
@ 2025-12-23 10:51 ` Jouni Högander
2026-01-22 11:04 ` Nautiyal, Ankit K
2025-12-23 12:23 ` ✓ i915.CI.BAT: success for Use trans push mechanism to generate " Patchwork
2025-12-24 17:26 ` ✓ i915.CI.Full: " Patchwork
9 siblings, 1 reply; 21+ messages in thread
From: Jouni Högander @ 2025-12-23 10:51 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jouni Högander
Now we have everything in place for triggering PSR "frame change" event
using TRANS_PUSH: use TRANS_PUSH for LunarLake and onwards.
v3: use HAS_PSR_FRAME_CHANGE macro
v2: use AND instead of OR in intel_psr_use_trans_push
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index ee70d0ceeb5b..353924f8c975 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -4569,6 +4569,7 @@ int intel_psr_min_guardband(struct intel_crtc_state *crtc_state)
bool intel_psr_use_trans_push(const struct intel_crtc_state *crtc_state)
{
- /* TODO: Enable using trans push when everything is in place */
- return false;
+ struct intel_display *display = to_intel_display(crtc_state);
+
+ return HAS_PSR_FRAME_CHANGE(display) && crtc_state->has_psr;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* ✓ i915.CI.BAT: success for Use trans push mechanism to generate frame change event
2025-12-23 10:51 [PATCH v9 0/8] Use trans push mechanism to generate frame change event Jouni Högander
` (7 preceding siblings ...)
2025-12-23 10:51 ` [PATCH v9 8/8] drm/i915/psr: Use TRANS_PUSH to trigger frame change event Jouni Högander
@ 2025-12-23 12:23 ` Patchwork
2025-12-24 17:26 ` ✓ i915.CI.Full: " Patchwork
9 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-12-23 12:23 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 6143 bytes --]
== Series Details ==
Series: Use trans push mechanism to generate frame change event
URL : https://patchwork.freedesktop.org/series/159420/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_17733 -> Patchwork_159420v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/index.html
Participating hosts (43 -> 42)
------------------------------
Additional (1): bat-adls-6
Missing (2): bat-dg2-13 fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_159420v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-adls-6: NOTRUN -> [SKIP][1] ([i915#4613]) +3 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/bat-adls-6/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_tiled_pread_basic:
- bat-adls-6: NOTRUN -> [SKIP][2] ([i915#3282])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/bat-adls-6/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rpm@module-reload:
- bat-adlp-6: [PASS][3] -> [DMESG-WARN][4] ([i915#13890]) +78 other tests dmesg-warn
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/bat-adlp-6/igt@i915_pm_rpm@module-reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/bat-adlp-6/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live@workarounds:
- bat-arls-6: [PASS][5] -> [DMESG-FAIL][6] ([i915#12061]) +1 other test dmesg-fail
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/bat-arls-6/igt@i915_selftest@live@workarounds.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/bat-arls-6/igt@i915_selftest@live@workarounds.html
* igt@intel_hwmon@hwmon-read:
- bat-adls-6: NOTRUN -> [SKIP][7] ([i915#7707]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/bat-adls-6/igt@intel_hwmon@hwmon-read.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adls-6: NOTRUN -> [SKIP][8] ([i915#4103]) +1 other test skip
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/bat-adls-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-adls-6: NOTRUN -> [SKIP][9] ([i915#3555] / [i915#3840])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/bat-adls-6/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-adls-6: NOTRUN -> [SKIP][10]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/bat-adls-6/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pm_backlight@basic-brightness:
- bat-adls-6: NOTRUN -> [SKIP][11] ([i915#5354])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/bat-adls-6/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_psr@psr-primary-mmap-gtt:
- bat-adls-6: NOTRUN -> [SKIP][12] ([i915#1072] / [i915#9732]) +3 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/bat-adls-6/igt@kms_psr@psr-primary-mmap-gtt.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-adls-6: NOTRUN -> [SKIP][13] ([i915#3555])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/bat-adls-6/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-read:
- bat-adls-6: NOTRUN -> [SKIP][14] ([i915#3291]) +2 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/bat-adls-6/igt@prime_vgem@basic-fence-read.html
#### Warnings ####
* igt@i915_selftest@live:
- bat-atsm-1: [DMESG-FAIL][15] ([i915#12061] / [i915#13929]) -> [DMESG-FAIL][16] ([i915#12061] / [i915#14204])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/bat-atsm-1/igt@i915_selftest@live.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/bat-atsm-1/igt@i915_selftest@live.html
* igt@i915_selftest@live@mman:
- bat-atsm-1: [DMESG-FAIL][17] ([i915#13929]) -> [DMESG-FAIL][18] ([i915#14204])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/bat-atsm-1/igt@i915_selftest@live@mman.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/bat-atsm-1/igt@i915_selftest@live@mman.html
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#13890]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13890
[i915#13929]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13929
[i915#14204]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14204
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
Build changes
-------------
* Linux: CI_DRM_17733 -> Patchwork_159420v1
CI-20190529: 20190529
CI_DRM_17733: cab246648fd89efbe8d20ed4c86e7fcebd7606da @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8674: f38f4d8e9c65aff45ac807e646d06e38bc3193a2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_159420v1: cab246648fd89efbe8d20ed4c86e7fcebd7606da @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/index.html
[-- Attachment #2: Type: text/html, Size: 7464 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* ✓ i915.CI.Full: success for Use trans push mechanism to generate frame change event
2025-12-23 10:51 [PATCH v9 0/8] Use trans push mechanism to generate frame change event Jouni Högander
` (8 preceding siblings ...)
2025-12-23 12:23 ` ✓ i915.CI.BAT: success for Use trans push mechanism to generate " Patchwork
@ 2025-12-24 17:26 ` Patchwork
9 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-12-24 17:26 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 113113 bytes --]
== Series Details ==
Series: Use trans push mechanism to generate frame change event
URL : https://patchwork.freedesktop.org/series/159420/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_17733_full -> Patchwork_159420v1_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (9 -> 9)
------------------------------
No changes in participating hosts
New tests
---------
New tests have been introduced between CI_DRM_17733_full and Patchwork_159420v1_full:
### New IGT tests (2) ###
* igt@kms_async_flips@test-time-stamp-atomic@pipe-a-vga-1:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_async_flips@test-time-stamp-atomic@pipe-b-vga-1:
- Statuses : 1 pass(s)
- Exec time: [0.14] s
Known issues
------------
Here are the changes found in Patchwork_159420v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@device_reset@cold-reset-bound:
- shard-tglu-1: NOTRUN -> [SKIP][1] ([i915#11078])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@device_reset@cold-reset-bound.html
* igt@gem_ccs@block-multicopy-compressed:
- shard-tglu-1: NOTRUN -> [SKIP][2] ([i915#9323])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@gem_ccs@block-multicopy-compressed.html
* igt@gem_ccs@large-ctrl-surf-copy:
- shard-tglu: NOTRUN -> [SKIP][3] ([i915#13008])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@gem_ccs@large-ctrl-surf-copy.html
* igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0:
- shard-dg2: [PASS][4] -> [INCOMPLETE][5] ([i915#12392] / [i915#13356])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-1/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-5/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html
* igt@gem_ctx_sseu@engines:
- shard-tglu-1: NOTRUN -> [SKIP][6] ([i915#280])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@gem_ctx_sseu@engines.html
* igt@gem_exec_balancer@parallel-balancer:
- shard-tglu-1: NOTRUN -> [SKIP][7] ([i915#4525]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@gem_exec_balancer@parallel-balancer.html
* igt@gem_exec_balancer@parallel-out-fence:
- shard-rkl: NOTRUN -> [SKIP][8] ([i915#4525])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@gem_exec_balancer@parallel-out-fence.html
* igt@gem_exec_capture@capture-invisible:
- shard-tglu: NOTRUN -> [SKIP][9] ([i915#6334]) +1 other test skip
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@gem_exec_capture@capture-invisible.html
* igt@gem_exec_reloc@basic-cpu-read:
- shard-dg2: NOTRUN -> [SKIP][10] ([i915#3281])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-3/igt@gem_exec_reloc@basic-cpu-read.html
* igt@gem_exec_reloc@basic-cpu-wc:
- shard-rkl: NOTRUN -> [SKIP][11] ([i915#3281])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@gem_exec_reloc@basic-cpu-wc.html
* igt@gem_exec_suspend@basic-s0@smem:
- shard-dg2: [PASS][12] -> [INCOMPLETE][13] ([i915#13356]) +1 other test incomplete
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-1/igt@gem_exec_suspend@basic-s0@smem.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-5/igt@gem_exec_suspend@basic-s0@smem.html
* igt@gem_exec_suspend@basic-s3@smem:
- shard-glk: NOTRUN -> [INCOMPLETE][14] ([i915#13196] / [i915#13356]) +1 other test incomplete
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk9/igt@gem_exec_suspend@basic-s3@smem.html
* igt@gem_lmem_swapping@parallel-multi:
- shard-glk: NOTRUN -> [SKIP][15] ([i915#4613]) +2 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk6/igt@gem_lmem_swapping@parallel-multi.html
* igt@gem_lmem_swapping@parallel-random:
- shard-tglu-1: NOTRUN -> [SKIP][16] ([i915#4613]) +1 other test skip
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@gem_lmem_swapping@parallel-random.html
* igt@gem_lmem_swapping@verify-ccs:
- shard-tglu: NOTRUN -> [SKIP][17] ([i915#4613]) +2 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@gem_lmem_swapping@verify-ccs.html
* igt@gem_pread@snoop:
- shard-rkl: NOTRUN -> [SKIP][18] ([i915#3282]) +1 other test skip
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@gem_pread@snoop.html
* igt@gem_tiling_max_stride:
- shard-dg2: NOTRUN -> [SKIP][19] ([i915#4077])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-3/igt@gem_tiling_max_stride.html
* igt@gem_userptr_blits@invalid-mmap-offset-unsync:
- shard-tglu: NOTRUN -> [SKIP][20] ([i915#3297])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html
* igt@gen9_exec_parse@bb-oversize:
- shard-tglu: NOTRUN -> [SKIP][21] ([i915#2527] / [i915#2856])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@gen9_exec_parse@bb-oversize.html
* igt@i915_drm_fdinfo@virtual-busy-hang-all:
- shard-dg1: NOTRUN -> [SKIP][22] ([i915#14118])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-17/igt@i915_drm_fdinfo@virtual-busy-hang-all.html
* igt@i915_module_load@fault-injection:
- shard-glk10: NOTRUN -> [ABORT][23] ([i915#15342] / [i915#15481])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk10/igt@i915_module_load@fault-injection.html
* igt@i915_module_load@fault-injection@i915_driver_hw_probe:
- shard-glk10: NOTRUN -> [ABORT][24] ([i915#15481])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk10/igt@i915_module_load@fault-injection@i915_driver_hw_probe.html
* igt@i915_module_load@fault-injection@intel_connector_register:
- shard-glk10: NOTRUN -> [DMESG-WARN][25] ([i915#15342])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk10/igt@i915_module_load@fault-injection@intel_connector_register.html
* igt@i915_module_load@fault-injection@intel_gt_init-enodev:
- shard-glk10: NOTRUN -> [SKIP][26] +86 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk10/igt@i915_module_load@fault-injection@intel_gt_init-enodev.html
* igt@i915_module_load@load:
- shard-dg1: ([PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51]) -> ([PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [DMESG-WARN][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76]) ([i915#4423])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-12/igt@i915_module_load@load.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-12/igt@i915_module_load@load.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-12/igt@i915_module_load@load.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-12/igt@i915_module_load@load.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-13/igt@i915_module_load@load.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-13/igt@i915_module_load@load.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-13/igt@i915_module_load@load.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-13/igt@i915_module_load@load.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-14/igt@i915_module_load@load.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-14/igt@i915_module_load@load.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-16/igt@i915_module_load@load.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-16/igt@i915_module_load@load.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-16/igt@i915_module_load@load.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-16/igt@i915_module_load@load.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-17/igt@i915_module_load@load.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-17/igt@i915_module_load@load.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-17/igt@i915_module_load@load.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-17/igt@i915_module_load@load.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-18/igt@i915_module_load@load.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-18/igt@i915_module_load@load.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-18/igt@i915_module_load@load.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-19/igt@i915_module_load@load.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-19/igt@i915_module_load@load.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-19/igt@i915_module_load@load.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-19/igt@i915_module_load@load.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-16/igt@i915_module_load@load.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-17/igt@i915_module_load@load.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-18/igt@i915_module_load@load.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-18/igt@i915_module_load@load.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-13/igt@i915_module_load@load.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-14/igt@i915_module_load@load.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-19/igt@i915_module_load@load.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-13/igt@i915_module_load@load.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-14/igt@i915_module_load@load.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-19/igt@i915_module_load@load.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-12/igt@i915_module_load@load.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-17/igt@i915_module_load@load.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-12/igt@i915_module_load@load.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-13/igt@i915_module_load@load.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-13/igt@i915_module_load@load.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-17/igt@i915_module_load@load.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-12/igt@i915_module_load@load.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-16/igt@i915_module_load@load.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-19/igt@i915_module_load@load.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-14/igt@i915_module_load@load.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-14/igt@i915_module_load@load.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-16/igt@i915_module_load@load.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-18/igt@i915_module_load@load.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-19/igt@i915_module_load@load.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-18/igt@i915_module_load@load.html
* igt@i915_pm_rpm@system-suspend:
- shard-glk: NOTRUN -> [INCOMPLETE][77] ([i915#13356])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk6/igt@i915_pm_rpm@system-suspend.html
* igt@i915_suspend@basic-s3-without-i915:
- shard-glk: NOTRUN -> [INCOMPLETE][78] ([i915#4817])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk2/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
- shard-tglu: NOTRUN -> [SKIP][79] ([i915#12454] / [i915#12712])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-glk10: NOTRUN -> [FAIL][80] ([i915#14888]) +1 other test fail
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk10/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_async_flips@async-flip-suspend-resume:
- shard-dg2: [PASS][81] -> [FAIL][82] ([i915#15285])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-5/igt@kms_async_flips@async-flip-suspend-resume.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-11/igt@kms_async_flips@async-flip-suspend-resume.html
* igt@kms_async_flips@async-flip-suspend-resume@pipe-c-dp-3:
- shard-dg2: NOTRUN -> [FAIL][83] ([i915#15285])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-11/igt@kms_async_flips@async-flip-suspend-resume@pipe-c-dp-3.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-glk10: NOTRUN -> [SKIP][84] ([i915#1769])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk10/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-tglu: NOTRUN -> [SKIP][85] ([i915#1769] / [i915#3555])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
- shard-tglu-1: NOTRUN -> [SKIP][86] ([i915#5286]) +1 other test skip
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-tglu: NOTRUN -> [SKIP][87] ([i915#5286]) +2 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][88] ([i915#3638])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][89] ([i915#6095]) +234 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-19/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4.html
* igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][90] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-4/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1.html
* igt@kms_ccs@bad-pixel-format-yf-tiled-ccs@pipe-c-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][91] ([i915#14098] / [i915#14544] / [i915#6095]) +2 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs@pipe-c-hdmi-a-2.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][92] ([i915#4423] / [i915#6095])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-12/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-3.html
* igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][93] ([i915#12313]) +1 other test skip
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-b-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][94] ([i915#10307] / [i915#6095]) +117 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-4/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
- shard-rkl: NOTRUN -> [SKIP][95] ([i915#12313])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][96] ([i915#6095]) +59 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-4/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][97] ([i915#14544] / [i915#6095]) +5 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
- shard-rkl: [PASS][98] -> [INCOMPLETE][99] ([i915#12796])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [INCOMPLETE][100] ([i915#12796])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-b-hdmi-a-2.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1:
- shard-tglu-1: NOTRUN -> [SKIP][101] ([i915#6095]) +34 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-2:
- shard-glk10: NOTRUN -> [INCOMPLETE][102] ([i915#12796]) +1 other test incomplete
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk10/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][103] ([i915#14098] / [i915#6095]) +28 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-2.html
* igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-d-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][104] ([i915#6095]) +29 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-d-hdmi-a-1.html
* igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-1:
- shard-glk: NOTRUN -> [SKIP][105] +184 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk6/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][106] ([i915#6095]) +55 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_cdclk@mode-transition:
- shard-tglu: NOTRUN -> [SKIP][107] ([i915#3742])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_cdclk@mode-transition.html
* igt@kms_cdclk@plane-scaling@pipe-c-dp-3:
- shard-dg2: NOTRUN -> [SKIP][108] ([i915#13783]) +3 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-11/igt@kms_cdclk@plane-scaling@pipe-c-dp-3.html
* igt@kms_chamelium_frames@dp-crc-single:
- shard-rkl: NOTRUN -> [SKIP][109] ([i915#11151] / [i915#7828])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_chamelium_frames@dp-crc-single.html
* igt@kms_chamelium_frames@dp-frame-dump:
- shard-dg2: NOTRUN -> [SKIP][110] ([i915#11151] / [i915#7828])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-3/igt@kms_chamelium_frames@dp-frame-dump.html
* igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
- shard-tglu-1: NOTRUN -> [SKIP][111] ([i915#11151] / [i915#7828]) +2 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html
* igt@kms_chamelium_hpd@hdmi-hpd-fast:
- shard-tglu: NOTRUN -> [SKIP][112] ([i915#11151] / [i915#7828]) +3 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_chamelium_hpd@hdmi-hpd-fast.html
* igt@kms_content_protection@legacy@pipe-a-dp-3:
- shard-dg2: NOTRUN -> [FAIL][113] ([i915#7173])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-11/igt@kms_content_protection@legacy@pipe-a-dp-3.html
* igt@kms_content_protection@mei-interface:
- shard-tglu-1: NOTRUN -> [SKIP][114] ([i915#6944] / [i915#9424]) +1 other test skip
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_content_protection@mei-interface.html
* igt@kms_cursor_crc@cursor-offscreen-512x170:
- shard-tglu: NOTRUN -> [SKIP][115] ([i915#13049]) +1 other test skip
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_cursor_crc@cursor-offscreen-512x170.html
* igt@kms_cursor_crc@cursor-random-256x85:
- shard-tglu-1: NOTRUN -> [FAIL][116] ([i915#13566]) +1 other test fail
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_cursor_crc@cursor-random-256x85.html
* igt@kms_cursor_crc@cursor-sliding-128x42@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [FAIL][117] ([i915#13566]) +1 other test fail
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@kms_cursor_crc@cursor-sliding-128x42@pipe-a-hdmi-a-1.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
- shard-rkl: NOTRUN -> [SKIP][118] +4 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-tglu-1: NOTRUN -> [SKIP][119] ([i915#1769] / [i915#3555] / [i915#3804])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][120] ([i915#3804])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
- shard-tglu-1: NOTRUN -> [SKIP][121] ([i915#3804])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
* igt@kms_dp_aux_dev:
- shard-dg2: [PASS][122] -> [SKIP][123] ([i915#1257])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-11/igt@kms_dp_aux_dev.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-3/igt@kms_dp_aux_dev.html
- shard-rkl: NOTRUN -> [SKIP][124] ([i915#1257])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_dp_aux_dev.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-rkl: NOTRUN -> [SKIP][125] ([i915#13749])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-tglu-1: NOTRUN -> [SKIP][126] ([i915#3840])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
* igt@kms_fb_coherency@memset-crc@mmap-gtt:
- shard-tglu-1: NOTRUN -> [CRASH][127] ([i915#15351]) +1 other test crash
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_fb_coherency@memset-crc@mmap-gtt.html
* igt@kms_flip@2x-blocking-absolute-wf_vblank:
- shard-tglu: NOTRUN -> [SKIP][128] ([i915#3637] / [i915#9934]) +2 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_flip@2x-blocking-absolute-wf_vblank.html
* igt@kms_flip@2x-busy-flip:
- shard-tglu-1: NOTRUN -> [SKIP][129] ([i915#3637] / [i915#9934]) +1 other test skip
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_flip@2x-busy-flip.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible:
- shard-glk: NOTRUN -> [INCOMPLETE][130] ([i915#12314] / [i915#12745] / [i915#4839])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk5/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-hdmi-a1-hdmi-a2:
- shard-glk: NOTRUN -> [INCOMPLETE][131] ([i915#12314] / [i915#4839])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk5/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-dg1: NOTRUN -> [SKIP][132] ([i915#9934])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-17/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_flip@2x-wf_vblank-ts-check:
- shard-rkl: NOTRUN -> [SKIP][133] ([i915#9934])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_flip@2x-wf_vblank-ts-check.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
- shard-tglu: NOTRUN -> [SKIP][134] ([i915#2587] / [i915#2672]) +1 other test skip
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
- shard-tglu-1: NOTRUN -> [SKIP][135] ([i915#2587] / [i915#2672]) +2 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
- shard-rkl: NOTRUN -> [SKIP][136] ([i915#2672] / [i915#3555]) +1 other test skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
- shard-tglu: NOTRUN -> [SKIP][137] ([i915#2672] / [i915#3555]) +1 other test skip
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-rkl: NOTRUN -> [SKIP][138] ([i915#2672]) +1 other test skip
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
- shard-tglu-1: NOTRUN -> [SKIP][139] ([i915#2672] / [i915#3555]) +2 other tests skip
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-render:
- shard-dg2: [PASS][140] -> [FAIL][141] ([i915#15389])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-render.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-tglu-1: NOTRUN -> [SKIP][142] +35 other tests skip
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-pwrite:
- shard-tglu: NOTRUN -> [SKIP][143] +27 other tests skip
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-glk: NOTRUN -> [INCOMPLETE][144] ([i915#10056])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk6/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-mmap-wc:
- shard-rkl: NOTRUN -> [SKIP][145] ([i915#15102])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt:
- shard-rkl: NOTRUN -> [SKIP][146] ([i915#15102] / [i915#3023]) +2 other tests skip
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
- shard-rkl: NOTRUN -> [SKIP][147] ([i915#1825]) +3 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc:
- shard-tglu-1: NOTRUN -> [SKIP][148] ([i915#15102]) +8 other tests skip
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-pwrite:
- shard-tglu: NOTRUN -> [SKIP][149] ([i915#15102]) +10 other tests skip
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-wc:
- shard-dg1: NOTRUN -> [SKIP][150] ([i915#8708])
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-17/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt:
- shard-dg2: NOTRUN -> [SKIP][151] ([i915#5354])
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_hdr@bpc-switch:
- shard-tglu: NOTRUN -> [SKIP][152] ([i915#3555] / [i915#8228])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_hdr@bpc-switch.html
- shard-dg2: NOTRUN -> [SKIP][153] ([i915#3555] / [i915#8228])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-3/igt@kms_hdr@bpc-switch.html
- shard-rkl: [PASS][154] -> [SKIP][155] ([i915#3555] / [i915#8228])
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_hdr@bpc-switch.html
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_hdr@bpc-switch.html
* igt@kms_hdr@static-toggle:
- shard-tglu-1: NOTRUN -> [SKIP][156] ([i915#3555] / [i915#8228]) +1 other test skip
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_hdr@static-toggle.html
* igt@kms_hdr@static-toggle-dpms:
- shard-dg2: [PASS][157] -> [SKIP][158] ([i915#3555] / [i915#8228])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-11/igt@kms_hdr@static-toggle-dpms.html
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-7/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_joiner@basic-force-ultra-joiner:
- shard-tglu: NOTRUN -> [SKIP][159] ([i915#15458])
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_joiner@basic-force-ultra-joiner.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-tglu: NOTRUN -> [SKIP][160] ([i915#13688])
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-tglu: NOTRUN -> [SKIP][161] ([i915#6301])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-tglu: NOTRUN -> [SKIP][162] ([i915#13958])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_pm_backlight@bad-brightness:
- shard-tglu-1: NOTRUN -> [SKIP][163] ([i915#9812])
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_pm_backlight@bad-brightness.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-tglu-1: NOTRUN -> [SKIP][164] ([i915#12343])
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-tglu-1: NOTRUN -> [SKIP][165] ([i915#9685])
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_dc@dc6-dpms:
- shard-rkl: NOTRUN -> [FAIL][166] ([i915#9295])
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_lpsp@screens-disabled:
- shard-tglu: NOTRUN -> [SKIP][167] ([i915#8430])
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_pm_lpsp@screens-disabled.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-rkl: [PASS][168] -> [SKIP][169] ([i915#15073])
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-8/igt@kms_pm_rpm@modeset-lpsp-stress.html
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-dg2: [PASS][170] -> [SKIP][171] ([i915#15073]) +1 other test skip
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-1/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
- shard-dg1: [PASS][172] -> [SKIP][173] ([i915#15073]) +1 other test skip
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-17/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-14/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf:
- shard-glk: NOTRUN -> [SKIP][174] ([i915#11520]) +3 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk2/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
- shard-tglu-1: NOTRUN -> [SKIP][175] ([i915#11520]) +5 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@pr-cursor-plane-update-sf:
- shard-tglu: NOTRUN -> [SKIP][176] ([i915#11520]) +4 other tests skip
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html
* igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
- shard-glk10: NOTRUN -> [SKIP][177] ([i915#11520]) +4 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk10/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb:
- shard-rkl: NOTRUN -> [SKIP][178] ([i915#11520]) +1 other test skip
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-dg2: NOTRUN -> [SKIP][179] ([i915#9683])
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-3/igt@kms_psr2_su@page_flip-nv12.html
- shard-tglu: NOTRUN -> [SKIP][180] ([i915#9683])
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@fbc-psr2-primary-mmap-gtt:
- shard-tglu: NOTRUN -> [SKIP][181] ([i915#9732]) +8 other tests skip
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_psr@fbc-psr2-primary-mmap-gtt.html
* igt@kms_psr@fbc-psr2-suspend:
- shard-tglu-1: NOTRUN -> [SKIP][182] ([i915#9732]) +7 other tests skip
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_psr@fbc-psr2-suspend.html
* igt@kms_psr@psr2-cursor-mmap-gtt:
- shard-rkl: NOTRUN -> [SKIP][183] ([i915#1072] / [i915#9732]) +3 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_psr@psr2-cursor-mmap-gtt.html
* igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
- shard-tglu: NOTRUN -> [SKIP][184] ([i915#5289])
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
* igt@kms_scaling_modes@scaling-mode-none:
- shard-tglu-1: NOTRUN -> [SKIP][185] ([i915#3555]) +3 other tests skip
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_scaling_modes@scaling-mode-none.html
* igt@kms_vrr@flip-suspend:
- shard-tglu: NOTRUN -> [SKIP][186] ([i915#3555])
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@kms_vrr@flip-suspend.html
* igt@kms_vrr@seamless-rr-switch-drrs:
- shard-tglu-1: NOTRUN -> [SKIP][187] ([i915#9906])
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-1/igt@kms_vrr@seamless-rr-switch-drrs.html
* igt@perf_pmu@busy-double-start@vecs0:
- shard-mtlp: [PASS][188] -> [FAIL][189] ([i915#4349]) +1 other test fail
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-mtlp-6/igt@perf_pmu@busy-double-start@vecs0.html
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-mtlp-6/igt@perf_pmu@busy-double-start@vecs0.html
* igt@perf_pmu@busy-double-start@vecs1:
- shard-dg2: [PASS][190] -> [FAIL][191] ([i915#4349]) +3 other tests fail
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-11/igt@perf_pmu@busy-double-start@vecs1.html
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-3/igt@perf_pmu@busy-double-start@vecs1.html
* igt@sriov_basic@enable-vfs-bind-unbind-each@numvfs-random:
- shard-tglu: NOTRUN -> [FAIL][192] ([i915#12910]) +18 other tests fail
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-5/igt@sriov_basic@enable-vfs-bind-unbind-each@numvfs-random.html
#### Possible fixes ####
* igt@gem_exec_schedule@semaphore-noskip:
- shard-dg2: [SKIP][193] ([i915#2575]) -> [PASS][194] +2 other tests pass
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-6/igt@gem_exec_schedule@semaphore-noskip.html
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@gem_exec_schedule@semaphore-noskip.html
* igt@i915_selftest@live:
- shard-dg1: [DMESG-FAIL][195] -> [PASS][196]
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-18/igt@i915_selftest@live.html
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-17/igt@i915_selftest@live.html
* igt@i915_selftest@live@gem_contexts:
- shard-dg1: [DMESG-FAIL][197] ([i915#15433]) -> [PASS][198]
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-18/igt@i915_selftest@live@gem_contexts.html
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-17/igt@i915_selftest@live@gem_contexts.html
* igt@i915_selftest@live@workarounds:
- shard-dg2: [DMESG-FAIL][199] ([i915#12061]) -> [PASS][200] +1 other test pass
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-4/igt@i915_selftest@live@workarounds.html
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-3/igt@i915_selftest@live@workarounds.html
* igt@kms_addfb_basic@no-handle:
- shard-dg1: [DMESG-WARN][201] ([i915#4391] / [i915#4423]) -> [PASS][202]
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-18/igt@kms_addfb_basic@no-handle.html
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-17/igt@kms_addfb_basic@no-handle.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-mtlp: [FAIL][203] ([i915#5138]) -> [PASS][204]
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-dg2: [SKIP][205] ([i915#13707]) -> [PASS][206]
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-5/igt@kms_dp_linktrain_fallback@dp-fallback.html
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-11/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][207] ([i915#13027]) -> [PASS][208] +1 other test pass
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend:
- shard-rkl: [ABORT][209] ([i915#15132]) -> [PASS][210] +1 other test pass
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-1/igt@kms_flip@flip-vs-suspend.html
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-7/igt@kms_flip@flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-modesetfrombusy:
- shard-dg2: [SKIP][211] -> [PASS][212] +7 other tests pass
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-modesetfrombusy.html
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-modesetfrombusy.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-dg2: [SKIP][213] ([i915#3555] / [i915#8228]) -> [PASS][214]
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-4/igt@kms_hdr@bpc-switch-suspend.html
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-11/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_hdr@static-toggle-suspend:
- shard-rkl: [SKIP][215] ([i915#3555] / [i915#8228]) -> [PASS][216]
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_hdr@static-toggle-suspend.html
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-dg2: [SKIP][217] ([i915#6953] / [i915#9423]) -> [PASS][218]
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-4/igt@kms_plane_scaling@intel-max-src-size.html
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-11/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_pm_dc@dc5-dpms-negative:
- shard-glk: [DMESG-WARN][219] ([i915#118]) -> [PASS][220]
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-glk6/igt@kms_pm_dc@dc5-dpms-negative.html
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-glk9/igt@kms_pm_dc@dc5-dpms-negative.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-dg2: [SKIP][221] ([i915#9340]) -> [PASS][222]
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-7/igt@kms_pm_lpsp@kms-lpsp.html
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-4/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-rkl: [SKIP][223] ([i915#14544] / [i915#15073]) -> [PASS][224]
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_pm_rpm@dpms-lpsp.html
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@kms_pm_rpm@dpms-lpsp.html
- shard-dg1: [SKIP][225] ([i915#15073]) -> [PASS][226]
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-17/igt@kms_pm_rpm@dpms-lpsp.html
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-14/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_pm_rpm@i2c:
- shard-dg1: [DMESG-WARN][227] ([i915#4423]) -> [PASS][228] +3 other tests pass
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-14/igt@kms_pm_rpm@i2c.html
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-17/igt@kms_pm_rpm@i2c.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-dg2: [SKIP][229] ([i915#15073]) -> [PASS][230] +1 other test pass
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-3/igt@kms_pm_rpm@modeset-lpsp.html
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-4/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-rkl: [SKIP][231] ([i915#15073]) -> [PASS][232] +2 other tests pass
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@perf_pmu@busy-double-start@ccs0:
- shard-dg2: [FAIL][233] ([i915#4349]) -> [PASS][234]
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-11/igt@perf_pmu@busy-double-start@ccs0.html
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-3/igt@perf_pmu@busy-double-start@ccs0.html
* igt@perf_pmu@busy-double-start@vcs1:
- shard-mtlp: [FAIL][235] ([i915#4349]) -> [PASS][236]
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-mtlp-6/igt@perf_pmu@busy-double-start@vcs1.html
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-mtlp-6/igt@perf_pmu@busy-double-start@vcs1.html
#### Warnings ####
* igt@api_intel_bb@object-reloc-keep-cache:
- shard-rkl: [SKIP][237] ([i915#14544] / [i915#8411]) -> [SKIP][238] ([i915#8411]) +1 other test skip
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@api_intel_bb@object-reloc-keep-cache.html
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@api_intel_bb@object-reloc-keep-cache.html
* igt@gem_basic@multigpu-create-close:
- shard-rkl: [SKIP][239] ([i915#14544] / [i915#7697]) -> [SKIP][240] ([i915#7697])
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@gem_basic@multigpu-create-close.html
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@gem_basic@multigpu-create-close.html
* igt@gem_close_race@multigpu-basic-threads:
- shard-rkl: [SKIP][241] ([i915#7697]) -> [SKIP][242] ([i915#14544] / [i915#7697])
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@gem_close_race@multigpu-basic-threads.html
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@gem_close_race@multigpu-basic-threads.html
* igt@gem_ctx_sseu@invalid-args:
- shard-rkl: [SKIP][243] ([i915#280]) -> [SKIP][244] ([i915#14544] / [i915#280])
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@gem_ctx_sseu@invalid-args.html
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@gem_ctx_sseu@invalid-args.html
* igt@gem_exec_balancer@parallel:
- shard-rkl: [SKIP][245] ([i915#4525]) -> [SKIP][246] ([i915#14544] / [i915#4525]) +1 other test skip
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@gem_exec_balancer@parallel.html
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@gem_exec_balancer@parallel.html
* igt@gem_exec_capture@capture-invisible:
- shard-rkl: [SKIP][247] ([i915#14544] / [i915#6334]) -> [SKIP][248] ([i915#6334]) +1 other test skip
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@gem_exec_capture@capture-invisible.html
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@gem_exec_capture@capture-invisible.html
* igt@gem_exec_reloc@basic-cpu-read-active:
- shard-dg2: [SKIP][249] ([i915#2575]) -> [SKIP][250] ([i915#3281])
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-6/igt@gem_exec_reloc@basic-cpu-read-active.html
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@gem_exec_reloc@basic-cpu-read-active.html
* igt@gem_exec_reloc@basic-write-read:
- shard-rkl: [SKIP][251] ([i915#14544] / [i915#3281]) -> [SKIP][252] ([i915#3281]) +8 other tests skip
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@gem_exec_reloc@basic-write-read.html
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@gem_exec_reloc@basic-write-read.html
* igt@gem_exec_reloc@basic-write-read-noreloc:
- shard-rkl: [SKIP][253] ([i915#3281]) -> [SKIP][254] ([i915#14544] / [i915#3281]) +9 other tests skip
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@gem_exec_reloc@basic-write-read-noreloc.html
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@gem_exec_reloc@basic-write-read-noreloc.html
* igt@gem_exec_schedule@semaphore-power:
- shard-rkl: [SKIP][255] ([i915#14544] / [i915#7276]) -> [SKIP][256] ([i915#7276])
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@gem_exec_schedule@semaphore-power.html
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@gem_exec_schedule@semaphore-power.html
* igt@gem_huc_copy@huc-copy:
- shard-rkl: [SKIP][257] ([i915#14544] / [i915#2190]) -> [SKIP][258] ([i915#2190])
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@gem_huc_copy@huc-copy.html
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@heavy-multi:
- shard-rkl: [SKIP][259] ([i915#14544] / [i915#4613]) -> [SKIP][260] ([i915#4613]) +2 other tests skip
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@gem_lmem_swapping@heavy-multi.html
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@gem_lmem_swapping@heavy-multi.html
* igt@gem_lmem_swapping@parallel-random-verify:
- shard-rkl: [SKIP][261] ([i915#4613]) -> [SKIP][262] ([i915#14544] / [i915#4613]) +1 other test skip
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@gem_lmem_swapping@parallel-random-verify.html
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@gem_lmem_swapping@parallel-random-verify.html
* igt@gem_lmem_swapping@verify:
- shard-dg2: [WARN][263] ([i915#15490]) -> [FAIL][264] ([i915#15452])
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-6/igt@gem_lmem_swapping@verify.html
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@gem_lmem_swapping@verify.html
* igt@gem_lmem_swapping@verify@lmem0:
- shard-dg2: [CRASH][265] ([i915#15490]) -> [FAIL][266] ([i915#15452])
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-6/igt@gem_lmem_swapping@verify@lmem0.html
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@gem_lmem_swapping@verify@lmem0.html
* igt@gem_partial_pwrite_pread@writes-after-reads:
- shard-rkl: [SKIP][267] ([i915#3282]) -> [SKIP][268] ([i915#14544] / [i915#3282]) +3 other tests skip
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@gem_partial_pwrite_pread@writes-after-reads.html
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@gem_partial_pwrite_pread@writes-after-reads.html
* igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
- shard-rkl: [SKIP][269] ([i915#14544] / [i915#3282]) -> [SKIP][270] ([i915#3282]) +3 other tests skip
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
* igt@gem_pxp@hw-rejects-pxp-buffer:
- shard-rkl: [SKIP][271] ([i915#13717]) -> [SKIP][272] ([i915#13717] / [i915#14544]) +1 other test skip
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@gem_pxp@hw-rejects-pxp-buffer.html
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@gem_pxp@hw-rejects-pxp-buffer.html
* igt@gem_pxp@reject-modify-context-protection-off-1:
- shard-dg2: [SKIP][273] ([i915#2575]) -> [SKIP][274] ([i915#4270])
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-6/igt@gem_pxp@reject-modify-context-protection-off-1.html
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@gem_pxp@reject-modify-context-protection-off-1.html
* igt@gem_set_tiling_vs_blt@untiled-to-tiled:
- shard-rkl: [SKIP][275] ([i915#8411]) -> [SKIP][276] ([i915#14544] / [i915#8411])
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html
* igt@gem_userptr_blits@unsync-unmap-after-close:
- shard-rkl: [SKIP][277] ([i915#3297]) -> [SKIP][278] ([i915#14544] / [i915#3297])
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@gem_userptr_blits@unsync-unmap-after-close.html
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@gem_userptr_blits@unsync-unmap-after-close.html
* igt@gem_userptr_blits@unsync-unmap-cycles:
- shard-rkl: [SKIP][279] ([i915#14544] / [i915#3297]) -> [SKIP][280] ([i915#3297]) +2 other tests skip
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@gem_userptr_blits@unsync-unmap-cycles.html
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@gem_userptr_blits@unsync-unmap-cycles.html
* igt@gen9_exec_parse@bb-oversize:
- shard-rkl: [SKIP][281] ([i915#14544] / [i915#2527]) -> [SKIP][282] ([i915#2527]) +2 other tests skip
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@gen9_exec_parse@bb-oversize.html
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@gen9_exec_parse@bb-oversize.html
* igt@gen9_exec_parse@bb-start-out:
- shard-rkl: [SKIP][283] ([i915#2527]) -> [SKIP][284] ([i915#14544] / [i915#2527]) +4 other tests skip
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@gen9_exec_parse@bb-start-out.html
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@gen9_exec_parse@bb-start-out.html
* igt@gen9_exec_parse@unaligned-access:
- shard-dg2: [SKIP][285] ([i915#2575]) -> [SKIP][286] ([i915#2856])
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-6/igt@gen9_exec_parse@unaligned-access.html
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@gen9_exec_parse@unaligned-access.html
* igt@i915_pm_freq_api@freq-reset-multiple:
- shard-rkl: [SKIP][287] ([i915#8399]) -> [SKIP][288] ([i915#14544] / [i915#8399])
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@i915_pm_freq_api@freq-reset-multiple.html
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@i915_pm_freq_api@freq-reset-multiple.html
* igt@i915_pm_freq_api@freq-suspend:
- shard-rkl: [SKIP][289] ([i915#14544] / [i915#8399]) -> [SKIP][290] ([i915#8399]) +1 other test skip
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@i915_pm_freq_api@freq-suspend.html
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@i915_pm_freq_api@freq-suspend.html
* igt@i915_pm_sseu@full-enable:
- shard-rkl: [SKIP][291] ([i915#4387]) -> [SKIP][292] ([i915#14544] / [i915#4387])
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@i915_pm_sseu@full-enable.html
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@i915_pm_sseu@full-enable.html
* igt@i915_power@sanity:
- shard-rkl: [SKIP][293] ([i915#14544] / [i915#7984]) -> [SKIP][294] ([i915#7984])
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@i915_power@sanity.html
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@i915_power@sanity.html
* igt@intel_hwmon@hwmon-write:
- shard-rkl: [SKIP][295] ([i915#7707]) -> [SKIP][296] ([i915#14544] / [i915#7707])
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@intel_hwmon@hwmon-write.html
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@intel_hwmon@hwmon-write.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-rkl: [SKIP][297] ([i915#9531]) -> [SKIP][298] ([i915#14544] / [i915#9531])
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-270:
- shard-rkl: [SKIP][299] ([i915#14544] / [i915#5286]) -> [SKIP][300] ([i915#5286]) +3 other tests skip
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-rkl: [SKIP][301] ([i915#5286]) -> [SKIP][302] ([i915#14544] / [i915#5286]) +6 other tests skip
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-rkl: [SKIP][303] ([i915#3638]) -> [SKIP][304] ([i915#14544] / [i915#3638]) +2 other tests skip
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_big_fb@linear-64bpp-rotate-90.html
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-270:
- shard-rkl: [SKIP][305] ([i915#14544] / [i915#3638]) -> [SKIP][306] ([i915#3638])
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2:
- shard-rkl: [SKIP][307] ([i915#6095]) -> [SKIP][308] ([i915#14544] / [i915#6095]) +15 other tests skip
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2.html
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs:
- shard-dg1: [SKIP][309] ([i915#6095]) -> [SKIP][310] ([i915#4423] / [i915#6095])
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-16/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs.html
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-12/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2:
- shard-rkl: [SKIP][311] ([i915#14098] / [i915#6095]) -> [SKIP][312] ([i915#14098] / [i915#14544] / [i915#6095]) +18 other tests skip
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-3:
- shard-dg1: [SKIP][313] ([i915#4423] / [i915#6095]) -> [SKIP][314] ([i915#6095]) +1 other test skip
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-13/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-3.html
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-12/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-3.html
* igt@kms_ccs@crc-primary-basic-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-2:
- shard-rkl: [SKIP][315] ([i915#14544] / [i915#6095]) -> [SKIP][316] ([i915#6095]) +7 other tests skip
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-2.html
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs:
- shard-rkl: [SKIP][317] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][318] ([i915#14098] / [i915#6095]) +11 other tests skip
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs.html
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-rkl: [SKIP][319] ([i915#12805]) -> [SKIP][320] ([i915#12805] / [i915#14544])
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
- shard-rkl: [SKIP][321] ([i915#12313] / [i915#14544]) -> [SKIP][322] ([i915#12313])
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-rkl: [SKIP][323] ([i915#3742]) -> [SKIP][324] ([i915#14544] / [i915#3742])
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_cdclk@mode-transition-all-outputs.html
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
- shard-rkl: [SKIP][325] ([i915#11151] / [i915#7828]) -> [SKIP][326] ([i915#11151] / [i915#14544] / [i915#7828]) +5 other tests skip
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html
* igt@kms_chamelium_hpd@hdmi-hpd-fast:
- shard-rkl: [SKIP][327] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][328] ([i915#11151] / [i915#7828]) +5 other tests skip
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_chamelium_hpd@hdmi-hpd-fast.html
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_chamelium_hpd@hdmi-hpd-fast.html
* igt@kms_content_protection@atomic-dpms:
- shard-rkl: [SKIP][329] ([i915#6944] / [i915#7118] / [i915#9424]) -> [SKIP][330] ([i915#14544] / [i915#6944] / [i915#7118] / [i915#9424])
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_content_protection@atomic-dpms.html
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@content-type-change:
- shard-rkl: [SKIP][331] ([i915#6944] / [i915#9424]) -> [SKIP][332] ([i915#14544] / [i915#6944] / [i915#9424])
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_content_protection@content-type-change.html
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-rkl: [SKIP][333] ([i915#3116]) -> [SKIP][334] ([i915#14544] / [i915#3116])
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_content_protection@dp-mst-lic-type-0.html
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@legacy:
- shard-dg2: [SKIP][335] ([i915#6944] / [i915#7118] / [i915#9424]) -> [FAIL][336] ([i915#7173])
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-4/igt@kms_content_protection@legacy.html
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-11/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@lic-type-0:
- shard-dg2: [FAIL][337] ([i915#7173]) -> [SKIP][338] ([i915#6944] / [i915#9424])
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-11/igt@kms_content_protection@lic-type-0.html
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@kms_content_protection@lic-type-0.html
* igt@kms_content_protection@mei-interface:
- shard-dg1: [SKIP][339] ([i915#6944] / [i915#9424]) -> [SKIP][340] ([i915#9433])
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-19/igt@kms_content_protection@mei-interface.html
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-13/igt@kms_content_protection@mei-interface.html
* igt@kms_content_protection@srm:
- shard-dg2: [FAIL][341] ([i915#7173]) -> [SKIP][342] ([i915#6944] / [i915#7118])
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-11/igt@kms_content_protection@srm.html
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@kms_content_protection@srm.html
* igt@kms_content_protection@type1:
- shard-dg2: [SKIP][343] ([i915#6944] / [i915#7118] / [i915#9424]) -> [SKIP][344] ([i915#6944] / [i915#7118] / [i915#7162] / [i915#9424])
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-4/igt@kms_content_protection@type1.html
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-11/igt@kms_content_protection@type1.html
- shard-rkl: [SKIP][345] ([i915#14544] / [i915#6944] / [i915#7118] / [i915#9424]) -> [SKIP][346] ([i915#6944] / [i915#7118] / [i915#9424])
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_content_protection@type1.html
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_content_protection@type1.html
* igt@kms_cursor_crc@cursor-onscreen-32x32:
- shard-rkl: [SKIP][347] ([i915#3555]) -> [SKIP][348] ([i915#14544] / [i915#3555]) +3 other tests skip
[347]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_cursor_crc@cursor-onscreen-32x32.html
[348]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_cursor_crc@cursor-onscreen-32x32.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-rkl: [SKIP][349] ([i915#13049]) -> [SKIP][350] ([i915#13049] / [i915#14544])
[349]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_cursor_crc@cursor-onscreen-512x170.html
[350]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-sliding-512x170:
- shard-rkl: [SKIP][351] ([i915#13049] / [i915#14544]) -> [SKIP][352] ([i915#13049]) +1 other test skip
[351]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-512x170.html
[352]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_cursor_crc@cursor-sliding-512x170.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-rkl: [SKIP][353] ([i915#14544]) -> [SKIP][354] +12 other tests skip
[353]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
[354]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
- shard-dg2: [SKIP][355] -> [SKIP][356] ([i915#13046] / [i915#5354])
[355]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-6/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
[356]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
- shard-dg1: [SKIP][357] ([i915#4423]) -> [SKIP][358]
[357]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-18/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
[358]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-16/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-rkl: [SKIP][359] ([i915#4103]) -> [SKIP][360] ([i915#14544] / [i915#4103])
[359]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
[360]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-dg2: [SKIP][361] -> [SKIP][362] ([i915#4103] / [i915#4213])
[361]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
[362]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
- shard-rkl: [SKIP][363] ([i915#9723]) -> [SKIP][364] ([i915#14544] / [i915#9723])
[363]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
[364]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-rkl: [SKIP][365] ([i915#13749]) -> [SKIP][366] ([i915#13749] / [i915#14544])
[365]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_dp_link_training@non-uhbr-sst.html
[366]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_dp_link_training@uhbr-sst:
- shard-rkl: [SKIP][367] ([i915#13748] / [i915#14544]) -> [SKIP][368] ([i915#13748])
[367]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_dp_link_training@uhbr-sst.html
[368]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_dp_link_training@uhbr-sst.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-rkl: [SKIP][369] ([i915#14544] / [i915#3840]) -> [SKIP][370] ([i915#3840])
[369]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_dsc@dsc-fractional-bpp.html
[370]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-rkl: [SKIP][371] ([i915#3555] / [i915#3840]) -> [SKIP][372] ([i915#14544] / [i915#3555] / [i915#3840])
[371]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_dsc@dsc-with-bpc-formats.html
[372]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_feature_discovery@chamelium:
- shard-rkl: [SKIP][373] ([i915#4854]) -> [SKIP][374] ([i915#14544] / [i915#4854])
[373]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_feature_discovery@chamelium.html
[374]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@psr1:
- shard-rkl: [SKIP][375] ([i915#14544] / [i915#658]) -> [SKIP][376] ([i915#658])
[375]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_feature_discovery@psr1.html
[376]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@kms_feature_discovery@psr1.html
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-rkl: [SKIP][377] ([i915#9934]) -> [SKIP][378] ([i915#14544] / [i915#9934]) +2 other tests skip
[377]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
[378]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_flip@2x-flip-vs-panning:
- shard-rkl: [SKIP][379] ([i915#14544] / [i915#9934]) -> [SKIP][380] ([i915#9934]) +1 other test skip
[379]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_flip@2x-flip-vs-panning.html
[380]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@kms_flip@2x-flip-vs-panning.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-rkl: [SKIP][381] ([i915#14544] / [i915#2672]) -> [SKIP][382] ([i915#2672]) +1 other test skip
[381]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html
[382]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
- shard-rkl: [SKIP][383] ([i915#14544] / [i915#2672] / [i915#3555]) -> [SKIP][384] ([i915#2672] / [i915#3555]) +1 other test skip
[383]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html
[384]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-rkl: [SKIP][385] ([i915#2672] / [i915#3555]) -> [SKIP][386] ([i915#14544] / [i915#2672] / [i915#3555]) +1 other test skip
[385]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
[386]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
- shard-rkl: [SKIP][387] ([i915#2672]) -> [SKIP][388] ([i915#14544] / [i915#2672]) +1 other test skip
[387]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html
[388]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-rkl: [SKIP][389] ([i915#14544] / [i915#15102] / [i915#3023]) -> [SKIP][390] ([i915#15102] / [i915#3023]) +13 other tests skip
[389]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
[390]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt:
- shard-rkl: [SKIP][391] -> [SKIP][392] ([i915#14544]) +13 other tests skip
[391]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt.html
[392]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-move:
- shard-rkl: [SKIP][393] ([i915#1825]) -> [SKIP][394] ([i915#14544] / [i915#1825]) +25 other tests skip
[393]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-move.html
[394]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite:
- shard-dg1: [SKIP][395] ([i915#15102] / [i915#3458] / [i915#4423]) -> [SKIP][396] ([i915#15102] / [i915#3458])
[395]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite.html
[396]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-17/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-suspend:
- shard-dg2: [SKIP][397] ([i915#15102] / [i915#3458]) -> [SKIP][398] ([i915#10433] / [i915#15102] / [i915#3458]) +3 other tests skip
[397]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
[398]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-dg2: [SKIP][399] -> [SKIP][400] ([i915#10055])
[399]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-6/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
[400]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-pwrite:
- shard-rkl: [SKIP][401] ([i915#15102]) -> [SKIP][402] ([i915#14544] / [i915#15102]) +3 other tests skip
[401]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-pwrite.html
[402]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-pwrite:
- shard-rkl: [SKIP][403] ([i915#14544] / [i915#15102]) -> [SKIP][404] ([i915#15102]) +2 other tests skip
[403]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-pwrite.html
[404]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-dg2: [SKIP][405] ([i915#10433] / [i915#15102] / [i915#3458]) -> [SKIP][406] ([i915#15102] / [i915#3458]) +1 other test skip
[405]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
[406]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt:
- shard-rkl: [SKIP][407] ([i915#15102] / [i915#3023]) -> [SKIP][408] ([i915#14544] / [i915#15102] / [i915#3023]) +14 other tests skip
[407]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html
[408]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-pwrite:
- shard-dg1: [SKIP][409] -> [SKIP][410] ([i915#4423])
[409]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-18/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-pwrite.html
[410]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-16/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt:
- shard-rkl: [SKIP][411] ([i915#14544] / [i915#1825]) -> [SKIP][412] ([i915#1825]) +27 other tests skip
[411]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html
[412]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-cpu:
- shard-dg2: [SKIP][413] -> [SKIP][414] ([i915#15102] / [i915#3458])
[413]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-6/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-cpu.html
[414]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-cpu.html
* igt@kms_hdr@brightness-with-hdr:
- shard-dg2: [SKIP][415] ([i915#12713]) -> [SKIP][416] ([i915#13331])
[415]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-4/igt@kms_hdr@brightness-with-hdr.html
[416]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-11/igt@kms_hdr@brightness-with-hdr.html
- shard-rkl: [SKIP][417] ([i915#13331] / [i915#14544]) -> [SKIP][418] ([i915#12713])
[417]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_hdr@brightness-with-hdr.html
[418]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_hdr@brightness-with-hdr.html
- shard-tglu: [SKIP][419] ([i915#1187] / [i915#12713]) -> [SKIP][420] ([i915#12713])
[419]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-tglu-2/igt@kms_hdr@brightness-with-hdr.html
[420]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-tglu-3/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-rkl: [SKIP][421] ([i915#15459]) -> [SKIP][422] ([i915#14544] / [i915#15459])
[421]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_joiner@basic-force-big-joiner.html
[422]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-rkl: [SKIP][423] ([i915#14544] / [i915#15458]) -> [SKIP][424] ([i915#15458]) +1 other test skip
[423]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_joiner@basic-ultra-joiner.html
[424]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-rkl: [SKIP][425] ([i915#13522]) -> [SKIP][426] ([i915#13522] / [i915#14544])
[425]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
[426]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-rkl: [SKIP][427] ([i915#14544] / [i915#6301]) -> [SKIP][428] ([i915#6301]) +1 other test skip
[427]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_panel_fitting@atomic-fastset.html
[428]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_pipe_stress@stress-xrgb8888-yftiled:
- shard-rkl: [SKIP][429] ([i915#14712]) -> [SKIP][430] ([i915#14544] / [i915#14712])
[429]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
[430]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
* igt@kms_plane_lowres@tiling-4:
- shard-rkl: [SKIP][431] ([i915#14544] / [i915#3555]) -> [SKIP][432] ([i915#3555])
[431]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_plane_lowres@tiling-4.html
[432]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_plane_lowres@tiling-4.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-rkl: [SKIP][433] ([i915#13958] / [i915#14544]) -> [SKIP][434] ([i915#13958]) +1 other test skip
[433]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_plane_multiple@2x-tiling-4.html
[434]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a:
- shard-rkl: [SKIP][435] ([i915#15329]) -> [SKIP][436] ([i915#14544] / [i915#15329]) +3 other tests skip
[435]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a.html
[436]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-dg2: [SKIP][437] -> [SKIP][438] ([i915#5354]) +1 other test skip
[437]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-6/igt@kms_pm_backlight@fade-with-suspend.html
[438]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_dc@dc9-dpms:
- shard-rkl: [SKIP][439] ([i915#4281]) -> [SKIP][440] ([i915#14544] / [i915#4281])
[439]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_pm_dc@dc9-dpms.html
[440]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-rkl: [SKIP][441] ([i915#9340]) -> [SKIP][442] ([i915#14544] / [i915#9340])
[441]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_pm_lpsp@kms-lpsp.html
[442]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_lpsp@screens-disabled:
- shard-rkl: [SKIP][443] ([i915#14544] / [i915#8430]) -> [SKIP][444] ([i915#8430])
[443]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_pm_lpsp@screens-disabled.html
[444]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_pm_lpsp@screens-disabled.html
* igt@kms_pm_rpm@pm-caching:
- shard-dg1: [SKIP][445] ([i915#4077]) -> [SKIP][446] ([i915#4077] / [i915#4423])
[445]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-13/igt@kms_pm_rpm@pm-caching.html
[446]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-19/igt@kms_pm_rpm@pm-caching.html
* igt@kms_prime@basic-crc-hybrid:
- shard-rkl: [SKIP][447] ([i915#6524]) -> [SKIP][448] ([i915#14544] / [i915#6524])
[447]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_prime@basic-crc-hybrid.html
[448]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_prime@basic-crc-hybrid.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf:
- shard-dg1: [SKIP][449] ([i915#11520] / [i915#4423]) -> [SKIP][450] ([i915#11520])
[449]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-18/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html
[450]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-17/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
- shard-rkl: [SKIP][451] ([i915#11520] / [i915#14544]) -> [SKIP][452] ([i915#11520]) +4 other tests skip
[451]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html
[452]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-sf:
- shard-rkl: [SKIP][453] ([i915#11520]) -> [SKIP][454] ([i915#11520] / [i915#14544]) +5 other tests skip
[453]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-sf.html
[454]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-rkl: [SKIP][455] ([i915#14544] / [i915#9683]) -> [SKIP][456] ([i915#9683])
[455]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_psr2_su@page_flip-nv12.html
[456]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@fbc-pr-cursor-blt:
- shard-dg2: [SKIP][457] -> [SKIP][458] ([i915#1072] / [i915#9732])
[457]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg2-6/igt@kms_psr@fbc-pr-cursor-blt.html
[458]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg2-1/igt@kms_psr@fbc-pr-cursor-blt.html
* igt@kms_psr@fbc-pr-cursor-plane-onoff:
- shard-rkl: [SKIP][459] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][460] ([i915#1072] / [i915#9732]) +13 other tests skip
[459]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_psr@fbc-pr-cursor-plane-onoff.html
[460]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@kms_psr@fbc-pr-cursor-plane-onoff.html
* igt@kms_psr@psr2-primary-mmap-gtt:
- shard-rkl: [SKIP][461] ([i915#1072] / [i915#9732]) -> [SKIP][462] ([i915#1072] / [i915#14544] / [i915#9732]) +16 other tests skip
[461]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-3/igt@kms_psr@psr2-primary-mmap-gtt.html
[462]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_psr@psr2-primary-mmap-gtt.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-rkl: [SKIP][463] ([i915#9685]) -> [SKIP][464] ([i915#14544] / [i915#9685])
[463]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
[464]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-4-tiled-reflect-x-0:
- shard-dg1: [SKIP][465] ([i915#5289]) -> [SKIP][466] ([i915#4423] / [i915#5289])
[465]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-dg1-16/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html
[466]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-dg1-12/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-rkl: [SKIP][467] ([i915#5289]) -> [SKIP][468] ([i915#14544] / [i915#5289]) +1 other test skip
[467]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
[468]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-rkl: [SKIP][469] ([i915#14544] / [i915#5289]) -> [SKIP][470] ([i915#5289]) +1 other test skip
[469]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
[470]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_vrr@flip-basic:
- shard-rkl: [SKIP][471] ([i915#15243] / [i915#3555]) -> [SKIP][472] ([i915#14544] / [i915#15243] / [i915#3555])
[471]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-5/igt@kms_vrr@flip-basic.html
[472]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-6/igt@kms_vrr@flip-basic.html
* igt@kms_vrr@flip-dpms:
- shard-rkl: [SKIP][473] ([i915#14544] / [i915#15243] / [i915#3555]) -> [SKIP][474] ([i915#15243] / [i915#3555])
[473]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_vrr@flip-dpms.html
[474]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@kms_vrr@flip-dpms.html
* igt@kms_vrr@seamless-rr-switch-virtual:
- shard-rkl: [SKIP][475] ([i915#14544] / [i915#9906]) -> [SKIP][476] ([i915#9906])
[475]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@kms_vrr@seamless-rr-switch-virtual.html
[476]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@kms_vrr@seamless-rr-switch-virtual.html
* igt@perf@per-context-mode-unprivileged:
- shard-rkl: [SKIP][477] ([i915#14544] / [i915#2435]) -> [SKIP][478] ([i915#2435])
[477]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@perf@per-context-mode-unprivileged.html
[478]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@perf@per-context-mode-unprivileged.html
* igt@perf_pmu@rc6-all-gts:
- shard-rkl: [SKIP][479] ([i915#14544] / [i915#8516]) -> [SKIP][480] ([i915#8516])
[479]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@perf_pmu@rc6-all-gts.html
[480]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-2/igt@perf_pmu@rc6-all-gts.html
* igt@prime_vgem@fence-write-hang:
- shard-rkl: [SKIP][481] ([i915#14544] / [i915#3708]) -> [SKIP][482] ([i915#3708])
[481]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@prime_vgem@fence-write-hang.html
[482]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@prime_vgem@fence-write-hang.html
* igt@sriov_basic@enable-vfs-bind-unbind-each:
- shard-rkl: [SKIP][483] ([i915#14544] / [i915#9917]) -> [SKIP][484] ([i915#9917])
[483]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17733/shard-rkl-6/igt@sriov_basic@enable-vfs-bind-unbind-each.html
[484]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/shard-rkl-4/igt@sriov_basic@enable-vfs-bind-unbind-each.html
[i915#10055]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10055
[i915#10056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10056
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
[i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/118
[i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
[i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
[i915#12392]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12392
[i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454
[i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
[i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712
[i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
[i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
[i915#12796]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12796
[i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
[i915#12910]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12910
[i915#13008]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13008
[i915#13027]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13027
[i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
[i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
[i915#13196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13196
[i915#13331]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13331
[i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
[i915#13522]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13522
[i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
[i915#13688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13688
[i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
[i915#13717]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13717
[i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
[i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
[i915#13783]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13783
[i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
[i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
[i915#14118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14118
[i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
[i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712
[i915#14888]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14888
[i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
[i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
[i915#15132]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15132
[i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243
[i915#15285]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15285
[i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
[i915#15342]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15342
[i915#15351]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15351
[i915#15389]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15389
[i915#15433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15433
[i915#15452]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15452
[i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458
[i915#15459]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15459
[i915#15481]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15481
[i915#15490]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15490
[i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
[i915#2435]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2435
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
[i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
[i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
[i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
[i915#4387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4387
[i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
[i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
[i915#4854]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4854
[i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
[i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
[i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
[i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
[i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
[i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
[i915#7162]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7162
[i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
[i915#7276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7276
[i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#7984]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7984
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
[i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#9295]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9295
[i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
[i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
[i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
[i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
[i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
[i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
[i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
[i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
[i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
Build changes
-------------
* Linux: CI_DRM_17733 -> Patchwork_159420v1
CI-20190529: 20190529
CI_DRM_17733: cab246648fd89efbe8d20ed4c86e7fcebd7606da @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8674: f38f4d8e9c65aff45ac807e646d06e38bc3193a2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_159420v1: cab246648fd89efbe8d20ed4c86e7fcebd7606da @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159420v1/index.html
[-- Attachment #2: Type: text/html, Size: 154634 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 3/8] drm/i915/vrr: Prepare to Use TRANS_PUSH mechanism for PSR frame change
2025-12-23 10:51 ` [PATCH v9 3/8] drm/i915/vrr: Prepare to Use TRANS_PUSH mechanism for PSR frame change Jouni Högander
@ 2026-01-22 11:04 ` Nautiyal, Ankit K
2026-01-22 11:39 ` Hogander, Jouni
0 siblings, 1 reply; 21+ messages in thread
From: Nautiyal, Ankit K @ 2026-01-22 11:04 UTC (permalink / raw)
To: Jouni Högander, intel-gfx, intel-xe
On 12/23/2025 4:21 PM, Jouni Högander wrote:
> On Lunarlake and onwards it is possible to generate PSR "frame change"
> event using TRANS_PUSH mechanism. Implement function to enable this and
> take PSR into account in intel_vrr_send_push.
>
> v6:
> - add HAS_PSR_FRAME_CHANGE macro
> - use TRANS_PUSH in instead of TRAN_VRR_CTL
> v5: use intel_psr_use_trans_push for intel_vrr_psr_frame_change_enable
> v4:
> - use rmw when enabling/disabling transcoder
> - set TRANS_PUSH_EN conditionally in intel_vrr_send_push
> - do not call intel_vrr_send_push from intel_psr_trigger_frame_change
> - do not enable using TRANS_PUSH mechanism for PSR "Frame Change"
> v3:
> - use rmw when enabling/disabling
> - keep LNL_TRANS_PUSH_PSR_PR_EN set always on LunarLake and onwards
> v2: use intel_vrr_trans_push_enabled_set_clear instead of rmw
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_crtc.c | 4 +++-
> drivers/gpu/drm/i915/display/intel_psr.c | 13 +++++++---
> drivers/gpu/drm/i915/display/intel_vrr.c | 29 ++++++++++++++++++-----
> drivers/gpu/drm/i915/display/intel_vrr.h | 1 +
> 4 files changed, 37 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
> index 778ebc5095c3..ed3c6c4ce025 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> @@ -747,7 +747,9 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
> * which would cause the next frame to terminate already at vmin
> * vblank start instead of vmax vblank start.
> */
> - if (!state->base.legacy_cursor_update)
> + if (!state->base.legacy_cursor_update ||
> + (intel_psr_use_trans_push(new_crtc_state) &&
> + !new_crtc_state->vrr.enable))
> intel_vrr_send_push(NULL, new_crtc_state);
>
> local_irq_enable();
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 170d65999ccd..4336ba188aa7 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -207,6 +207,8 @@
> #define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
> (intel_dp)->psr.source_support)
>
> +#define HAS_PSR_FRAME_CHANGE(display) (DISPLAY_VER(display) >= 20)
> +
> bool intel_encoder_can_psr(struct intel_encoder *encoder)
> {
> if (intel_encoder_is_dp(encoder) || encoder->type == INTEL_OUTPUT_DP_MST)
> @@ -2120,6 +2122,9 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
> intel_dmc_block_pkgc(display, intel_dp->psr.pipe, true);
>
> intel_alpm_configure(intel_dp, crtc_state);
> +
> + if (intel_psr_use_trans_push(crtc_state))
> + intel_vrr_psr_frame_change_enable(crtc_state);
> }
>
> static bool psr_interrupt_error_check(struct intel_dp *intel_dp)
> @@ -2511,9 +2516,11 @@ void intel_psr_trigger_frame_change_event(struct intel_dsb *dsb,
> intel_pre_commit_crtc_state(state, crtc);
> struct intel_display *display = to_intel_display(crtc);
>
> - if (crtc_state->has_psr)
> - intel_de_write_dsb(display, dsb,
> - CURSURFLIVE(display, crtc->pipe), 0);
> + if (!crtc_state->has_psr || HAS_PSR_FRAME_CHANGE(display))
> + return;
> +
> + intel_de_write_dsb(display, dsb,
> + CURSURFLIVE(display, crtc->pipe), 0);
> }
>
> /**
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index b92c42fde937..aaf0f6cf3cfe 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -584,16 +584,23 @@ void intel_vrr_send_push(struct intel_dsb *dsb,
> {
> struct intel_display *display = to_intel_display(crtc_state);
> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> + u32 trans_push;
>
> - if (!crtc_state->vrr.enable)
> + if (!crtc_state->vrr.enable && !intel_psr_use_trans_push(crtc_state))
> return;
>
> if (dsb)
> intel_dsb_nonpost_start(dsb);
>
> - intel_de_write_dsb(display, dsb,
> - TRANS_PUSH(display, cpu_transcoder),
> - TRANS_PUSH_EN | TRANS_PUSH_SEND);
> + trans_push = TRANS_PUSH_SEND;
> +
> + if (crtc_state->vrr.enable)
> + trans_push |= TRANS_PUSH_EN;
> + if (intel_psr_use_trans_push(crtc_state))
> + trans_push |= LNL_TRANS_PUSH_PSR_PR_EN;
> +
> + intel_de_write_dsb(display, dsb, TRANS_PUSH(display, cpu_transcoder),
> + trans_push);
>
> if (dsb)
> intel_dsb_nonpost_end(dsb);
> @@ -693,7 +700,7 @@ static void intel_vrr_tg_enable(const struct intel_crtc_state *crtc_state,
> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> u32 vrr_ctl;
>
> - intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), TRANS_PUSH_EN);
> + intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder), 0, TRANS_PUSH_EN);
>
> vrr_ctl = VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state);
>
> @@ -721,7 +728,8 @@ static void intel_vrr_tg_disable(const struct intel_crtc_state *old_crtc_state)
> VRR_STATUS_VRR_EN_LIVE, 1000))
> drm_err(display->drm, "Timed out waiting for VRR live status to clear\n");
>
> - intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);
> + intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder),
> + TRANS_PUSH_EN, 0);
> }
>
> void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
> @@ -737,6 +745,15 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
> intel_vrr_tg_enable(crtc_state, crtc_state->cmrr.enable);
> }
>
> +void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state *crtc_state)
> +{
> + struct intel_display *display = to_intel_display(crtc_state);
> + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +
> + intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder), 0,
> + LNL_TRANS_PUSH_PSR_PR_EN);
> +}
Can we have a function that tells us what to write in the TRANS_VRR_PUSH
reg, instead or rmw.
static u32 trans_vrr_push(const struct intel_crtc_state *crtc_state,
bool send_push)
{
struct intel_display *display = to_intel_display(crtc_state);
u32 trans_vrr_push = 0;
if (intel_vrr_always_use_vrr_tg(display) ||
crtc_state->vrr.enable)
trans_vrr_push |= TRANS_PUSH_EN;
if (send_push)
trans_vrr_push |= TRANS_PUSH_SEND;
if (intel_psr_use_trans_push(crtc_state))
trans_vrr_push |= LNL_TRANS_PUSH_PSR_PR_EN;
return trans_vrr_push;
}
Then we can just use this in different place.
I think that will make things easier.
We can have first a preparatory patch with changes without the bit
: LNL_TRANS_PUSH_PSR_PR_EN;
The current patch will then just add the lines to set
the LNL_TRANS_PUSH_PSR_PR_EN and thats it.
Regards,
Ankit
> +
> void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
> {
> struct intel_display *display = to_intel_display(old_crtc_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
> index bc9044621635..4dc5bb3f6f28 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
> @@ -30,6 +30,7 @@ void intel_vrr_check_push_sent(struct intel_dsb *dsb,
> const struct intel_crtc_state *crtc_state);
> bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state);
> void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state);
> +void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state *crtc_state);
> void intel_vrr_get_config(struct intel_crtc_state *crtc_state);
> int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state);
> int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state);
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 8/8] drm/i915/psr: Use TRANS_PUSH to trigger frame change event
2025-12-23 10:51 ` [PATCH v9 8/8] drm/i915/psr: Use TRANS_PUSH to trigger frame change event Jouni Högander
@ 2026-01-22 11:04 ` Nautiyal, Ankit K
2026-01-22 11:43 ` Hogander, Jouni
0 siblings, 1 reply; 21+ messages in thread
From: Nautiyal, Ankit K @ 2026-01-22 11:04 UTC (permalink / raw)
To: Jouni Högander, intel-gfx, intel-xe
On 12/23/2025 4:21 PM, Jouni Högander wrote:
> Now we have everything in place for triggering PSR "frame change" event
> using TRANS_PUSH: use TRANS_PUSH for LunarLake and onwards.
>
> v3: use HAS_PSR_FRAME_CHANGE macro
> v2: use AND instead of OR in intel_psr_use_trans_push
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index ee70d0ceeb5b..353924f8c975 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -4569,6 +4569,7 @@ int intel_psr_min_guardband(struct intel_crtc_state *crtc_state)
>
> bool intel_psr_use_trans_push(const struct intel_crtc_state *crtc_state)
> {
> - /* TODO: Enable using trans push when everything is in place */
> - return false;
> + struct intel_display *display = to_intel_display(crtc_state);
> +
> + return HAS_PSR_FRAME_CHANGE(display) && crtc_state->has_psr;
Can we just always enable this bit for LNL+ platforms.
I mean if no PSR/PSR2/Panel Replay are enabled, if we still have this
bit set, can there be any issue?
The frame change event will be generated but the PSR/PR logic will not
get activated.
Regards,
Ankit
> }
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 3/8] drm/i915/vrr: Prepare to Use TRANS_PUSH mechanism for PSR frame change
2026-01-22 11:04 ` Nautiyal, Ankit K
@ 2026-01-22 11:39 ` Hogander, Jouni
0 siblings, 0 replies; 21+ messages in thread
From: Hogander, Jouni @ 2026-01-22 11:39 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Nautiyal, Ankit K,
intel-gfx@lists.freedesktop.org
On Thu, 2026-01-22 at 16:34 +0530, Nautiyal, Ankit K wrote:
>
> On 12/23/2025 4:21 PM, Jouni Högander wrote:
> > On Lunarlake and onwards it is possible to generate PSR "frame
> > change"
> > event using TRANS_PUSH mechanism. Implement function to enable this
> > and
> > take PSR into account in intel_vrr_send_push.
> >
> > v6:
> > - add HAS_PSR_FRAME_CHANGE macro
> > - use TRANS_PUSH in instead of TRAN_VRR_CTL
> > v5: use intel_psr_use_trans_push for
> > intel_vrr_psr_frame_change_enable
> > v4:
> > - use rmw when enabling/disabling transcoder
> > - set TRANS_PUSH_EN conditionally in intel_vrr_send_push
> > - do not call intel_vrr_send_push from
> > intel_psr_trigger_frame_change
> > - do not enable using TRANS_PUSH mechanism for PSR "Frame
> > Change"
> > v3:
> > - use rmw when enabling/disabling
> > - keep LNL_TRANS_PUSH_PSR_PR_EN set always on LunarLake and
> > onwards
> > v2: use intel_vrr_trans_push_enabled_set_clear instead of rmw
> >
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_crtc.c | 4 +++-
> > drivers/gpu/drm/i915/display/intel_psr.c | 13 +++++++---
> > drivers/gpu/drm/i915/display/intel_vrr.c | 29
> > ++++++++++++++++++-----
> > drivers/gpu/drm/i915/display/intel_vrr.h | 1 +
> > 4 files changed, 37 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c
> > b/drivers/gpu/drm/i915/display/intel_crtc.c
> > index 778ebc5095c3..ed3c6c4ce025 100644
> > --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> > @@ -747,7 +747,9 @@ void intel_pipe_update_end(struct
> > intel_atomic_state *state,
> > * which would cause the next frame to terminate already
> > at vmin
> > * vblank start instead of vmax vblank start.
> > */
> > - if (!state->base.legacy_cursor_update)
> > + if (!state->base.legacy_cursor_update ||
> > + (intel_psr_use_trans_push(new_crtc_state) &&
> > + !new_crtc_state->vrr.enable))
> > intel_vrr_send_push(NULL, new_crtc_state);
> >
> > local_irq_enable();
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 170d65999ccd..4336ba188aa7 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -207,6 +207,8 @@
> > #define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
> > (intel_dp)->psr.source_support)
> >
> > +#define HAS_PSR_FRAME_CHANGE(display) (DISPLAY_VER(display) >=
> > 20)
> > +
> > bool intel_encoder_can_psr(struct intel_encoder *encoder)
> > {
> > if (intel_encoder_is_dp(encoder) || encoder->type ==
> > INTEL_OUTPUT_DP_MST)
> > @@ -2120,6 +2122,9 @@ static void intel_psr_enable_source(struct
> > intel_dp *intel_dp,
> > intel_dmc_block_pkgc(display, intel_dp->psr.pipe,
> > true);
> >
> > intel_alpm_configure(intel_dp, crtc_state);
> > +
> > + if (intel_psr_use_trans_push(crtc_state))
> > + intel_vrr_psr_frame_change_enable(crtc_state);
> > }
> >
> > static bool psr_interrupt_error_check(struct intel_dp *intel_dp)
> > @@ -2511,9 +2516,11 @@ void
> > intel_psr_trigger_frame_change_event(struct intel_dsb *dsb,
> > intel_pre_commit_crtc_state(state, crtc);
> > struct intel_display *display = to_intel_display(crtc);
> >
> > - if (crtc_state->has_psr)
> > - intel_de_write_dsb(display, dsb,
> > - CURSURFLIVE(display, crtc-
> > >pipe), 0);
> > + if (!crtc_state->has_psr || HAS_PSR_FRAME_CHANGE(display))
> > + return;
> > +
> > + intel_de_write_dsb(display, dsb,
> > + CURSURFLIVE(display, crtc->pipe), 0);
> > }
> >
> > /**
> > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
> > b/drivers/gpu/drm/i915/display/intel_vrr.c
> > index b92c42fde937..aaf0f6cf3cfe 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> > @@ -584,16 +584,23 @@ void intel_vrr_send_push(struct intel_dsb
> > *dsb,
> > {
> > struct intel_display *display =
> > to_intel_display(crtc_state);
> > enum transcoder cpu_transcoder = crtc_state-
> > >cpu_transcoder;
> > + u32 trans_push;
> >
> > - if (!crtc_state->vrr.enable)
> > + if (!crtc_state->vrr.enable &&
> > !intel_psr_use_trans_push(crtc_state))
> > return;
> >
> > if (dsb)
> > intel_dsb_nonpost_start(dsb);
> >
> > - intel_de_write_dsb(display, dsb,
> > - TRANS_PUSH(display, cpu_transcoder),
> > - TRANS_PUSH_EN | TRANS_PUSH_SEND);
> > + trans_push = TRANS_PUSH_SEND;
> > +
> > + if (crtc_state->vrr.enable)
> > + trans_push |= TRANS_PUSH_EN;
> > + if (intel_psr_use_trans_push(crtc_state))
> > + trans_push |= LNL_TRANS_PUSH_PSR_PR_EN;
> > +
> > + intel_de_write_dsb(display, dsb, TRANS_PUSH(display,
> > cpu_transcoder),
> > + trans_push);
> >
> > if (dsb)
> > intel_dsb_nonpost_end(dsb);
> > @@ -693,7 +700,7 @@ static void intel_vrr_tg_enable(const struct
> > intel_crtc_state *crtc_state,
> > enum transcoder cpu_transcoder = crtc_state-
> > >cpu_transcoder;
> > u32 vrr_ctl;
> >
> > - intel_de_write(display, TRANS_PUSH(display,
> > cpu_transcoder), TRANS_PUSH_EN);
> > + intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder),
> > 0, TRANS_PUSH_EN);
> >
> > vrr_ctl = VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state);
> >
> > @@ -721,7 +728,8 @@ static void intel_vrr_tg_disable(const struct
> > intel_crtc_state *old_crtc_state)
> > VRR_STATUS_VRR_EN_LIVE,
> > 1000))
> > drm_err(display->drm, "Timed out waiting for VRR
> > live status to clear\n");
> >
> > - intel_de_write(display, TRANS_PUSH(display,
> > cpu_transcoder), 0);
> > + intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder),
> > + TRANS_PUSH_EN, 0);
> > }
> >
> > void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
> > @@ -737,6 +745,15 @@ void intel_vrr_enable(const struct
> > intel_crtc_state *crtc_state)
> > intel_vrr_tg_enable(crtc_state, crtc_state-
> > >cmrr.enable);
> > }
> >
> > +void intel_vrr_psr_frame_change_enable(const struct
> > intel_crtc_state *crtc_state)
> > +{
> > + struct intel_display *display =
> > to_intel_display(crtc_state);
> > + enum transcoder cpu_transcoder = crtc_state-
> > >cpu_transcoder;
> > +
> > + intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder),
> > 0,
> > + LNL_TRANS_PUSH_PSR_PR_EN);
> > +}
>
>
> Can we have a function that tells us what to write in the
> TRANS_VRR_PUSH
> reg, instead or rmw.
>
> static u32 trans_vrr_push(const struct intel_crtc_state *crtc_state,
> bool send_push)
> {
> struct intel_display *display =
> to_intel_display(crtc_state);
> u32 trans_vrr_push = 0;
>
> if (intel_vrr_always_use_vrr_tg(display) ||
> crtc_state->vrr.enable)
> trans_vrr_push |= TRANS_PUSH_EN;
>
> if (send_push)
> trans_vrr_push |= TRANS_PUSH_SEND;
>
> if (intel_psr_use_trans_push(crtc_state))
> trans_vrr_push |= LNL_TRANS_PUSH_PSR_PR_EN;
>
> return trans_vrr_push;
> }
>
> Then we can just use this in different place.
>
> I think that will make things easier.
>
> We can have first a preparatory patch with changes without the bit
> : LNL_TRANS_PUSH_PSR_PR_EN;
>
> The current patch will then just add the lines to set
> the LNL_TRANS_PUSH_PSR_PR_EN and thats it.
This is good idea. I will try/implement that.
BR,
Jouni Högander
>
>
> Regards,
>
> Ankit
>
>
> > +
> > void intel_vrr_disable(const struct intel_crtc_state
> > *old_crtc_state)
> > {
> > struct intel_display *display =
> > to_intel_display(old_crtc_state);
> > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h
> > b/drivers/gpu/drm/i915/display/intel_vrr.h
> > index bc9044621635..4dc5bb3f6f28 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vrr.h
> > +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
> > @@ -30,6 +30,7 @@ void intel_vrr_check_push_sent(struct intel_dsb
> > *dsb,
> > const struct intel_crtc_state
> > *crtc_state);
> > bool intel_vrr_is_push_sent(const struct intel_crtc_state
> > *crtc_state);
> > void intel_vrr_disable(const struct intel_crtc_state
> > *old_crtc_state);
> > +void intel_vrr_psr_frame_change_enable(const struct
> > intel_crtc_state *crtc_state);
> > void intel_vrr_get_config(struct intel_crtc_state *crtc_state);
> > int intel_vrr_vmax_vtotal(const struct intel_crtc_state
> > *crtc_state);
> > int intel_vrr_vmin_vtotal(const struct intel_crtc_state
> > *crtc_state);
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 8/8] drm/i915/psr: Use TRANS_PUSH to trigger frame change event
2026-01-22 11:04 ` Nautiyal, Ankit K
@ 2026-01-22 11:43 ` Hogander, Jouni
0 siblings, 0 replies; 21+ messages in thread
From: Hogander, Jouni @ 2026-01-22 11:43 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Nautiyal, Ankit K,
intel-gfx@lists.freedesktop.org
On Thu, 2026-01-22 at 16:34 +0530, Nautiyal, Ankit K wrote:
>
> On 12/23/2025 4:21 PM, Jouni Högander wrote:
> > Now we have everything in place for triggering PSR "frame change"
> > event
> > using TRANS_PUSH: use TRANS_PUSH for LunarLake and onwards.
> >
> > v3: use HAS_PSR_FRAME_CHANGE macro
> > v2: use AND instead of OR in intel_psr_use_trans_push
> >
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_psr.c | 5 +++--
> > 1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index ee70d0ceeb5b..353924f8c975 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -4569,6 +4569,7 @@ int intel_psr_min_guardband(struct
> > intel_crtc_state *crtc_state)
> >
> > bool intel_psr_use_trans_push(const struct intel_crtc_state
> > *crtc_state)
> > {
> > - /* TODO: Enable using trans push when everything is in
> > place */
> > - return false;
> > + struct intel_display *display =
> > to_intel_display(crtc_state);
> > +
> > + return HAS_PSR_FRAME_CHANGE(display) && crtc_state-
> > >has_psr;
>
>
> Can we just always enable this bit for LNL+ platforms.
>
> I mean if no PSR/PSR2/Panel Replay are enabled, if we still have this
> bit set, can there be any issue?
>
> The frame change event will be generated but the PSR/PR logic will
> not
> get activated.
I think this should be ok. I still need to have this
intel_psr_use_trans_push to have correct sequence in dsb execution.
I'll guess I can use HAS_PSR_FRAME_CHANGE in that trans_vrr_push
discussed on patch 3.
BR,
Jouni Högander
>
>
> Regards,
>
> Ankit
>
> > }
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 4/8] drm/i915/dsb: Set DSB_SKIP_WAITS_EN chicken bit for LunarLake and onwards
2025-12-23 10:51 ` [PATCH v9 4/8] drm/i915/dsb: Set DSB_SKIP_WAITS_EN chicken bit for LunarLake and onwards Jouni Högander
@ 2026-01-23 4:41 ` Nautiyal, Ankit K
2026-01-23 6:19 ` Hogander, Jouni
0 siblings, 1 reply; 21+ messages in thread
From: Nautiyal, Ankit K @ 2026-01-23 4:41 UTC (permalink / raw)
To: Jouni Högander, intel-gfx, intel-xe
On 12/23/2025 4:21 PM, Jouni Högander wrote:
> On LunarLake we are using TRANS_PUSH mechanism to trigger "Frame Change"
> event. This way we have more control on when PSR HW is woken up. I.e. not
> every display register write is triggering sending update. This allows us
> setting DSB_SKIP_WAITS_EN chicken bit as well.
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dsb.c | 15 +++++++++++----
> 1 file changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
> index ec2a3fb171ab..19a99f82f413 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -17,6 +17,7 @@
> #include "intel_dsb.h"
> #include "intel_dsb_buffer.h"
> #include "intel_dsb_regs.h"
> +#include "intel_psr.h"
> #include "intel_vblank.h"
> #include "intel_vrr.h"
> #include "skl_watermark.h"
> @@ -166,18 +167,24 @@ static int dsb_scanline_to_hw(struct intel_atomic_state *state,
> * definitely do not want to skip vblank wait. We also have concern what comes
> * to skipping vblank evasion. I.e. arming registers are latched before we have
> * managed writing them. Due to these reasons we are not setting
> - * DSB_SKIP_WAITS_EN.
> + * DSB_SKIP_WAITS_EN except when using TRANS_PUSH mechanism to trigger
> + * "frame change" event.
> */
> static u32 dsb_chicken(struct intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> + const struct intel_crtc_state *new_crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> + u32 chicken = intel_psr_use_trans_push(new_crtc_state) ?
> + DSB_SKIP_WAITS_EN : 0;
I have a query regarding Panel Replay. Let's say Panel Replay is enabled.
crtc_state->has_psr will be set for Panel Replay as well so
DSB_SKIP_WAITS_EN bit gets set.
As per the bspec: "When set, this will enable the DSB to jump from WAIT
for Vblank, wait for scanline number, in range and out of range states
to IDLE state when PSR and PSR2 is entered."
When it says "PSR and PSR2 is entered", does this apply to Panel Replay
as well? Meaning in case of Panel Replay will the wait be skipped?
Regards,
Ankit
> +
> if (pre_commit_is_vrr_active(state, crtc))
> - return DSB_CTRL_WAIT_SAFE_WINDOW |
> + chicken |= DSB_CTRL_WAIT_SAFE_WINDOW |
> DSB_CTRL_NO_WAIT_VBLANK |
> DSB_INST_WAIT_SAFE_WINDOW |
> DSB_INST_NO_WAIT_VBLANK;
> - else
> - return 0;
> +
> + return chicken;
> }
>
> static bool assert_dsb_has_room(struct intel_dsb *dsb)
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 6/8] drm/i915/psr: Wait for idle only after possible send push
2025-12-23 10:51 ` [PATCH v9 6/8] drm/i915/psr: Wait for idle only after possible send push Jouni Högander
@ 2026-01-23 5:12 ` Nautiyal, Ankit K
2026-01-23 6:37 ` Hogander, Jouni
0 siblings, 1 reply; 21+ messages in thread
From: Nautiyal, Ankit K @ 2026-01-23 5:12 UTC (permalink / raw)
To: Jouni Högander, intel-gfx, intel-xe
On 12/23/2025 4:21 PM, Jouni Högander wrote:
> We are planning to move using trans push mechanism to trigger the Frame
> Change event. in that case we can't wait PSR to idle before send push
> happens. Due to this move wait for idle to be done after possible send push
> is done.
>
> This should be ok for Frame Change event triggered by register write as
> well. Wait for idle is needed only for corner case where PSR is
> transitioning into DEEP_SLEEP when Frame Change event is triggered. It just
> has to be before wait for vblank. Otherwise we may have vblank before PSR
> enters DEEP_SLEEP and still using old frame buffers for first frame after
> wake up.
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 13 ++++++++++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index c7ca4f53b8b8..1aca4802b7d5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7333,9 +7333,6 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
> intel_psr_trigger_frame_change_event(new_crtc_state->dsb_commit,
> state, crtc);
>
> - intel_psr_wait_for_idle_dsb(new_crtc_state->dsb_commit,
> - new_crtc_state);
> -
> if (new_crtc_state->use_dsb)
> intel_dsb_vblank_evade(state, new_crtc_state->dsb_commit);
>
> @@ -7375,6 +7372,16 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
>
> intel_vrr_send_push(new_crtc_state->dsb_commit, new_crtc_state);
>
> + /*
> + * Wait for idle is needed for corner case where PSR HW
> + * is transitioning into DEEP_SLEEP/SRDENT_OFF when
> + * new Frame Change event comes in. It is ok to do it
> + * here for both Frame Change mecanisms (trans push
> + * and register write).
> + */
> + intel_psr_wait_for_idle_dsb(new_crtc_state->dsb_commit,
> + new_crtc_state);
> +
If I understand correctly:
For Fixed RR case:
Suppose we are in PSR:
Skip_wait_en is set.
The portion around the Send Push will be like:
-dsb_wait_vblank will no longer wait for the undelayed vblank (we are in
PSR and skip_wait_en is set)
-we send push -> to trigger frame change event for PSR HW.
-After this PSR HW is supposed to receive the event and may be in
transition period so we wait for idle dsb.(which internally makes sure
that we are out of PSR)
-We are not sure whether we are in active or in vblank region at this
point of time so we want to use dsb_wait_vblank. The skip_wait_en will
now not come in picture since we have made sure that we are not in PSR
in previous step.
Then other steps will be similar to what we have been doing.
Is my understanding correct?
What happens when Panel Replay is in picture, given we can have PR
enable with Variable Refresh Rate timings.
Regards,
Ankit
> /*
> * In case PSR uses trans push as a "frame change" event and
> * VRR is not in use we need to wait vblank. Othervise we may
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 7/8] drm/i915/psr: Do PSR exit on frontbuffer flush on LunarLake and onwards
2025-12-23 10:51 ` [PATCH v9 7/8] drm/i915/psr: Do PSR exit on frontbuffer flush on LunarLake and onwards Jouni Högander
@ 2026-01-23 6:18 ` Nautiyal, Ankit K
0 siblings, 0 replies; 21+ messages in thread
From: Nautiyal, Ankit K @ 2026-01-23 6:18 UTC (permalink / raw)
To: Jouni Högander, intel-gfx, intel-xe
On 12/23/2025 4:21 PM, Jouni Högander wrote:
> We need to use intel_psr_exit in frontbuffer flush on LunarLake and
> onwardsif we want to move using trans push mechanism to trigger Frame
typo:
s/onwardsif/onwards if/
Patch LGTM.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Change event.
>
> Keep PSR1 and PSR2 HW tracking as it is for older platforms as this was
> seen causing problems there.
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 18 ++++++++++--------
> 1 file changed, 10 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4336ba188aa7..ee70d0ceeb5b 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -3559,7 +3559,14 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
> {
> struct intel_display *display = to_intel_display(intel_dp);
>
> - if (DISPLAY_VER(display) < 20 && intel_dp->psr.psr2_sel_fetch_enabled) {
> + if (DISPLAY_VER(display) >= 20) {
> + /*
> + * We can use PSR exit on LunarLake onwards. Also
> + * using trans push mechanism to trigger Frame Change
> + * event requires using PSR exit.
> + */
> + intel_psr_exit(intel_dp);
> + } else if (intel_dp->psr.psr2_sel_fetch_enabled) {
> /* Selective fetch prior LNL */
> if (intel_dp->psr.psr2_sel_fetch_cff_enabled) {
> /* can we turn CFF off? */
> @@ -3579,16 +3586,11 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
> intel_psr_configure_full_frame_update(intel_dp);
>
> intel_psr_force_update(intel_dp);
> - } else if (!intel_dp->psr.psr2_sel_fetch_enabled) {
> + } else {
> /*
> - * PSR1 on all platforms
> - * PSR2 HW tracking
> - * Panel Replay Full frame update
> + * On older platforms using PSR exit was seen causing problems
> */
> intel_psr_force_update(intel_dp);
> - } else {
> - /* Selective update LNL onwards */
> - intel_psr_exit(intel_dp);
> }
>
> if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 4/8] drm/i915/dsb: Set DSB_SKIP_WAITS_EN chicken bit for LunarLake and onwards
2026-01-23 4:41 ` Nautiyal, Ankit K
@ 2026-01-23 6:19 ` Hogander, Jouni
0 siblings, 0 replies; 21+ messages in thread
From: Hogander, Jouni @ 2026-01-23 6:19 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Nautiyal, Ankit K,
intel-gfx@lists.freedesktop.org
On Fri, 2026-01-23 at 10:11 +0530, Nautiyal, Ankit K wrote:
>
> On 12/23/2025 4:21 PM, Jouni Högander wrote:
> > On LunarLake we are using TRANS_PUSH mechanism to trigger "Frame
> > Change"
> > event. This way we have more control on when PSR HW is woken up.
> > I.e. not
> > every display register write is triggering sending update. This
> > allows us
> > setting DSB_SKIP_WAITS_EN chicken bit as well.
> >
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_dsb.c | 15 +++++++++++----
> > 1 file changed, 11 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> > b/drivers/gpu/drm/i915/display/intel_dsb.c
> > index ec2a3fb171ab..19a99f82f413 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> > @@ -17,6 +17,7 @@
> > #include "intel_dsb.h"
> > #include "intel_dsb_buffer.h"
> > #include "intel_dsb_regs.h"
> > +#include "intel_psr.h"
> > #include "intel_vblank.h"
> > #include "intel_vrr.h"
> > #include "skl_watermark.h"
> > @@ -166,18 +167,24 @@ static int dsb_scanline_to_hw(struct
> > intel_atomic_state *state,
> > * definitely do not want to skip vblank wait. We also have
> > concern what comes
> > * to skipping vblank evasion. I.e. arming registers are latched
> > before we have
> > * managed writing them. Due to these reasons we are not setting
> > - * DSB_SKIP_WAITS_EN.
> > + * DSB_SKIP_WAITS_EN except when using TRANS_PUSH mechanism to
> > trigger
> > + * "frame change" event.
> > */
> > static u32 dsb_chicken(struct intel_atomic_state *state,
> > struct intel_crtc *crtc)
> > {
> > + const struct intel_crtc_state *new_crtc_state =
> > + intel_atomic_get_new_crtc_state(state, crtc);
> > + u32 chicken = intel_psr_use_trans_push(new_crtc_state) ?
> > + DSB_SKIP_WAITS_EN : 0;
>
>
> I have a query regarding Panel Replay. Let's say Panel Replay is
> enabled.
>
> crtc_state->has_psr will be set for Panel Replay as well so
> DSB_SKIP_WAITS_EN bit gets set.
>
> As per the bspec: "When set, this will enable the DSB to jump from
> WAIT
> for Vblank, wait for scanline number, in range and out of range
> states
> to IDLE state when PSR and PSR2 is entered."
>
> When it says "PSR and PSR2 is entered", does this apply to Panel
> Replay
> as well? Meaning in case of Panel Replay will the wait be skipped?
Wait will be skipped for PR as we based on my experiments.
BR,
Jouni Högander
>
>
> Regards,
>
> Ankit
>
> > +
> > if (pre_commit_is_vrr_active(state, crtc))
> > - return DSB_CTRL_WAIT_SAFE_WINDOW |
> > + chicken |= DSB_CTRL_WAIT_SAFE_WINDOW |
> > DSB_CTRL_NO_WAIT_VBLANK |
> > DSB_INST_WAIT_SAFE_WINDOW |
> > DSB_INST_NO_WAIT_VBLANK;
> > - else
> > - return 0;
> > +
> > + return chicken;
> > }
> >
> > static bool assert_dsb_has_room(struct intel_dsb *dsb)
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 6/8] drm/i915/psr: Wait for idle only after possible send push
2026-01-23 5:12 ` Nautiyal, Ankit K
@ 2026-01-23 6:37 ` Hogander, Jouni
2026-01-23 11:33 ` Nautiyal, Ankit K
0 siblings, 1 reply; 21+ messages in thread
From: Hogander, Jouni @ 2026-01-23 6:37 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Nautiyal, Ankit K,
intel-gfx@lists.freedesktop.org
On Fri, 2026-01-23 at 10:42 +0530, Nautiyal, Ankit K wrote:
>
> On 12/23/2025 4:21 PM, Jouni Högander wrote:
> > We are planning to move using trans push mechanism to trigger the
> > Frame
> > Change event. in that case we can't wait PSR to idle before send
> > push
> > happens. Due to this move wait for idle to be done after possible
> > send push
> > is done.
> >
> > This should be ok for Frame Change event triggered by register
> > write as
> > well. Wait for idle is needed only for corner case where PSR is
> > transitioning into DEEP_SLEEP when Frame Change event is triggered.
> > It just
> > has to be before wait for vblank. Otherwise we may have vblank
> > before PSR
> > enters DEEP_SLEEP and still using old frame buffers for first frame
> > after
> > wake up.
> >
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 13 ++++++++++---
> > 1 file changed, 10 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index c7ca4f53b8b8..1aca4802b7d5 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -7333,9 +7333,6 @@ static void intel_atomic_dsb_finish(struct
> > intel_atomic_state *state,
> > intel_psr_trigger_frame_change_event(new_crtc_stat
> > e->dsb_commit,
> > state, crtc);
> >
> > - intel_psr_wait_for_idle_dsb(new_crtc_state-
> > >dsb_commit,
> > - new_crtc_state);
> > -
> > if (new_crtc_state->use_dsb)
> > intel_dsb_vblank_evade(state,
> > new_crtc_state->dsb_commit);
> >
> > @@ -7375,6 +7372,16 @@ static void intel_atomic_dsb_finish(struct
> > intel_atomic_state *state,
> >
> > intel_vrr_send_push(new_crtc_state->dsb_commit,
> > new_crtc_state);
> >
> > + /*
> > + * Wait for idle is needed for corner case where
> > PSR HW
> > + * is transitioning into DEEP_SLEEP/SRDENT_OFF
> > when
> > + * new Frame Change event comes in. It is ok to do
> > it
> > + * here for both Frame Change mecanisms (trans
> > push
> > + * and register write).
> > + */
> > + intel_psr_wait_for_idle_dsb(new_crtc_state-
> > >dsb_commit,
> > + new_crtc_state);
> > +
>
> If I understand correctly:
>
> For Fixed RR case:
> Suppose we are in PSR:
> Skip_wait_en is set.
> The portion around the Send Push will be like:
>
>
> -dsb_wait_vblank will no longer wait for the undelayed vblank (we are
> in
> PSR and skip_wait_en is set)
> -we send push -> to trigger frame change event for PSR HW.
>
> -After this PSR HW is supposed to receive the event and may be in
> transition period so we wait for idle dsb.(which internally makes
> sure
> that we are out of PSR)
>
> -We are not sure whether we are in active or in vblank region at this
> point of time so we want to use dsb_wait_vblank. The skip_wait_en
> will
> now not come in picture since we have made sure that we are not in
> PSR
> in previous step.
>
> Then other steps will be similar to what we have been doing.
>
> Is my understanding correct?
>
> What happens when Panel Replay is in picture, given we can have PR
> enable with Variable Refresh Rate timings.
I don't know how having VRR enabled would impact this sequence? send
push triggers "Frame Change" event -> possible PR active is exited ->
wait for vblank -> wait_for_delayed_vblank -> check push is sent.
Do you have something specific in your mind?
BR,
Jouni Högander
>
>
> Regards,
>
> Ankit
>
> > /*
> > * In case PSR uses trans push as a "frame change"
> > event and
> > * VRR is not in use we need to wait vblank.
> > Othervise we may
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 6/8] drm/i915/psr: Wait for idle only after possible send push
2026-01-23 6:37 ` Hogander, Jouni
@ 2026-01-23 11:33 ` Nautiyal, Ankit K
0 siblings, 0 replies; 21+ messages in thread
From: Nautiyal, Ankit K @ 2026-01-23 11:33 UTC (permalink / raw)
To: Hogander, Jouni, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
On 1/23/2026 12:07 PM, Hogander, Jouni wrote:
> On Fri, 2026-01-23 at 10:42 +0530, Nautiyal, Ankit K wrote:
>> On 12/23/2025 4:21 PM, Jouni Högander wrote:
>>> We are planning to move using trans push mechanism to trigger the
>>> Frame
>>> Change event. in that case we can't wait PSR to idle before send
Typo: s/in/In
>>> push
>>> happens. Due to this move wait for idle to be done after possible
>>> send push
>>> is done.
>>>
>>> This should be ok for Frame Change event triggered by register
>>> write as
>>> well. Wait for idle is needed only for corner case where PSR is
>>> transitioning into DEEP_SLEEP when Frame Change event is triggered.
>>> It just
>>> has to be before wait for vblank. Otherwise we may have vblank
>>> before PSR
>>> enters DEEP_SLEEP and still using old frame buffers for first frame
>>> after
>>> wake up.
>>>
>>> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/display/intel_display.c | 13 ++++++++++---
>>> 1 file changed, 10 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>>> b/drivers/gpu/drm/i915/display/intel_display.c
>>> index c7ca4f53b8b8..1aca4802b7d5 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>>> @@ -7333,9 +7333,6 @@ static void intel_atomic_dsb_finish(struct
>>> intel_atomic_state *state,
>>> intel_psr_trigger_frame_change_event(new_crtc_stat
>>> e->dsb_commit,
>>> state, crtc);
>>>
>>> - intel_psr_wait_for_idle_dsb(new_crtc_state-
>>>> dsb_commit,
>>> - new_crtc_state);
>>> -
>>> if (new_crtc_state->use_dsb)
>>> intel_dsb_vblank_evade(state,
>>> new_crtc_state->dsb_commit);
>>>
>>> @@ -7375,6 +7372,16 @@ static void intel_atomic_dsb_finish(struct
>>> intel_atomic_state *state,
>>>
>>> intel_vrr_send_push(new_crtc_state->dsb_commit,
>>> new_crtc_state);
>>>
>>> + /*
>>> + * Wait for idle is needed for corner case where
>>> PSR HW
>>> + * is transitioning into DEEP_SLEEP/SRDENT_OFF
>>> when
>>> + * new Frame Change event comes in. It is ok to do
>>> it
>>> + * here for both Frame Change mecanisms (trans
s/mecanisms/mechanism
>>> push
>>> + * and register write).
>>> + */
>>> + intel_psr_wait_for_idle_dsb(new_crtc_state-
>>>> dsb_commit,
>>> + new_crtc_state);
>>> +
>> If I understand correctly:
>>
>> For Fixed RR case:
>> Suppose we are in PSR:
>> Skip_wait_en is set.
>> The portion around the Send Push will be like:
>>
>>
>> -dsb_wait_vblank will no longer wait for the undelayed vblank (we are
>> in
>> PSR and skip_wait_en is set)
>> -we send push -> to trigger frame change event for PSR HW.
>>
>> -After this PSR HW is supposed to receive the event and may be in
>> transition period so we wait for idle dsb.(which internally makes
>> sure
>> that we are out of PSR)
>>
>> -We are not sure whether we are in active or in vblank region at this
>> point of time so we want to use dsb_wait_vblank. The skip_wait_en
>> will
>> now not come in picture since we have made sure that we are not in
>> PSR
>> in previous step.
>>
>> Then other steps will be similar to what we have been doing.
>>
>> Is my understanding correct?
>>
>> What happens when Panel Replay is in picture, given we can have PR
>> enable with Variable Refresh Rate timings.
> I don't know how having VRR enabled would impact this sequence? send
> push triggers "Frame Change" event -> possible PR active is exited ->
> wait for vblank -> wait_for_delayed_vblank -> check push is sent.
>
> Do you have something specific in your mind?
Hmm yes you are right, as you have mentioned with skip_wait_en chicken
bit will make DSB jump the wait when Panel Replay is enabled.
Lets say we have VRR : ON and Panel Replay enabled.
-dsb_wait_vblank will no longer wait for the undelayed vblank (we are in PR and skip_wait_en is set)
-we send push with send push bit and the frame change bit set.
This will now happen earlier than the case where Panel Replay was not in picture, perhaps can be in active region.
This will also result in frame change event for PSR/PR HW.
-we then call intel_psr_wait_for_idle_dsb() that will make sure PR is out from deep sleep state.
-We now wait for undelayed vblank which DSB will not jump because HW is not in Panel Replay active mode.
-Then wait for delayed vblank, and check push sent etc should work as before.
Only thing to check now is DC balance thing done by DMC FW, but I guess since HW is not in Panel Replay active state, it would not expect anything different than the non Panel Replay situation.
In all, theoretically sequence looks alright to me.
There are a few nitpicks in commit message and comment.
Otherwise the patch LGTM.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>
> BR,
> Jouni Högander
>
>>
>> Regards,
>>
>> Ankit
>>
>>> /*
>>> * In case PSR uses trans push as a "frame change"
>>> event and
>>> * VRR is not in use we need to wait vblank.
>>> Othervise we may
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2026-01-23 11:34 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-12-23 10:51 [PATCH v9 0/8] Use trans push mechanism to generate frame change event Jouni Högander
2025-12-23 10:51 ` [PATCH v9 1/8] drm/i915/psr: Add TRANS_PUSH register bit definition for PSR Jouni Högander
2025-12-23 10:51 ` [PATCH v9 2/8] drm/i915/psr: Add intel_psr_use_trans_push to query if TRANS_PUSH is used Jouni Högander
2025-12-23 10:51 ` [PATCH v9 3/8] drm/i915/vrr: Prepare to Use TRANS_PUSH mechanism for PSR frame change Jouni Högander
2026-01-22 11:04 ` Nautiyal, Ankit K
2026-01-22 11:39 ` Hogander, Jouni
2025-12-23 10:51 ` [PATCH v9 4/8] drm/i915/dsb: Set DSB_SKIP_WAITS_EN chicken bit for LunarLake and onwards Jouni Högander
2026-01-23 4:41 ` Nautiyal, Ankit K
2026-01-23 6:19 ` Hogander, Jouni
2025-12-23 10:51 ` [PATCH v9 5/8] drm/i915/display: Wait for vblank in case of PSR is using trans push Jouni Högander
2025-12-23 10:51 ` [PATCH v9 6/8] drm/i915/psr: Wait for idle only after possible send push Jouni Högander
2026-01-23 5:12 ` Nautiyal, Ankit K
2026-01-23 6:37 ` Hogander, Jouni
2026-01-23 11:33 ` Nautiyal, Ankit K
2025-12-23 10:51 ` [PATCH v9 7/8] drm/i915/psr: Do PSR exit on frontbuffer flush on LunarLake and onwards Jouni Högander
2026-01-23 6:18 ` Nautiyal, Ankit K
2025-12-23 10:51 ` [PATCH v9 8/8] drm/i915/psr: Use TRANS_PUSH to trigger frame change event Jouni Högander
2026-01-22 11:04 ` Nautiyal, Ankit K
2026-01-22 11:43 ` Hogander, Jouni
2025-12-23 12:23 ` ✓ i915.CI.BAT: success for Use trans push mechanism to generate " Patchwork
2025-12-24 17:26 ` ✓ i915.CI.Full: " Patchwork
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